blob: 310df79123c930f9f47c51235a006fe316ad2d75 [file] [log] [blame]
Andy Yan49c50412019-11-14 11:22:18 +08001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2/*
3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd.
4 */
5
6#include <common.h>
7#include <dm.h>
8#include <ram.h>
9#include <syscon.h>
10#include <asm/arch/grf_rk3308.h>
11#include <asm/arch-rockchip/clock.h>
12#include <asm/arch-rockchip/sdram.h>
13
14struct dram_info {
15 struct ram_info info;
16 struct rk3308_grf *grf;
17};
18
19static int rk3308_dmc_probe(struct udevice *dev)
20{
21 struct dram_info *priv = dev_get_priv(dev);
22
23 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
24 priv->info.base = CONFIG_SYS_SDRAM_BASE;
25 priv->info.size = rockchip_sdram_size((phys_addr_t)&priv->grf->os_reg2);
26
27 return 0;
28}
29
30static int rk3308_dmc_get_info(struct udevice *dev, struct ram_info *info)
31{
32 struct dram_info *priv = dev_get_priv(dev);
33
34 *info = priv->info;
35
36 return 0;
37}
38
39static struct ram_ops rk3308_dmc_ops = {
40 .get_info = rk3308_dmc_get_info,
41};
42
43static const struct udevice_id rk3308_dmc_ids[] = {
44 { .compatible = "rockchip,rk3308-dmc" },
45 { }
46};
47
48U_BOOT_DRIVER(dmc_rk3308) = {
49 .name = "rockchip_rk3308_dmc",
50 .id = UCLASS_RAM,
51 .of_match = rk3308_dmc_ids,
52 .ops = &rk3308_dmc_ops,
53 .probe = rk3308_dmc_probe,
54 .priv_auto_alloc_size = sizeof(struct dram_info),
55};