Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2013 Freescale Semiconductor, Inc. |
| 4 | * |
| 5 | * Configuration settings for the phytec PCM-052 SoM. |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __CONFIG_H |
| 9 | #define __CONFIG_H |
| 10 | |
| 11 | #include <asm/arch/imx-regs.h> |
Lukasz Majewski | ec477ec | 2019-02-13 22:46:51 +0100 | [diff] [blame] | 12 | #include <linux/sizes.h> |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 13 | |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 14 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 15 | |
| 16 | /* Enable passing of ATAGs */ |
| 17 | #define CONFIG_CMDLINE_TAG |
| 18 | |
| 19 | /* Size of malloc() pool */ |
Lukasz Majewski | ec477ec | 2019-02-13 22:46:51 +0100 | [diff] [blame] | 20 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * SZ_1M) |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 21 | |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 22 | /* Allow to overwrite serial and ethaddr */ |
| 23 | #define CONFIG_ENV_OVERWRITE |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 24 | |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 25 | /* NAND support */ |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 26 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
| 27 | |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 28 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 29 | /* QSPI Configs*/ |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 30 | #ifdef CONFIG_FSL_QSPI |
Lukasz Majewski | ec477ec | 2019-02-13 22:46:51 +0100 | [diff] [blame] | 31 | #define FSL_QSPI_FLASH_SIZE (SZ_16M) |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 32 | #define FSL_QSPI_FLASH_NUM 2 |
| 33 | #define CONFIG_SYS_FSL_QSPI_LE |
| 34 | #endif |
| 35 | |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 36 | |
| 37 | #define CONFIG_LOADADDR 0x82000000 |
| 38 | |
| 39 | /* We boot from the gfxRAM area of the OCRAM. */ |
Stefan Agner | 1faaa3c | 2017-10-17 13:59:19 +0200 | [diff] [blame] | 40 | #define CONFIG_BOARD_SIZE_LIMIT 520192 |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 41 | |
Albert ARIBAUD \(3ADEV\) | ddef3b6 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 42 | /* if no target-specific extra environment settings were defined by the |
| 43 | target, define an empty one */ |
| 44 | #ifndef PCM052_EXTRA_ENV_SETTINGS |
| 45 | #define PCM052_EXTRA_ENV_SETTINGS |
| 46 | #endif |
| 47 | |
| 48 | /* if no target-specific boot command was defined by the target, |
| 49 | define an empty one */ |
| 50 | #ifndef PCM052_BOOTCOMMAND |
| 51 | #define PCM052_BOOTCOMMAND |
| 52 | #endif |
| 53 | |
| 54 | /* if no target-specific extra environment settings were defined by the |
| 55 | target, define an empty one */ |
| 56 | #ifndef PCM052_NET_INIT |
| 57 | #define PCM052_NET_INIT |
| 58 | #endif |
| 59 | |
| 60 | /* boot command, including the target-defined one if any */ |
| 61 | #define CONFIG_BOOTCOMMAND PCM052_BOOTCOMMAND "run bootcmd_nand" |
| 62 | |
| 63 | /* Extra env settings (including the target-defined ones if any) */ |
Albert ARIBAUD (3ADEV) | a3a095c | 2015-10-11 20:06:39 +0200 | [diff] [blame] | 64 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Albert ARIBAUD \(3ADEV\) | ddef3b6 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 65 | PCM052_EXTRA_ENV_SETTINGS \ |
| 66 | "autoload=no\0" \ |
Albert ARIBAUD (3ADEV) | a3a095c | 2015-10-11 20:06:39 +0200 | [diff] [blame] | 67 | "fdt_high=0xffffffff\0" \ |
| 68 | "initrd_high=0xffffffff\0" \ |
Albert ARIBAUD \(3ADEV\) | 2e9f494 | 2016-09-26 09:08:06 +0200 | [diff] [blame] | 69 | "blimg_file=u-boot.vyb\0" \ |
| 70 | "blimg_addr=0x81000000\0" \ |
Albert ARIBAUD (3ADEV) | a3a095c | 2015-10-11 20:06:39 +0200 | [diff] [blame] | 71 | "kernel_file=zImage\0" \ |
| 72 | "kernel_addr=0x82000000\0" \ |
Albert ARIBAUD \(3ADEV\) | cb2b567 | 2016-09-26 09:08:04 +0200 | [diff] [blame] | 73 | "fdt_file=zImage.dtb\0" \ |
Albert ARIBAUD (3ADEV) | a3a095c | 2015-10-11 20:06:39 +0200 | [diff] [blame] | 74 | "fdt_addr=0x81000000\0" \ |
| 75 | "ram_file=uRamdisk\0" \ |
| 76 | "ram_addr=0x83000000\0" \ |
| 77 | "filesys=rootfs.ubifs\0" \ |
| 78 | "sys_addr=0x81000000\0" \ |
| 79 | "tftploc=/path/to/tftp/directory/\0" \ |
| 80 | "nfs_root=/path/to/nfs/root\0" \ |
| 81 | "tftptimeout=1000\0" \ |
| 82 | "tftptimeoutcountmax=1000000\0" \ |
Tom Rini | 5ad8e11 | 2017-10-22 17:55:07 -0400 | [diff] [blame] | 83 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ |
Albert ARIBAUD \(3ADEV\) | 99208d9 | 2016-09-26 09:08:07 +0200 | [diff] [blame] | 84 | "bootargs_base=setenv bootargs rw " \ |
| 85 | " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \ |
Albert ARIBAUD (3ADEV) | a3a095c | 2015-10-11 20:06:39 +0200 | [diff] [blame] | 86 | "console=ttyLP1,115200n8\0" \ |
| 87 | "bootargs_sd=setenv bootargs ${bootargs} " \ |
| 88 | "root=/dev/mmcblk0p2 rootwait\0" \ |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 89 | "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \ |
Albert ARIBAUD (3ADEV) | a3a095c | 2015-10-11 20:06:39 +0200 | [diff] [blame] | 90 | "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \ |
| 91 | "bootargs_nand=setenv bootargs ${bootargs} " \ |
Albert ARIBAUD \(3ADEV\) | 98585b4 | 2016-09-26 09:08:03 +0200 | [diff] [blame] | 92 | "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \ |
Albert ARIBAUD (3ADEV) | a3a095c | 2015-10-11 20:06:39 +0200 | [diff] [blame] | 93 | "bootargs_ram=setenv bootargs ${bootargs} " \ |
| 94 | "root=/dev/ram rw initrd=${ram_addr}\0" \ |
| 95 | "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ |
| 96 | "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \ |
| 97 | "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \ |
| 98 | "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \ |
| 99 | "bootz ${kernel_addr} - ${fdt_addr}\0" \ |
| 100 | "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \ |
| 101 | "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \ |
| 102 | "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \ |
| 103 | "bootz ${kernel_addr} - ${fdt_addr}\0" \ |
| 104 | "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \ |
| 105 | "nand read ${fdt_addr} dtb; " \ |
| 106 | "nand read ${kernel_addr} kernel; " \ |
| 107 | "bootz ${kernel_addr} - ${fdt_addr}\0" \ |
| 108 | "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \ |
| 109 | "nand read ${fdt_addr} dtb; " \ |
| 110 | "nand read ${kernel_addr} kernel; " \ |
Albert ARIBAUD \(3ADEV\) | 98585b4 | 2016-09-26 09:08:03 +0200 | [diff] [blame] | 111 | "nand read ${ram_addr} root; " \ |
Albert ARIBAUD (3ADEV) | a3a095c | 2015-10-11 20:06:39 +0200 | [diff] [blame] | 112 | "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \ |
Albert ARIBAUD \(3ADEV\) | ddef3b6 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 113 | "update_bootloader_from_tftp=" PCM052_NET_INIT \ |
| 114 | "if tftp ${blimg_addr} "\ |
Albert ARIBAUD \(3ADEV\) | 2e9f494 | 2016-09-26 09:08:06 +0200 | [diff] [blame] | 115 | "${tftpdir}${blimg_file}; then " \ |
| 116 | "mtdparts default; " \ |
Albert ARIBAUD (3ADEV) | a3a095c | 2015-10-11 20:06:39 +0200 | [diff] [blame] | 117 | "nand erase.part bootloader; " \ |
Albert ARIBAUD \(3ADEV\) | 2e9f494 | 2016-09-26 09:08:06 +0200 | [diff] [blame] | 118 | "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \ |
Albert ARIBAUD (3ADEV) | a3a095c | 2015-10-11 20:06:39 +0200 | [diff] [blame] | 119 | "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \ |
| 120 | "${kernel_file}; " \ |
| 121 | "then mtdparts default; " \ |
| 122 | "nand erase.part kernel; " \ |
| 123 | "nand write ${kernel_addr} kernel ${filesize}; " \ |
| 124 | "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \ |
| 125 | "nand erase.part dtb; " \ |
| 126 | "nand write ${fdt_addr} dtb ${filesize}; fi\0" \ |
Albert ARIBAUD \(3ADEV\) | ddef3b6 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 127 | "update_kernel_from_tftp=" PCM052_NET_INIT \ |
| 128 | "if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \ |
Albert ARIBAUD (3ADEV) | a3a095c | 2015-10-11 20:06:39 +0200 | [diff] [blame] | 129 | "then setenv fdtsize ${filesize}; " \ |
| 130 | "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \ |
| 131 | "mtdparts default; " \ |
| 132 | "nand erase.part dtb; " \ |
| 133 | "nand write ${fdt_addr} dtb ${fdtsize}; " \ |
| 134 | "nand erase.part kernel; " \ |
| 135 | "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \ |
Albert ARIBAUD \(3ADEV\) | ddef3b6 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 136 | "update_rootfs_from_tftp=" PCM052_NET_INIT \ |
| 137 | "if tftp ${sys_addr} ${tftpdir}${filesys}; " \ |
Albert ARIBAUD (3ADEV) | a3a095c | 2015-10-11 20:06:39 +0200 | [diff] [blame] | 138 | "then mtdparts default; " \ |
| 139 | "nand erase.part root; " \ |
| 140 | "ubi part root; " \ |
| 141 | "ubi create rootfs; " \ |
| 142 | "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \ |
Albert ARIBAUD \(3ADEV\) | ddef3b6 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 143 | "update_ramdisk_from_tftp=" PCM052_NET_INIT \ |
| 144 | "if tftp ${ram_addr} ${tftpdir}${ram_file}; " \ |
Albert ARIBAUD (3ADEV) | a3a095c | 2015-10-11 20:06:39 +0200 | [diff] [blame] | 145 | "then mtdparts default; " \ |
Albert ARIBAUD \(3ADEV\) | 98585b4 | 2016-09-26 09:08:03 +0200 | [diff] [blame] | 146 | "nand erase.part root; " \ |
| 147 | "nand write ${ram_addr} root ${filesize}; fi\0" |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 148 | |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 149 | /* Miscellaneous configurable options */ |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 150 | |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 151 | #define CONFIG_SYS_MEMTEST_START 0x80010000 |
| 152 | #define CONFIG_SYS_MEMTEST_END 0x87C00000 |
| 153 | |
| 154 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| 155 | |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 156 | /* Physical memory map */ |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 157 | #define PHYS_SDRAM (0x80000000) |
Lukasz Majewski | ec477ec | 2019-02-13 22:46:51 +0100 | [diff] [blame] | 158 | #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * SZ_1M) |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 159 | |
| 160 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| 161 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 162 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| 163 | |
| 164 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 165 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 166 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 167 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 168 | |
Masahiro Yamada | 8cea9b5 | 2017-02-11 22:43:54 +0900 | [diff] [blame] | 169 | /* environment organization */ |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 170 | #ifdef CONFIG_ENV_IS_IN_MMC |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 171 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
| 172 | #endif |
| 173 | |
Albert ARIBAUD \(3ADEV\) | 26ffbef | 2015-09-21 22:43:39 +0200 | [diff] [blame] | 174 | #endif |