blob: 2647bff891f86046a8388961af649c9165af8c9d [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glassefedba72017-01-16 07:03:58 -07002/*
3 * (C) Copyright 2016 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
Simon Glassefedba72017-01-16 07:03:58 -07005 */
6
7#include <common.h>
Simon Glass1fa70f82019-11-14 12:57:34 -07008#include <cpu_func.h>
Simon Glass590aef72017-01-16 07:03:59 -07009#include <debug_uart.h>
Simon Glass97589732020-05-10 11:40:02 -060010#include <init.h>
Simon Glass3d2d3b12023-09-19 21:00:05 -060011#include <asm/cpu.h>
Simon Glass86ed9c52021-11-03 21:09:08 -060012#include <asm/global_data.h>
Simon Glassefedba72017-01-16 07:03:58 -070013
Simon Glass3d2d3b12023-09-19 21:00:05 -060014DECLARE_GLOBAL_DATA_PTR;
15
Simon Glassefedba72017-01-16 07:03:58 -070016int cpu_has_64bit(void)
17{
18 return true;
19}
20
21void enable_caches(void)
22{
23 /* Not implemented */
24}
25
26void disable_caches(void)
27{
28 /* Not implemented */
29}
30
31int dcache_status(void)
32{
33 return true;
34}
35
36int x86_mp_init(void)
37{
38 /* Not implemented */
39 return 0;
40}
Simon Glass78a20d22017-01-16 07:04:08 -070041
Simon Glass05e12f72019-04-25 21:58:42 -060042int x86_cpu_reinit_f(void)
43{
Simon Glass3d2d3b12023-09-19 21:00:05 -060044 /* set the vendor to Intel so that native_calibrate_tsc() works */
45 gd->arch.x86_vendor = X86_VENDOR_INTEL;
46 gd->arch.has_mtrr = true;
47
Simon Glass05e12f72019-04-25 21:58:42 -060048 return 0;
49}
Simon Glass2d8b3c62020-09-22 12:45:26 -060050
51int cpu_phys_address_size(void)
52{
53 return CONFIG_CPU_ADDR_BITS;
54}
Simon Glassf3d73ea2022-01-04 03:51:13 -070055
56int x86_cpu_init_f(void)
57{
58 return 0;
59}
Simon Glass436393e2023-05-04 16:50:51 -060060
61#ifdef CONFIG_DEBUG_UART_BOARD_INIT
62void board_debug_uart_init(void)
63{
64 /* this was already done in SPL */
65}
66#endif