Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Simon Glass | efedba7 | 2017-01-16 07:03:58 -0700 | [diff] [blame] | 2 | /* |
3 | * (C) Copyright 2016 Google, Inc | ||||
4 | * Written by Simon Glass <sjg@chromium.org> | ||||
Simon Glass | efedba7 | 2017-01-16 07:03:58 -0700 | [diff] [blame] | 5 | */ |
6 | |||||
7 | #include <common.h> | ||||
Simon Glass | 1fa70f8 | 2019-11-14 12:57:34 -0700 | [diff] [blame] | 8 | #include <cpu_func.h> |
Simon Glass | 590aef7 | 2017-01-16 07:03:59 -0700 | [diff] [blame] | 9 | #include <debug_uart.h> |
Simon Glass | 9758973 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 10 | #include <init.h> |
Simon Glass | 3d2d3b1 | 2023-09-19 21:00:05 -0600 | [diff] [blame] | 11 | #include <asm/cpu.h> |
Simon Glass | 86ed9c5 | 2021-11-03 21:09:08 -0600 | [diff] [blame] | 12 | #include <asm/global_data.h> |
Simon Glass | efedba7 | 2017-01-16 07:03:58 -0700 | [diff] [blame] | 13 | |
Simon Glass | 3d2d3b1 | 2023-09-19 21:00:05 -0600 | [diff] [blame] | 14 | DECLARE_GLOBAL_DATA_PTR; |
15 | |||||
Simon Glass | efedba7 | 2017-01-16 07:03:58 -0700 | [diff] [blame] | 16 | int cpu_has_64bit(void) |
17 | { | ||||
18 | return true; | ||||
19 | } | ||||
20 | |||||
21 | void enable_caches(void) | ||||
22 | { | ||||
23 | /* Not implemented */ | ||||
24 | } | ||||
25 | |||||
26 | void disable_caches(void) | ||||
27 | { | ||||
28 | /* Not implemented */ | ||||
29 | } | ||||
30 | |||||
31 | int dcache_status(void) | ||||
32 | { | ||||
33 | return true; | ||||
34 | } | ||||
35 | |||||
36 | int x86_mp_init(void) | ||||
37 | { | ||||
38 | /* Not implemented */ | ||||
39 | return 0; | ||||
40 | } | ||||
Simon Glass | 78a20d2 | 2017-01-16 07:04:08 -0700 | [diff] [blame] | 41 | |
Simon Glass | 05e12f7 | 2019-04-25 21:58:42 -0600 | [diff] [blame] | 42 | int x86_cpu_reinit_f(void) |
43 | { | ||||
Simon Glass | 3d2d3b1 | 2023-09-19 21:00:05 -0600 | [diff] [blame] | 44 | /* set the vendor to Intel so that native_calibrate_tsc() works */ |
45 | gd->arch.x86_vendor = X86_VENDOR_INTEL; | ||||
46 | gd->arch.has_mtrr = true; | ||||
47 | |||||
Simon Glass | 05e12f7 | 2019-04-25 21:58:42 -0600 | [diff] [blame] | 48 | return 0; |
49 | } | ||||
Simon Glass | 2d8b3c6 | 2020-09-22 12:45:26 -0600 | [diff] [blame] | 50 | |
51 | int cpu_phys_address_size(void) | ||||
52 | { | ||||
53 | return CONFIG_CPU_ADDR_BITS; | ||||
54 | } | ||||
Simon Glass | f3d73ea | 2022-01-04 03:51:13 -0700 | [diff] [blame] | 55 | |
56 | int x86_cpu_init_f(void) | ||||
57 | { | ||||
58 | return 0; | ||||
59 | } | ||||
Simon Glass | 436393e | 2023-05-04 16:50:51 -0600 | [diff] [blame] | 60 | |
61 | #ifdef CONFIG_DEBUG_UART_BOARD_INIT | ||||
62 | void board_debug_uart_init(void) | ||||
63 | { | ||||
64 | /* this was already done in SPL */ | ||||
65 | } | ||||
66 | #endif |