Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 1 | /* |
ramneek mehresh | 3d33963 | 2012-04-18 19:39:53 +0000 | [diff] [blame] | 2 | * Copyright 2009-2012 Freescale Semiconductor, Inc. |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 3 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * Corenet DS style board configuration file |
| 9 | */ |
| 10 | #ifndef __CONFIG_H |
| 11 | #define __CONFIG_H |
| 12 | |
York Sun | 4bd582d | 2014-04-30 14:43:49 -0700 | [diff] [blame] | 13 | #define CONFIG_DISPLAY_BOARDINFO |
| 14 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 15 | #include "../board/freescale/common/ics307_clk.h" |
| 16 | |
Shaohui Xie | 25a2b39 | 2011-03-16 10:10:32 +0800 | [diff] [blame] | 17 | #ifdef CONFIG_RAMBOOT_PBL |
Aneesh Bansal | e0f5015 | 2015-06-16 10:36:00 +0530 | [diff] [blame] | 18 | #ifdef CONFIG_SECURE_BOOT |
Shaohui Xie | 25a2b39 | 2011-03-16 10:10:32 +0800 | [diff] [blame] | 19 | #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE |
| 20 | #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc |
Aneesh Bansal | e0f5015 | 2015-06-16 10:36:00 +0530 | [diff] [blame] | 21 | #ifdef CONFIG_NAND |
| 22 | #define CONFIG_RAMBOOT_NAND |
| 23 | #endif |
Aneesh Bansal | b69061d | 2015-06-16 10:36:43 +0530 | [diff] [blame] | 24 | #define CONFIG_BOOTSCRIPT_COPY_RAM |
Aneesh Bansal | e0f5015 | 2015-06-16 10:36:00 +0530 | [diff] [blame] | 25 | #else |
| 26 | #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE |
| 27 | #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc |
Masahiro Yamada | 8c2c7ec | 2014-03-11 11:05:16 +0900 | [diff] [blame] | 28 | #define CONFIG_SYS_FSL_PBL_PBI board/freescale/corenet_ds/pbi.cfg |
Shaohui Xie | ea65fd8 | 2012-08-10 02:49:35 +0000 | [diff] [blame] | 29 | #if defined(CONFIG_P3041DS) |
Masahiro Yamada | 8c2c7ec | 2014-03-11 11:05:16 +0900 | [diff] [blame] | 30 | #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p3041ds.cfg |
Shaohui Xie | ea65fd8 | 2012-08-10 02:49:35 +0000 | [diff] [blame] | 31 | #elif defined(CONFIG_P4080DS) |
Masahiro Yamada | 8c2c7ec | 2014-03-11 11:05:16 +0900 | [diff] [blame] | 32 | #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p4080ds.cfg |
Shaohui Xie | ea65fd8 | 2012-08-10 02:49:35 +0000 | [diff] [blame] | 33 | #elif defined(CONFIG_P5020DS) |
Masahiro Yamada | 8c2c7ec | 2014-03-11 11:05:16 +0900 | [diff] [blame] | 34 | #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5020ds.cfg |
Shaohui Xie | 171d0d2 | 2013-03-25 07:40:11 +0000 | [diff] [blame] | 35 | #elif defined(CONFIG_P5040DS) |
Masahiro Yamada | 8c2c7ec | 2014-03-11 11:05:16 +0900 | [diff] [blame] | 36 | #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5040ds.cfg |
Shaohui Xie | ea65fd8 | 2012-08-10 02:49:35 +0000 | [diff] [blame] | 37 | #endif |
Shaohui Xie | 25a2b39 | 2011-03-16 10:10:32 +0800 | [diff] [blame] | 38 | #endif |
Aneesh Bansal | e0f5015 | 2015-06-16 10:36:00 +0530 | [diff] [blame] | 39 | #endif |
Shaohui Xie | 25a2b39 | 2011-03-16 10:10:32 +0800 | [diff] [blame] | 40 | |
Liu Gang | b4611ee | 2012-08-09 05:10:03 +0000 | [diff] [blame] | 41 | #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE |
Liu Gang | 1e08458 | 2012-03-08 00:33:18 +0000 | [diff] [blame] | 42 | /* Set 1M boot space */ |
Liu Gang | b4611ee | 2012-08-09 05:10:03 +0000 | [diff] [blame] | 43 | #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_SYS_TEXT_BASE & 0xfff00000) |
| 44 | #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ |
| 45 | (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) |
Liu Gang | 1e08458 | 2012-03-08 00:33:18 +0000 | [diff] [blame] | 46 | #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc |
| 47 | #define CONFIG_SYS_NO_FLASH |
| 48 | #endif |
| 49 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 50 | /* High Level Configuration Options */ |
| 51 | #define CONFIG_BOOKE |
| 52 | #define CONFIG_E500 /* BOOKE e500 family */ |
| 53 | #define CONFIG_E500MC /* BOOKE e500mc family */ |
| 54 | #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 55 | #define CONFIG_MP /* support multiple processors */ |
| 56 | |
Kumar Gala | 5183213 | 2010-10-20 16:02:41 -0500 | [diff] [blame] | 57 | #ifndef CONFIG_SYS_TEXT_BASE |
Prabhakar Kushwaha | f203656 | 2014-01-14 11:34:26 +0530 | [diff] [blame] | 58 | #define CONFIG_SYS_TEXT_BASE 0xeff40000 |
Kumar Gala | 5183213 | 2010-10-20 16:02:41 -0500 | [diff] [blame] | 59 | #endif |
| 60 | |
Kumar Gala | e727a36 | 2011-01-12 02:48:53 -0600 | [diff] [blame] | 61 | #ifndef CONFIG_RESET_VECTOR_ADDRESS |
| 62 | #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc |
| 63 | #endif |
| 64 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 65 | #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ |
| 66 | #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS |
| 67 | #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ |
Ruchika Gupta | 12af67f | 2014-10-15 11:35:31 +0530 | [diff] [blame] | 68 | #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 69 | #define CONFIG_PCI /* Enable PCI/PCIE */ |
Robert P. J. Day | a809981 | 2016-05-03 19:52:49 -0400 | [diff] [blame] | 70 | #define CONFIG_PCIE1 /* PCIE controller 1 */ |
| 71 | #define CONFIG_PCIE2 /* PCIE controller 2 */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 72 | #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ |
| 73 | #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 74 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 75 | #define CONFIG_FSL_LAW /* Use common FSL init code */ |
| 76 | |
| 77 | #define CONFIG_ENV_OVERWRITE |
| 78 | |
| 79 | #ifdef CONFIG_SYS_NO_FLASH |
Liu Gang | b4611ee | 2012-08-09 05:10:03 +0000 | [diff] [blame] | 80 | #if !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) && !defined(CONFIG_RAMBOOT_PBL) |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 81 | #define CONFIG_ENV_IS_NOWHERE |
Liu Gang | 85bcd73 | 2012-03-08 00:33:20 +0000 | [diff] [blame] | 82 | #endif |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 83 | #else |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 84 | #define CONFIG_FLASH_CFI_DRIVER |
| 85 | #define CONFIG_SYS_FLASH_CFI |
York Sun | 7b1559d | 2011-06-30 11:00:56 -0700 | [diff] [blame] | 86 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
Shaohui Xie | c608389 | 2011-05-12 18:46:40 +0800 | [diff] [blame] | 87 | #endif |
| 88 | |
| 89 | #if defined(CONFIG_SPIFLASH) |
| 90 | #define CONFIG_SYS_EXTRA_ENV_RELOC |
| 91 | #define CONFIG_ENV_IS_IN_SPI_FLASH |
| 92 | #define CONFIG_ENV_SPI_BUS 0 |
| 93 | #define CONFIG_ENV_SPI_CS 0 |
| 94 | #define CONFIG_ENV_SPI_MAX_HZ 10000000 |
| 95 | #define CONFIG_ENV_SPI_MODE 0 |
| 96 | #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ |
| 97 | #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ |
| 98 | #define CONFIG_ENV_SECT_SIZE 0x10000 |
| 99 | #elif defined(CONFIG_SDCARD) |
| 100 | #define CONFIG_SYS_EXTRA_ENV_RELOC |
| 101 | #define CONFIG_ENV_IS_IN_MMC |
Fabio Estevam | ae8c45e | 2012-01-11 09:20:50 +0000 | [diff] [blame] | 102 | #define CONFIG_FSL_FIXED_MMC_LOCATION |
Shaohui Xie | c608389 | 2011-05-12 18:46:40 +0800 | [diff] [blame] | 103 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
| 104 | #define CONFIG_ENV_SIZE 0x2000 |
Prabhakar Kushwaha | f203656 | 2014-01-14 11:34:26 +0530 | [diff] [blame] | 105 | #define CONFIG_ENV_OFFSET (512 * 1658) |
Shaohui Xie | e04e16b | 2011-05-09 16:53:51 +0800 | [diff] [blame] | 106 | #elif defined(CONFIG_NAND) |
| 107 | #define CONFIG_SYS_EXTRA_ENV_RELOC |
| 108 | #define CONFIG_ENV_IS_IN_NAND |
| 109 | #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE |
Prabhakar Kushwaha | f203656 | 2014-01-14 11:34:26 +0530 | [diff] [blame] | 110 | #define CONFIG_ENV_OFFSET (7 * CONFIG_SYS_NAND_BLOCK_SIZE) |
Liu Gang | b4611ee | 2012-08-09 05:10:03 +0000 | [diff] [blame] | 111 | #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) |
Liu Gang | 85bcd73 | 2012-03-08 00:33:20 +0000 | [diff] [blame] | 112 | #define CONFIG_ENV_IS_IN_REMOTE |
| 113 | #define CONFIG_ENV_ADDR 0xffe20000 |
| 114 | #define CONFIG_ENV_SIZE 0x2000 |
Liu Gang | 170fae2 | 2012-03-08 00:33:15 +0000 | [diff] [blame] | 115 | #elif defined(CONFIG_ENV_IS_NOWHERE) |
| 116 | #define CONFIG_ENV_SIZE 0x2000 |
Shaohui Xie | c608389 | 2011-05-12 18:46:40 +0800 | [diff] [blame] | 117 | #else |
| 118 | #define CONFIG_ENV_IS_IN_FLASH |
Shaohui Xie | 25a2b39 | 2011-03-16 10:10:32 +0800 | [diff] [blame] | 119 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) |
Shaohui Xie | c608389 | 2011-05-12 18:46:40 +0800 | [diff] [blame] | 120 | #define CONFIG_ENV_SIZE 0x2000 |
| 121 | #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 122 | #endif |
| 123 | |
| 124 | #define CONFIG_SYS_CLK_FREQ get_board_sys_clk() /* sysclk for MPC85xx */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 125 | |
| 126 | /* |
| 127 | * These can be toggled for performance analysis, otherwise use default. |
| 128 | */ |
| 129 | #define CONFIG_SYS_CACHE_STASHING |
| 130 | #define CONFIG_BACKSIDE_L2_CACHE |
| 131 | #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E |
| 132 | #define CONFIG_BTB /* toggle branch predition */ |
York Sun | 147fde1 | 2011-01-10 12:02:58 +0000 | [diff] [blame] | 133 | #define CONFIG_DDR_ECC |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 134 | #ifdef CONFIG_DDR_ECC |
| 135 | #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER |
| 136 | #define CONFIG_MEM_INIT_VALUE 0xdeadbeef |
| 137 | #endif |
| 138 | |
| 139 | #define CONFIG_ENABLE_36BIT_PHYS |
| 140 | |
| 141 | #ifdef CONFIG_PHYS_64BIT |
| 142 | #define CONFIG_ADDR_MAP |
| 143 | #define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */ |
| 144 | #endif |
| 145 | |
York Sun | 18acc8b | 2010-09-28 15:20:36 -0700 | [diff] [blame] | 146 | #define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 147 | #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ |
| 148 | #define CONFIG_SYS_MEMTEST_END 0x00400000 |
| 149 | #define CONFIG_SYS_ALT_MEMTEST |
| 150 | #define CONFIG_PANIC_HANG /* do not reset board on panic */ |
| 151 | |
| 152 | /* |
Shaohui Xie | 25a2b39 | 2011-03-16 10:10:32 +0800 | [diff] [blame] | 153 | * Config the L3 Cache as L3 SRAM |
| 154 | */ |
| 155 | #define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE |
| 156 | #ifdef CONFIG_PHYS_64BIT |
| 157 | #define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE) |
| 158 | #else |
| 159 | #define CONFIG_SYS_INIT_L3_ADDR_PHYS CONFIG_SYS_INIT_L3_ADDR |
| 160 | #endif |
| 161 | #define CONFIG_SYS_L3_SIZE (1024 << 10) |
| 162 | #define CONFIG_SYS_INIT_L3_END (CONFIG_SYS_INIT_L3_ADDR + CONFIG_SYS_L3_SIZE) |
| 163 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 164 | #ifdef CONFIG_PHYS_64BIT |
| 165 | #define CONFIG_SYS_DCSRBAR 0xf0000000 |
| 166 | #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull |
| 167 | #endif |
| 168 | |
| 169 | /* EEPROM */ |
| 170 | #define CONFIG_ID_EEPROM |
| 171 | #define CONFIG_SYS_I2C_EEPROM_NXID |
| 172 | #define CONFIG_SYS_EEPROM_BUS_NUM 0 |
| 173 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 |
| 174 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
| 175 | |
| 176 | /* |
| 177 | * DDR Setup |
| 178 | */ |
| 179 | #define CONFIG_VERY_BIG_RAM |
| 180 | #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 |
| 181 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE |
| 182 | |
| 183 | #define CONFIG_DIMM_SLOTS_PER_CTLR 1 |
york | 0b2bb6d | 2010-07-02 22:25:59 +0000 | [diff] [blame] | 184 | #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 185 | |
| 186 | #define CONFIG_DDR_SPD |
York Sun | f062659 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 187 | #define CONFIG_SYS_FSL_DDR3 |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 188 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 189 | #define CONFIG_SYS_SPD_BUS_NUM 1 |
| 190 | #define SPD_EEPROM_ADDRESS1 0x51 |
| 191 | #define SPD_EEPROM_ADDRESS2 0x52 |
Kumar Gala | e38209e | 2011-02-09 02:00:08 +0000 | [diff] [blame] | 192 | #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 /* for p3041/p5010 */ |
York Sun | 269c7eb | 2010-10-18 13:46:49 -0700 | [diff] [blame] | 193 | #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 194 | |
| 195 | /* |
| 196 | * Local Bus Definitions |
| 197 | */ |
| 198 | |
| 199 | /* Set the local bus clock 1/8 of platform clock */ |
| 200 | #define CONFIG_SYS_LBC_LCRR LCRR_CLKDIV_8 |
| 201 | |
| 202 | #define CONFIG_SYS_FLASH_BASE 0xe0000000 /* Start of PromJet */ |
| 203 | #ifdef CONFIG_PHYS_64BIT |
| 204 | #define CONFIG_SYS_FLASH_BASE_PHYS 0xfe0000000ull |
| 205 | #else |
| 206 | #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE |
| 207 | #endif |
| 208 | |
Shaohui Xie | e04e16b | 2011-05-09 16:53:51 +0800 | [diff] [blame] | 209 | #define CONFIG_SYS_FLASH_BR_PRELIM \ |
Timur Tabi | b56570c | 2012-07-06 07:39:26 +0000 | [diff] [blame] | 210 | (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000) \ |
Shaohui Xie | e04e16b | 2011-05-09 16:53:51 +0800 | [diff] [blame] | 211 | | BR_PS_16 | BR_V) |
| 212 | #define CONFIG_SYS_FLASH_OR_PRELIM ((0xf8000ff7 & ~OR_GPCM_SCY & ~OR_GPCM_EHTR) \ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 213 | | OR_GPCM_SCY_8 | OR_GPCM_EHTR_CLEAR) |
| 214 | |
| 215 | #define CONFIG_SYS_BR1_PRELIM \ |
| 216 | (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V) |
| 217 | #define CONFIG_SYS_OR1_PRELIM 0xf8000ff7 |
| 218 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 219 | #define PIXIS_BASE 0xffdf0000 /* PIXIS registers */ |
| 220 | #ifdef CONFIG_PHYS_64BIT |
| 221 | #define PIXIS_BASE_PHYS 0xfffdf0000ull |
| 222 | #else |
| 223 | #define PIXIS_BASE_PHYS PIXIS_BASE |
| 224 | #endif |
| 225 | |
| 226 | #define CONFIG_SYS_BR3_PRELIM (BR_PHYS_ADDR(PIXIS_BASE_PHYS) | BR_PS_8 | BR_V) |
| 227 | #define CONFIG_SYS_OR3_PRELIM 0xffffeff7 /* 32KB but only 4k mapped */ |
| 228 | |
| 229 | #define PIXIS_LBMAP_SWITCH 7 |
| 230 | #define PIXIS_LBMAP_MASK 0xf0 |
| 231 | #define PIXIS_LBMAP_SHIFT 4 |
| 232 | #define PIXIS_LBMAP_ALTBANK 0x40 |
| 233 | |
| 234 | #define CONFIG_SYS_FLASH_QUIET_TEST |
| 235 | #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ |
| 236 | |
| 237 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ |
| 238 | #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ |
| 239 | #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ |
| 240 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ |
| 241 | |
Wolfgang Denk | 0708bc6 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 242 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 243 | |
Shaohui Xie | 25a2b39 | 2011-03-16 10:10:32 +0800 | [diff] [blame] | 244 | #if defined(CONFIG_RAMBOOT_PBL) |
| 245 | #define CONFIG_SYS_RAMBOOT |
| 246 | #endif |
| 247 | |
Kumar Gala | e38209e | 2011-02-09 02:00:08 +0000 | [diff] [blame] | 248 | /* Nand Flash */ |
Kumar Gala | e38209e | 2011-02-09 02:00:08 +0000 | [diff] [blame] | 249 | #ifdef CONFIG_NAND_FSL_ELBC |
| 250 | #define CONFIG_SYS_NAND_BASE 0xffa00000 |
| 251 | #ifdef CONFIG_PHYS_64BIT |
| 252 | #define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull |
| 253 | #else |
| 254 | #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE |
| 255 | #endif |
| 256 | |
| 257 | #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} |
| 258 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
Kumar Gala | e38209e | 2011-02-09 02:00:08 +0000 | [diff] [blame] | 259 | #define CONFIG_CMD_NAND |
| 260 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) |
| 261 | |
| 262 | /* NAND flash config */ |
| 263 | #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ |
| 264 | | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ |
| 265 | | BR_PS_8 /* Port Size = 8 bit */ \ |
| 266 | | BR_MS_FCM /* MSEL = FCM */ \ |
| 267 | | BR_V) /* valid */ |
| 268 | #define CONFIG_SYS_NAND_OR_PRELIM (0xFFFC0000 /* length 256K */ \ |
| 269 | | OR_FCM_PGS /* Large Page*/ \ |
| 270 | | OR_FCM_CSCT \ |
| 271 | | OR_FCM_CST \ |
| 272 | | OR_FCM_CHT \ |
| 273 | | OR_FCM_SCY_1 \ |
| 274 | | OR_FCM_TRLX \ |
| 275 | | OR_FCM_EHTR) |
| 276 | |
Shaohui Xie | e04e16b | 2011-05-09 16:53:51 +0800 | [diff] [blame] | 277 | #ifdef CONFIG_NAND |
| 278 | #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ |
| 279 | #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ |
| 280 | #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ |
| 281 | #define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ |
| 282 | #else |
| 283 | #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ |
| 284 | #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ |
| 285 | #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ |
| 286 | #define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ |
| 287 | #endif |
Shaohui Xie | e04e16b | 2011-05-09 16:53:51 +0800 | [diff] [blame] | 288 | #else |
| 289 | #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ |
| 290 | #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ |
Kumar Gala | d0af3b9 | 2011-08-31 09:50:13 -0500 | [diff] [blame] | 291 | #endif /* CONFIG_NAND_FSL_ELBC */ |
Kumar Gala | e38209e | 2011-02-09 02:00:08 +0000 | [diff] [blame] | 292 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 293 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
| 294 | #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 |
| 295 | #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS} |
| 296 | |
| 297 | #define CONFIG_BOARD_EARLY_INIT_F |
| 298 | #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ |
| 299 | #define CONFIG_MISC_INIT_R |
| 300 | |
| 301 | #define CONFIG_HWCONFIG |
| 302 | |
| 303 | /* define to use L1 as initial stack */ |
| 304 | #define CONFIG_L1_INIT_RAM |
| 305 | #define CONFIG_SYS_INIT_RAM_LOCK |
| 306 | #define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ |
| 307 | #ifdef CONFIG_PHYS_64BIT |
| 308 | #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf |
| 309 | #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR |
| 310 | /* The assembler doesn't like typecast */ |
| 311 | #define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ |
| 312 | ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ |
| 313 | CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) |
| 314 | #else |
| 315 | #define CONFIG_SYS_INIT_RAM_ADDR_PHYS CONFIG_SYS_INIT_RAM_ADDR /* Initial L1 address */ |
| 316 | #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0 |
| 317 | #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS |
| 318 | #endif |
Wolfgang Denk | 1c2e98e | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 319 | #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 320 | |
Wolfgang Denk | 0191e47 | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 321 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 322 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
| 323 | |
Prabhakar Kushwaha | f402731 | 2014-03-31 15:31:48 +0530 | [diff] [blame] | 324 | #define CONFIG_SYS_MONITOR_LEN (768 * 1024) |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 325 | #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */ |
| 326 | |
| 327 | /* Serial Port - controlled on board with jumper J8 |
| 328 | * open - index 2 |
| 329 | * shorted - index 1 |
| 330 | */ |
| 331 | #define CONFIG_CONS_INDEX 1 |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 332 | #define CONFIG_SYS_NS16550_SERIAL |
| 333 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
| 334 | #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) |
| 335 | |
| 336 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
| 337 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} |
| 338 | |
| 339 | #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) |
| 340 | #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) |
| 341 | #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) |
| 342 | #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) |
| 343 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 344 | /* I2C */ |
Heiko Schocher | f285074 | 2012-10-24 13:48:22 +0200 | [diff] [blame] | 345 | #define CONFIG_SYS_I2C |
| 346 | #define CONFIG_SYS_I2C_FSL |
| 347 | #define CONFIG_SYS_FSL_I2C_SPEED 400000 |
| 348 | #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F |
| 349 | #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 |
| 350 | #define CONFIG_SYS_FSL_I2C2_SPEED 400000 |
| 351 | #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F |
| 352 | #define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 353 | |
| 354 | /* |
| 355 | * RapidIO |
| 356 | */ |
Kumar Gala | 8975d7a | 2010-12-30 12:09:53 -0600 | [diff] [blame] | 357 | #define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 358 | #ifdef CONFIG_PHYS_64BIT |
Kumar Gala | 8975d7a | 2010-12-30 12:09:53 -0600 | [diff] [blame] | 359 | #define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 360 | #else |
Kumar Gala | 8975d7a | 2010-12-30 12:09:53 -0600 | [diff] [blame] | 361 | #define CONFIG_SYS_SRIO1_MEM_PHYS 0xa0000000 |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 362 | #endif |
Kumar Gala | 8975d7a | 2010-12-30 12:09:53 -0600 | [diff] [blame] | 363 | #define CONFIG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 364 | |
Kumar Gala | 8975d7a | 2010-12-30 12:09:53 -0600 | [diff] [blame] | 365 | #define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000 |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 366 | #ifdef CONFIG_PHYS_64BIT |
Kumar Gala | 8975d7a | 2010-12-30 12:09:53 -0600 | [diff] [blame] | 367 | #define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 368 | #else |
Kumar Gala | 8975d7a | 2010-12-30 12:09:53 -0600 | [diff] [blame] | 369 | #define CONFIG_SYS_SRIO2_MEM_PHYS 0xb0000000 |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 370 | #endif |
Kumar Gala | 8975d7a | 2010-12-30 12:09:53 -0600 | [diff] [blame] | 371 | #define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 372 | |
| 373 | /* |
Liu Gang | 4cc8532 | 2012-03-08 00:33:17 +0000 | [diff] [blame] | 374 | * for slave u-boot IMAGE instored in master memory space, |
| 375 | * PHYS must be aligned based on the SIZE |
| 376 | */ |
Liu Gang | 416dbfe | 2014-05-15 14:30:34 +0800 | [diff] [blame] | 377 | #define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull |
| 378 | #define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull |
| 379 | #define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ |
| 380 | #define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull |
Liu Gang | 85bcd73 | 2012-03-08 00:33:20 +0000 | [diff] [blame] | 381 | /* |
Liu Gang | d7b17a9 | 2012-08-09 05:09:59 +0000 | [diff] [blame] | 382 | * for slave UCODE and ENV instored in master memory space, |
Liu Gang | 85bcd73 | 2012-03-08 00:33:20 +0000 | [diff] [blame] | 383 | * PHYS must be aligned based on the SIZE |
| 384 | */ |
Liu Gang | 416dbfe | 2014-05-15 14:30:34 +0800 | [diff] [blame] | 385 | #define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull |
Liu Gang | 99e0c29 | 2012-08-09 05:10:02 +0000 | [diff] [blame] | 386 | #define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull |
| 387 | #define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ |
Liu Gang | d7b17a9 | 2012-08-09 05:09:59 +0000 | [diff] [blame] | 388 | |
Liu Gang | f420aa9 | 2012-03-08 00:33:21 +0000 | [diff] [blame] | 389 | /* slave core release by master*/ |
Liu Gang | 99e0c29 | 2012-08-09 05:10:02 +0000 | [diff] [blame] | 390 | #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 |
| 391 | #define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK 0x00000001 /* release core 0 */ |
Liu Gang | 4cc8532 | 2012-03-08 00:33:17 +0000 | [diff] [blame] | 392 | |
| 393 | /* |
Liu Gang | b4611ee | 2012-08-09 05:10:03 +0000 | [diff] [blame] | 394 | * SRIO_PCIE_BOOT - SLAVE |
Liu Gang | 1e08458 | 2012-03-08 00:33:18 +0000 | [diff] [blame] | 395 | */ |
Liu Gang | b4611ee | 2012-08-09 05:10:03 +0000 | [diff] [blame] | 396 | #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE |
| 397 | #define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR 0xFFE00000 |
| 398 | #define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \ |
| 399 | (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR) |
Liu Gang | 1e08458 | 2012-03-08 00:33:18 +0000 | [diff] [blame] | 400 | #endif |
| 401 | |
| 402 | /* |
Shaohui Xie | 5864979 | 2011-05-12 18:46:14 +0800 | [diff] [blame] | 403 | * eSPI - Enhanced SPI |
| 404 | */ |
Shaohui Xie | 5864979 | 2011-05-12 18:46:14 +0800 | [diff] [blame] | 405 | #define CONFIG_SF_DEFAULT_SPEED 10000000 |
| 406 | #define CONFIG_SF_DEFAULT_MODE 0 |
| 407 | |
| 408 | /* |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 409 | * General PCI |
| 410 | * Memory space is mapped 1-1, but I/O space must start from 0. |
| 411 | */ |
| 412 | |
| 413 | /* controller 1, direct to uli, tgtid 3, Base address 20000 */ |
| 414 | #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 |
| 415 | #ifdef CONFIG_PHYS_64BIT |
| 416 | #define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 |
| 417 | #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull |
| 418 | #else |
| 419 | #define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 |
| 420 | #define CONFIG_SYS_PCIE1_MEM_PHYS 0x80000000 |
| 421 | #endif |
| 422 | #define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ |
| 423 | #define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 |
| 424 | #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 |
| 425 | #ifdef CONFIG_PHYS_64BIT |
| 426 | #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull |
| 427 | #else |
| 428 | #define CONFIG_SYS_PCIE1_IO_PHYS 0xf8000000 |
| 429 | #endif |
| 430 | #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ |
| 431 | |
| 432 | /* controller 2, Slot 2, tgtid 2, Base address 201000 */ |
| 433 | #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 |
| 434 | #ifdef CONFIG_PHYS_64BIT |
| 435 | #define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 |
| 436 | #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull |
| 437 | #else |
| 438 | #define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 |
| 439 | #define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 |
| 440 | #endif |
| 441 | #define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ |
| 442 | #define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 |
| 443 | #define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 |
| 444 | #ifdef CONFIG_PHYS_64BIT |
| 445 | #define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull |
| 446 | #else |
| 447 | #define CONFIG_SYS_PCIE2_IO_PHYS 0xf8010000 |
| 448 | #endif |
| 449 | #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ |
| 450 | |
| 451 | /* controller 3, Slot 1, tgtid 1, Base address 202000 */ |
Trübenbach, Ralf | d8ec2c0 | 2011-04-20 13:04:47 +0000 | [diff] [blame] | 452 | #define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000 |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 453 | #ifdef CONFIG_PHYS_64BIT |
| 454 | #define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 |
| 455 | #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull |
| 456 | #else |
| 457 | #define CONFIG_SYS_PCIE3_MEM_BUS 0xc0000000 |
| 458 | #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc0000000 |
| 459 | #endif |
| 460 | #define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ |
| 461 | #define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 |
| 462 | #define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 |
| 463 | #ifdef CONFIG_PHYS_64BIT |
| 464 | #define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull |
| 465 | #else |
| 466 | #define CONFIG_SYS_PCIE3_IO_PHYS 0xf8020000 |
| 467 | #endif |
| 468 | #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ |
| 469 | |
Kumar Gala | 67a6dfe | 2010-07-09 09:12:18 -0500 | [diff] [blame] | 470 | /* controller 4, Base address 203000 */ |
| 471 | #define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 |
| 472 | #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull |
| 473 | #define CONFIG_SYS_PCIE4_MEM_SIZE 0x20000000 /* 512M */ |
| 474 | #define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 |
| 475 | #define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull |
| 476 | #define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ |
| 477 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 478 | /* Qman/Bman */ |
Haiying Wang | 325a12f | 2011-01-20 22:26:31 +0000 | [diff] [blame] | 479 | #define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 480 | #define CONFIG_SYS_BMAN_NUM_PORTALS 10 |
| 481 | #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 |
| 482 | #ifdef CONFIG_PHYS_64BIT |
| 483 | #define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull |
| 484 | #else |
| 485 | #define CONFIG_SYS_BMAN_MEM_PHYS CONFIG_SYS_BMAN_MEM_BASE |
| 486 | #endif |
| 487 | #define CONFIG_SYS_BMAN_MEM_SIZE 0x00200000 |
Jeffrey Ladouceur | ff2c646 | 2014-12-08 14:54:01 -0500 | [diff] [blame] | 488 | #define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000 |
| 489 | #define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000 |
| 490 | #define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE |
| 491 | #define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) |
| 492 | #define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \ |
| 493 | CONFIG_SYS_BMAN_CENA_SIZE) |
| 494 | #define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) |
| 495 | #define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08 |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 496 | #define CONFIG_SYS_QMAN_NUM_PORTALS 10 |
| 497 | #define CONFIG_SYS_QMAN_MEM_BASE 0xf4200000 |
| 498 | #ifdef CONFIG_PHYS_64BIT |
| 499 | #define CONFIG_SYS_QMAN_MEM_PHYS 0xff4200000ull |
| 500 | #else |
| 501 | #define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE |
| 502 | #endif |
| 503 | #define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000 |
Jeffrey Ladouceur | ff2c646 | 2014-12-08 14:54:01 -0500 | [diff] [blame] | 504 | #define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000 |
| 505 | #define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 |
| 506 | #define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE |
| 507 | #define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) |
| 508 | #define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ |
| 509 | CONFIG_SYS_QMAN_CENA_SIZE) |
| 510 | #define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) |
| 511 | #define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 512 | |
| 513 | #define CONFIG_SYS_DPAA_FMAN |
| 514 | #define CONFIG_SYS_DPAA_PME |
| 515 | /* Default address of microcode for the Linux Fman driver */ |
Timur Tabi | bb76366 | 2011-05-03 13:35:11 -0500 | [diff] [blame] | 516 | #if defined(CONFIG_SPIFLASH) |
| 517 | /* |
| 518 | * env is stored at 0x100000, sector size is 0x10000, ucode is stored after |
| 519 | * env, so we got 0x110000. |
| 520 | */ |
Timur Tabi | 275f4bb | 2011-11-22 09:21:25 -0600 | [diff] [blame] | 521 | #define CONFIG_SYS_QE_FW_IN_SPIFLASH |
Zhao Qiang | 83a9084 | 2014-03-21 16:21:44 +0800 | [diff] [blame] | 522 | #define CONFIG_SYS_FMAN_FW_ADDR 0x110000 |
Timur Tabi | bb76366 | 2011-05-03 13:35:11 -0500 | [diff] [blame] | 523 | #elif defined(CONFIG_SDCARD) |
| 524 | /* |
| 525 | * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is |
Prabhakar Kushwaha | f203656 | 2014-01-14 11:34:26 +0530 | [diff] [blame] | 526 | * about 825KB (1650 blocks), Env is stored after the image, and the env size is |
| 527 | * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. |
Timur Tabi | bb76366 | 2011-05-03 13:35:11 -0500 | [diff] [blame] | 528 | */ |
Timur Tabi | 275f4bb | 2011-11-22 09:21:25 -0600 | [diff] [blame] | 529 | #define CONFIG_SYS_QE_FMAN_FW_IN_MMC |
Zhao Qiang | 83a9084 | 2014-03-21 16:21:44 +0800 | [diff] [blame] | 530 | #define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680) |
Timur Tabi | bb76366 | 2011-05-03 13:35:11 -0500 | [diff] [blame] | 531 | #elif defined(CONFIG_NAND) |
Timur Tabi | 275f4bb | 2011-11-22 09:21:25 -0600 | [diff] [blame] | 532 | #define CONFIG_SYS_QE_FMAN_FW_IN_NAND |
Zhao Qiang | 83a9084 | 2014-03-21 16:21:44 +0800 | [diff] [blame] | 533 | #define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) |
Liu Gang | b4611ee | 2012-08-09 05:10:03 +0000 | [diff] [blame] | 534 | #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) |
Liu Gang | 1e08458 | 2012-03-08 00:33:18 +0000 | [diff] [blame] | 535 | /* |
| 536 | * Slave has no ucode locally, it can fetch this from remote. When implementing |
| 537 | * in two corenet boards, slave's ucode could be stored in master's memory |
| 538 | * space, the address can be mapped from slave TLB->slave LAW-> |
Liu Gang | b4611ee | 2012-08-09 05:10:03 +0000 | [diff] [blame] | 539 | * slave SRIO or PCIE outbound window->master inbound window-> |
| 540 | * master LAW->the ucode address in master's memory space. |
Liu Gang | 1e08458 | 2012-03-08 00:33:18 +0000 | [diff] [blame] | 541 | */ |
| 542 | #define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE |
Zhao Qiang | 83a9084 | 2014-03-21 16:21:44 +0800 | [diff] [blame] | 543 | #define CONFIG_SYS_FMAN_FW_ADDR 0xFFE00000 |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 544 | #else |
Timur Tabi | 275f4bb | 2011-11-22 09:21:25 -0600 | [diff] [blame] | 545 | #define CONFIG_SYS_QE_FMAN_FW_IN_NOR |
Zhao Qiang | 83a9084 | 2014-03-21 16:21:44 +0800 | [diff] [blame] | 546 | #define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 547 | #endif |
Timur Tabi | 275f4bb | 2011-11-22 09:21:25 -0600 | [diff] [blame] | 548 | #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 |
| 549 | #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 550 | |
| 551 | #ifdef CONFIG_SYS_DPAA_FMAN |
| 552 | #define CONFIG_FMAN_ENET |
Andy Fleming | 79ce05b | 2010-10-20 15:35:16 -0500 | [diff] [blame] | 553 | #define CONFIG_PHYLIB_10G |
| 554 | #define CONFIG_PHY_VITESSE |
| 555 | #define CONFIG_PHY_TERANETICS |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 556 | #endif |
| 557 | |
| 558 | #ifdef CONFIG_PCI |
Gabor Juhos | b445873 | 2013-05-30 07:06:12 +0000 | [diff] [blame] | 559 | #define CONFIG_PCI_INDIRECT_BRIDGE |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 560 | #define CONFIG_PCI_PNP /* do pci plug-and-play */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 561 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 562 | #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ |
| 563 | #define CONFIG_DOS_PARTITION |
| 564 | #endif /* CONFIG_PCI */ |
| 565 | |
| 566 | /* SATA */ |
| 567 | #ifdef CONFIG_FSL_SATA_V2 |
| 568 | #define CONFIG_LIBATA |
| 569 | #define CONFIG_FSL_SATA |
| 570 | |
| 571 | #define CONFIG_SYS_SATA_MAX_DEVICE 2 |
| 572 | #define CONFIG_SATA1 |
| 573 | #define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR |
| 574 | #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA |
| 575 | #define CONFIG_SATA2 |
| 576 | #define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR |
| 577 | #define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA |
| 578 | |
| 579 | #define CONFIG_LBA48 |
| 580 | #define CONFIG_CMD_SATA |
| 581 | #define CONFIG_DOS_PARTITION |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 582 | #endif |
| 583 | |
| 584 | #ifdef CONFIG_FMAN_ENET |
| 585 | #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x1c |
| 586 | #define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x1d |
| 587 | #define CONFIG_SYS_FM1_DTSEC3_PHY_ADDR 0x1e |
| 588 | #define CONFIG_SYS_FM1_DTSEC4_PHY_ADDR 0x1f |
| 589 | #define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 4 |
| 590 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 591 | #define CONFIG_SYS_FM2_DTSEC1_PHY_ADDR 0x1c |
| 592 | #define CONFIG_SYS_FM2_DTSEC2_PHY_ADDR 0x1d |
| 593 | #define CONFIG_SYS_FM2_DTSEC3_PHY_ADDR 0x1e |
| 594 | #define CONFIG_SYS_FM2_DTSEC4_PHY_ADDR 0x1f |
| 595 | #define CONFIG_SYS_FM2_10GEC1_PHY_ADDR 0 |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 596 | |
| 597 | #define CONFIG_SYS_TBIPA_VALUE 8 |
| 598 | #define CONFIG_MII /* MII PHY management */ |
| 599 | #define CONFIG_ETHPRIME "FM1@DTSEC1" |
| 600 | #define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ |
| 601 | #endif |
| 602 | |
| 603 | /* |
| 604 | * Environment |
| 605 | */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 606 | #define CONFIG_LOADS_ECHO /* echo on for serial download */ |
| 607 | #define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ |
| 608 | |
| 609 | /* |
| 610 | * Command line configuration. |
| 611 | */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 612 | #define CONFIG_CMD_ERRATA |
| 613 | #define CONFIG_CMD_IRQ |
Kumar Gala | aff60ff | 2011-08-31 09:16:02 -0500 | [diff] [blame] | 614 | #define CONFIG_CMD_REGINFO |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 615 | |
| 616 | #ifdef CONFIG_PCI |
| 617 | #define CONFIG_CMD_PCI |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 618 | #endif |
| 619 | |
| 620 | /* |
| 621 | * USB |
| 622 | */ |
ramneek mehresh | 3d33963 | 2012-04-18 19:39:53 +0000 | [diff] [blame] | 623 | #define CONFIG_HAS_FSL_DR_USB |
| 624 | #define CONFIG_HAS_FSL_MPH_USB |
| 625 | |
| 626 | #if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB) |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 627 | #define CONFIG_USB_EHCI |
| 628 | #define CONFIG_USB_EHCI_FSL |
| 629 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
ramneek mehresh | 3d33963 | 2012-04-18 19:39:53 +0000 | [diff] [blame] | 630 | #endif |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 631 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 632 | #ifdef CONFIG_MMC |
| 633 | #define CONFIG_FSL_ESDHC |
| 634 | #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR |
| 635 | #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 636 | #define CONFIG_GENERIC_MMC |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 637 | #define CONFIG_DOS_PARTITION |
| 638 | #endif |
| 639 | |
Ruchika Gupta | 12af67f | 2014-10-15 11:35:31 +0530 | [diff] [blame] | 640 | /* Hash command with SHA acceleration supported in hardware */ |
| 641 | #ifdef CONFIG_FSL_CAAM |
| 642 | #define CONFIG_CMD_HASH |
| 643 | #define CONFIG_SHA_HW_ACCEL |
| 644 | #endif |
| 645 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 646 | /* |
| 647 | * Miscellaneous configurable options |
| 648 | */ |
| 649 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 650 | #define CONFIG_CMDLINE_EDITING /* Command-line editing */ |
| 651 | #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ |
| 652 | #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 653 | #ifdef CONFIG_CMD_KGDB |
| 654 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 655 | #else |
| 656 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 657 | #endif |
| 658 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
| 659 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 660 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 661 | |
| 662 | /* |
| 663 | * For booting Linux, the board info and command line data |
Kumar Gala | 39ffcc1 | 2011-04-28 10:13:41 -0500 | [diff] [blame] | 664 | * have to be in the first 64 MB of memory, since this is |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 665 | * the maximum mapped by the Linux kernel during initialization. |
| 666 | */ |
Kumar Gala | 39ffcc1 | 2011-04-28 10:13:41 -0500 | [diff] [blame] | 667 | #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ |
| 668 | #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 669 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 670 | #ifdef CONFIG_CMD_KGDB |
| 671 | #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 672 | #endif |
| 673 | |
| 674 | /* |
| 675 | * Environment Configuration |
| 676 | */ |
Joe Hershberger | 257ff78 | 2011-10-13 13:03:47 +0000 | [diff] [blame] | 677 | #define CONFIG_ROOTPATH "/opt/nfsroot" |
Joe Hershberger | e4da248 | 2011-10-13 13:03:48 +0000 | [diff] [blame] | 678 | #define CONFIG_BOOTFILE "uImage" |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 679 | #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ |
| 680 | |
| 681 | /* default location for tftp and bootm */ |
| 682 | #define CONFIG_LOADADDR 1000000 |
| 683 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 684 | |
| 685 | #define CONFIG_BAUDRATE 115200 |
| 686 | |
Timur Tabi | f7886b7 | 2012-08-14 06:47:27 +0000 | [diff] [blame] | 687 | #ifdef CONFIG_P4080DS |
Ramneek Mehresh | a0cce27 | 2011-06-07 10:10:43 +0000 | [diff] [blame] | 688 | #define __USB_PHY_TYPE ulpi |
| 689 | #else |
| 690 | #define __USB_PHY_TYPE utmi |
| 691 | #endif |
| 692 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 693 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Emil Medve | b250d37 | 2010-08-31 22:57:43 -0500 | [diff] [blame] | 694 | "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ |
Ramneek Mehresh | a0cce27 | 2011-06-07 10:10:43 +0000 | [diff] [blame] | 695 | "bank_intlv=cs0_cs1;" \ |
ramneek mehresh | 1b57b00 | 2013-09-10 17:37:45 +0530 | [diff] [blame] | 696 | "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) ";"\ |
| 697 | "usb2:dr_mode=peripheral,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 698 | "netdev=eth0\0" \ |
Marek Vasut | 0b3176c | 2012-09-23 17:41:24 +0200 | [diff] [blame] | 699 | "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ |
| 700 | "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ |
Emil Medve | b250d37 | 2010-08-31 22:57:43 -0500 | [diff] [blame] | 701 | "tftpflash=tftpboot $loadaddr $uboot && " \ |
| 702 | "protect off $ubootaddr +$filesize && " \ |
| 703 | "erase $ubootaddr +$filesize && " \ |
| 704 | "cp.b $loadaddr $ubootaddr $filesize && " \ |
| 705 | "protect on $ubootaddr +$filesize && " \ |
| 706 | "cmp.b $loadaddr $ubootaddr $filesize\0" \ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 707 | "consoledev=ttyS0\0" \ |
| 708 | "ramdiskaddr=2000000\0" \ |
| 709 | "ramdiskfile=p4080ds/ramdisk.uboot\0" \ |
Scott Wood | b7f4b85 | 2016-07-19 17:52:06 -0500 | [diff] [blame] | 710 | "fdtaddr=1e00000\0" \ |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 711 | "fdtfile=p4080ds/p4080ds.dtb\0" \ |
Kim Phillips | 1dedccc | 2014-05-14 19:33:45 -0500 | [diff] [blame] | 712 | "bdev=sda3\0" |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 713 | |
| 714 | #define CONFIG_HDBOOT \ |
| 715 | "setenv bootargs root=/dev/$bdev rw " \ |
| 716 | "console=$consoledev,$baudrate $othbootargs;" \ |
| 717 | "tftp $loadaddr $bootfile;" \ |
| 718 | "tftp $fdtaddr $fdtfile;" \ |
| 719 | "bootm $loadaddr - $fdtaddr" |
| 720 | |
| 721 | #define CONFIG_NFSBOOTCOMMAND \ |
| 722 | "setenv bootargs root=/dev/nfs rw " \ |
| 723 | "nfsroot=$serverip:$rootpath " \ |
| 724 | "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ |
| 725 | "console=$consoledev,$baudrate $othbootargs;" \ |
| 726 | "tftp $loadaddr $bootfile;" \ |
| 727 | "tftp $fdtaddr $fdtfile;" \ |
| 728 | "bootm $loadaddr - $fdtaddr" |
| 729 | |
| 730 | #define CONFIG_RAMBOOTCOMMAND \ |
| 731 | "setenv bootargs root=/dev/ram rw " \ |
| 732 | "console=$consoledev,$baudrate $othbootargs;" \ |
| 733 | "tftp $ramdiskaddr $ramdiskfile;" \ |
| 734 | "tftp $loadaddr $bootfile;" \ |
| 735 | "tftp $fdtaddr $fdtfile;" \ |
| 736 | "bootm $loadaddr $ramdiskaddr $fdtaddr" |
| 737 | |
| 738 | #define CONFIG_BOOTCOMMAND CONFIG_HDBOOT |
| 739 | |
Ruchika Gupta | 8ca8d82 | 2010-12-15 17:02:08 +0000 | [diff] [blame] | 740 | #include <asm/fsl_secure_boot.h> |
Ruchika Gupta | 8ca8d82 | 2010-12-15 17:02:08 +0000 | [diff] [blame] | 741 | |
Kumar Gala | e1c0949 | 2010-07-15 16:49:03 -0500 | [diff] [blame] | 742 | #endif /* __CONFIG_H */ |