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git01.mediatek.com / filogic / uboot / 0997ee033eceba9927993a8b2afe485f9ad58789 / . / configs / pm9261_defconfig
blob: eb9387ce5fd2db64333839fd130143aef500b1c0 [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_ARM=y
Adam Fordd36b1022019-08-14 08:29:25 -0500[diff] [blame]2CONFIG_ARCH_CPU_INIT=y
Masahiro Yamadaaf908ee2015-02-20 17:04:01 +0900[diff] [blame]3CONFIG_ARCH_AT91=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]4CONFIG_SYS_TEXT_BASE=0
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]5CONFIG_TARGET_PM9261=y
Wenyou.Yang@microchip.com8f2bbde2017-07-21 17:04:56 +0800[diff] [blame]6CONFIG_SYS_MALLOC_F_LEN=0x2000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]7CONFIG_NR_DRAM_BANKS=1
Markus Klotzbuecher7bd60e62019-05-15 15:15:54 +0200[diff] [blame]8CONFIG_ENV_SIZE=0x10000
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]9CONFIG_ENV_SECT_SIZE=0x10000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]10CONFIG_DM_GPIO=y
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]11CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame^]12CONFIG_SYS_LOAD_ADDR=0x22000000
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]13CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261"
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]14CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]15CONFIG_USE_BOOTARGS=y
16CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 "
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]17# CONFIG_CONSOLE_MUX is not set
18CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Lokesh Vutlafbad3702016-10-08 14:41:44 -0400[diff] [blame]19# CONFIG_DISPLAY_CPUINFO is not set
Simon Glass7a99a872017-01-23 13:31:20 -0700[diff] [blame]20CONFIG_BOARD_EARLY_INIT_F=y
Adam Ford58dbf862018-02-06 07:58:59 -0600[diff] [blame]21# CONFIG_AUTO_COMPLETE is not set
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]22CONFIG_SYS_PROMPT="pm9261> "
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]23# CONFIG_CMD_BDI is not set
24# CONFIG_CMD_IMI is not set
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]25# CONFIG_CMD_LOADS is not set
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]26CONFIG_CMD_NAND=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]27# CONFIG_CMD_SETEXPR is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]28CONFIG_CMD_CACHE=y
Tom Rini5ad8e112017-10-22 17:55:07 -0400[diff] [blame]29CONFIG_MTDIDS_DEFAULT="nor0=physmap-flash.0,nand0=nand"
30CONFIG_MTDPARTS_DEFAULT="mtdparts=physmap-flash.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),-(rootfs);nand:-(nand)"
Wenyou.Yang@microchip.com8f2bbde2017-07-21 17:04:56 +0800[diff] [blame]31CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]32CONFIG_ENV_OVERWRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]33CONFIG_ENV_IS_IN_FLASH=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]34CONFIG_ENV_ADDR=0x10040000
Ilko Iliev75aca072021-04-23 15:06:02 +0200[diff] [blame]35# CONFIG_NET is not set
Wenyou.Yang@microchip.com8f2bbde2017-07-21 17:04:56 +0800[diff] [blame]36CONFIG_DM=y
Ilko Iliev269a8232019-03-11 13:06:24 +0100[diff] [blame]37CONFIG_BLK=y
Wenyou.Yang@microchip.com8f2bbde2017-07-21 17:04:56 +0800[diff] [blame]38CONFIG_CLK=y
39CONFIG_CLK_AT91=y
Wenyou.Yang@microchip.com8f2bbde2017-07-21 17:04:56 +0800[diff] [blame]40CONFIG_AT91_GPIO=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]41# CONFIG_MMC is not set
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]42CONFIG_MTD=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]43CONFIG_MTD_NOR_FLASH=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]44CONFIG_FLASH_CFI_DRIVER=y
45CONFIG_SYS_FLASH_CFI=y
Miquel Raynald0935362019-10-03 19:50:03 +0200[diff] [blame]46CONFIG_MTD_RAW_NAND=y
Stefan Roese23b37f92019-08-22 12:28:04 +0200[diff] [blame]47# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
Adam Ford9c519182018-07-08 08:11:07 -0500[diff] [blame]48CONFIG_NAND_ATMEL=y
Wenyou.Yang@microchip.com8f2bbde2017-07-21 17:04:56 +0800[diff] [blame]49CONFIG_DM_SPI_FLASH=y
Wenyou.Yang@microchip.com8f2bbde2017-07-21 17:04:56 +0800[diff] [blame]50CONFIG_SPI_FLASH_ATMEL=y
51CONFIG_SPI_FLASH_DATAFLASH=y
52CONFIG_PINCTRL=y
53CONFIG_PINCTRL_AT91=y
54CONFIG_DM_SERIAL=y
55CONFIG_ATMEL_USART=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]56CONFIG_SPI=y
Wenyou.Yang@microchip.com8f2bbde2017-07-21 17:04:56 +0800[diff] [blame]57CONFIG_DM_SPI=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]58CONFIG_USB=y
Ilko Iliev269a8232019-03-11 13:06:24 +0100[diff] [blame]59CONFIG_DM_VIDEO=y
Anatolij Gustschindba36702020-02-04 22:43:06 +0100[diff] [blame]60# CONFIG_VIDEO_BPP32 is not set
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]61CONFIG_LCD=y
Ilko Iliev75aca072021-04-23 15:06:02 +0200[diff] [blame]62CONFIG_REGEX=y