blob: 7819edddc6c6cf762a26dfa61ee3c7b2ecfc0f60 [file] [log] [blame]
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +09001/*
2 * include/configs/lager.h
3 * This file is lager board configuration.
4 *
5 * Copyright (C) 2013 Renesas Electronics Corporation
6 *
7 * SPDX-License-Identifier: GPL-2.0
8 */
9
10#ifndef __LAGER_H
11#define __LAGER_H
12
13#undef DEBUG
14#define CONFIG_ARMV7
15#define CONFIG_R8A7790
16#define CONFIG_RMOBILE
17#define CONFIG_RMOBILE_BOARD_STRING "Lager"
18#define CONFIG_SH_GPIO_PFC
19#define MACH_TYPE_LAGER 4538
20#define CONFIG_MACH_TYPE MACH_TYPE_LAGER
21
22#include <asm/arch/rmobile.h>
23
24#define CONFIG_CMD_EDITENV
25#define CONFIG_CMD_SAVEENV
26#define CONFIG_CMD_MEMORY
27#define CONFIG_CMD_DFL
28#define CONFIG_CMD_SDRAM
29#define CONFIG_CMD_RUN
30#define CONFIG_CMD_LOADS
31#define CONFIG_CMD_BOOTZ
32#define CONFIG_CMD_FLASH
33
34#define CONFIG_CMDLINE_TAG
35#define CONFIG_SETUP_MEMORY_TAGS
36#define CONFIG_INITRD_TAG
37#define CONFIG_CMDLINE_EDITING
38#define CONFIG_OF_LIBFDT
39
40/* #define CONFIG_OF_LIBFDT */
41#define BOARD_LATE_INIT
42
43#define CONFIG_BAUDRATE 38400
44#define CONFIG_BOOTDELAY 3
45#define CONFIG_BOOTARGS ""
46
47#define CONFIG_VERSION_VARIABLE
48#undef CONFIG_SHOW_BOOT_PROGRESS
49
50#define CONFIG_ARCH_CPU_INIT
51#define CONFIG_DISPLAY_CPUINFO
52#define CONFIG_DISPLAY_BOARDINFO
53#define CONFIG_BOARD_EARLY_INIT_F
54#define CONFIG_USE_ARCH_MEMSET
55#define CONFIG_USE_ARCH_MEMCPY
56#define CONFIG_TMU_TIMER
57
58/* STACK */
59#define CONFIG_SYS_INIT_SP_ADDR 0xE827fffc
60#define STACK_AREA_SIZE 0xC000
61#define LOW_LEVEL_MERAM_STACK \
62 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
63
64/* MEMORY */
65#define LAGER_SDRAM_BASE 0x40000000
66#define LAGER_SDRAM_SIZE (2048u * 1024 * 1024)
67#define LAGER_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
68
69#define CONFIG_SYS_LONGHELP
70#define CONFIG_SYS_CBSIZE 256
71#define CONFIG_SYS_PBSIZE 256
72#define CONFIG_SYS_MAXARGS 16
73#define CONFIG_SYS_BARGSIZE 512
74#define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 }
75
76/* SCIF */
77#define CONFIG_SCIF_CONSOLE
78#define CONFIG_CONS_SCIF0
79#define SCIF0_BASE 0xe6e60000
80#undef CONFIG_SYS_CONSOLE_INFO_QUIET
81#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
82#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
83
84#define CONFIG_SYS_MEMTEST_START (LAGER_SDRAM_BASE)
85#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
86 504 * 1024 * 1024)
87#undef CONFIG_SYS_ALT_MEMTEST
88#undef CONFIG_SYS_MEMTEST_SCRATCH
89#undef CONFIG_SYS_LOADS_BAUD_CHANGE
90
91#define CONFIG_SYS_SDRAM_BASE (LAGER_SDRAM_BASE)
92#define CONFIG_SYS_SDRAM_SIZE (LAGER_UBOOT_SDRAM_SIZE)
93#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fc0)
94#define CONFIG_NR_DRAM_BANKS 1
95
96#define CONFIG_SYS_MONITOR_BASE 0x00000000
97#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
98#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
99#define CONFIG_SYS_GBL_DATA_SIZE (256)
100#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
101
102/* USE NOR FLASH */
103#define CONFIG_SYS_TEXT_BASE 0x00000000
104#define CONFIG_SYS_FLASH_CFI
105#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
106#define CONFIG_FLASH_CFI_DRIVER
107#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
108#define CONFIG_FLASH_SHOW_PROGRESS 45
109#define CONFIG_SYS_FLASH_BASE 0x00000000
110#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */
111#define CONFIG_SYS_MAX_FLASH_SECT 1024
112#define CONFIG_SYS_MAX_FLASH_BANKS 1
113#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
114#define CONFIG_SYS_FLASH_BANKS_SIZES { (CONFIG_SYS_FLASH_SIZE) }
115#define CONFIG_SYS_FLASH_ERASE_TOUT 3000
116#define CONFIG_SYS_FLASH_WRITE_TOUT 3000
117#define CONFIG_SYS_FLASH_LOCK_TOUT 3000
118#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000
119
120/* ENV setting */
121#define CONFIG_ENV_IS_IN_FLASH
122#define CONFIG_ENV_OVERWRITE 1
123#define CONFIG_ENV_SECT_SIZE (256 * 1024)
124#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \
125 CONFIG_SYS_MONITOR_LEN)
126#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
127#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
128#define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN)
129
130/* Board Clock */
131#define CONFIG_BASE_CLK_FREQ 20000000u
132#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_BASE_CLK_FREQ / 2) /* EXT / 2 */
133#define CONFIG_PLL1_CLK_FREQ (CONFIG_BASE_CLK_FREQ * 156 / 2)
134#define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2)
135#define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
136#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_MP_CLK_FREQ
137
138#define CONFIG_SYS_TMU_CLK_DIV 4
139#define CONFIG_SYS_HZ 1000
140
141#endif /* __LAGER_H */