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git01.mediatek.com / filogic / uboot / c4eb6565f674775ffc0e28e85eb9930964527ba4 / . / configs / nanopi-r2s-rk3328_defconfig
blob: 985d02475ecea370e501d96208d00925b5cd5015 [file] [log] [blame]
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]3CONFIG_COUNTER_FREQUENCY=24000000
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]4CONFIG_ARCH_ROCKCHIP=y
Simon Glass035939e2021-07-10 21:14:30 -0600[diff] [blame]5CONFIG_SPL_GPIO=y
Tom Rinib2e0b322021-01-29 13:56:04 -0500[diff] [blame]6CONFIG_NR_DRAM_BANKS=1
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]7CONFIG_SF_DEFAULT_SPEED=20000000
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]8CONFIG_ENV_OFFSET=0x3F8000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]9CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2s"
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]10CONFIG_DM_RESET=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]11CONFIG_ROCKCHIP_RK3328=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]12CONFIG_DEBUG_UART_BASE=0xFF130000
13CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]14CONFIG_SYS_LOAD_ADDR=0x800800
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]15CONFIG_DEBUG_UART=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]16# CONFIG_ANDROID_BOOT_IMAGE is not set
17CONFIG_FIT=y
18CONFIG_FIT_VERBOSE=y
Jonas Karlmanb03dfd12024-02-17 00:22:32 +0000[diff] [blame]19CONFIG_SPL_FIT_SIGNATURE=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]20CONFIG_SPL_LOAD_FIT=y
Jonas Karlmanb03dfd12024-02-17 00:22:32 +0000[diff] [blame]21CONFIG_LEGACY_IMAGE_FORMAT=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]22CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2s.dtb"
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]23# CONFIG_DISPLAY_CPUINFO is not set
24CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]25CONFIG_SPL_MAX_SIZE=0x40000
26CONFIG_SPL_PAD_TO=0x7f8000
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]27# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Simon Glasse91ac4c2021-07-10 21:14:24 -0600[diff] [blame]28CONFIG_SPL_POWER=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]29CONFIG_SPL_ATF=y
30CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
31CONFIG_CMD_BOOTZ=y
Jonas Karlmanb03dfd12024-02-17 00:22:32 +0000[diff] [blame]32CONFIG_CMD_GPIO=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]33CONFIG_CMD_GPT=y
34CONFIG_CMD_MMC=y
35CONFIG_CMD_USB=y
36# CONFIG_CMD_SETEXPR is not set
37CONFIG_CMD_TIME=y
Jonas Karlmanb03dfd12024-02-17 00:22:32 +0000[diff] [blame]38CONFIG_CMD_REGULATOR=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]39CONFIG_SPL_OF_CONTROL=y
40CONFIG_TPL_OF_CONTROL=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]41CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
42CONFIG_TPL_OF_PLATDATA=y
43CONFIG_ENV_IS_IN_MMC=y
44CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinib7f02a62022-07-04 08:15:34 -0400[diff] [blame]45CONFIG_SYS_MMC_ENV_DEV=1
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]46CONFIG_TPL_DM=y
Jonas Karlmanb03dfd12024-02-17 00:22:32 +0000[diff] [blame]47CONFIG_SPL_DM_SEQ_ALIAS=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]48CONFIG_REGMAP=y
49CONFIG_SPL_REGMAP=y
50CONFIG_TPL_REGMAP=y
51CONFIG_SYSCON=y
52CONFIG_SPL_SYSCON=y
53CONFIG_TPL_SYSCON=y
54CONFIG_CLK=y
55CONFIG_SPL_CLK=y
56CONFIG_FASTBOOT_BUF_ADDR=0x800800
57CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
58CONFIG_ROCKCHIP_GPIO=y
59CONFIG_SYS_I2C_ROCKCHIP=y
60CONFIG_MMC_DW=y
61CONFIG_MMC_DW_ROCKCHIP=y
Jonas Karlmanb03dfd12024-02-17 00:22:32 +0000[diff] [blame]62CONFIG_PHY_MOTORCOMM=y
63CONFIG_PHY_REALTEK=y
64CONFIG_DM_MDIO=y
65CONFIG_DM_ETH_PHY=y
66CONFIG_PHY_GIGE=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]67CONFIG_ETH_DESIGNWARE=y
68CONFIG_GMAC_ROCKCHIP=y
Jagan Tekibf0e1342023-06-06 22:39:18 +0530[diff] [blame]69CONFIG_PHY_ROCKCHIP_INNO_USB2=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]70CONFIG_PINCTRL=y
71CONFIG_SPL_PINCTRL=y
72CONFIG_DM_PMIC=y
73CONFIG_PMIC_RK8XX=y
74CONFIG_SPL_DM_REGULATOR=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]75CONFIG_DM_REGULATOR_FIXED=y
76CONFIG_SPL_DM_REGULATOR_FIXED=y
Jonas Karlmanb03dfd12024-02-17 00:22:32 +0000[diff] [blame]77CONFIG_DM_REGULATOR_GPIO=y
78CONFIG_SPL_DM_REGULATOR_GPIO=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]79CONFIG_REGULATOR_RK8XX=y
80CONFIG_PWM_ROCKCHIP=y
81CONFIG_RAM=y
82CONFIG_SPL_RAM=y
83CONFIG_TPL_RAM=y
Jonas Karlmanb03dfd12024-02-17 00:22:32 +0000[diff] [blame]84CONFIG_DM_RNG=y
85CONFIG_RNG_ROCKCHIP=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]86CONFIG_BAUDRATE=1500000
87CONFIG_DEBUG_UART_SHIFT=2
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]88CONFIG_SYS_NS16550_MEM32=y
Tom Rinib2e0b322021-01-29 13:56:04 -0500[diff] [blame]89CONFIG_SYSINFO=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]90CONFIG_SYSRESET=y
91# CONFIG_TPL_SYSRESET is not set
92CONFIG_USB=y
93CONFIG_USB_XHCI_HCD=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]94CONFIG_USB_EHCI_HCD=y
95CONFIG_USB_EHCI_GENERIC=y
96CONFIG_USB_OHCI_HCD=y
97CONFIG_USB_OHCI_GENERIC=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]98CONFIG_USB_DWC2=y
99CONFIG_USB_DWC3=y
100# CONFIG_USB_DWC3_GADGET is not set
Jagan Teki94e59a12023-06-06 22:39:15 +0530[diff] [blame]101CONFIG_USB_DWC3_GENERIC=y
David Bauerdcde9f62021-01-07 00:06:11 +0100[diff] [blame]102CONFIG_USB_GADGET=y
103CONFIG_USB_GADGET_DWC2_OTG=y
104CONFIG_SPL_TINY_MEMSET=y
105CONFIG_TPL_TINY_MEMSET=y
106CONFIG_ERRNO_STR=y