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git01.mediatek.com / filogic / uboot / 44e5ba46e62d0f4407ef6f9199b1655a86e3e58a / . / configs / P1010RDB-PA_SDCARD_defconfig
blob: 41988bb1f72788981e54e592a2dbe56ec15c341e [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_PPC=y
Tom Rini0c4dded2022-03-30 09:30:15 -0400[diff] [blame]2CONFIG_SYS_IMMR=0xFFE00000
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x11001000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x100000
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]5CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame]6CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]7CONFIG_ENV_SIZE=0x2000
8CONFIG_ENV_OFFSET=0x0
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]9CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]10CONFIG_SPL_TEXT_BASE=0xD0001000
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]11CONFIG_SPL_MMC=y
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]12CONFIG_SPL_SERIAL=y
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]13CONFIG_SPL_DRIVERS_MISC=y
Tom Rini9bd09622018-04-07 20:27:54 -0400[diff] [blame]14CONFIG_SPL=y
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]15CONFIG_MPC85xx=y
York Sun7f945ca2016-11-16 13:30:06 -0800[diff] [blame]16CONFIG_TARGET_P1010RDB_PA=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]17CONFIG_FIT=y
18CONFIG_FIT_VERBOSE=y
19CONFIG_OF_BOARD_SETUP=y
20CONFIG_OF_STDOUT_VIA_ALIAS=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]21CONFIG_BOOTDELAY=10
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]22CONFIG_USE_BOOTCOMMAND=y
23CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]24CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Simon Glass7a99a872017-01-23 13:31:20 -0700[diff] [blame]25CONFIG_BOARD_EARLY_INIT_F=y
Mario Six75b23ed2018-03-28 14:38:15 +0200[diff] [blame]26CONFIG_BOARD_EARLY_INIT_R=y
Tom Rini623d67e2018-02-06 12:15:38 -0500[diff] [blame]27# CONFIG_SPL_FRAMEWORK is not set
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]28CONFIG_SPL_MAX_SIZE=0x18000
Tom Rinie5678e42019-06-01 14:20:25 -0400[diff] [blame]29CONFIG_SPL_MMC_BOOT=y
Tom Rini17845c52022-05-21 11:26:27 -0400[diff] [blame]30CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
Tom Rini6b15c162022-05-13 12:26:35 -0400[diff] [blame]31CONFIG_SPL_FLUSH_IMAGE=y
Tom Rinid75a7792022-05-27 16:19:05 -0400[diff] [blame]32CONFIG_SPL_GD_ADDR=0xd0018000
Tom Rini6de36a72022-05-26 16:59:30 -0400[diff] [blame]33CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
34CONFIG_SPL_RELOC_STACK=0xd001c000
35CONFIG_SPL_RELOC_MALLOC=y
36CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
37CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]38CONFIG_SPL_ENV_SUPPORT=y
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]39CONFIG_SPL_I2C=y
Simon Glass64571062021-08-08 12:20:16 -0600[diff] [blame]40CONFIG_SPL_MPC8XXX_INIT_DDR=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]41CONFIG_HUSH_PARSER=y
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame]42CONFIG_SYS_PBSIZE=276
Tuomas Tynkkynen28d56bd2017-10-08 21:48:01 +0300[diff] [blame]43CONFIG_CMD_IMLS=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]44CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
45CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]46CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]47CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]48CONFIG_CMD_USB=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]49CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]50CONFIG_CMD_PING=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]51CONFIG_CMD_EXT2=y
52CONFIG_CMD_FAT=y
Tom Rini5ad8e112017-10-22 17:55:07 -0400[diff] [blame]53CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
54CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]55CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]56CONFIG_ENV_OVERWRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]57CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]58CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rini5fb860c2022-02-25 11:19:48 -0500[diff] [blame]59CONFIG_USE_BOOTFILE=y
60CONFIG_BOOTFILE="uImage"
Tom Rinife586752022-03-11 09:12:07 -0500[diff] [blame]61CONFIG_USE_ETHPRIME=y
62CONFIG_ETHPRIME="eTSEC1"
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]63CONFIG_DM=y
Simon Glass231e7742022-01-31 07:49:37 -0700[diff] [blame]64CONFIG_SYS_SATA_MAX_DEVICE=2
Tom Rinia5c4d402017-03-01 16:51:58 -0500[diff] [blame]65CONFIG_FSL_CAAM=y
Tom Rinif7246c22021-08-21 13:50:17 -0400[diff] [blame]66CONFIG_DDR_CLK_FREQ=66666666
Tom Rini56184602022-02-25 11:19:53 -0500[diff] [blame]67CONFIG_CHIP_SELECTS_PER_CTRL=1
Tom Rinif8f6b322022-05-21 14:44:28 -0400[diff] [blame]68CONFIG_SPL_COMMON_INIT_DDR=y
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]69CONFIG_DM_I2C=y
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]70CONFIG_SPL_SYS_I2C_LEGACY=y
Tom Rinib1b13072021-08-18 23:12:37 -0400[diff] [blame]71CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Tom Rinibe94c762021-08-18 23:12:35 -0400[diff] [blame]72CONFIG_SYS_I2C_FSL=y
73CONFIG_SYS_FSL_I2C_OFFSET=0x3000
74CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
75CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]76CONFIG_FSL_ESDHC=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]77CONFIG_MTD=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]78CONFIG_MTD_NOR_FLASH=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]79CONFIG_FLASH_CFI_DRIVER=y
80CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
81CONFIG_SYS_FLASH_CFI=y
Tom Rini526e3c82020-10-05 13:11:41 -0400[diff] [blame]82CONFIG_DM_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]83CONFIG_SF_DEFAULT_SPEED=10000000
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]84CONFIG_SPI_FLASH_SPANSION=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]85CONFIG_PHY_ATHEROS=y
86CONFIG_PHY_BROADCOM=y
87CONFIG_PHY_DAVICOM=y
88CONFIG_PHY_LXT=y
Mario Sixf504d1a2018-04-27 14:52:21 +0200[diff] [blame]89CONFIG_PHY_MARVELL=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]90CONFIG_PHY_NATSEMI=y
91CONFIG_PHY_REALTEK=y
92CONFIG_PHY_SMSC=y
93CONFIG_PHY_VITESSE=y
Tom Rini526e3c82020-10-05 13:11:41 -0400[diff] [blame]94CONFIG_DM_ETH=y
95CONFIG_DM_MDIO=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]96CONFIG_PHY_GIGE=y
Simon Glass9008a5b2015-08-19 09:33:43 -0600[diff] [blame]97CONFIG_E1000=y
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]98CONFIG_MII=y
99CONFIG_TSEC_ENET=y
Hou Zhiqiangaa27f172020-05-01 19:06:29 +0800[diff] [blame]100CONFIG_PCIE_FSL=y
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]101CONFIG_DM_RTC=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]102CONFIG_SYS_NS16550=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]103CONFIG_SPI=y
Tom Rini526e3c82020-10-05 13:11:41 -0400[diff] [blame]104CONFIG_DM_SPI=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]105CONFIG_FSL_ESPI=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]106CONFIG_USB=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]107CONFIG_USB_EHCI_FSL=y