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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Rick Chen36cb27c2017-12-26 13:55:53 +08002/*
3 * Copyright (C) 2017 Andes Technology Corporation
4 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
Rick Chen36cb27c2017-12-26 13:55:53 +08005 */
6
Rick Chen36cb27c2017-12-26 13:55:53 +08007#include <common.h>
Simon Glass8e201882020-05-10 11:39:54 -06008#include <flash.h>
Simon Glass2dc9c342020-05-10 11:40:01 -06009#include <image.h>
Simon Glass8e16b1e2019-12-28 10:45:05 -070010#include <init.h>
Simon Glass274e0b02020-05-10 11:39:56 -060011#include <net.h>
Rick Chen36cb27c2017-12-26 13:55:53 +080012#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
13#include <netdev.h>
14#endif
Simon Glass3ba929a2020-10-30 21:38:53 -060015#include <asm/global_data.h>
Rick Chen36cb27c2017-12-26 13:55:53 +080016#include <linux/io.h>
Rick Chencea16d02018-05-29 11:07:53 +080017#include <faraday/ftsmc020.h>
18#include <fdtdec.h>
Rick Chen9e017162019-08-28 18:46:07 +080019#include <dm.h>
Rick Chenc3027d02019-11-14 13:52:22 +080020#include <spl.h>
Rick Chen36cb27c2017-12-26 13:55:53 +080021
22DECLARE_GLOBAL_DATA_PTR;
23
24/*
25 * Miscellaneous platform dependent initializations
26 */
27
28int board_init(void)
29{
Rick Chen36cb27c2017-12-26 13:55:53 +080030 gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
31
32 return 0;
33}
34
35int dram_init(void)
36{
Rick Chen92038262019-11-14 13:52:23 +080037 return fdtdec_setup_mem_size_base();
Rick Chen36cb27c2017-12-26 13:55:53 +080038}
39
40int dram_init_banksize(void)
41{
Rick Chen92038262019-11-14 13:52:23 +080042 return fdtdec_setup_memory_banksize();
Rick Chen36cb27c2017-12-26 13:55:53 +080043}
44
45#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +090046int board_eth_init(struct bd_info *bd)
Rick Chen36cb27c2017-12-26 13:55:53 +080047{
48 return ftmac100_initialize(bd);
49}
50#endif
51
52ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
53{
54 return 0;
55}
Rick Chen40a6fe72018-03-29 10:08:33 +080056
Ilias Apalodimasab5348a2021-10-26 09:12:33 +030057void *board_fdt_blob_setup(int *err)
Rick Chen40a6fe72018-03-29 10:08:33 +080058{
Ilias Apalodimasab5348a2021-10-26 09:12:33 +030059 *err = 0;
Leo Yu-Chi Liangd3a09ec2021-11-01 17:00:43 +080060#if defined(CONFIG_OF_BOARD)
Ilias Apalodimasdc35df42021-10-12 00:00:13 +030061 return (void *)(ulong)gd->arch.firmware_fdt_addr;
Leo Yu-Chi Liangd3a09ec2021-11-01 17:00:43 +080062#elif defined(CONFIG_OF_SEPARATE)
Rick Chen40a6fe72018-03-29 10:08:33 +080063 return (void *)CONFIG_SYS_FDT_BASE;
Ilias Apalodimasdc35df42021-10-12 00:00:13 +030064#else
Ilias Apalodimasab5348a2021-10-26 09:12:33 +030065 *err = -EINVAL;
Ilias Apalodimasdc35df42021-10-12 00:00:13 +030066 return NULL;
67#endif
Rick Chen40a6fe72018-03-29 10:08:33 +080068}
Rick Chencea16d02018-05-29 11:07:53 +080069
70int smc_init(void)
71{
72 int node = -1;
73 const char *compat = "andestech,atfsmc020";
74 void *blob = (void *)gd->fdt_blob;
75 fdt_addr_t addr;
76 struct ftsmc020_bank *regs;
77
78 node = fdt_node_offset_by_compatible(blob, -1, compat);
79 if (node < 0)
80 return -FDT_ERR_NOTFOUND;
81
Rick Chenca3e5e42020-07-17 16:24:44 +080082 addr = fdtdec_get_addr_size_auto_noparent(blob, node,
83 "reg", 0, NULL, false);
Rick Chencea16d02018-05-29 11:07:53 +080084
85 if (addr == FDT_ADDR_T_NONE)
86 return -EINVAL;
87
Bin Meng65d59952021-01-31 20:36:01 +080088 regs = (struct ftsmc020_bank *)(uintptr_t)addr;
Rick Chencea16d02018-05-29 11:07:53 +080089 regs->cr &= ~FTSMC020_BANK_WPROT;
90
91 return 0;
92}
93
Rick Chen9e017162019-08-28 18:46:07 +080094static void v5l2_init(void)
95{
96 struct udevice *dev;
97
98 uclass_get_device(UCLASS_CACHE, 0, &dev);
99}
100
Rick Chencea16d02018-05-29 11:07:53 +0800101#ifdef CONFIG_BOARD_EARLY_INIT_F
102int board_early_init_f(void)
103{
104 smc_init();
Rick Chen9e017162019-08-28 18:46:07 +0800105 v5l2_init();
Rick Chencea16d02018-05-29 11:07:53 +0800106
107 return 0;
108}
109#endif
Rick Chenc3027d02019-11-14 13:52:22 +0800110
111#ifdef CONFIG_SPL
112void board_boot_order(u32 *spl_boot_list)
113{
114 u8 i;
115 u32 boot_devices[] = {
116#ifdef CONFIG_SPL_RAM_SUPPORT
117 BOOT_DEVICE_RAM,
118#endif
Simon Glassb58bfe02021-08-08 12:20:09 -0600119#ifdef CONFIG_SPL_MMC
Rick Chenc3027d02019-11-14 13:52:22 +0800120 BOOT_DEVICE_MMC1,
121#endif
122 };
123
124 for (i = 0; i < ARRAY_SIZE(boot_devices); i++)
125 spl_boot_list[i] = boot_devices[i];
126}
127#endif
128
129#ifdef CONFIG_SPL_LOAD_FIT
130int board_fit_config_name_match(const char *name)
131{
132 /* boot using first FIT config */
133 return 0;
134}
135#endif