Tom Rini | 07edfae | 2018-02-03 12:10:38 -0500 | [diff] [blame] | 1 | CONFIG_SYS_TEXT_BASE=0 |
Tom Rini | 5cd7ece | 2019-11-18 20:02:10 -0500 | [diff] [blame] | 2 | CONFIG_ENV_SIZE=0x2000 |
Tom Rini | f226038 | 2018-08-16 08:16:24 -0400 | [diff] [blame] | 3 | CONFIG_NR_DRAM_BANKS=1 |
Tom Rini | 66ea5c7 | 2019-05-26 14:45:25 -0400 | [diff] [blame] | 4 | CONFIG_BOOTSTAGE_STASH_ADDR=0x0 |
Tom Rini | c9285bf | 2019-04-29 15:54:04 -0400 | [diff] [blame] | 5 | CONFIG_DISTRO_DEFAULTS=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 6 | CONFIG_FIT=y |
| 7 | CONFIG_FIT_SIGNATURE=y |
| 8 | CONFIG_FIT_VERBOSE=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 9 | CONFIG_BOOTSTAGE=y |
| 10 | CONFIG_BOOTSTAGE_REPORT=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 11 | CONFIG_BOOTSTAGE_FDT=y |
| 12 | CONFIG_BOOTSTAGE_STASH=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 13 | CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 |
| 14 | CONFIG_CONSOLE_RECORD=y |
| 15 | CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 |
| 16 | CONFIG_SILENT_CONSOLE=y |
Simon Glass | 1b69a99 | 2018-10-01 11:55:06 -0600 | [diff] [blame] | 17 | CONFIG_LOG_MAX_LEVEL=6 |
Heinrich Schuchardt | f9bdfbc | 2020-02-26 21:48:20 +0100 | [diff] [blame] | 18 | CONFIG_LOG_SYSLOG=y |
Mario Six | f705544 | 2018-03-28 14:38:17 +0200 | [diff] [blame] | 19 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 20 | CONFIG_CMD_CPU=y |
| 21 | CONFIG_CMD_LICENSE=y |
| 22 | CONFIG_CMD_BOOTZ=y |
Heinrich Schuchardt | 06c25ae | 2020-03-14 12:27:02 +0100 | [diff] [blame^] | 23 | CONFIG_CMD_BOOTEFI_HELLO=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 24 | # CONFIG_CMD_ELF is not set |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 25 | CONFIG_CMD_ASKENV=y |
| 26 | CONFIG_CMD_GREPENV=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 27 | CONFIG_LOOPW=y |
Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 28 | CONFIG_CMD_MD5SUM=y |
| 29 | CONFIG_CMD_MEMINFO=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 30 | CONFIG_CMD_MX_CYCLIC=y |
Tom Rini | d49f582 | 2020-02-28 13:28:38 -0500 | [diff] [blame] | 31 | CONFIG_CMD_MEMTEST=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 32 | CONFIG_CMD_DEMO=y |
Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 33 | CONFIG_CMD_GPIO=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 34 | CONFIG_CMD_GPT=y |
Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 35 | CONFIG_CMD_I2C=y |
Mario Six | 02ad6fb | 2018-09-27 09:19:31 +0200 | [diff] [blame] | 36 | CONFIG_CMD_OSD=y |
Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 37 | CONFIG_CMD_PCI=y |
| 38 | CONFIG_CMD_REMOTEPROC=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 39 | CONFIG_CMD_SPI=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 40 | CONFIG_CMD_USB=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 41 | CONFIG_CMD_TFTPPUT=y |
| 42 | CONFIG_CMD_TFTPSRV=y |
| 43 | CONFIG_CMD_RARP=y |
| 44 | CONFIG_CMD_CDP=y |
| 45 | CONFIG_CMD_SNTP=y |
| 46 | CONFIG_CMD_DNS=y |
| 47 | CONFIG_CMD_LINK_LOCAL=y |
Heinrich Schuchardt | 06c25ae | 2020-03-14 12:27:02 +0100 | [diff] [blame^] | 48 | CONFIG_CMD_EFIDEBUG=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 49 | CONFIG_CMD_TIME=y |
| 50 | CONFIG_CMD_TIMER=y |
| 51 | CONFIG_CMD_SOUND=y |
| 52 | CONFIG_CMD_QFW=y |
| 53 | CONFIG_CMD_BOOTSTAGE=y |
| 54 | CONFIG_CMD_PMIC=y |
| 55 | CONFIG_CMD_REGULATOR=y |
| 56 | CONFIG_CMD_TPM=y |
| 57 | CONFIG_CMD_TPM_TEST=y |
| 58 | CONFIG_CMD_EXT4_WRITE=y |
| 59 | CONFIG_MAC_PARTITION=y |
| 60 | CONFIG_AMIGA_PARTITION=y |
| 61 | CONFIG_OF_CONTROL=y |
| 62 | CONFIG_OF_HOSTFILE=y |
Tom Rini | 7406032 | 2018-09-03 15:26:12 -0400 | [diff] [blame] | 63 | CONFIG_DEFAULT_DEVICE_TREE="sandbox" |
Tom Rini | ca63e71 | 2019-11-12 22:46:36 -0500 | [diff] [blame] | 64 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 65 | CONFIG_NETCONSOLE=y |
Marek Vasut | a61efd8 | 2019-06-11 04:51:14 +0200 | [diff] [blame] | 66 | CONFIG_IP_DEFRAG=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 67 | CONFIG_REGMAP=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 68 | CONFIG_SYSCON=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 69 | CONFIG_DEVRES=y |
| 70 | CONFIG_DEBUG_DEVRES=y |
| 71 | CONFIG_ADC=y |
| 72 | CONFIG_ADC_SANDBOX=y |
Simon Glass | 937bb47 | 2019-12-06 21:41:57 -0700 | [diff] [blame] | 73 | CONFIG_AXI=y |
| 74 | CONFIG_AXI_SANDBOX=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 75 | CONFIG_CLK=y |
Peng Fan | 31043fa | 2019-07-31 07:02:00 +0000 | [diff] [blame] | 76 | CONFIG_CLK_COMPOSITE_CCF=y |
Lukasz Majewski | 8882e59 | 2019-06-24 15:50:51 +0200 | [diff] [blame] | 77 | CONFIG_SANDBOX_CLK_CCF=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 78 | CONFIG_CPU=y |
| 79 | CONFIG_DM_DEMO=y |
| 80 | CONFIG_DM_DEMO_SIMPLE=y |
| 81 | CONFIG_DM_DEMO_SHAPE=y |
Mario Six | ab664ff | 2018-07-31 11:44:13 +0200 | [diff] [blame] | 82 | CONFIG_BOARD=y |
| 83 | CONFIG_BOARD_SANDBOX=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 84 | CONFIG_PM8916_GPIO=y |
| 85 | CONFIG_SANDBOX_GPIO=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 86 | CONFIG_I2C_CROS_EC_TUNNEL=y |
| 87 | CONFIG_I2C_CROS_EC_LDO=y |
| 88 | CONFIG_DM_I2C_GPIO=y |
| 89 | CONFIG_SYS_I2C_SANDBOX=y |
| 90 | CONFIG_I2C_MUX=y |
| 91 | CONFIG_SPL_I2C_MUX=y |
| 92 | CONFIG_I2C_ARB_GPIO_CHALLENGE=y |
| 93 | CONFIG_CROS_EC_KEYB=y |
| 94 | CONFIG_I8042_KEYB=y |
| 95 | CONFIG_LED=y |
| 96 | CONFIG_LED_BLINK=y |
| 97 | CONFIG_LED_GPIO=y |
| 98 | CONFIG_DM_MAILBOX=y |
| 99 | CONFIG_SANDBOX_MBOX=y |
| 100 | CONFIG_MISC=y |
| 101 | CONFIG_CROS_EC=y |
| 102 | CONFIG_CROS_EC_I2C=y |
| 103 | CONFIG_CROS_EC_LPC=y |
| 104 | CONFIG_CROS_EC_SANDBOX=y |
| 105 | CONFIG_CROS_EC_SPI=y |
Simon Glass | 54028bc | 2019-12-06 21:41:59 -0700 | [diff] [blame] | 106 | CONFIG_IRQ=y |
Tom Rini | f6e6e1a | 2020-01-22 13:38:00 -0500 | [diff] [blame] | 107 | CONFIG_P2SB=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 108 | CONFIG_PWRSEQ=y |
| 109 | CONFIG_SPL_PWRSEQ=y |
| 110 | CONFIG_I2C_EEPROM=y |
| 111 | CONFIG_MMC_SANDBOX=y |
| 112 | CONFIG_SPI_FLASH_SANDBOX=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 113 | CONFIG_SPI_FLASH_ATMEL=y |
| 114 | CONFIG_SPI_FLASH_EON=y |
| 115 | CONFIG_SPI_FLASH_GIGADEVICE=y |
| 116 | CONFIG_SPI_FLASH_MACRONIX=y |
| 117 | CONFIG_SPI_FLASH_SPANSION=y |
| 118 | CONFIG_SPI_FLASH_STMICRO=y |
| 119 | CONFIG_SPI_FLASH_SST=y |
| 120 | CONFIG_SPI_FLASH_WINBOND=y |
| 121 | CONFIG_DM_ETH=y |
Bin Meng | 6123f638 | 2017-08-22 08:15:19 -0700 | [diff] [blame] | 122 | CONFIG_NVME=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 123 | CONFIG_PCI=y |
| 124 | CONFIG_DM_PCI=y |
| 125 | CONFIG_DM_PCI_COMPAT=y |
| 126 | CONFIG_PCI_SANDBOX=y |
Tom Rini | 256aa74 | 2017-06-19 09:47:40 -0400 | [diff] [blame] | 127 | CONFIG_PHY=y |
| 128 | CONFIG_PHY_SANDBOX=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 129 | CONFIG_PINCTRL=y |
| 130 | CONFIG_PINCONF=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 131 | CONFIG_PINCTRL_SANDBOX=y |
| 132 | CONFIG_POWER_DOMAIN=y |
| 133 | CONFIG_SANDBOX_POWER_DOMAIN=y |
| 134 | CONFIG_DM_PMIC=y |
| 135 | CONFIG_PMIC_ACT8846=y |
| 136 | CONFIG_DM_PMIC_PFUZE100=y |
| 137 | CONFIG_DM_PMIC_MAX77686=y |
Lukasz Majewski | 79192b3 | 2018-05-15 16:26:41 +0200 | [diff] [blame] | 138 | CONFIG_DM_PMIC_MC34708=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 139 | CONFIG_PMIC_PM8916=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 140 | CONFIG_PMIC_S2MPS11=y |
| 141 | CONFIG_DM_PMIC_SANDBOX=y |
| 142 | CONFIG_PMIC_S5M8767=y |
| 143 | CONFIG_PMIC_TPS65090=y |
| 144 | CONFIG_DM_REGULATOR=y |
| 145 | CONFIG_REGULATOR_ACT8846=y |
| 146 | CONFIG_DM_REGULATOR_PFUZE100=y |
| 147 | CONFIG_DM_REGULATOR_MAX77686=y |
| 148 | CONFIG_DM_REGULATOR_FIXED=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 149 | CONFIG_REGULATOR_S5M8767=y |
| 150 | CONFIG_DM_REGULATOR_SANDBOX=y |
| 151 | CONFIG_REGULATOR_TPS65090=y |
Tom Rini | 256aa74 | 2017-06-19 09:47:40 -0400 | [diff] [blame] | 152 | CONFIG_DM_PWM=y |
| 153 | CONFIG_PWM_SANDBOX=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 154 | CONFIG_RAM=y |
| 155 | CONFIG_REMOTEPROC_SANDBOX=y |
| 156 | CONFIG_DM_RESET=y |
| 157 | CONFIG_SANDBOX_RESET=y |
| 158 | CONFIG_DM_RTC=y |
| 159 | CONFIG_SANDBOX_SERIAL=y |
| 160 | CONFIG_SOUND=y |
| 161 | CONFIG_SOUND_SANDBOX=y |
| 162 | CONFIG_SANDBOX_SPI=y |
| 163 | CONFIG_SPMI=y |
| 164 | CONFIG_SPMI_SANDBOX=y |
| 165 | CONFIG_SYSRESET=y |
| 166 | CONFIG_TIMER=y |
| 167 | CONFIG_TIMER_EARLY=y |
| 168 | CONFIG_SANDBOX_TIMER=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 169 | CONFIG_USB=y |
| 170 | CONFIG_DM_USB=y |
| 171 | CONFIG_USB_EMUL=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 172 | CONFIG_USB_KEYBOARD=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 173 | CONFIG_DM_VIDEO=y |
| 174 | CONFIG_CONSOLE_ROTATION=y |
| 175 | CONFIG_CONSOLE_TRUETYPE=y |
| 176 | CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y |
| 177 | CONFIG_VIDEO_SANDBOX_SDL=y |
Mario Six | 02ad6fb | 2018-09-27 09:19:31 +0200 | [diff] [blame] | 178 | CONFIG_OSD=y |
| 179 | CONFIG_SANDBOX_OSD=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 180 | CONFIG_CMD_DHRYSTONE=y |
AKASHI Takahiro | 3fde24a | 2020-02-21 15:13:01 +0900 | [diff] [blame] | 181 | CONFIG_RSA_VERIFY_WITH_PKEY=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 182 | CONFIG_TPM=y |
| 183 | CONFIG_LZ4=y |
| 184 | CONFIG_ERRNO_STR=y |
| 185 | CONFIG_UNIT_TEST=y |
| 186 | CONFIG_UT_TIME=y |
| 187 | CONFIG_UT_DM=y |