blob: 376bc06a980cd7fdfd92986a453d6882cb5978d0 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vikas Manocha1b51c932016-02-11 15:47:20 -08002/*
Patrice Chotard789ee0e2017-10-23 09:53:58 +02003 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manocha1b51c932016-02-11 15:47:20 -08005 */
6
7#include <common.h>
Vikas Manocha096be332017-04-10 15:02:54 -07008#include <dm.h>
Simon Glassa7b51302019-11-14 12:57:46 -07009#include <init.h>
yannick fertre030af822018-03-02 15:59:28 +010010#include <lcd.h>
Simon Glass0f2af882020-05-10 11:40:05 -060011#include <log.h>
Patrice Chotardd8c77552019-02-22 15:04:44 +010012#include <miiphy.h>
13#include <phy_interface.h>
Vikas Manocha096be332017-04-10 15:02:54 -070014#include <ram.h>
Simon Glass36736182019-11-14 12:57:24 -070015#include <serial.h>
Vikas Manocha50218ae2017-05-28 12:55:10 -070016#include <spl.h>
yannick fertre030af822018-03-02 15:59:28 +010017#include <splash.h>
18#include <st_logo_data.h>
19#include <video.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060020#include <asm/global_data.h>
Vikas Manocha1b51c932016-02-11 15:47:20 -080021#include <asm/io.h>
22#include <asm/armv7m.h>
23#include <asm/arch/stm32.h>
24#include <asm/arch/gpio.h>
Michael Kurz812962b2017-01-22 16:04:27 +010025#include <asm/arch/syscfg.h>
Vikas Manocha9c7573e2017-04-10 15:03:00 -070026#include <asm/gpio.h>
Simon Glassdbd79542020-05-10 11:40:11 -060027#include <linux/delay.h>
Vikas Manocha1b51c932016-02-11 15:47:20 -080028
29DECLARE_GLOBAL_DATA_PTR;
30
Toshifumi NISHINAGA18bd7632016-07-08 01:02:25 +090031int dram_init(void)
32{
Vikas Manocha50218ae2017-05-28 12:55:10 -070033#ifndef CONFIG_SUPPORT_SPL
Patrice Chotardb75feec2018-08-03 13:09:55 +020034 int rv;
Vikas Manocha50218ae2017-05-28 12:55:10 -070035 struct udevice *dev;
Vikas Manocha096be332017-04-10 15:02:54 -070036 rv = uclass_get_device(UCLASS_RAM, 0, &dev);
37 if (rv) {
38 debug("DRAM init failed: %d\n", rv);
39 return rv;
40 }
Vikas Manochab6fd9eb2017-04-10 15:03:01 -070041
Vikas Manocha50218ae2017-05-28 12:55:10 -070042#endif
Patrice Chotardb75feec2018-08-03 13:09:55 +020043 return fdtdec_setup_mem_size_base();
Vikas Manochab6fd9eb2017-04-10 15:03:01 -070044}
45
46int dram_init_banksize(void)
47{
Patrice Chotardb75feec2018-08-03 13:09:55 +020048 return fdtdec_setup_memory_banksize();
Toshifumi NISHINAGA18bd7632016-07-08 01:02:25 +090049}
50
Vikas Manocha50218ae2017-05-28 12:55:10 -070051#ifdef CONFIG_SPL_BUILD
Vikas Manochab785bb42017-05-28 12:55:13 -070052#ifdef CONFIG_SPL_OS_BOOT
53int spl_start_uboot(void)
54{
55 debug("SPL: booting kernel\n");
56 /* break into full u-boot on 'c' */
57 return serial_tstc() && serial_getc() == 'c';
58}
59#endif
60
Vikas Manocha50218ae2017-05-28 12:55:10 -070061int spl_dram_init(void)
62{
63 struct udevice *dev;
64 int rv;
65 rv = uclass_get_device(UCLASS_RAM, 0, &dev);
66 if (rv)
67 debug("DRAM init failed: %d\n", rv);
68 return rv;
69}
70void spl_board_init(void)
71{
Vikas Manocha50218ae2017-05-28 12:55:10 -070072 preloader_console_init();
Giulio Benetti09d018f2021-04-04 20:21:35 +020073 spl_dram_init();
Vikas Manocha50218ae2017-05-28 12:55:10 -070074 arch_cpu_init(); /* to configure mpu for sdram rw permissions */
75}
76u32 spl_boot_device(void)
77{
Vikas Manochaf0e32c02017-05-28 12:55:14 -070078 return BOOT_DEVICE_XIP;
Vikas Manocha50218ae2017-05-28 12:55:10 -070079}
Vikas Manocha50218ae2017-05-28 12:55:10 -070080#endif
Vikas Manocha1b51c932016-02-11 15:47:20 -080081
Vikas Manocha9c7573e2017-04-10 15:03:00 -070082int board_late_init(void)
83{
84 struct gpio_desc gpio = {};
85 int node;
86
87 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
88 if (node < 0)
89 return -1;
90
Simon Glass1d9af1f2017-05-30 21:47:09 -060091 gpio_request_by_name_nodev(offset_to_ofnode(node), "led-gpio", 0, &gpio,
Vikas Manocha9c7573e2017-04-10 15:03:00 -070092 GPIOD_IS_OUT);
93
94 if (dm_gpio_is_valid(&gpio)) {
95 dm_gpio_set_value(&gpio, 0);
96 mdelay(10);
97 dm_gpio_set_value(&gpio, 1);
98 }
99
100 /* read button 1*/
101 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1");
102 if (node < 0)
103 return -1;
104
Simon Glass1d9af1f2017-05-30 21:47:09 -0600105 gpio_request_by_name_nodev(offset_to_ofnode(node), "button-gpio", 0,
106 &gpio, GPIOD_IS_IN);
Vikas Manocha9c7573e2017-04-10 15:03:00 -0700107
108 if (dm_gpio_is_valid(&gpio)) {
109 if (dm_gpio_get_value(&gpio))
110 puts("usr button is at HIGH LEVEL\n");
111 else
112 puts("usr button is at LOW LEVEL\n");
113 }
114
115 return 0;
116}
117
Vikas Manocha1b51c932016-02-11 15:47:20 -0800118int board_init(void)
119{
Vikas Manochab6fd9eb2017-04-10 15:03:01 -0700120 gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
Patrice Chotarde2d564e2018-01-18 14:10:05 +0100121
122#ifdef CONFIG_ETH_DESIGNWARE
Patrice Chotardd8c77552019-02-22 15:04:44 +0100123 const char *phy_mode;
124 int node;
125
126 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,stm32-dwmac");
127 if (node < 0)
128 return -1;
129
130 phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL);
131
132 switch (phy_get_interface_by_name(phy_mode)) {
133 case PHY_INTERFACE_MODE_RMII:
134 STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
135 break;
136 case PHY_INTERFACE_MODE_MII:
137 STM32_SYSCFG->pmc &= ~SYSCFG_PMC_MII_RMII_SEL;
138 break;
139 default:
140 printf("PHY interface %s not supported !\n", phy_mode);
141 }
Patrice Chotarde2d564e2018-01-18 14:10:05 +0100142#endif
143
yannick fertre030af822018-03-02 15:59:28 +0100144#if defined(CONFIG_CMD_BMP)
145 bmp_display((ulong)stmicroelectronics_uboot_logo_8bit_rle,
146 BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
147#endif /* CONFIG_CMD_BMP */
148
Vikas Manocha1b51c932016-02-11 15:47:20 -0800149 return 0;
150}