Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / f5d659d1400c2e5bf43c66deeea9184f6156ad54 / . / arch / powerpc / include / asm / global_data.h
blob: 1c4a82ca9985302cae8d9dbd5192b16ec91ca8b0 [file] [log] [blame]
wdenk0157ced2002-10-21 17:04:47 +0000[diff] [blame]1/*
Wolfgang Denkf710efd2010-07-24 20:22:02 +0200[diff] [blame]2 * (C) Copyright 2002-2010
wdenk0157ced2002-10-21 17:04:47 +0000[diff] [blame]3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]5 * SPDX-License-Identifier: GPL-2.0+
wdenk0157ced2002-10-21 17:04:47 +0000[diff] [blame]6 */
7
8#ifndef __ASM_GBL_DATA_H
9#define __ASM_GBL_DATA_H
Eran Liberty9095d4a2005-07-28 10:08:46 -0500[diff] [blame]10
Peter Tyserbe34d1d2009-09-21 11:20:37 -0500[diff] [blame]11#include "config.h"
Eran Liberty9095d4a2005-07-28 10:08:46 -0500[diff] [blame]12#include "asm/types.h"
13
Simon Glass3ac47d72012-12-13 20:48:30 +0000[diff] [blame]14/* Architecture-specific global data */
15struct arch_global_data {
Simon Glass9e247d12012-12-13 20:49:05 +0000[diff] [blame]16#if defined(CONFIG_FSL_ESDHC)
17 u32 sdhc_clk;
Yangbo Lub124f8a2015-04-22 13:57:00 +0800[diff] [blame]18#if defined(CONFIG_FSL_ESDHC_ADAPTER_IDENT)
19 u8 sdhc_adapter;
20#endif
Simon Glass9e247d12012-12-13 20:49:05 +0000[diff] [blame]21#endif
Simon Glass34a194f2012-12-13 20:48:44 +0000[diff] [blame]22#if defined(CONFIG_CPM2)
Simon Glass44ea8512012-12-13 20:48:46 +0000[diff] [blame]23 /* There are many clocks on the MPC8260 - see page 9-5 */
24 unsigned long vco_out;
25 unsigned long cpm_clk;
26 unsigned long scc_clk;
Simon Glass34a194f2012-12-13 20:48:44 +0000[diff] [blame]27 unsigned long brg_clk;
28#endif
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]29 /* TODO: sjg@chromium.org: Should these be unslgned long? */
Peter Tyser62e73982009-05-22 17:23:24 -0500[diff] [blame]30#if defined(CONFIG_MPC83xx)
Eran Liberty9095d4a2005-07-28 10:08:46 -0500[diff] [blame]31 /* There are other clocks in the MPC83XX */
32 u32 csb_clk;
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]33# if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
Ilya Yanoka3e5fd52010-06-28 16:44:33 +0400[diff] [blame]34 defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
Eran Liberty9095d4a2005-07-28 10:08:46 -0500[diff] [blame]35 u32 tsec1_clk;
36 u32 tsec2_clk;
Eran Liberty9095d4a2005-07-28 10:08:46 -0500[diff] [blame]37 u32 usbdr_clk;
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]38# elif defined(CONFIG_MPC8309)
Gerlando Falautofe201cb2012-10-10 22:13:08 +0000[diff] [blame]39 u32 usbdr_clk;
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]40# endif
41# if defined(CONFIG_MPC834x)
Scott Woodbeb638a2007-04-16 14:34:18 -0500[diff] [blame]42 u32 usbmph_clk;
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]43# endif /* CONFIG_MPC834x */
44# if defined(CONFIG_MPC8315)
Dave Liue0cfec82007-09-18 12:36:58 +0800[diff] [blame]45 u32 tdm_clk;
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]46# endif
Dave Liua46daea2006-11-03 19:33:44 -0600[diff] [blame]47 u32 core_clk;
Eran Liberty9095d4a2005-07-28 10:08:46 -0500[diff] [blame]48 u32 enc_clk;
49 u32 lbiu_clk;
50 u32 lclk_clk;
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]51# if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
Ilya Yanoka3e5fd52010-06-28 16:44:33 +0400[diff] [blame]52 defined(CONFIG_MPC837x)
Dave Liu5245ff52007-09-18 12:36:11 +0800[diff] [blame]53 u32 pciexp1_clk;
54 u32 pciexp2_clk;
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]55# endif
56# if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
Dave Liu5245ff52007-09-18 12:36:11 +0800[diff] [blame]57 u32 sata_clk;
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]58# endif
59# if defined(CONFIG_MPC8360)
60 u32 mem_sec_clk;
61# endif /* CONFIG_MPC8360 */
Dave Liu5245ff52007-09-18 12:36:11 +0800[diff] [blame]62#endif
Simon Glassa8b57392012-12-13 20:48:48 +0000[diff] [blame]63#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
64 u32 lbc_clk;
65 void *cpu;
66#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
Simon Glassc2baaec2012-12-13 20:48:49 +0000[diff] [blame]67#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \
68 defined(CONFIG_MPC86xx)
69 u32 i2c1_clk;
70 u32 i2c2_clk;
71#endif
Simon Glass8518b172012-12-13 20:48:50 +0000[diff] [blame]72#if defined(CONFIG_QE)
73 u32 qe_clk;
74 u32 brg_clk;
75 uint mp_alloc_base;
76 uint mp_alloc_top;
77#endif /* CONFIG_QE */
Simon Glassc6622d62012-12-13 20:48:51 +0000[diff] [blame]78#if defined(CONFIG_FSL_LAW)
79 u32 used_laws;
80#endif
Simon Glass0b466582012-12-13 20:48:52 +0000[diff] [blame]81#if defined(CONFIG_E500)
82 u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32];
83#endif
Simon Glass4d6eaa32012-12-13 20:48:56 +0000[diff] [blame]84 unsigned long reset_status; /* reset status register at boot */
Simon Glass387a1f22012-12-13 20:48:57 +0000[diff] [blame]85#if defined(CONFIG_MPC83xx)
86 unsigned long arbiter_event_attributes;
87 unsigned long arbiter_event_address;
88#endif
Simon Glass89370732017-01-23 13:31:23 -0700[diff] [blame]89#if defined(CONFIG_CPM2)
Simon Glass93980082012-12-13 20:48:58 +0000[diff] [blame]90 unsigned int dp_alloc_base;
91 unsigned int dp_alloc_top;
92#endif
Simon Glassf2d9aaf2012-12-13 20:49:02 +0000[diff] [blame]93#ifdef CONFIG_SYS_FPGA_COUNT
94 unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
95#endif
Stefan Roeseb47a63d2015-10-02 08:20:35 +0200[diff] [blame]96#if defined(CONFIG_WD_MAX_RATE)
97 unsigned long long wdt_last; /* trace watch-dog triggering rate */
98#endif
99#if defined(CONFIG_LWMON5)
100 unsigned long kbd_status;
101#endif
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]102};
103
Simon Glass1c62cc22012-12-13 20:49:23 +0000[diff] [blame]104#include <asm-generic/global_data.h>
wdenk0157ced2002-10-21 17:04:47 +0000[diff] [blame]105
106#if 1
Wolfgang Denk69c09642008-02-14 22:43:22 +0100[diff] [blame]107#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2")
wdenk0157ced2002-10-21 17:04:47 +0000[diff] [blame]108#else /* We could use plain global data, but the resulting code is bigger */
109#define XTRN_DECLARE_GLOBAL_DATA_PTR extern
110#define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \
111 gd_t *gd
112#endif
113
114#endif /* __ASM_GBL_DATA_H */