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git01.mediatek.com / filogic / uboot / 0599d2423b3cc4dbd6ed9d9f8ec7bb1562dc3db9 / . / arch / arm / dts / fsl-ls2080a-rdb.dts
blob: 541bcd37a025b64a50592e23c4ef11f8f56dd589 [file] [log] [blame]
Tom Rini8b0c8a12018-05-06 18:27:01 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+ OR X11
Haikun Wang94c21bb2015-06-26 19:48:58 +0800[diff] [blame]2/*
Prabhakar Kushwaha122bcfd2015-11-09 16:42:07 +0530[diff] [blame]3 * Freescale ls2080a RDB board device tree source
Haikun Wang94c21bb2015-06-26 19:48:58 +0800[diff] [blame]4 *
5 * Copyright 2013-2015 Freescale Semiconductor, Inc.
Haikun Wang94c21bb2015-06-26 19:48:58 +0800[diff] [blame]6 */
7
8/dts-v1/;
9
Prabhakar Kushwaha122bcfd2015-11-09 16:42:07 +0530[diff] [blame]10#include "fsl-ls2080a.dtsi"
Haikun Wang94c21bb2015-06-26 19:48:58 +0800[diff] [blame]11
12/ {
Prabhakar Kushwaha122bcfd2015-11-09 16:42:07 +0530[diff] [blame]13 model = "Freescale Layerscape 2080a RDB Board";
14 compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
Haikun Wang94c21bb2015-06-26 19:48:58 +0800[diff] [blame]15
16 aliases {
17 spi1 = &dspi;
18 };
19};
20
21&dspi {
22 bus-num = <0>;
23 status = "okay";
24
25 dflash0: n25q512a {
26 #address-cells = <1>;
27 #size-cells = <1>;
28 compatible = "spi-flash";
29 spi-max-frequency = <3000000>;
30 spi-cpol;
31 spi-cpha;
32 reg = <0>;
33 };
34};