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wdenk29e7f5a2004-03-12 00:14:09 +00001/*
2 * (C) Copyright 2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23#ifndef __CONFIG_H
24#define __CONFIG_H
25
26/*
wdenk29e7f5a2004-03-12 00:14:09 +000027 * High Level Configuration Options
28 * (easy to change)
29 */
30#define CONFIG_ARM925T 1 /* This is an arm925t CPU */
31#define CONFIG_OMAP 1 /* in a TI OMAP core */
32#define CONFIG_OMAP1510 1 /* which is in a 1510 (helen) */
33#define CONFIG_OMAP_SX1 1 /* a SX1 Board */
34
35/* input clock of PLL */
36#define CONFIG_SYS_CLK_FREQ 12000000 /* the SX1 has 12MHz input clock */
37
38#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
39
40#define CONFIG_MISC_INIT_R
41
42#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
43#define CONFIG_SETUP_MEMORY_TAGS 1
44#define CONFIG_INITRD_TAG 1
45
46/*
47 * Size of malloc() pool
48 */
49#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
50#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
51
52/*
53 * Hardware drivers
54 */
55
56/*
57 * NS16550 Configuration
58 */
59#define CFG_NS16550
60#define CFG_NS16550_SERIAL
61#define CFG_NS16550_REG_SIZE (-4)
62#define CFG_NS16550_CLK (CONFIG_SYS_CLK_FREQ) /* can be 12M/32Khz or 48Mhz */
63#define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
64
65/*
66 * select serial console configuration
67 */
68#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SX1 */
69
70/*
71 * USB device configuration
72 */
73#define CONFIG_USB_DEVICE 1
74#define CONFIG_USB_TTY 1
75
76#define CONFIG_USBD_VENDORID 0x1234
77#define CONFIG_USBD_PRODUCTID 0x5678
78#define CONFIG_USBD_MANUFACTURER "Siemens"
79#define CONFIG_USBD_PRODUCT_NAME "SX1"
wdenk29e7f5a2004-03-12 00:14:09 +000080
81/*
82 * I2C configuration
83 */
84#define CONFIG_HARD_I2C
85#define CFG_I2C_SPEED 100000
86#define CFG_I2C_SLAVE 1
87#define CONFIG_DRIVER_OMAP1510_I2C
88
89#define CONFIG_ENV_OVERWRITE
90
91#define CONFIG_ENV_OVERWRITE
92#define CONFIG_CONS_INDEX 1
93#define CONFIG_BAUDRATE 115200
94#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
95
96#define CONFIG_COMMANDS (( CONFIG_CMD_DFL | \
97 CFG_CMD_I2C ) & \
98 ~CFG_CMD_NET)
99
100/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
101#include <cmd_confdefs.h>
102#include <configs/omap1510.h>
103
wdenk29e7f5a2004-03-12 00:14:09 +0000104#define CONFIG_BOOTARGS "mem=16M console=ttyS0,115200n8 root=/dev/mtdblock3 rw"
wdenk05822bf2004-03-12 15:38:25 +0000105#define CONFIG_PREBOOT "setenv stdout usbtty;setenv stdin usbtty"
wdenk29e7f5a2004-03-12 00:14:09 +0000106
107/*
108 * Miscellaneous configurable options
109 */
110#define CFG_LONGHELP /* undef to save memory */
111#define CFG_PROMPT "SX1# " /* Monitor Command Prompt */
112#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
113#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
114#define CFG_MAXARGS 16 /* max number of command args */
115#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
116
117#define CFG_MEMTEST_START 0x10000000 /* memtest works on */
118#define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
119
120#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
121
122#define CFG_LOAD_ADDR 0x10000000 /* default load address */
123
124/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
125 * This time is further subdivided by a local divisor.
126 */
127#define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */
128#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
129#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
130
131/*-----------------------------------------------------------------------
132 * Stack sizes
133 *
134 * The stack sizes are set up in start.S using the settings below
135 */
136#define CONFIG_STACKSIZE (128*1024) /* regular stack */
137#ifdef CONFIG_USE_IRQ
138#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
139#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
140#endif
141
142/*-----------------------------------------------------------------------
143 * Physical Memory Map
144 */
145#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
146#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
147#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
148
149#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
150#define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */
151
152#define CFG_FLASH_BASE PHYS_FLASH_1
153
154/*-----------------------------------------------------------------------
155 * FLASH and environment organization
156 */
157#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
wdenke85b7a52004-10-10 22:16:06 +0000158#define PHYS_FLASH_SIZE (16 << 10) /* 16 MB */
159#define PHYS_FLASH_SECT_SIZE (128*1024) /* Size of a sector (128kB) */
wdenk29e7f5a2004-03-12 00:14:09 +0000160#define CFG_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
wdenke85b7a52004-10-10 22:16:06 +0000161#define CFG_ENV_ADDR (CFG_FLASH_BASE + PHYS_FLASH_SECT_SIZE) /* addr of environment */
162#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */
163#define CFG_MONITOR_LEN PHYS_FLASH_SECT_SIZE /* Reserve 1 sector */
164#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, CFG_FLASH_BASE + PHYS_FLASH_SIZE }
165
166/*-----------------------------------------------------------------------
167 * FLASH driver setup
168 */
169#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
170#define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
171#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
172#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
wdenk29e7f5a2004-03-12 00:14:09 +0000173
174/* timeout values are in ticks */
175#define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */
176#define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */
177
178#define CFG_ENV_IS_IN_FLASH 1
wdenke85b7a52004-10-10 22:16:06 +0000179#define CFG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE
180#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE /* Total Size of Environment Sector */
181#define CFG_ENV_OFFSET ( CFG_MONITOR_BASE + CFG_MONITOR_LEN ) /* Environment after Monitor */
wdenk29e7f5a2004-03-12 00:14:09 +0000182
wdenk05822bf2004-03-12 15:38:25 +0000183/* Address and size of Redundant Environment Sector */
184#define CFG_ENV_SIZE_REDUND 0x20000
185#define CFG_ENV_OFFSET_REDUND 0x40000
186
wdenk29e7f5a2004-03-12 00:14:09 +0000187#endif /* __CONFIG_H */