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Michal Simek4b066a12018-08-22 14:55:27 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2014 - 2018 Xilinx, Inc.
Michal Simeka8c94362023-07-10 14:35:49 +02004 * Michal Simek <michal.simek@amd.com>
Michal Simek4b066a12018-08-22 14:55:27 +02005 */
6
Algapally Santosh Sagar3c351b22023-01-19 22:36:16 -07007#include <command.h>
Michal Simek4b066a12018-08-22 14:55:27 +02008#include <common.h>
Simon Glassafb02152019-12-28 10:45:01 -07009#include <cpu_func.h>
Simon Glassed38aef2020-05-10 11:40:03 -060010#include <env.h>
Michal Simek4b066a12018-08-22 14:55:27 +020011#include <fdtdec.h>
Simon Glassa7b51302019-11-14 12:57:46 -070012#include <init.h>
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -070013#include <env_internal.h>
Simon Glass0f2af882020-05-10 11:40:05 -060014#include <log.h>
Michal Simek4b066a12018-08-22 14:55:27 +020015#include <malloc.h>
Simon Glass495a5dc2019-11-14 12:57:30 -070016#include <time.h>
Simon Glass274e0b02020-05-10 11:39:56 -060017#include <asm/cache.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060018#include <asm/global_data.h>
Michal Simek4b066a12018-08-22 14:55:27 +020019#include <asm/io.h>
20#include <asm/arch/hardware.h>
Michal Simek21eb5cc2019-04-29 09:39:09 -070021#include <asm/arch/sys_proto.h>
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +053022#include <dm/device.h>
23#include <dm/uclass.h>
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053024#include <versalpl.h>
Michal Simek705d44a2020-03-31 12:39:37 +020025#include "../common/board.h"
Michal Simek4b066a12018-08-22 14:55:27 +020026
27DECLARE_GLOBAL_DATA_PTR;
28
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053029#if defined(CONFIG_FPGA_VERSALPL)
Oleksandr Suvorovdae95a42022-07-22 17:16:04 +030030static xilinx_desc versalpl = {
31 xilinx_versal, csu_dma, 1, &versal_op, 0, &versal_op, NULL,
32 FPGA_LEGACY
33};
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053034#endif
35
Michal Simek4b066a12018-08-22 14:55:27 +020036int board_init(void)
37{
38 printf("EL Level:\tEL%d\n", current_el());
39
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053040#if defined(CONFIG_FPGA_VERSALPL)
41 fpga_init();
42 fpga_add(fpga_xilinx, &versalpl);
43#endif
44
Michal Simek394ee242020-08-03 13:01:45 +020045 if (CONFIG_IS_ENABLED(DM_I2C) && CONFIG_IS_ENABLED(I2C_EEPROM))
46 xilinx_read_eeprom();
47
Michal Simek4b066a12018-08-22 14:55:27 +020048 return 0;
49}
50
51int board_early_init_r(void)
52{
Michal Simek19f6c972019-01-28 11:08:00 +010053 u32 val;
Michal Simek4b066a12018-08-22 14:55:27 +020054
Michal Simek19f6c972019-01-28 11:08:00 +010055 if (current_el() != 3)
56 return 0;
Michal Simek4b066a12018-08-22 14:55:27 +020057
Michal Simekf56f7d12019-01-28 11:12:41 +010058 debug("iou_switch ctrl div0 %x\n",
59 readl(&crlapb_base->iou_switch_ctrl));
60
Michal Simek19f6c972019-01-28 11:08:00 +010061 writel(IOU_SWITCH_CTRL_CLKACT_BIT |
Michal Simekf56f7d12019-01-28 11:12:41 +010062 (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT),
Michal Simek19f6c972019-01-28 11:08:00 +010063 &crlapb_base->iou_switch_ctrl);
Michal Simek4b066a12018-08-22 14:55:27 +020064
Michal Simek19f6c972019-01-28 11:08:00 +010065 /* Global timer init - Program time stamp reference clk */
66 val = readl(&crlapb_base->timestamp_ref_ctrl);
67 val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT;
68 writel(val, &crlapb_base->timestamp_ref_ctrl);
Michal Simek4b066a12018-08-22 14:55:27 +020069
Michal Simek19f6c972019-01-28 11:08:00 +010070 debug("ref ctrl 0x%x\n",
71 readl(&crlapb_base->timestamp_ref_ctrl));
Michal Simek4b066a12018-08-22 14:55:27 +020072
Michal Simek19f6c972019-01-28 11:08:00 +010073 /* Clear reset of timestamp reg */
74 writel(0, &crlapb_base->rst_timestamp);
Michal Simek4b066a12018-08-22 14:55:27 +020075
Michal Simek19f6c972019-01-28 11:08:00 +010076 /*
77 * Program freq register in System counter and
78 * enable system counter.
79 */
Peng Fan4b3a1822022-04-13 17:47:17 +080080 writel(CONFIG_COUNTER_FREQUENCY,
Michal Simek19f6c972019-01-28 11:08:00 +010081 &iou_scntr_secure->base_frequency_id_register);
Michal Simek4b066a12018-08-22 14:55:27 +020082
Michal Simek19f6c972019-01-28 11:08:00 +010083 debug("counter val 0x%x\n",
84 readl(&iou_scntr_secure->base_frequency_id_register));
85
86 writel(IOU_SCNTRS_CONTROL_EN,
87 &iou_scntr_secure->counter_control_register);
Michal Simek4b066a12018-08-22 14:55:27 +020088
Michal Simek19f6c972019-01-28 11:08:00 +010089 debug("scntrs control 0x%x\n",
90 readl(&iou_scntr_secure->counter_control_register));
91 debug("timer 0x%llx\n", get_ticks());
92 debug("timer 0x%llx\n", get_ticks());
Michal Simek4b066a12018-08-22 14:55:27 +020093
94 return 0;
95}
96
Ashok Reddy Soma6c191052022-05-05 23:53:45 -060097unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
98 char *const argv[])
99{
100 int ret = 0;
101
102 if (current_el() > 1) {
103 smp_kick_all_cpus();
104 dcache_disable();
105 armv8_switch_to_el1(0x0, 0, 0, 0, (unsigned long)entry,
106 ES_TO_AARCH64);
107 } else {
108 printf("FAIL: current EL is not above EL1\n");
109 ret = EINVAL;
110 }
111 return ret;
112}
113
Michal Simek9c91e612020-04-08 11:04:41 +0200114static u8 versal_get_bootmode(void)
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530115{
Michal Simek9c91e612020-04-08 11:04:41 +0200116 u8 bootmode;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530117 u32 reg = 0;
Michal Simek9c91e612020-04-08 11:04:41 +0200118
119 reg = readl(&crp_base->boot_mode_usr);
120
121 if (reg >> BOOT_MODE_ALT_SHIFT)
122 reg >>= BOOT_MODE_ALT_SHIFT;
123
124 bootmode = reg & BOOT_MODES_MASK;
125
126 return bootmode;
127}
128
Michal Simekb1634762023-09-05 13:30:07 +0200129static int boot_targets_setup(void)
Michal Simek9c91e612020-04-08 11:04:41 +0200130{
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530131 u8 bootmode;
132 struct udevice *dev;
133 int bootseq = -1;
134 int bootseq_len = 0;
135 int env_targets_len = 0;
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530136 const char *mode = NULL;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530137 char *new_targets;
138 char *env_targets;
139
Michal Simek9c91e612020-04-08 11:04:41 +0200140 bootmode = versal_get_bootmode();
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530141
142 puts("Bootmode: ");
143 switch (bootmode) {
T Karthik Reddyfacca9a2019-07-11 16:07:57 +0530144 case USB_MODE:
145 puts("USB_MODE\n");
T Karthik Reddy1104faf2021-03-30 23:24:57 -0600146 mode = "usb_dfu0 usb_dfu1";
T Karthik Reddyfacca9a2019-07-11 16:07:57 +0530147 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530148 case JTAG_MODE:
149 puts("JTAG_MODE\n");
Siva Durga Prasad Paladugu00784e02019-06-25 17:13:14 +0530150 mode = "jtag pxe dhcp";
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530151 break;
152 case QSPI_MODE_24BIT:
153 puts("QSPI_MODE_24\n");
154 mode = "xspi0";
155 break;
156 case QSPI_MODE_32BIT:
157 puts("QSPI_MODE_32\n");
158 mode = "xspi0";
159 break;
160 case OSPI_MODE:
161 puts("OSPI_MODE\n");
162 mode = "xspi0";
163 break;
164 case EMMC_MODE:
165 puts("EMMC_MODE\n");
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700166 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100167 "mmc@f1050000", &dev) &&
168 uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700169 "sdhci@f1050000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530170 debug("SD1 driver for SD1 device is not present\n");
171 break;
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700172 }
Simon Glass75e534b2020-12-16 21:20:07 -0700173 debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700174 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700175 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530176 break;
Polak, Leszekcddfc132023-10-08 14:34:42 +0000177 case SELECTMAP_MODE:
178 puts("SELECTMAP_MODE\n");
179 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530180 case SD_MODE:
181 puts("SD_MODE\n");
182 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100183 "mmc@f1040000", &dev) &&
184 uclass_get_device_by_name(UCLASS_MMC,
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530185 "sdhci@f1040000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530186 debug("SD0 driver for SD0 device is not present\n");
187 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530188 }
Simon Glass75e534b2020-12-16 21:20:07 -0700189 debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev));
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530190
191 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700192 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530193 break;
194 case SD1_LSHFT_MODE:
195 puts("LVL_SHFT_");
196 /* fall through */
197 case SD_MODE1:
198 puts("SD_MODE1\n");
199 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100200 "mmc@f1050000", &dev) &&
201 uclass_get_device_by_name(UCLASS_MMC,
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530202 "sdhci@f1050000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530203 debug("SD1 driver for SD1 device is not present\n");
204 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530205 }
Simon Glass75e534b2020-12-16 21:20:07 -0700206 debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530207
208 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700209 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530210 break;
211 default:
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530212 printf("Invalid Boot Mode:0x%x\n", bootmode);
213 break;
214 }
215
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530216 if (mode) {
217 if (bootseq >= 0) {
218 bootseq_len = snprintf(NULL, 0, "%i", bootseq);
219 debug("Bootseq len: %x\n", bootseq_len);
220 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530221
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530222 /*
223 * One terminating char + one byte for space between mode
224 * and default boot_targets
225 */
226 env_targets = env_get("boot_targets");
227 if (env_targets)
228 env_targets_len = strlen(env_targets);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530229
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530230 new_targets = calloc(1, strlen(mode) + env_targets_len + 2 +
231 bootseq_len);
232 if (!new_targets)
233 return -ENOMEM;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530234
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530235 if (bootseq >= 0)
236 sprintf(new_targets, "%s%x %s", mode, bootseq,
237 env_targets ? env_targets : "");
238 else
239 sprintf(new_targets, "%s %s", mode,
240 env_targets ? env_targets : "");
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530241
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530242 env_set("boot_targets", new_targets);
243 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530244
Michal Simekb1634762023-09-05 13:30:07 +0200245 return 0;
246}
247
248int board_late_init(void)
249{
250 int ret;
251
252 if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
253 debug("Saved variables - Skipping\n");
254 return 0;
255 }
256
257 if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG))
258 return 0;
259
260 if (IS_ENABLED(CONFIG_DISTRO_DEFAULTS)) {
261 ret = boot_targets_setup();
262 if (ret)
263 return ret;
264 }
265
Michal Simek705d44a2020-03-31 12:39:37 +0200266 return board_late_init_xilinx();
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530267}
268
Michal Simek4b066a12018-08-22 14:55:27 +0200269int dram_init_banksize(void)
270{
Michal Simek21eb5cc2019-04-29 09:39:09 -0700271 int ret;
272
273 ret = fdtdec_setup_memory_banksize();
274 if (ret)
275 return ret;
276
277 mem_map_fill();
Michal Simek4b066a12018-08-22 14:55:27 +0200278
279 return 0;
280}
281
282int dram_init(void)
283{
Michal Simek9134d4c2020-07-10 12:42:09 +0200284 if (fdtdec_setup_mem_size_base_lowest() != 0)
Michal Simek4b066a12018-08-22 14:55:27 +0200285 return -EINVAL;
286
287 return 0;
288}
289
Harald Seiler6f14d5f2020-12-15 16:47:52 +0100290void reset_cpu(void)
Michal Simek4b066a12018-08-22 14:55:27 +0200291{
292}
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700293
294enum env_location env_get_location(enum env_operation op, int prio)
295{
296 u32 bootmode = versal_get_bootmode();
297
298 if (prio)
299 return ENVL_UNKNOWN;
300
301 switch (bootmode) {
302 case EMMC_MODE:
303 case SD_MODE:
304 case SD1_LSHFT_MODE:
305 case SD_MODE1:
306 if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT))
307 return ENVL_FAT;
308 if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4))
309 return ENVL_EXT4;
T Karthik Reddy6f8b2052021-11-24 12:16:55 +0100310 return ENVL_NOWHERE;
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700311 case OSPI_MODE:
312 case QSPI_MODE_24BIT:
313 case QSPI_MODE_32BIT:
314 if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH))
315 return ENVL_SPI_FLASH;
T Karthik Reddy6f8b2052021-11-24 12:16:55 +0100316 return ENVL_NOWHERE;
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700317 case JTAG_MODE:
Polak, Leszekcddfc132023-10-08 14:34:42 +0000318 case SELECTMAP_MODE:
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700319 default:
320 return ENVL_NOWHERE;
321 }
322}