blob: b456406182b0a0800cec217a12f32c4f23b26575 [file] [log] [blame]
Stephen Warrenc7382852012-05-21 10:04:27 +00001/dts-v1/;
2
3/include/ ARCH_CPU_DTS
4
5/ {
Allen Martin55d98a12012-08-31 08:30:00 +00006 model = "NVIDIA Tegra20 Harmony evaluation board";
Stephen Warrenc7382852012-05-21 10:04:27 +00007 compatible = "nvidia,harmony", "nvidia,tegra20";
8
9 aliases {
10 usb0 = "/usb@c5008000";
Stephen Warrenb03192e2012-10-12 09:45:48 +000011 usb1 = "/usb@c5004000";
Stephen Warrenc7382852012-05-21 10:04:27 +000012 };
13
14 memory {
15 reg = <0x00000000 0x40000000>;
16 };
17
Stephen Warrenc7382852012-05-21 10:04:27 +000018 serial@70006300 {
19 clock-frequency = < 216000000 >;
20 };
21
22 i2c@7000c000 {
23 status = "disabled";
24 };
25
26 i2c@7000c400 {
27 status = "disabled";
28 };
29
30 i2c@7000c500 {
31 status = "disabled";
32 };
33
34 i2c@7000d000 {
35 status = "disabled";
36 };
37
38 usb@c5000000 {
39 status = "disabled";
40 };
41
42 usb@c5004000 {
Stephen Warrenb03192e2012-10-12 09:45:48 +000043 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
Stephen Warrenc7382852012-05-21 10:04:27 +000044 };
Stephen Warren560a1ee2012-07-30 07:37:52 +000045
46 nand-controller@70008000 {
47 nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
48 nvidia,width = <8>;
49 nvidia,timing = <26 100 20 80 20 10 12 10 70>;
50 nand@0 {
51 reg = <0>;
52 compatible = "hynix,hy27uf4g2b", "nand-flash";
53 };
54 };
Stephen Warrenc7382852012-05-21 10:04:27 +000055};