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git01.mediatek.com / filogic / uboot / 8aee9358b0c08cfcf6c070318beac1e409b88a73 / . / cpu / mcf5227x / start.S
blob: 1b47c9775df99f5d46837eaa3cfa71886babd483 [file] [log] [blame]
TsiChungLiewae831cd2008-01-14 17:46:19 -0600[diff] [blame]1/*
2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <config.h>
25#include "version.h"
26
27#ifndef CONFIG_IDENT_STRING
28#define CONFIG_IDENT_STRING ""
29#endif
30
31/* last three long word reserved for cache status */
32#define ICACHE_STATUS (CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END- 4)
33#define DCACHE_STATUS (CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END- 8)
34#define CACR_STATUS (CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-12)
35
36#define _START _start
37#define _FAULT _fault
38
39#define SAVE_ALL \
40 move.w #0x2700,%sr; /* disable intrs */ \
41 subl #60,%sp; /* space for 15 regs */ \
42 moveml %d0-%d7/%a0-%a6,%sp@;
43
44#define RESTORE_ALL \
45 moveml %sp@,%d0-%d7/%a0-%a6; \
46 addl #60,%sp; /* space for 15 regs */ \
47 rte;
48
49.text
50/*
51 * Vector table. This is used for initial platform startup.
52 * These vectors are to catch any un-intended traps.
53 */
54_vectors:
55
56INITSP: .long 0x00000000 /* Initial SP */
57INITPC: .long _START /* Initial PC */
58vector02: .long _FAULT /* Access Error */
59vector03: .long _FAULT /* Address Error */
60vector04: .long _FAULT /* Illegal Instruction */
61vector05: .long _FAULT /* Reserved */
62vector06: .long _FAULT /* Reserved */
63vector07: .long _FAULT /* Reserved */
64vector08: .long _FAULT /* Privilege Violation */
65vector09: .long _FAULT /* Trace */
66vector0A: .long _FAULT /* Unimplemented A-Line */
67vector0B: .long _FAULT /* Unimplemented F-Line */
68vector0C: .long _FAULT /* Debug Interrupt */
69vector0D: .long _FAULT /* Reserved */
70vector0E: .long _FAULT /* Format Error */
71vector0F: .long _FAULT /* Unitialized Int. */
72
73/* Reserved */
74vector10_17:
75.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76
77vector18: .long _FAULT /* Spurious Interrupt */
78vector19: .long _FAULT /* Autovector Level 1 */
79vector1A: .long _FAULT /* Autovector Level 2 */
80vector1B: .long _FAULT /* Autovector Level 3 */
81vector1C: .long _FAULT /* Autovector Level 4 */
82vector1D: .long _FAULT /* Autovector Level 5 */
83vector1E: .long _FAULT /* Autovector Level 6 */
84vector1F: .long _FAULT /* Autovector Level 7 */
85
86/* TRAP #0 - #15 */
87vector20_2F:
88.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
89.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
90
91/* Reserved */
92vector30_3F:
93.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
94.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95
96vector64_127:
97.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
99.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
100.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
101.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
102.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
103.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
104.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
105
106vector128_191:
107.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
108.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
109.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
110.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
111.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
112.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
113.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
114.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
115
116vector192_255:
117.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
118.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
119.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
120.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
121.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
122.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
123.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
124.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
125
126 .text
127
128 .globl _start
129_start:
130 nop
131 nop
132 move.w #0x2700,%sr /* Mask off Interrupt */
133
134 /* Set vector base register at the beginning of the Flash */
135 move.l #CFG_FLASH_BASE, %d0
136 movec %d0, %VBR
137
138 move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0
139 movec %d0, %RAMBAR1
140
141 /* initialize general use internal ram */
142 move.l #0, %d0
143 move.l #(ICACHE_STATUS), %a1 /* icache */
144 move.l #(DCACHE_STATUS), %a2 /* icache */
145 move.l #(CACR_STATUS), %a3 /* CACR */
146 move.l %d0, (%a1)
147 move.l %d0, (%a2)
148 move.l %d0, (%a3)
149
150 /* invalidate and disable cache */
151 move.l #0x01000000, %d0 /* Invalidate cache cmd */
152 movec %d0, %CACR /* Invalidate cache */
153 move.l #0, %d0
154 movec %d0, %ACR0
155 movec %d0, %ACR1
156
157 /* set stackpointer to end of internal ram to get some stackspace for
158 the first c-code */
159 move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
160 clr.l %sp@-
161
162 move.l #__got_start, %a5 /* put relocation table address to a5 */
163
164 bsr cpu_init_f /* run low-level CPU init code (from flash) */
165 bsr board_init_f /* run low-level board init code (from flash) */
166
167 /* board_init_f() does not return */
168
169/*------------------------------------------------------------------------------*/
170
171/*
172 * void relocate_code (addr_sp, gd, addr_moni)
173 *
174 * This "function" does not return, instead it continues in RAM
175 * after relocating the monitor code.
176 *
177 * r3 = dest
178 * r4 = src
179 * r5 = length in bytes
180 * r6 = cachelinesize
181 */
182 .globl relocate_code
183relocate_code:
184 link.w %a6,#0
185 move.l 8(%a6), %sp /* set new stack pointer */
186
187 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
188 move.l 16(%a6), %a0 /* Save copy of Destination Address */
189
190 move.l #CFG_MONITOR_BASE, %a1
191 move.l #__init_end, %a2
192 move.l %a0, %a3
193
194 /* copy the code to RAM */
1951:
196 move.l (%a1)+, (%a3)+
197 cmp.l %a1,%a2
198 bgt.s 1b
199
200/*
201 * We are done. Do not return, instead branch to second part of board
202 * initialization, now running from RAM.
203 */
204 move.l %a0, %a1
205 add.l #(in_ram - CFG_MONITOR_BASE), %a1
206 jmp (%a1)
207
208in_ram:
209
210clear_bss:
211 /*
212 * Now clear BSS segment
213 */
214 move.l %a0, %a1
215 add.l #(_sbss - CFG_MONITOR_BASE),%a1
216 move.l %a0, %d1
217 add.l #(_ebss - CFG_MONITOR_BASE),%d1
2186:
219 clr.l (%a1)+
220 cmp.l %a1,%d1
221 bgt.s 6b
222
223 /*
224 * fix got table in RAM
225 */
226 move.l %a0, %a1
227 add.l #(__got_start - CFG_MONITOR_BASE),%a1
228 move.l %a1,%a5 /* * fix got pointer register a5 */
229
230 move.l %a0, %a2
231 add.l #(__got_end - CFG_MONITOR_BASE),%a2
232
2337:
234 move.l (%a1),%d1
235 sub.l #_start,%d1
236 add.l %a0,%d1
237 move.l %d1,(%a1)+
238 cmp.l %a2, %a1
239 bne 7b
240
241 /* calculate relative jump to board_init_r in ram */
242 move.l %a0, %a1
243 add.l #(board_init_r - CFG_MONITOR_BASE), %a1
244
245 /* set parameters for board_init_r */
246 move.l %a0,-(%sp) /* dest_addr */
247 move.l %d0,-(%sp) /* gd */
248 jsr (%a1)
249
250/*------------------------------------------------------------------------------*/
251/* exception code */
252 .globl _fault
253_fault:
254 jmp _fault
255 .globl _exc_handler
256
257_exc_handler:
258 SAVE_ALL
259 movel %sp,%sp@-
260 bsr exc_handler
261 addql #4,%sp
262 RESTORE_ALL
263
264 .globl _int_handler
265_int_handler:
266 SAVE_ALL
267 movel %sp,%sp@-
268 bsr int_handler
269 addql #4,%sp
270 RESTORE_ALL
271
272/*------------------------------------------------------------------------------*/
273/* cache functions */
274 .globl icache_enable
275icache_enable:
276 move.l #0x01200000, %d0 /* Invalid cache */
277 movec %d0, %CACR
278
279 move.l #(CFG_SDRAM_BASE + 0x1c000), %d0
280 movec %d0, %ACR0
281
282 move.l #0x81600610, %d0 /* Enable cache */
283 movec %d0, %CACR
284
285 move.l #(ICACHE_STATUS), %a1
286 moveq #1, %d0
287 move.l %d0, (%a1)
288 rts
289
290 .globl icache_disable
291icache_disable:
292 move.l #0x01F00000, %d0 /* Setup cache mask */
293 movec %d0, %CACR /* Invalidate icache */
294 clr.l %d0
295 movec %d0, %ACR0
296 movec %d0, %ACR1
297
298 move.l #(ICACHE_STATUS), %a1
299 moveq #0, %d0
300 move.l %d0, (%a1)
301 rts
302
303 .globl icache_status
304icache_status:
305 move.l #(ICACHE_STATUS), %a1
306 move.l (%a1), %d0
307 rts
308
309 .globl icache_invalid
310icache_invalid:
311 move.l #0x80600610, %d0 /* Invalidate icache */
312 movec %d0, %CACR /* Enable and invalidate cache */
313 rts
314
315 .globl dcache_enable
316dcache_enable:
317 move.l #0x01200000, %d0 /* Invalid cache */
318 movec %d0, %CACR
319
320 move.l #0x81300610, %d0
321 movec %d0, %CACR
322
323 move.l #(DCACHE_STATUS), %a1
324 moveq #1, %d0
325 move.l %d0, (%a1)
326 rts
327
328 .globl dcache_disable
329dcache_disable:
330 move.l #0x81600610, %d0 /* Setup cache mask */
331 movec %d0, %CACR /* Invalidate icache */
332
333 move.l #(DCACHE_STATUS), %a1
334 moveq #0, %d0
335 move.l %d0, (%a1)
336 rts
337
338 .globl dcache_invalid
339dcache_invalid:
340 move.l #0x81100610, %d0 /* Setup cache mask */
341 movec %d0, %CACR /* Enable and invalidate cache */
342 rts
343
344 .globl dcache_status
345dcache_status:
346 move.l #(DCACHE_STATUS), %a1
347 move.l (%a1), %d0
348 rts
349
350/*------------------------------------------------------------------------------*/
351
352 .globl version_string
353version_string:
354 .ascii U_BOOT_VERSION
355 .ascii " (", __DATE__, " - ", __TIME__, ")"
356 .ascii CONFIG_IDENT_STRING, "\0"
TsiChung Liew9d636e92008-03-28 08:47:45 -0500[diff] [blame]357 .align 4