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Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001menu "MIPS architecture"
2 depends on MIPS
3
4config SYS_ARCH
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09005 default "mips"
6
Daniel Schwierzeck99e7af22014-10-26 14:14:07 +01007config SYS_CPU
8 default "mips32" if CPU_MIPS32_R1 || CPU_MIPS32_R2
9 default "mips64" if CPU_MIPS64_R1 || CPU_MIPS64_R2
10
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090011choice
12 prompt "Target select"
Joe Hershbergerf0699602015-05-12 14:46:23 -050013 optional
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090014
15config TARGET_QEMU_MIPS
16 bool "Support qemu-mips"
Daniel Schwierzecka4c242b2014-10-26 14:14:07 +010017 select SUPPORTS_BIG_ENDIAN
18 select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck256034d2014-10-26 14:14:07 +010019 select SUPPORTS_CPU_MIPS32_R1
20 select SUPPORTS_CPU_MIPS32_R2
Daniel Schwierzeck94384d12014-10-26 14:14:07 +010021 select SUPPORTS_CPU_MIPS64_R1
22 select SUPPORTS_CPU_MIPS64_R2
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090023
24config TARGET_MALTA
25 bool "Support malta"
Daniel Schwierzecka4c242b2014-10-26 14:14:07 +010026 select SUPPORTS_BIG_ENDIAN
27 select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck256034d2014-10-26 14:14:07 +010028 select SUPPORTS_CPU_MIPS32_R1
29 select SUPPORTS_CPU_MIPS32_R2
Daniel Schwierzeck7dca6862015-01-18 22:00:18 +010030 select SWAP_IO_SPACE
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090031
32config TARGET_VCT
33 bool "Support vct"
Daniel Schwierzecka4c242b2014-10-26 14:14:07 +010034 select SUPPORTS_BIG_ENDIAN
Daniel Schwierzeck256034d2014-10-26 14:14:07 +010035 select SUPPORTS_CPU_MIPS32_R1
36 select SUPPORTS_CPU_MIPS32_R2
Paul Burton6832bdc2015-01-29 01:28:02 +000037 select SYS_MIPS_CACHE_INIT_RAM_LOAD
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090038
39config TARGET_DBAU1X00
40 bool "Support dbau1x00"
Daniel Schwierzecka4c242b2014-10-26 14:14:07 +010041 select SUPPORTS_BIG_ENDIAN
42 select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck256034d2014-10-26 14:14:07 +010043 select SUPPORTS_CPU_MIPS32_R1
44 select SUPPORTS_CPU_MIPS32_R2
Paul Burton6832bdc2015-01-29 01:28:02 +000045 select SYS_MIPS_CACHE_INIT_RAM_LOAD
Daniel Schwierzeckaadd3322015-12-26 19:55:37 +010046 select MIPS_TUNE_4KC
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090047
48config TARGET_PB1X00
49 bool "Support pb1x00"
Daniel Schwierzecka4c242b2014-10-26 14:14:07 +010050 select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck256034d2014-10-26 14:14:07 +010051 select SUPPORTS_CPU_MIPS32_R1
52 select SUPPORTS_CPU_MIPS32_R2
Paul Burton6832bdc2015-01-29 01:28:02 +000053 select SYS_MIPS_CACHE_INIT_RAM_LOAD
Daniel Schwierzeckaadd3322015-12-26 19:55:37 +010054 select MIPS_TUNE_4KC
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090055
56endchoice
57
58source "board/dbau1x00/Kconfig"
59source "board/imgtec/malta/Kconfig"
60source "board/micronas/vct/Kconfig"
61source "board/pb1x00/Kconfig"
62source "board/qemu-mips/Kconfig"
63
Daniel Schwierzecka4c242b2014-10-26 14:14:07 +010064if MIPS
65
66choice
67 prompt "Endianness selection"
68 help
69 Some MIPS boards can be configured for either little or big endian
70 byte order. These modes require different U-Boot images. In general there
71 is one preferred byteorder for a particular system but some systems are
72 just as commonly used in the one or the other endianness.
73
74config SYS_BIG_ENDIAN
75 bool "Big endian"
76 depends on SUPPORTS_BIG_ENDIAN
77
78config SYS_LITTLE_ENDIAN
79 bool "Little endian"
80 depends on SUPPORTS_LITTLE_ENDIAN
81
82endchoice
83
Daniel Schwierzeck256034d2014-10-26 14:14:07 +010084choice
85 prompt "CPU selection"
86 default CPU_MIPS32_R2
87
88config CPU_MIPS32_R1
89 bool "MIPS32 Release 1"
90 depends on SUPPORTS_CPU_MIPS32_R1
91 select 32BIT
92 help
93 Choose this option to build an U-Boot for release 1 or later of the
94 MIPS32 architecture.
95
96config CPU_MIPS32_R2
97 bool "MIPS32 Release 2"
98 depends on SUPPORTS_CPU_MIPS32_R2
99 select 32BIT
100 help
101 Choose this option to build an U-Boot for release 2 or later of the
102 MIPS32 architecture.
103
104config CPU_MIPS64_R1
105 bool "MIPS64 Release 1"
106 depends on SUPPORTS_CPU_MIPS64_R1
107 select 64BIT
108 help
109 Choose this option to build a kernel for release 1 or later of the
110 MIPS64 architecture.
111
112config CPU_MIPS64_R2
113 bool "MIPS64 Release 2"
114 depends on SUPPORTS_CPU_MIPS64_R2
115 select 64BIT
116 help
117 Choose this option to build a kernel for release 2 or later of the
118 MIPS64 architecture.
119
120endchoice
121
Daniel Schwierzeckf9749fa2015-01-14 21:44:13 +0100122menu "OS boot interface"
123
124config MIPS_BOOT_CMDLINE_LEGACY
125 bool "Hand over legacy command line to Linux kernel"
126 default y
127 help
128 Enable this option if you want U-Boot to hand over the Yamon-style
129 command line to the kernel. All bootargs will be prepared as argc/argv
130 compatible list. The argument count (argc) is stored in register $a0.
131 The address of the argument list (argv) is stored in register $a1.
132
Daniel Schwierzeckc07dc602015-01-14 21:44:13 +0100133config MIPS_BOOT_ENV_LEGACY
134 bool "Hand over legacy environment to Linux kernel"
135 default y
136 help
137 Enable this option if you want U-Boot to hand over the Yamon-style
138 environment to the kernel. Information like memory size, initrd
139 address and size will be prepared as zero-terminated key/value list.
140 The address of the enviroment is stored in register $a2.
141
Daniel Schwierzeck8d7ff4d2015-01-14 21:44:13 +0100142config MIPS_BOOT_FDT
Daniel Schwierzeckd1b29d22015-02-22 16:58:30 +0100143 bool "Hand over a flattened device tree to Linux kernel"
Daniel Schwierzeck8d7ff4d2015-01-14 21:44:13 +0100144 default n
145 help
146 Enable this option if you want U-Boot to hand over a flattened
Daniel Schwierzeckd1b29d22015-02-22 16:58:30 +0100147 device tree to the kernel. According to UHI register $a0 will be set
148 to -2 and the FDT address is stored in $a1.
Daniel Schwierzeck8d7ff4d2015-01-14 21:44:13 +0100149
Daniel Schwierzeckf9749fa2015-01-14 21:44:13 +0100150endmenu
151
Daniel Schwierzecka4c242b2014-10-26 14:14:07 +0100152config SUPPORTS_BIG_ENDIAN
153 bool
154
155config SUPPORTS_LITTLE_ENDIAN
156 bool
157
Daniel Schwierzeck256034d2014-10-26 14:14:07 +0100158config SUPPORTS_CPU_MIPS32_R1
159 bool
160
161config SUPPORTS_CPU_MIPS32_R2
162 bool
163
164config SUPPORTS_CPU_MIPS64_R1
165 bool
166
167config SUPPORTS_CPU_MIPS64_R2
168 bool
169
Daniel Schwierzeckdfbad0f2015-01-18 21:59:35 +0100170config CPU_MIPS32
171 bool
172 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2
173
174config CPU_MIPS64
175 bool
176 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
177
Daniel Schwierzeckaadd3322015-12-26 19:55:37 +0100178config MIPS_TUNE_4KC
179 bool
180
181config MIPS_TUNE_14KC
182 bool
183
184config MIPS_TUNE_24KC
185 bool
186
Daniel Schwierzeck256034d2014-10-26 14:14:07 +0100187config 32BIT
188 bool
189
190config 64BIT
191 bool
192
Daniel Schwierzeck7dca6862015-01-18 22:00:18 +0100193config SWAP_IO_SPACE
194 bool
195
Paul Burton6832bdc2015-01-29 01:28:02 +0000196config SYS_MIPS_CACHE_INIT_RAM_LOAD
197 bool
198
Daniel Schwierzecka4c242b2014-10-26 14:14:07 +0100199endif
200
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900201endmenu