Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 1 | menu "MIPS architecture" |
| 2 | depends on MIPS |
| 3 | |
| 4 | config SYS_ARCH |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 5 | default "mips" |
| 6 | |
Daniel Schwierzeck | 99e7af2 | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 7 | config SYS_CPU |
| 8 | default "mips32" if CPU_MIPS32_R1 || CPU_MIPS32_R2 |
| 9 | default "mips64" if CPU_MIPS64_R1 || CPU_MIPS64_R2 |
| 10 | |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 11 | choice |
| 12 | prompt "Target select" |
Joe Hershberger | f069960 | 2015-05-12 14:46:23 -0500 | [diff] [blame] | 13 | optional |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 14 | |
| 15 | config TARGET_QEMU_MIPS |
| 16 | bool "Support qemu-mips" |
Daniel Schwierzeck | a4c242b | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 17 | select SUPPORTS_BIG_ENDIAN |
| 18 | select SUPPORTS_LITTLE_ENDIAN |
Daniel Schwierzeck | 256034d | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 19 | select SUPPORTS_CPU_MIPS32_R1 |
| 20 | select SUPPORTS_CPU_MIPS32_R2 |
Daniel Schwierzeck | 94384d1 | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 21 | select SUPPORTS_CPU_MIPS64_R1 |
| 22 | select SUPPORTS_CPU_MIPS64_R2 |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 23 | |
| 24 | config TARGET_MALTA |
| 25 | bool "Support malta" |
Daniel Schwierzeck | a4c242b | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 26 | select SUPPORTS_BIG_ENDIAN |
| 27 | select SUPPORTS_LITTLE_ENDIAN |
Daniel Schwierzeck | 256034d | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 28 | select SUPPORTS_CPU_MIPS32_R1 |
| 29 | select SUPPORTS_CPU_MIPS32_R2 |
Daniel Schwierzeck | 7dca686 | 2015-01-18 22:00:18 +0100 | [diff] [blame] | 30 | select SWAP_IO_SPACE |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 31 | |
| 32 | config TARGET_VCT |
| 33 | bool "Support vct" |
Daniel Schwierzeck | a4c242b | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 34 | select SUPPORTS_BIG_ENDIAN |
Daniel Schwierzeck | 256034d | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 35 | select SUPPORTS_CPU_MIPS32_R1 |
| 36 | select SUPPORTS_CPU_MIPS32_R2 |
Paul Burton | 6832bdc | 2015-01-29 01:28:02 +0000 | [diff] [blame] | 37 | select SYS_MIPS_CACHE_INIT_RAM_LOAD |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 38 | |
| 39 | config TARGET_DBAU1X00 |
| 40 | bool "Support dbau1x00" |
Daniel Schwierzeck | a4c242b | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 41 | select SUPPORTS_BIG_ENDIAN |
| 42 | select SUPPORTS_LITTLE_ENDIAN |
Daniel Schwierzeck | 256034d | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 43 | select SUPPORTS_CPU_MIPS32_R1 |
| 44 | select SUPPORTS_CPU_MIPS32_R2 |
Paul Burton | 6832bdc | 2015-01-29 01:28:02 +0000 | [diff] [blame] | 45 | select SYS_MIPS_CACHE_INIT_RAM_LOAD |
Daniel Schwierzeck | aadd332 | 2015-12-26 19:55:37 +0100 | [diff] [blame] | 46 | select MIPS_TUNE_4KC |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 47 | |
| 48 | config TARGET_PB1X00 |
| 49 | bool "Support pb1x00" |
Daniel Schwierzeck | a4c242b | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 50 | select SUPPORTS_LITTLE_ENDIAN |
Daniel Schwierzeck | 256034d | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 51 | select SUPPORTS_CPU_MIPS32_R1 |
| 52 | select SUPPORTS_CPU_MIPS32_R2 |
Paul Burton | 6832bdc | 2015-01-29 01:28:02 +0000 | [diff] [blame] | 53 | select SYS_MIPS_CACHE_INIT_RAM_LOAD |
Daniel Schwierzeck | aadd332 | 2015-12-26 19:55:37 +0100 | [diff] [blame] | 54 | select MIPS_TUNE_4KC |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 55 | |
| 56 | endchoice |
| 57 | |
| 58 | source "board/dbau1x00/Kconfig" |
| 59 | source "board/imgtec/malta/Kconfig" |
| 60 | source "board/micronas/vct/Kconfig" |
| 61 | source "board/pb1x00/Kconfig" |
| 62 | source "board/qemu-mips/Kconfig" |
| 63 | |
Daniel Schwierzeck | a4c242b | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 64 | if MIPS |
| 65 | |
| 66 | choice |
| 67 | prompt "Endianness selection" |
| 68 | help |
| 69 | Some MIPS boards can be configured for either little or big endian |
| 70 | byte order. These modes require different U-Boot images. In general there |
| 71 | is one preferred byteorder for a particular system but some systems are |
| 72 | just as commonly used in the one or the other endianness. |
| 73 | |
| 74 | config SYS_BIG_ENDIAN |
| 75 | bool "Big endian" |
| 76 | depends on SUPPORTS_BIG_ENDIAN |
| 77 | |
| 78 | config SYS_LITTLE_ENDIAN |
| 79 | bool "Little endian" |
| 80 | depends on SUPPORTS_LITTLE_ENDIAN |
| 81 | |
| 82 | endchoice |
| 83 | |
Daniel Schwierzeck | 256034d | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 84 | choice |
| 85 | prompt "CPU selection" |
| 86 | default CPU_MIPS32_R2 |
| 87 | |
| 88 | config CPU_MIPS32_R1 |
| 89 | bool "MIPS32 Release 1" |
| 90 | depends on SUPPORTS_CPU_MIPS32_R1 |
| 91 | select 32BIT |
| 92 | help |
| 93 | Choose this option to build an U-Boot for release 1 or later of the |
| 94 | MIPS32 architecture. |
| 95 | |
| 96 | config CPU_MIPS32_R2 |
| 97 | bool "MIPS32 Release 2" |
| 98 | depends on SUPPORTS_CPU_MIPS32_R2 |
| 99 | select 32BIT |
| 100 | help |
| 101 | Choose this option to build an U-Boot for release 2 or later of the |
| 102 | MIPS32 architecture. |
| 103 | |
| 104 | config CPU_MIPS64_R1 |
| 105 | bool "MIPS64 Release 1" |
| 106 | depends on SUPPORTS_CPU_MIPS64_R1 |
| 107 | select 64BIT |
| 108 | help |
| 109 | Choose this option to build a kernel for release 1 or later of the |
| 110 | MIPS64 architecture. |
| 111 | |
| 112 | config CPU_MIPS64_R2 |
| 113 | bool "MIPS64 Release 2" |
| 114 | depends on SUPPORTS_CPU_MIPS64_R2 |
| 115 | select 64BIT |
| 116 | help |
| 117 | Choose this option to build a kernel for release 2 or later of the |
| 118 | MIPS64 architecture. |
| 119 | |
| 120 | endchoice |
| 121 | |
Daniel Schwierzeck | f9749fa | 2015-01-14 21:44:13 +0100 | [diff] [blame] | 122 | menu "OS boot interface" |
| 123 | |
| 124 | config MIPS_BOOT_CMDLINE_LEGACY |
| 125 | bool "Hand over legacy command line to Linux kernel" |
| 126 | default y |
| 127 | help |
| 128 | Enable this option if you want U-Boot to hand over the Yamon-style |
| 129 | command line to the kernel. All bootargs will be prepared as argc/argv |
| 130 | compatible list. The argument count (argc) is stored in register $a0. |
| 131 | The address of the argument list (argv) is stored in register $a1. |
| 132 | |
Daniel Schwierzeck | c07dc60 | 2015-01-14 21:44:13 +0100 | [diff] [blame] | 133 | config MIPS_BOOT_ENV_LEGACY |
| 134 | bool "Hand over legacy environment to Linux kernel" |
| 135 | default y |
| 136 | help |
| 137 | Enable this option if you want U-Boot to hand over the Yamon-style |
| 138 | environment to the kernel. Information like memory size, initrd |
| 139 | address and size will be prepared as zero-terminated key/value list. |
| 140 | The address of the enviroment is stored in register $a2. |
| 141 | |
Daniel Schwierzeck | 8d7ff4d | 2015-01-14 21:44:13 +0100 | [diff] [blame] | 142 | config MIPS_BOOT_FDT |
Daniel Schwierzeck | d1b29d2 | 2015-02-22 16:58:30 +0100 | [diff] [blame] | 143 | bool "Hand over a flattened device tree to Linux kernel" |
Daniel Schwierzeck | 8d7ff4d | 2015-01-14 21:44:13 +0100 | [diff] [blame] | 144 | default n |
| 145 | help |
| 146 | Enable this option if you want U-Boot to hand over a flattened |
Daniel Schwierzeck | d1b29d2 | 2015-02-22 16:58:30 +0100 | [diff] [blame] | 147 | device tree to the kernel. According to UHI register $a0 will be set |
| 148 | to -2 and the FDT address is stored in $a1. |
Daniel Schwierzeck | 8d7ff4d | 2015-01-14 21:44:13 +0100 | [diff] [blame] | 149 | |
Daniel Schwierzeck | f9749fa | 2015-01-14 21:44:13 +0100 | [diff] [blame] | 150 | endmenu |
| 151 | |
Daniel Schwierzeck | a4c242b | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 152 | config SUPPORTS_BIG_ENDIAN |
| 153 | bool |
| 154 | |
| 155 | config SUPPORTS_LITTLE_ENDIAN |
| 156 | bool |
| 157 | |
Daniel Schwierzeck | 256034d | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 158 | config SUPPORTS_CPU_MIPS32_R1 |
| 159 | bool |
| 160 | |
| 161 | config SUPPORTS_CPU_MIPS32_R2 |
| 162 | bool |
| 163 | |
| 164 | config SUPPORTS_CPU_MIPS64_R1 |
| 165 | bool |
| 166 | |
| 167 | config SUPPORTS_CPU_MIPS64_R2 |
| 168 | bool |
| 169 | |
Daniel Schwierzeck | dfbad0f | 2015-01-18 21:59:35 +0100 | [diff] [blame] | 170 | config CPU_MIPS32 |
| 171 | bool |
| 172 | default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 |
| 173 | |
| 174 | config CPU_MIPS64 |
| 175 | bool |
| 176 | default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 |
| 177 | |
Daniel Schwierzeck | aadd332 | 2015-12-26 19:55:37 +0100 | [diff] [blame] | 178 | config MIPS_TUNE_4KC |
| 179 | bool |
| 180 | |
| 181 | config MIPS_TUNE_14KC |
| 182 | bool |
| 183 | |
| 184 | config MIPS_TUNE_24KC |
| 185 | bool |
| 186 | |
Daniel Schwierzeck | 256034d | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 187 | config 32BIT |
| 188 | bool |
| 189 | |
| 190 | config 64BIT |
| 191 | bool |
| 192 | |
Daniel Schwierzeck | 7dca686 | 2015-01-18 22:00:18 +0100 | [diff] [blame] | 193 | config SWAP_IO_SPACE |
| 194 | bool |
| 195 | |
Paul Burton | 6832bdc | 2015-01-29 01:28:02 +0000 | [diff] [blame] | 196 | config SYS_MIPS_CACHE_INIT_RAM_LOAD |
| 197 | bool |
| 198 | |
Daniel Schwierzeck | a4c242b | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 199 | endif |
| 200 | |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 201 | endmenu |