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git01.mediatek.com / filogic / uboot / 0245e961e40a63f92c42c4b003da5e5e3ed02868 / . / arch / arm / mach-omap2 / am33xx / u-boot-spl.lds
blob: 07cf2678782c26b9c63481b99aeda39132a62724 [file] [log] [blame]
Albert ARIBAUD6277b192013-02-25 00:58:58 +0000[diff] [blame]1/*
2 * (C) Copyright 2002
3 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
4 *
5 * (C) Copyright 2010
6 * Texas Instruments, <www.ti.com>
7 * Aneesh V <aneesh@ti.com>
8 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]9 * SPDX-License-Identifier: GPL-2.0+
Albert ARIBAUD6277b192013-02-25 00:58:58 +0000[diff] [blame]10 */
11
12MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
13 LENGTH = CONFIG_SPL_MAX_SIZE }
14MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
15 LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
16
17OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
18OUTPUT_ARCH(arm)
19ENTRY(_start)
20SECTIONS
21{
22 .text :
23 {
24 __start = .;
Benoît Thébaudeau3f7740f2014-08-21 15:43:11 +0200[diff] [blame]25 *(.vectors)
Albert ARIBAUD6277b192013-02-25 00:58:58 +0000[diff] [blame]26 arch/arm/cpu/armv7/start.o (.text)
27 *(.text*)
28 } >.sram
29
30 . = ALIGN(4);
31 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
32
33 . = ALIGN(4);
34 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
35
36 .u_boot_list : {
Albert ARIBAUDc24895e2013-02-25 00:59:00 +0000[diff] [blame]37 KEEP(*(SORT(.u_boot_list*)));
Albert ARIBAUD6277b192013-02-25 00:58:58 +0000[diff] [blame]38 } >.sram
39
40 . = ALIGN(4);
41 __image_copy_end = .;
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +0100[diff] [blame]42
43 .end :
44 {
45 *(.__end)
46 } >.sram
Albert ARIBAUD6277b192013-02-25 00:58:58 +0000[diff] [blame]47
48 .bss :
49 {
50 . = ALIGN(4);
51 __bss_start = .;
52 *(.bss*)
53 . = ALIGN(4);
Tom Rini19aac972013-03-18 12:31:00 -0400[diff] [blame]54 __bss_end = .;
Albert ARIBAUD6277b192013-02-25 00:58:58 +0000[diff] [blame]55 } >.sdram
56}