blob: 902a42bee290a9e9b90576faf1e8a115e9e5f6e6 [file] [log] [blame]
Patrick Delaunaye7f435d2018-07-09 15:17:22 +02001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
6/dts-v1/;
7
8#include "stm32mp157c-ed1.dts"
9
10/ {
11 model = "STMicroelectronics STM32MP157C eval daughter on eval mother";
12 compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157";
13
14};
15
16&cec {
17 pinctrl-names = "default";
18 pinctrl-0 = <&cec_pins_a>;
19 status = "okay";
20};
21
22&i2c2 {
23 pinctrl-names = "default";
24 pinctrl-0 = <&i2c2_pins_a>;
25 i2c-scl-rising-time-ns = <185>;
26 i2c-scl-falling-time-ns = <20>;
27 status = "okay";
28};
29
30&i2c5 {
31 pinctrl-names = "default";
32 pinctrl-0 = <&i2c5_pins_a>;
33 i2c-scl-rising-time-ns = <185>;
34 i2c-scl-falling-time-ns = <20>;
35 status = "okay";
36};
37
38&qspi {
39 pinctrl-names = "default";
40 pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a &qspi_bk2_pins_a>;
41 reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
42 #address-cells = <1>;
43 #size-cells = <0>;
44 status = "okay";
45
46 flash0: mx66l51235l@0 {
47 reg = <0>;
48 spi-rx-bus-width = <4>;
49 spi-max-frequency = <108000000>;
50 #address-cells = <1>;
51 #size-cells = <1>;
52 };
53
54 flash1: mx66l51235l@1 {
55 reg = <1>;
56 spi-rx-bus-width = <4>;
57 spi-max-frequency = <108000000>;
58 #address-cells = <1>;
59 #size-cells = <1>;
60 };
61};
62
63&timers2 {
64 status = "disabled";
65 pwm {
66 pinctrl-0 = <&pwm2_pins_a>;
67 pinctrl-names = "default";
68 status = "okay";
69 };
70 timer@1 {
71 status = "okay";
72 };
73};
74
75&timers8 {
76 status = "disabled";
77 pwm {
78 pinctrl-0 = <&pwm8_pins_a>;
79 pinctrl-names = "default";
80 status = "okay";
81 };
82 timer@7 {
83 status = "okay";
84 };
85};
86
87&timers12 {
88 status = "disabled";
89 pwm {
90 pinctrl-0 = <&pwm12_pins_a>;
91 pinctrl-names = "default";
92 status = "okay";
93 };
94 timer@11 {
95 status = "okay";
96 };
97};
98
Patrice Chotardf7a5edc2018-08-10 17:12:12 +020099&usbh_ehci {
100 phys = <&usbphyc_port0>;
101 phy-names = "usb";
102 vbus-supply = <&vbus_sw>;
103 status = "okay";
104};
105
Patrice Chotard18cb6f52018-08-10 17:12:11 +0200106&usbotg_hs {
107 pinctrl-names = "default";
108 pinctrl-0 = <&usbotg_hs_pins_a>;
109 phys = <&usbphyc_port1 0>;
110 phy-names = "usb2-phy";
111 status = "okay";
112};
113
Patrick Delaunaye7f435d2018-07-09 15:17:22 +0200114&usbphyc {
115 status = "okay";
116};