tree f46b15d9babc10342c52858952eb3d999ed3d25c
parent f0d5df3fa6b864a9171e32fc2b9e4785c7bfb279
author Santhosh Kumar K <s-k6@ti.com> 1736154420 +0530
committer Tom Rini <trini@konsulko.com> 1736891227 -0600

arm: dts: k3-*-ddr: Add ss_cfg reg entry

Add ss_cfg memory region which maps the DDRSS configuration region
for the memory controller node.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Neha Malcom Francis <n-francis@ti.com>