rockchip: misc: read cpuid either from efuse or otp
Newer Rockchip socs use a different ip block to handle one-time-
programmable memory, so depending on what got enabled get the cpuid
from either source.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c
index c0e4fdb..bed4317 100644
--- a/arch/arm/mach-rockchip/misc.c
+++ b/arch/arm/mach-rockchip/misc.c
@@ -57,13 +57,18 @@
const u32 cpuid_length,
u8 *cpuid)
{
-#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE)
+#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE) || CONFIG_IS_ENABLED(ROCKCHIP_OTP)
struct udevice *dev;
int ret;
/* retrieve the device */
+#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE)
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_GET_DRIVER(rockchip_efuse), &dev);
+#elif CONFIG_IS_ENABLED(ROCKCHIP_OTP)
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_GET_DRIVER(rockchip_otp), &dev);
+#endif
if (ret) {
debug("%s: could not find efuse device\n", __func__);
return -1;