Merge with http://www.psyent.com/git/uboot (NIOS2 - Scott McNutt)
diff --git a/CHANGELOG b/CHANGELOG
index 8ea9630..3b81ff6 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,7 +2,28 @@
Changes since U-Boot 1.1.4:
======================================================================
-* Fix U-Boot enviroenment sector protection on MCC200 board
+* Nios II - Add Altera EP1C20, EP1S10 and EP1S40 boards
+ Patch by Scott McNutt, 08 Jun 2006
+
+* Nios II - Add EPCS Controller bootrom work-around
+ -When booting from an epcs controller, the epcs bootrom may leave the
+ slave select in an asserted state causing soft reset hang. This
+ patch ensures slave select is negated at reset.
+ Patch by Scott McNutt, 08 Jun 2006
+
+* Update PK1C20 board
+ -Update base addresses for standard configuration
+ -Eliminate use of CACHE_BYPASS in board code
+ Patch by Scott McNutt, 08 Jun 2006
+
+* Nios II - Fix I/O Macros and mini-app stubs
+ -Fix asm/io.h macros
+ -Eliminate use of CACHE_BYPASS in cpu code
+ -Eliminate assembler warnings
+ -Fix mini-app stubs and force no small data
+ Patch by Scott McNutt, 08 Jun 2006
+
+* Fix U-Boot environment sector protection on MCC200 board
* Minor cleanup for PCS440EP board
diff --git a/MAINTAINERS b/MAINTAINERS
index 2e5bfe2..9a2f472 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -517,6 +517,9 @@
PCI5441 Nios-II
PK1C20 Nios-II
+ EP1C20 Nios-II
+ EP1S10 Nios-II
+ EP1S40 Nios-II
#########################################################################
# MicroBlaze Systems: #
diff --git a/MAKEALL b/MAKEALL
index 5b56377..28b6d9c 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -265,7 +265,7 @@
## Nios-II Systems
#########################################################################
-LIST_nios2="PCI5441 PK1C20"
+LIST_nios2="PCI5441 PK1C20 EP1C20 EP1S10 EP1S40"
#########################################################################
## MicroBlaze Systems
diff --git a/Makefile b/Makefile
index 2e8ee98..7424adc 100644
--- a/Makefile
+++ b/Makefile
@@ -1903,6 +1903,15 @@
## Nios-II
#########################################################################
+EP1C20_config : unconfig
+ @./mkconfig EP1C20 nios2 nios2 ep1c20 altera
+
+EP1S10_config : unconfig
+ @./mkconfig EP1S10 nios2 nios2 ep1s10 altera
+
+EP1S40_config : unconfig
+ @./mkconfig EP1S40 nios2 nios2 ep1s40 altera
+
PK1C20_config : unconfig
@./mkconfig PK1C20 nios2 nios2 pk1c20 psyent
diff --git a/README b/README
index 3ffef62..a3dadd4 100644
--- a/README
+++ b/README
@@ -322,6 +322,7 @@
------------------------
CONFIG_PCI5441 CONFIG_PK1C20
+ CONFIG_EP1C20 CONFIG_EP1S10 CONFIG_EP1S40
- CPU Module Type: (if CONFIG_COGENT is defined)
diff --git a/board/altera/common/AMDLV065D.c b/board/altera/common/AMDLV065D.c
new file mode 100644
index 0000000..8a7b14e
--- /dev/null
+++ b/board/altera/common/AMDLV065D.c
@@ -0,0 +1,190 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <common.h>
+#if defined(CONFIG_NIOS)
+#include <nios.h>
+#else
+#include <asm/io.h>
+#endif
+
+#define SECTSZ (64 * 1024)
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+
+/*----------------------------------------------------------------------*/
+unsigned long flash_init (void)
+{
+ int i;
+ unsigned long addr;
+ flash_info_t *fli = &flash_info[0];
+
+ fli->size = CFG_FLASH_SIZE;
+ fli->sector_count = CFG_MAX_FLASH_SECT;
+ fli->flash_id = FLASH_MAN_AMD + FLASH_AMDLV065D;
+
+ addr = CFG_FLASH_BASE;
+ for (i = 0; i < fli->sector_count; ++i) {
+ fli->start[i] = addr;
+ addr += SECTSZ;
+ fli->protect[i] = 1;
+ }
+
+ return (CFG_FLASH_SIZE);
+}
+/*--------------------------------------------------------------------*/
+void flash_print_info (flash_info_t * info)
+{
+ int i, k;
+ int erased;
+ unsigned long *addr;
+
+ printf (" Size: %ld KB in %d Sectors\n",
+ info->size >> 10, info->sector_count);
+ printf (" Sector Start Addresses:");
+ for (i = 0; i < info->sector_count; ++i) {
+
+ /* Check if whole sector is erased */
+ erased = 1;
+ addr = (unsigned long *) info->start[i];
+ for (k = 0; k < SECTSZ/sizeof(unsigned long); k++) {
+ if ( readl(addr++) != (unsigned long)-1) {
+ erased = 0;
+ break;
+ }
+ }
+
+ /* Print the info */
+ if ((i % 5) == 0)
+ printf ("\n ");
+ printf (" %08lX%s%s",
+ info->start[i],
+ erased ? " E" : " ",
+ info->protect[i] ? "RO " : " ");
+ }
+ printf ("\n");
+}
+
+/*-------------------------------------------------------------------*/
+
+
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+ unsigned char *addr = (unsigned char *) info->start[0];
+ unsigned char *addr2;
+ int prot, sect;
+ ulong start;
+
+ /* Some sanity checking */
+ if ((s_first < 0) || (s_first > s_last)) {
+ printf ("- no sectors to erase\n");
+ return 1;
+ }
+
+ prot = 0;
+ for (sect = s_first; sect <= s_last; ++sect) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+ if (prot) {
+ printf ("- Warning: %d protected sectors will not be erased!\n",
+ prot);
+ } else {
+ printf ("\n");
+ }
+
+ /* It's ok to erase multiple sectors provided we don't delay more
+ * than 50 usec between cmds ... at which point the erase time-out
+ * occurs. So don't go and put printf() calls in the loop ... it
+ * won't be very helpful ;-)
+ */
+ for (sect = s_first; sect <= s_last; sect++) {
+ if (info->protect[sect] == 0) { /* not protected */
+ addr2 = (unsigned char *) info->start[sect];
+ writeb (addr, 0xaa);
+ writeb (addr, 0x55);
+ writeb (addr, 0x80);
+ writeb (addr, 0xaa);
+ writeb (addr, 0x55);
+ writeb (addr2, 0x30);
+ /* Now just wait for 0xff & provide some user
+ * feedback while we wait.
+ */
+ start = get_timer (0);
+ while ( readb (addr2) != 0xff) {
+ udelay (1000 * 1000);
+ putc ('.');
+ if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
+ printf ("timeout\n");
+ return 1;
+ }
+ }
+ }
+ }
+ printf ("\n");
+ return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+
+ vu_char *cmd = (vu_char *) info->start[0];
+ vu_char *dst = (vu_char *) addr;
+ unsigned char b;
+ ulong start;
+
+ while (cnt) {
+ /* Check for sufficient erase */
+ b = *src;
+ if ((readb (dst) & b) != b) {
+ printf ("%02x : %02x\n", readb (dst), b);
+ return (2);
+ }
+
+ writeb (cmd, 0xaa);
+ writeb (cmd, 0x55);
+ writeb (cmd, 0xa0);
+ writeb (dst, b);
+
+ /* Verify write */
+ start = get_timer (0);
+ while (readb (dst) != b) {
+ if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+ return 1;
+ }
+ }
+ dst++;
+ src++;
+ cnt--;
+ }
+
+ return (0);
+}
diff --git a/board/altera/common/epled.c b/board/altera/common/epled.c
new file mode 100644
index 0000000..c75fe8c
--- /dev/null
+++ b/board/altera/common/epled.c
@@ -0,0 +1,62 @@
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <nios2-io.h>
+#include <status_led.h>
+
+/* The LED port is configured as output only, so we
+ * must track the state manually.
+ */
+static led_id_t val = 0;
+
+void __led_init (led_id_t mask, int state)
+{
+ nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR;
+
+ if (state == STATUS_LED_ON)
+ val &= ~mask;
+ else
+ val |= mask;
+ writel (&pio->data, val);
+}
+
+void __led_set (led_id_t mask, int state)
+{
+ nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR;
+
+ if (state == STATUS_LED_ON)
+ val &= ~mask;
+ else
+ val |= mask;
+ writel (&pio->data, val);
+}
+
+void __led_toggle (led_id_t mask)
+{
+ nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR;
+
+ val ^= mask;
+ writel (&pio->data, val);
+}
diff --git a/board/altera/ep1c20/Makefile b/board/altera/ep1c20/Makefile
new file mode 100644
index 0000000..a92b258
--- /dev/null
+++ b/board/altera/ep1c20/Makefile
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2001-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+COMOBJS := ../common/AMDLV065D.o ../common/epled.o
+
+OBJS := $(BOARD).o $(COMOBJS)
+
+SOBJS =
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $^
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
diff --git a/board/altera/ep1c20/config.mk b/board/altera/ep1c20/config.mk
new file mode 100644
index 0000000..dab2740
--- /dev/null
+++ b/board/altera/ep1c20/config.mk
@@ -0,0 +1,31 @@
+#
+# (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+# Scott McNutt <smcnutt@psyent.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0x01fc0000
+
+PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
+PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif
diff --git a/board/altera/ep1c20/ep1c20.c b/board/altera/ep1c20/ep1c20.c
new file mode 100644
index 0000000..2949139
--- /dev/null
+++ b/board/altera/ep1c20/ep1c20.c
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+int board_early_init_f (void)
+{
+ return 0;
+}
+
+int checkboard (void)
+{
+ puts ("BOARD : Altera EP-1C20\n");
+ return 0;
+}
+
+long int initdram (int board_type)
+{
+ return (0);
+}
diff --git a/board/altera/ep1c20/u-boot.lds b/board/altera/ep1c20/u-boot.lds
new file mode 100644
index 0000000..b99b82c
--- /dev/null
+++ b/board/altera/ep1c20/u-boot.lds
@@ -0,0 +1,136 @@
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+OUTPUT_FORMAT("elf32-littlenios2")
+OUTPUT_ARCH(nios2)
+ENTRY(_start)
+
+SECTIONS
+{
+ .text :
+ {
+ cpu/nios2/start.o (.text)
+ *(.text)
+ *(.text.*)
+ *(.gnu.linkonce.t*)
+ *(.rodata)
+ *(.rodata.*)
+ *(.gnu.linkonce.r*)
+ }
+ . = ALIGN (4);
+ _etext = .;
+ PROVIDE (etext = .);
+
+ /* CMD TABLE - sandwich this in between text and data so
+ * the initialization code relocates the command table as
+ * well -- admittedly, this is just pure laziness ;-)
+ */
+ __u_boot_cmd_start = .;
+ .u_boot_cmd :
+ {
+ *(.u_boot_cmd)
+ }
+ . = ALIGN(4);
+ __u_boot_cmd_end = .;
+
+ /* INIT DATA sections - "Small" data (see the gcc -G option)
+ * is always gp-relative. Here we make all init data sections
+ * adjacent to simplify the startup code -- and provide
+ * the global pointer for gp-relative access.
+ */
+ _data = .;
+ .data :
+ {
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d*)
+ }
+
+ . = ALIGN(16);
+ _gp = .; /* Global pointer addr */
+ PROVIDE (gp = .);
+
+ .sdata :
+ {
+ *(.sdata)
+ *(.sdata.*)
+ *(.gnu.linkonce.s.*)
+ }
+ . = ALIGN(4);
+
+ _edata = .;
+ PROVIDE (edata = .);
+
+ /* UNINIT DATA - Small uninitialized data is first so it's
+ * adjacent to sdata and can be referenced via gp. The normal
+ * bss follows. We keep it adjacent to simplify init code.
+ */
+ __bss_start = .;
+ .sbss :
+ {
+ *(.sbss)
+ *(.sbss.*)
+ *(.gnu.linkonce.sb.*)
+ *(.scommon)
+ }
+ . = ALIGN(4);
+ .bss :
+ {
+ *(.bss)
+ *(.bss.*)
+ *(.dynbss)
+ *(COMMON)
+ *(.scommon)
+ }
+ . = ALIGN(4);
+ _end = .;
+ PROVIDE (end = .);
+
+ /* DEBUG -- symbol table, string table, etc. etc.
+ */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+}
diff --git a/board/altera/ep1s10/Makefile b/board/altera/ep1s10/Makefile
new file mode 100644
index 0000000..a92b258
--- /dev/null
+++ b/board/altera/ep1s10/Makefile
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2001-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+COMOBJS := ../common/AMDLV065D.o ../common/epled.o
+
+OBJS := $(BOARD).o $(COMOBJS)
+
+SOBJS =
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $^
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
diff --git a/board/altera/ep1s10/config.mk b/board/altera/ep1s10/config.mk
new file mode 100644
index 0000000..dab2740
--- /dev/null
+++ b/board/altera/ep1s10/config.mk
@@ -0,0 +1,31 @@
+#
+# (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+# Scott McNutt <smcnutt@psyent.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0x01fc0000
+
+PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
+PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif
diff --git a/board/altera/ep1s10/ep1s10.c b/board/altera/ep1s10/ep1s10.c
new file mode 100644
index 0000000..9c7e28e
--- /dev/null
+++ b/board/altera/ep1s10/ep1s10.c
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+int board_early_init_f (void)
+{
+ return 0;
+}
+
+int checkboard (void)
+{
+ puts ("BOARD : Altera EP-1S10\n");
+ return 0;
+}
+
+long int initdram (int board_type)
+{
+ return (0);
+}
diff --git a/board/altera/ep1s10/u-boot.lds b/board/altera/ep1s10/u-boot.lds
new file mode 100644
index 0000000..b99b82c
--- /dev/null
+++ b/board/altera/ep1s10/u-boot.lds
@@ -0,0 +1,136 @@
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+OUTPUT_FORMAT("elf32-littlenios2")
+OUTPUT_ARCH(nios2)
+ENTRY(_start)
+
+SECTIONS
+{
+ .text :
+ {
+ cpu/nios2/start.o (.text)
+ *(.text)
+ *(.text.*)
+ *(.gnu.linkonce.t*)
+ *(.rodata)
+ *(.rodata.*)
+ *(.gnu.linkonce.r*)
+ }
+ . = ALIGN (4);
+ _etext = .;
+ PROVIDE (etext = .);
+
+ /* CMD TABLE - sandwich this in between text and data so
+ * the initialization code relocates the command table as
+ * well -- admittedly, this is just pure laziness ;-)
+ */
+ __u_boot_cmd_start = .;
+ .u_boot_cmd :
+ {
+ *(.u_boot_cmd)
+ }
+ . = ALIGN(4);
+ __u_boot_cmd_end = .;
+
+ /* INIT DATA sections - "Small" data (see the gcc -G option)
+ * is always gp-relative. Here we make all init data sections
+ * adjacent to simplify the startup code -- and provide
+ * the global pointer for gp-relative access.
+ */
+ _data = .;
+ .data :
+ {
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d*)
+ }
+
+ . = ALIGN(16);
+ _gp = .; /* Global pointer addr */
+ PROVIDE (gp = .);
+
+ .sdata :
+ {
+ *(.sdata)
+ *(.sdata.*)
+ *(.gnu.linkonce.s.*)
+ }
+ . = ALIGN(4);
+
+ _edata = .;
+ PROVIDE (edata = .);
+
+ /* UNINIT DATA - Small uninitialized data is first so it's
+ * adjacent to sdata and can be referenced via gp. The normal
+ * bss follows. We keep it adjacent to simplify init code.
+ */
+ __bss_start = .;
+ .sbss :
+ {
+ *(.sbss)
+ *(.sbss.*)
+ *(.gnu.linkonce.sb.*)
+ *(.scommon)
+ }
+ . = ALIGN(4);
+ .bss :
+ {
+ *(.bss)
+ *(.bss.*)
+ *(.dynbss)
+ *(COMMON)
+ *(.scommon)
+ }
+ . = ALIGN(4);
+ _end = .;
+ PROVIDE (end = .);
+
+ /* DEBUG -- symbol table, string table, etc. etc.
+ */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+}
diff --git a/board/altera/ep1s40/Makefile b/board/altera/ep1s40/Makefile
new file mode 100644
index 0000000..a92b258
--- /dev/null
+++ b/board/altera/ep1s40/Makefile
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2001-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+COMOBJS := ../common/AMDLV065D.o ../common/epled.o
+
+OBJS := $(BOARD).o $(COMOBJS)
+
+SOBJS =
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $^
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
diff --git a/board/altera/ep1s40/config.mk b/board/altera/ep1s40/config.mk
new file mode 100644
index 0000000..dab2740
--- /dev/null
+++ b/board/altera/ep1s40/config.mk
@@ -0,0 +1,31 @@
+#
+# (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+# Scott McNutt <smcnutt@psyent.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0x01fc0000
+
+PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
+PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif
diff --git a/board/altera/ep1s40/ep1s40.c b/board/altera/ep1s40/ep1s40.c
new file mode 100644
index 0000000..cb75550
--- /dev/null
+++ b/board/altera/ep1s40/ep1s40.c
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+int checkboard (void)
+{
+ puts ("BOARD : Altera EP-1S40\n");
+ return 0;
+}
+
+long int initdram (int board_type)
+{
+ return (0);
+}
diff --git a/board/altera/ep1s40/u-boot.lds b/board/altera/ep1s40/u-boot.lds
new file mode 100644
index 0000000..b99b82c
--- /dev/null
+++ b/board/altera/ep1s40/u-boot.lds
@@ -0,0 +1,136 @@
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+OUTPUT_FORMAT("elf32-littlenios2")
+OUTPUT_ARCH(nios2)
+ENTRY(_start)
+
+SECTIONS
+{
+ .text :
+ {
+ cpu/nios2/start.o (.text)
+ *(.text)
+ *(.text.*)
+ *(.gnu.linkonce.t*)
+ *(.rodata)
+ *(.rodata.*)
+ *(.gnu.linkonce.r*)
+ }
+ . = ALIGN (4);
+ _etext = .;
+ PROVIDE (etext = .);
+
+ /* CMD TABLE - sandwich this in between text and data so
+ * the initialization code relocates the command table as
+ * well -- admittedly, this is just pure laziness ;-)
+ */
+ __u_boot_cmd_start = .;
+ .u_boot_cmd :
+ {
+ *(.u_boot_cmd)
+ }
+ . = ALIGN(4);
+ __u_boot_cmd_end = .;
+
+ /* INIT DATA sections - "Small" data (see the gcc -G option)
+ * is always gp-relative. Here we make all init data sections
+ * adjacent to simplify the startup code -- and provide
+ * the global pointer for gp-relative access.
+ */
+ _data = .;
+ .data :
+ {
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d*)
+ }
+
+ . = ALIGN(16);
+ _gp = .; /* Global pointer addr */
+ PROVIDE (gp = .);
+
+ .sdata :
+ {
+ *(.sdata)
+ *(.sdata.*)
+ *(.gnu.linkonce.s.*)
+ }
+ . = ALIGN(4);
+
+ _edata = .;
+ PROVIDE (edata = .);
+
+ /* UNINIT DATA - Small uninitialized data is first so it's
+ * adjacent to sdata and can be referenced via gp. The normal
+ * bss follows. We keep it adjacent to simplify init code.
+ */
+ __bss_start = .;
+ .sbss :
+ {
+ *(.sbss)
+ *(.sbss.*)
+ *(.gnu.linkonce.sb.*)
+ *(.scommon)
+ }
+ . = ALIGN(4);
+ .bss :
+ {
+ *(.bss)
+ *(.bss.*)
+ *(.dynbss)
+ *(COMMON)
+ *(.scommon)
+ }
+ . = ALIGN(4);
+ _end = .;
+ PROVIDE (end = .);
+
+ /* DEBUG -- symbol table, string table, etc. etc.
+ */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+}
diff --git a/board/psyent/common/AMDLV065D.c b/board/psyent/common/AMDLV065D.c
index 4965743..8a7b14e 100644
--- a/board/psyent/common/AMDLV065D.c
+++ b/board/psyent/common/AMDLV065D.c
@@ -26,7 +26,7 @@
#if defined(CONFIG_NIOS)
#include <nios.h>
#else
-#include <nios2.h>
+#include <asm/io.h>
#endif
#define SECTSZ (64 * 1024)
@@ -56,9 +56,8 @@
void flash_print_info (flash_info_t * info)
{
int i, k;
- unsigned long size;
int erased;
- volatile unsigned char *flash;
+ unsigned long *addr;
printf (" Size: %ld KB in %d Sectors\n",
info->size >> 10, info->sector_count);
@@ -66,14 +65,10 @@
for (i = 0; i < info->sector_count; ++i) {
/* Check if whole sector is erased */
- if (i != (info->sector_count - 1))
- size = info->start[i + 1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
erased = 1;
- flash = (volatile unsigned char *) CACHE_BYPASS(info->start[i]);
- for (k = 0; k < size; k++) {
- if (*flash++ != 0xff) {
+ addr = (unsigned long *) info->start[i];
+ for (k = 0; k < SECTSZ/sizeof(unsigned long); k++) {
+ if ( readl(addr++) != (unsigned long)-1) {
erased = 0;
break;
}
@@ -83,7 +78,7 @@
if ((i % 5) == 0)
printf ("\n ");
printf (" %08lX%s%s",
- CACHE_NO_BYPASS(info->start[i]),
+ info->start[i],
erased ? " E" : " ",
info->protect[i] ? "RO " : " ");
}
@@ -95,9 +90,8 @@
int flash_erase (flash_info_t * info, int s_first, int s_last)
{
- volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *)
- CACHE_BYPASS(info->start[0]);
- volatile CFG_FLASH_WORD_SIZE *addr2;
+ unsigned char *addr = (unsigned char *) info->start[0];
+ unsigned char *addr2;
int prot, sect;
ulong start;
@@ -127,19 +121,18 @@
*/
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
- addr2 = (CFG_FLASH_WORD_SIZE *)
- CACHE_BYPASS((info->start[sect]));
- *addr = 0xaa;
- *addr = 0x55;
- *addr = 0x80;
- *addr = 0xaa;
- *addr = 0x55;
- *addr2 = 0x30;
+ addr2 = (unsigned char *) info->start[sect];
+ writeb (addr, 0xaa);
+ writeb (addr, 0x55);
+ writeb (addr, 0x80);
+ writeb (addr, 0xaa);
+ writeb (addr, 0x55);
+ writeb (addr2, 0x30);
/* Now just wait for 0xff & provide some user
* feedback while we wait.
*/
start = get_timer (0);
- while (*addr2 != 0xff) {
+ while ( readb (addr2) != 0xff) {
udelay (1000 * 1000);
putc ('.');
if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
@@ -163,27 +156,27 @@
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
- vu_char *cmd = (vu_char *) CACHE_BYPASS(info->start[0]);
- vu_char *dst = (vu_char *) CACHE_BYPASS(addr);
+ vu_char *cmd = (vu_char *) info->start[0];
+ vu_char *dst = (vu_char *) addr;
unsigned char b;
ulong start;
while (cnt) {
/* Check for sufficient erase */
b = *src;
- if ((*dst & b) != b) {
- printf ("%02x : %02x\n", *dst, b);
+ if ((readb (dst) & b) != b) {
+ printf ("%02x : %02x\n", readb (dst), b);
return (2);
}
- *cmd = 0xaa;
- *cmd = 0x55;
- *cmd = 0xa0;
- *dst = b;
+ writeb (cmd, 0xaa);
+ writeb (cmd, 0x55);
+ writeb (cmd, 0xa0);
+ writeb (dst, b);
/* Verify write */
start = get_timer (0);
- while (*dst != b) {
+ while (readb (dst) != b) {
if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
return 1;
}
diff --git a/board/psyent/pk1c20/config.mk b/board/psyent/pk1c20/config.mk
index d72bcee..d65780d 100644
--- a/board/psyent/pk1c20/config.mk
+++ b/board/psyent/pk1c20/config.mk
@@ -21,7 +21,7 @@
# MA 02111-1307 USA
#
-TEXT_BASE = 0x018e0000
+TEXT_BASE = 0x01fc0000
PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
diff --git a/board/psyent/pk1c20/led.c b/board/psyent/pk1c20/led.c
index c175c9b..c75fe8c 100644
--- a/board/psyent/pk1c20/led.c
+++ b/board/psyent/pk1c20/led.c
@@ -22,7 +22,7 @@
*/
#include <common.h>
-#include <nios2.h>
+#include <asm/io.h>
#include <nios2-io.h>
#include <status_led.h>
@@ -33,30 +33,30 @@
void __led_init (led_id_t mask, int state)
{
- nios_pio_t *pio = (nios_pio_t *)CACHE_BYPASS(CFG_LEDPIO_ADDR);
+ nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR;
if (state == STATUS_LED_ON)
val &= ~mask;
else
val |= mask;
- pio->data = val;
+ writel (&pio->data, val);
}
void __led_set (led_id_t mask, int state)
{
- nios_pio_t *pio = (nios_pio_t *)CACHE_BYPASS(CFG_LEDPIO_ADDR);
+ nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR;
if (state == STATUS_LED_ON)
val &= ~mask;
else
val |= mask;
- pio->data = val;
+ writel (&pio->data, val);
}
void __led_toggle (led_id_t mask)
{
- nios_pio_t *pio = (nios_pio_t *)CACHE_BYPASS(CFG_LEDPIO_ADDR);
+ nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR;
val ^= mask;
- pio->data = val;
+ writel (&pio->data, val);
}
diff --git a/cpu/nios2/epcs.c b/cpu/nios2/epcs.c
index a8851e9..414c38c 100644
--- a/cpu/nios2/epcs.c
+++ b/cpu/nios2/epcs.c
@@ -25,7 +25,7 @@
#if defined(CFG_NIOS_EPCSBASE)
#include <command.h>
-#include <nios2.h>
+#include <asm/io.h>
#include <nios2-io.h>
#include <nios2-epcs.h>
@@ -72,8 +72,7 @@
*/
#define EPCS_TIMEOUT 100 /* 100 msec timeout */
-static nios_spi_t *epcs =
- (nios_spi_t *)CACHE_BYPASS(CFG_NIOS_EPCSBASE);
+static nios_spi_t *epcs = (nios_spi_t *)CFG_NIOS_EPCSBASE;
/***********************************************************************
* Device access
@@ -81,16 +80,20 @@
static int epcs_cs (int assert)
{
ulong start;
+ unsigned tmp;
+
if (assert) {
- epcs->control |= NIOS_SPI_SSO;
+ tmp = readl (&epcs->control);
+ writel (&epcs->control, tmp | NIOS_SPI_SSO);
} else {
/* Let all bits shift out */
start = get_timer (0);
- while ((epcs->status & NIOS_SPI_TMT) == 0)
+ while ((readl (&epcs->status) & NIOS_SPI_TMT) == 0)
if (get_timer (start) > EPCS_TIMEOUT)
return (-1);
- epcs->control &= ~NIOS_SPI_SSO;
+ tmp = readl (&epcs->control);
+ writel (&epcs->control, tmp & ~NIOS_SPI_SSO);
}
return (0);
}
@@ -100,10 +103,10 @@
ulong start;
start = get_timer (0);
- while ((epcs->status & NIOS_SPI_TRDY) == 0)
+ while ((readl (&epcs->status) & NIOS_SPI_TRDY) == 0)
if (get_timer (start) > EPCS_TIMEOUT)
return (-1);
- epcs->txdata = c;
+ writel (&epcs->txdata, c);
return (0);
}
@@ -112,10 +115,10 @@
ulong start;
start = get_timer (0);
- while ((epcs->status & NIOS_SPI_RRDY) == 0)
+ while ((readl (&epcs->status) & NIOS_SPI_RRDY) == 0)
if (get_timer (start) > EPCS_TIMEOUT)
return (-1);
- return (epcs->rxdata);
+ return (readl (&epcs->rxdata));
}
static unsigned char bitrev[] = {
@@ -207,6 +210,21 @@
{ 0, 0, 0, 0, 0, 0 }
};
+int epcs_reset (void)
+{
+ /* When booting from an epcs controller, the epcs bootrom
+ * code may leave the slave select in an asserted state.
+ * This causes two problems: (1) The initial epcs access
+ * will fail -- not a big deal, and (2) a software reset
+ * will cause the bootrom code to hang since it does not
+ * ensure the select is negated prior to first access -- a
+ * big deal. Here we just negate chip select and everything
+ * gets better :-)
+ */
+ epcs_cs (0); /* Negate chip select */
+ return (0);
+}
+
epcs_devinfo_t *epcs_dev_find (void)
{
unsigned char buf[4];
diff --git a/cpu/nios2/exceptions.S b/cpu/nios2/exceptions.S
index d3b95cf..b9c7a58 100644
--- a/cpu/nios2/exceptions.S
+++ b/cpu/nios2/exceptions.S
@@ -30,6 +30,9 @@
.global _exception
+ .set noat
+ .set nobreak
+
_exception:
/* SAVE ALL REGS -- this allows trap and unimplemented
* instruction handlers to be coded conveniently in C
diff --git a/cpu/nios2/interrupts.c b/cpu/nios2/interrupts.c
index 4a6da58..4685161 100644
--- a/cpu/nios2/interrupts.c
+++ b/cpu/nios2/interrupts.c
@@ -27,6 +27,7 @@
#include <nios2.h>
#include <nios2-io.h>
+#include <asm/io.h>
#include <asm/ptrace.h>
#include <common.h>
#include <command.h>
@@ -79,7 +80,7 @@
/* Interrupt is cleared by writing anything to the
* status register.
*/
- tmr->status = 0;
+ writel (&tmr->status, 0);
timestamp += CFG_NIOS_TMRMS;
#ifdef CONFIG_STATUS_LED
status_led_tick(timestamp);
@@ -88,16 +89,17 @@
static void tmr_init (void)
{
- nios_timer_t *tmr =(nios_timer_t *)CACHE_BYPASS(CFG_NIOS_TMRBASE);
+ nios_timer_t *tmr =(nios_timer_t *)CFG_NIOS_TMRBASE;
- tmr->control &= ~(NIOS_TIMER_START | NIOS_TIMER_ITO);
- tmr->control |= NIOS_TIMER_STOP;
+ writel (&tmr->status, 0);
+ writel (&tmr->control, 0);
+ writel (&tmr->control, NIOS_TIMER_STOP);
+
#if defined(CFG_NIOS_TMRCNT)
- tmr->periodl = CFG_NIOS_TMRCNT & 0xffff;
- tmr->periodh = (CFG_NIOS_TMRCNT >> 16) & 0xffff;
+ writel (&tmr->periodl, CFG_NIOS_TMRCNT & 0xffff);
+ writel (&tmr->periodh, (CFG_NIOS_TMRCNT >> 16) & 0xffff);
#endif
- tmr->control |= ( NIOS_TIMER_ITO |
- NIOS_TIMER_CONT |
+ writel (&tmr->control, NIOS_TIMER_ITO | NIOS_TIMER_CONT |
NIOS_TIMER_START );
irq_install_handler (CFG_NIOS_TMRIRQ, tmr_isr, (void *)tmr);
}
diff --git a/cpu/nios2/serial.c b/cpu/nios2/serial.c
index 3d76603..0bd3821 100644
--- a/cpu/nios2/serial.c
+++ b/cpu/nios2/serial.c
@@ -24,7 +24,7 @@
#include <common.h>
#include <watchdog.h>
-#include <nios2.h>
+#include <asm/io.h>
#include <nios2-io.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -34,8 +34,7 @@
*-----------------------------------------------------------------*/
#if defined(CONFIG_CONSOLE_JTAG)
-static nios_jtag_t *jtag =
- (nios_jtag_t *)CACHE_BYPASS(CFG_NIOS_CONSOLE);
+static nios_jtag_t *jtag = (nios_jtag_t *)CFG_NIOS_CONSOLE;
void serial_setbrg( void ){ return; }
int serial_init( void ) { return(0);}
@@ -44,9 +43,9 @@
{
unsigned val;
- while (NIOS_JTAG_WSPACE (jtag->control) == 0)
+ while (NIOS_JTAG_WSPACE ( readl (&jtag->control)) == 0)
WATCHDOG_RESET ();
- jtag->data = (unsigned char)c;
+ writel (&jtag->data, (unsigned char)c);
}
void serial_puts (const char *s)
@@ -57,7 +56,7 @@
int serial_tstc (void)
{
- return (jtag->control & NIOS_JTAG_RRDY);
+ return ( readl (&jtag->control) & NIOS_JTAG_RRDY);
}
int serial_getc (void)
@@ -67,7 +66,7 @@
while (1) {
WATCHDOG_RESET ();
- val = jtag->data;
+ val = readl (&jtag->data);
if (val & NIOS_JTAG_RVALID)
break;
}
@@ -80,8 +79,7 @@
*-----------------------------------------------------------------*/
#else
-static nios_uart_t *uart = (nios_uart_t *)
- CACHE_BYPASS(CFG_NIOS_CONSOLE);
+static nios_uart_t *uart = (nios_uart_t *) CFG_NIOS_CONSOLE;
#if defined(CFG_NIOS_FIXEDBAUD)
@@ -98,7 +96,7 @@
unsigned div;
div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1;
- uart->divisor = div;
+ writel (&uart->divisor,div);
return;
}
@@ -118,9 +116,9 @@
{
if (c == '\n')
serial_putc ('\r');
- while ((uart->status & NIOS_UART_TRDY) == 0)
+ while ((readl (&uart->status) & NIOS_UART_TRDY) == 0)
WATCHDOG_RESET ();
- uart->txdata = (unsigned char)c;
+ writel (&uart->txdata,(unsigned char)c);
}
void serial_puts (const char *s)
@@ -132,14 +130,14 @@
int serial_tstc (void)
{
- return (uart->status & NIOS_UART_RRDY);
+ return (readl (&uart->status) & NIOS_UART_RRDY);
}
int serial_getc (void)
{
while (serial_tstc () == 0)
WATCHDOG_RESET ();
- return( uart->rxdata & 0x00ff );
+ return (readl (&uart->rxdata) & 0x00ff );
}
#endif /* CONFIG_JTAG_CONSOLE */
diff --git a/cpu/nios2/sysid.c b/cpu/nios2/sysid.c
index 2b7a569..b5a2959 100644
--- a/cpu/nios2/sysid.c
+++ b/cpu/nios2/sysid.c
@@ -26,20 +26,21 @@
#if defined (CFG_NIOS_SYSID_BASE)
#include <command.h>
-#include <nios2.h>
+#include <asm/io.h>
#include <nios2-io.h>
#include <linux/time.h>
void display_sysid (void)
{
- struct nios_sysid_t *sysid =
- (struct nios_sysid_t *)CACHE_BYPASS(CFG_NIOS_SYSID_BASE);
+ struct nios_sysid_t *sysid = (struct nios_sysid_t *)CFG_NIOS_SYSID_BASE;
struct tm t;
char asc[32];
+ time_t stamp;
- localtime_r ((time_t *)&sysid->timestamp, &t);
+ stamp = readl (&sysid->timestamp);
+ localtime_r (&stamp, &t);
asctime_r (&t, asc);
- printf ("SYSID : %08x, %s", sysid->id, asc);
+ printf ("SYSID : %08x, %s", readl (&sysid->id), asc);
}
diff --git a/examples/Makefile b/examples/Makefile
index fee2674..a342d75 100644
--- a/examples/Makefile
+++ b/examples/Makefile
@@ -42,7 +42,7 @@
endif
ifeq ($(ARCH),nios2)
-LOAD_ADDR = 0x00800000 -L $(gcclibdir) -T nios2.lds
+LOAD_ADDR = 0x02000000 -L $(gcclibdir) -T nios2.lds
endif
ifeq ($(ARCH),m68k)
diff --git a/examples/stubs.c b/examples/stubs.c
index 250a9af..1caa575 100644
--- a/examples/stubs.c
+++ b/examples/stubs.c
@@ -92,7 +92,7 @@
#x ":\n" \
" movhi r8, %%hi(%0)\n" \
" ori r8, r0, %%lo(%0)\n" \
-" add r8, r0, r15\n" \
+" add r8, r8, r15\n" \
" ldw r8, 0(r8)\n" \
" ldw r8, %1(r8)\n" \
" jmp r8\n" \
diff --git a/include/asm-nios2/io.h b/include/asm-nios2/io.h
index b16a988..0fab53b 100644
--- a/include/asm-nios2/io.h
+++ b/include/asm-nios2/io.h
@@ -39,12 +39,13 @@
#define readl(addr)\
({unsigned long val;\
asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
+
#define writeb(addr,val)\
- asm volatile ("stbio %0, 0(%1)" : : "r" (addr), "r" (val))
+ asm volatile ("stbio %1, 0(%0)" : : "r" (addr), "r" (val))
#define writew(addr,val)\
- asm volatile ("sthio %0, 0(%1)" : : "r" (addr), "r" (val))
+ asm volatile ("sthio %1, 0(%0)" : : "r" (addr), "r" (val))
#define writel(addr,val)\
- asm volatile ("stwio %0, 0(%1)" : : "r" (addr), "r" (val))
+ asm volatile ("stwio %1, 0(%0)" : : "r" (addr), "r" (val))
#define inb(addr) readb(addr)
#define inw(addr) readw(addr)
diff --git a/include/configs/EP1C20.h b/include/configs/EP1C20.h
new file mode 100644
index 0000000..5507f35
--- /dev/null
+++ b/include/configs/EP1C20.h
@@ -0,0 +1,199 @@
+/*
+ * (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*------------------------------------------------------------------------
+ * BOARD/CPU
+ *----------------------------------------------------------------------*/
+#define CONFIG_EP1C20 1 /* EP1C20 board */
+#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */
+
+#define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */
+#define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/
+#define CFG_NIOS_SYSID_BASE 0x021208b8 /* System id address */
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
+
+/*------------------------------------------------------------------------
+ * CACHE -- the following will support II/s and II/f. The II/s does not
+ * have dcache, so the cache instructions will behave as NOPs.
+ *----------------------------------------------------------------------*/
+#define CFG_ICACHE_SIZE 4096 /* 4 KByte total */
+#define CFG_ICACHELINE_SIZE 32 /* 32 bytes/line */
+#define CFG_DCACHE_SIZE 2048 /* 2 KByte (II/f) */
+#define CFG_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */
+
+/*------------------------------------------------------------------------
+ * MEMORY BASE ADDRESSES
+ *----------------------------------------------------------------------*/
+#define CFG_FLASH_BASE 0x00000000 /* FLASH base addr */
+#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */
+#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */
+#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */
+#define CFG_SRAM_BASE 0x02000000 /* SRAM base addr */
+#define CFG_SRAM_SIZE 0x00100000 /* 1 MB (only 1M mapped)*/
+
+/*------------------------------------------------------------------------
+ * MEMORY ORGANIZATION
+ * -Monitor at top.
+ * -The heap is placed below the monitor.
+ * -Global data is placed below the heap.
+ * -The stack is placed below global data (&grows down).
+ *----------------------------------------------------------------------*/
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 128k */
+#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
+#define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP CFG_GBL_DATA_OFFSET
+
+/*------------------------------------------------------------------------
+ * FLASH (AM29LV065D)
+ *----------------------------------------------------------------------*/
+#define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */
+#define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */
+#define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
+#define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
+#define CFG_FLASH_WORD_SIZE unsigned char /* flash word size */
+
+/*------------------------------------------------------------------------
+ * ENVIRONMENT -- Put environment in sector CFG_MONITOR_LEN above
+ * CFG_RESET_ADDR, since we assume the monitor is stored at the
+ * reset address, no? This will keep the environment in user region
+ * of flash. NOTE: the monitor length must be multiple of sector size
+ * (which is common practice).
+ *----------------------------------------------------------------------*/
+#define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */
+#define CFG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
+#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
+#define CFG_ENV_ADDR (CFG_RESET_ADDR + CFG_MONITOR_LEN)
+
+/*------------------------------------------------------------------------
+ * CONSOLE
+ *----------------------------------------------------------------------*/
+#if defined(CONFIG_CONSOLE_JTAG)
+#define CFG_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */
+#else
+#define CFG_NIOS_CONSOLE 0x02120840 /* UART base addr */
+#endif
+
+#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
+#define CONFIG_BAUDRATE 115200 /* Initial baudrate */
+#define CFG_BAUDRATE_TABLE {115200} /* It's fixed ;-) */
+
+#define CFG_CONSOLE_INFO_QUIET 1 /* Suppress console info*/
+
+/*------------------------------------------------------------------------
+ * EPCS Device -- wne CFG_NIOS_EPCSBASE is defined code/commands for
+ * epcs device access is enabled. The base address is the epcs
+ * _register_ base address, NOT THE ADDRESS OF THE MEMORY BLOCK.
+ * The register base is currently at offset 0x600 from the memory base.
+ *----------------------------------------------------------------------*/
+#define CFG_NIOS_EPCSBASE 0x02100200 /* EPCS register base */
+
+/*------------------------------------------------------------------------
+ * DEBUG
+ *----------------------------------------------------------------------*/
+#undef CONFIG_ROM_STUBS /* Stubs not in ROM */
+
+/*------------------------------------------------------------------------
+ * TIMEBASE --
+ *
+ * The high res timer defaults to 1 msec. Since it includes the period
+ * registers, we can slow it down to 10 msec using TMRCNT. If the default
+ * period is acceptable, TMRCNT can be left undefined.
+ *----------------------------------------------------------------------*/
+#define CFG_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */
+#define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */
+#define CFG_NIOS_TMRMS 10 /* 10 msec per tick */
+#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
+#define CFG_HZ (CONFIG_SYS_CLK_FREQ/(CFG_NIOS_TMRCNT + 1))
+
+/*------------------------------------------------------------------------
+ * STATUS LED -- Provides a simple blinking led. For Nios2 each board
+ * must implement its own led routines -- leds are, after all,
+ * board-specific, no?
+ *----------------------------------------------------------------------*/
+#define CFG_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */
+#define CONFIG_STATUS_LED /* Enable status driver */
+
+#define STATUS_LED_BIT 1 /* Bit-0 on PIO */
+#define STATUS_LED_STATE 1 /* Blinking */
+#define STATUS_LED_PERIOD (500/CFG_NIOS_TMRMS) /* Every 500 msec */
+
+/*------------------------------------------------------------------------
+ * ETHERNET -- The header file for the SMC91111 driver hurts my eyes ...
+ * and really doesn't need any additional clutter. So I choose the lazy
+ * way out to avoid changes there -- define the base address to ensure
+ * cache bypass so there's no need to monkey with inx/outx macros.
+ *----------------------------------------------------------------------*/
+#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
+#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
+#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
+#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
+
+#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_IPADDR 192.168.2.21
+#define CONFIG_SERVERIP 192.168.2.16
+
+/*------------------------------------------------------------------------
+ * COMMANDS
+ *----------------------------------------------------------------------*/
+#define CONFIG_COMMANDS (CFG_CMD_BDI | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_ECHO | \
+ CFG_CMD_ENV | \
+ CFG_CMD_FLASH | \
+ CFG_CMD_IMI | \
+ CFG_CMD_IRQ | \
+ CFG_CMD_LOADS | \
+ CFG_CMD_LOADB | \
+ CFG_CMD_MEMORY | \
+ CFG_CMD_MISC | \
+ CFG_CMD_NET | \
+ CFG_CMD_PING | \
+ CFG_CMD_RUN | \
+ CFG_CMD_SAVES )
+#include <cmd_confdefs.h>
+
+/*------------------------------------------------------------------------
+ * MISC
+ *----------------------------------------------------------------------*/
+#define CFG_LONGHELP /* Provide extended help*/
+#define CFG_PROMPT "==> " /* Command prompt */
+#define CFG_CBSIZE 256 /* Console I/O buf size */
+#define CFG_MAXARGS 16 /* Max command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot arg buf size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buf size */
+#define CFG_LOAD_ADDR CFG_SDRAM_BASE /* Default load address */
+#define CFG_MEMTEST_START CFG_SDRAM_BASE /* Start addr for test */
+#define CFG_MEMTEST_END CFG_INIT_SP - 0x00020000
+
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/EP1S10.h b/include/configs/EP1S10.h
new file mode 100644
index 0000000..6eca9f2
--- /dev/null
+++ b/include/configs/EP1S10.h
@@ -0,0 +1,193 @@
+/*
+ * (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*------------------------------------------------------------------------
+ * BOARD/CPU
+ *----------------------------------------------------------------------*/
+#define CONFIG_EP1S10 1 /* EP1S10 board */
+#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */
+
+#define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */
+#define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/
+#define CFG_NIOS_SYSID_BASE 0x021208b8 /* System id address */
+
+/*------------------------------------------------------------------------
+ * CACHE -- the following will support II/s and II/f. The II/s does not
+ * have dcache, so the cache instructions will behave as NOPs.
+ *----------------------------------------------------------------------*/
+#define CFG_ICACHE_SIZE 4096 /* 4 KByte total */
+#define CFG_ICACHELINE_SIZE 32 /* 32 bytes/line */
+#define CFG_DCACHE_SIZE 2048 /* 2 KByte (II/f) */
+#define CFG_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */
+
+/*------------------------------------------------------------------------
+ * MEMORY BASE ADDRESSES
+ *----------------------------------------------------------------------*/
+#define CFG_FLASH_BASE 0x00000000 /* FLASH base addr */
+#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */
+#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */
+#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */
+#define CFG_SRAM_BASE 0x02000000 /* SRAM base addr */
+#define CFG_SRAM_SIZE 0x00100000 /* 1 MB */
+
+/*------------------------------------------------------------------------
+ * MEMORY ORGANIZATION
+ * -Monitor at top.
+ * -The heap is placed below the monitor.
+ * -Global data is placed below the heap.
+ * -The stack is placed below global data (&grows down).
+ *----------------------------------------------------------------------*/
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256k */
+#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 256*1024) /* 256k heap */
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
+#define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP CFG_GBL_DATA_OFFSET
+
+/*------------------------------------------------------------------------
+ * FLASH (AM29LV065D)
+ *----------------------------------------------------------------------*/
+#define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */
+#define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */
+#define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
+#define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
+
+/*------------------------------------------------------------------------
+ * ENVIRONMENT -- Put environment in sector CFG_MONITOR_LEN above
+ * CFG_FLASH_BASE, since we assume that u-boot is stored at the bottom
+ * of flash memory. This will keep the environment in user region
+ * of flash. NOTE: the monitor length must be multiple of sector size
+ * (which is common practice).
+ *----------------------------------------------------------------------*/
+#define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */
+#define CFG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
+#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN)
+
+/*------------------------------------------------------------------------
+ * CONSOLE
+ *----------------------------------------------------------------------*/
+#if defined(CONFIG_CONSOLE_JTAG)
+#define CFG_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */
+#else
+#define CFG_NIOS_CONSOLE 0x02120840 /* UART base addr */
+#endif
+
+#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
+#define CONFIG_BAUDRATE 115200 /* Initial baudrate */
+#define CFG_BAUDRATE_TABLE {115200} /* It's fixed ;-) */
+
+#define CFG_CONSOLE_INFO_QUIET 1 /* Suppress console info*/
+
+/*------------------------------------------------------------------------
+ * EPCS Device -- None for stratix.
+ *----------------------------------------------------------------------*/
+#undef CFG_NIOS_EPCSBASE
+
+/*------------------------------------------------------------------------
+ * DEBUG
+ *----------------------------------------------------------------------*/
+#undef CONFIG_ROM_STUBS /* Stubs not in ROM */
+
+/*------------------------------------------------------------------------
+ * TIMEBASE --
+ *
+ * The high res timer defaults to 1 msec. Since it includes the period
+ * registers, we can slow it down to 10 msec using TMRCNT. If the default
+ * period is acceptable, TMRCNT can be left undefined.
+ *----------------------------------------------------------------------*/
+#define CFG_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */
+#define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */
+#define CFG_NIOS_TMRMS 10 /* 10 msec per tick */
+#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
+#define CFG_HZ (CONFIG_SYS_CLK_FREQ/(CFG_NIOS_TMRCNT + 1))
+
+/*------------------------------------------------------------------------
+ * STATUS LED -- Provides a simple blinking led. For Nios2 each board
+ * must implement its own led routines -- since leds are board-specific.
+ *----------------------------------------------------------------------*/
+#define CFG_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */
+#define CONFIG_STATUS_LED /* Enable status driver */
+
+#define STATUS_LED_BIT 1 /* Bit-0 on PIO */
+#define STATUS_LED_STATE 1 /* Blinking */
+#define STATUS_LED_PERIOD (500/CFG_NIOS_TMRMS) /* Every 500 msec */
+
+/*------------------------------------------------------------------------
+ * ETHERNET -- The header file for the SMC91111 driver hurts my eyes ...
+ * and really doesn't need any additional clutter. So I choose the lazy
+ * way out to avoid changes there -- define the base address to ensure
+ * cache bypass so there's no need to monkey with inx/outx macros.
+ *----------------------------------------------------------------------*/
+#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
+#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
+#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
+#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
+
+#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_IPADDR 192.168.2.21
+#define CONFIG_SERVERIP 192.168.2.16
+
+/*------------------------------------------------------------------------
+ * COMMANDS
+ *----------------------------------------------------------------------*/
+#define CONFIG_COMMANDS (CFG_CMD_BDI | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_ECHO | \
+ CFG_CMD_ENV | \
+ CFG_CMD_FLASH | \
+ CFG_CMD_IMI | \
+ CFG_CMD_IRQ | \
+ CFG_CMD_LOADS | \
+ CFG_CMD_LOADB | \
+ CFG_CMD_MEMORY | \
+ CFG_CMD_MISC | \
+ CFG_CMD_NET | \
+ CFG_CMD_PING | \
+ CFG_CMD_RUN | \
+ CFG_CMD_SAVES )
+#include <cmd_confdefs.h>
+
+/*------------------------------------------------------------------------
+ * MISC
+ *----------------------------------------------------------------------*/
+#define CFG_LONGHELP /* Provide extended help*/
+#define CFG_PROMPT "==> " /* Command prompt */
+#define CFG_CBSIZE 256 /* Console I/O buf size */
+#define CFG_MAXARGS 16 /* Max command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot arg buf size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buf size */
+#define CFG_LOAD_ADDR CFG_SDRAM_BASE /* Default load address */
+#define CFG_MEMTEST_START CFG_SDRAM_BASE /* Start addr for test */
+#define CFG_MEMTEST_END CFG_INIT_SP - 0x00020000
+
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/EP1S40.h b/include/configs/EP1S40.h
new file mode 100644
index 0000000..976e79a
--- /dev/null
+++ b/include/configs/EP1S40.h
@@ -0,0 +1,193 @@
+/*
+ * (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*------------------------------------------------------------------------
+ * BOARD/CPU
+ *----------------------------------------------------------------------*/
+#define CONFIG_EP1S40 1 /* EP1S40 board */
+#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */
+
+#define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */
+#define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/
+#define CFG_NIOS_SYSID_BASE 0x021208b8 /* System id address */
+
+/*------------------------------------------------------------------------
+ * CACHE -- the following will support II/s and II/f. The II/s does not
+ * have dcache, so the cache instructions will behave as NOPs.
+ *----------------------------------------------------------------------*/
+#define CFG_ICACHE_SIZE 4096 /* 4 KByte total */
+#define CFG_ICACHELINE_SIZE 32 /* 32 bytes/line */
+#define CFG_DCACHE_SIZE 2048 /* 2 KByte (II/f) */
+#define CFG_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */
+
+/*------------------------------------------------------------------------
+ * MEMORY BASE ADDRESSES
+ *----------------------------------------------------------------------*/
+#define CFG_FLASH_BASE 0x00000000 /* FLASH base addr */
+#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */
+#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */
+#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */
+#define CFG_SRAM_BASE 0x02000000 /* SRAM base addr */
+#define CFG_SRAM_SIZE 0x00100000 /* 1 MB */
+
+/*------------------------------------------------------------------------
+ * MEMORY ORGANIZATION
+ * -Monitor at top.
+ * -The heap is placed below the monitor.
+ * -Global data is placed below the heap.
+ * -The stack is placed below global data (&grows down).
+ *----------------------------------------------------------------------*/
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256k */
+#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 256*1024) /* 256k heap */
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
+#define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP CFG_GBL_DATA_OFFSET
+
+/*------------------------------------------------------------------------
+ * FLASH (AM29LV065D)
+ *----------------------------------------------------------------------*/
+#define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */
+#define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */
+#define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
+#define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
+
+/*------------------------------------------------------------------------
+ * ENVIRONMENT -- Put environment in sector CFG_MONITOR_LEN above
+ * CFG_FLASH_BASE, since we assume that u-boot is stored at the bottom
+ * of flash memory. This will keep the environment in user region
+ * of flash. NOTE: the monitor length must be multiple of sector size
+ * (which is common practice).
+ *----------------------------------------------------------------------*/
+#define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */
+#define CFG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
+#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN)
+
+/*------------------------------------------------------------------------
+ * CONSOLE
+ *----------------------------------------------------------------------*/
+#if defined(CONFIG_CONSOLE_JTAG)
+#define CFG_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */
+#else
+#define CFG_NIOS_CONSOLE 0x02120840 /* UART base addr */
+#endif
+
+#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
+#define CONFIG_BAUDRATE 115200 /* Initial baudrate */
+#define CFG_BAUDRATE_TABLE {115200} /* It's fixed ;-) */
+
+#define CFG_CONSOLE_INFO_QUIET 1 /* Suppress console info*/
+
+/*------------------------------------------------------------------------
+ * EPCS Device -- None for stratix.
+ *----------------------------------------------------------------------*/
+#undef CFG_NIOS_EPCSBASE
+
+/*------------------------------------------------------------------------
+ * DEBUG
+ *----------------------------------------------------------------------*/
+#undef CONFIG_ROM_STUBS /* Stubs not in ROM */
+
+/*------------------------------------------------------------------------
+ * TIMEBASE --
+ *
+ * The high res timer defaults to 1 msec. Since it includes the period
+ * registers, we can slow it down to 10 msec using TMRCNT. If the default
+ * period is acceptable, TMRCNT can be left undefined.
+ *----------------------------------------------------------------------*/
+#define CFG_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */
+#define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */
+#define CFG_NIOS_TMRMS 10 /* 10 msec per tick */
+#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
+#define CFG_HZ (CONFIG_SYS_CLK_FREQ/(CFG_NIOS_TMRCNT + 1))
+
+/*------------------------------------------------------------------------
+ * STATUS LED -- Provides a simple blinking led. For Nios2 each board
+ * must implement its own led routines -- since leds are board-specific.
+ *----------------------------------------------------------------------*/
+#define CFG_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */
+#define CONFIG_STATUS_LED /* Enable status driver */
+
+#define STATUS_LED_BIT 1 /* Bit-0 on PIO */
+#define STATUS_LED_STATE 1 /* Blinking */
+#define STATUS_LED_PERIOD (500/CFG_NIOS_TMRMS) /* Every 500 msec */
+
+/*------------------------------------------------------------------------
+ * ETHERNET -- The header file for the SMC91111 driver hurts my eyes ...
+ * and really doesn't need any additional clutter. So I choose the lazy
+ * way out to avoid changes there -- define the base address to ensure
+ * cache bypass so there's no need to monkey with inx/outx macros.
+ *----------------------------------------------------------------------*/
+#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
+#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
+#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
+#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
+
+#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_IPADDR 192.168.2.21
+#define CONFIG_SERVERIP 192.168.2.16
+
+/*------------------------------------------------------------------------
+ * COMMANDS
+ *----------------------------------------------------------------------*/
+#define CONFIG_COMMANDS (CFG_CMD_BDI | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_ECHO | \
+ CFG_CMD_ENV | \
+ CFG_CMD_FLASH | \
+ CFG_CMD_IMI | \
+ CFG_CMD_IRQ | \
+ CFG_CMD_LOADS | \
+ CFG_CMD_LOADB | \
+ CFG_CMD_MEMORY | \
+ CFG_CMD_MISC | \
+ CFG_CMD_NET | \
+ CFG_CMD_PING | \
+ CFG_CMD_RUN | \
+ CFG_CMD_SAVES )
+#include <cmd_confdefs.h>
+
+/*------------------------------------------------------------------------
+ * MISC
+ *----------------------------------------------------------------------*/
+#define CFG_LONGHELP /* Provide extended help*/
+#define CFG_PROMPT "==> " /* Command prompt */
+#define CFG_CBSIZE 256 /* Console I/O buf size */
+#define CFG_MAXARGS 16 /* Max command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot arg buf size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buf size */
+#define CFG_LOAD_ADDR CFG_SDRAM_BASE /* Default load address */
+#define CFG_MEMTEST_START CFG_SDRAM_BASE /* Start addr for test */
+#define CFG_MEMTEST_END CFG_INIT_SP - 0x00020000
+
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/PK1C20.h b/include/configs/PK1C20.h
index 91e9518..83a7ec2 100644
--- a/include/configs/PK1C20.h
+++ b/include/configs/PK1C20.h
@@ -32,7 +32,7 @@
#define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */
#define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/
-#define CFG_NIOS_SYSID_BASE 0x00920828 /* System id address */
+#define CFG_NIOS_SYSID_BASE 0x021208b8 /* System id address */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
/*------------------------------------------------------------------------
@@ -51,7 +51,7 @@
#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */
#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */
#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */
-#define CFG_SRAM_BASE 0x00800000 /* SRAM base addr */
+#define CFG_SRAM_BASE 0x02000000 /* SRAM base addr */
#define CFG_SRAM_SIZE 0x00100000 /* 1 MB (only 1M mapped)*/
/*------------------------------------------------------------------------
@@ -61,7 +61,7 @@
* -Global data is placed below the heap.
* -The stack is placed below global data (&grows down).
*----------------------------------------------------------------------*/
-#define CFG_MONITOR_LEN (128 * 1024) /* Reserve 128k */
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 128k */
#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/
#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
@@ -95,9 +95,9 @@
* CONSOLE
*----------------------------------------------------------------------*/
#if defined(CONFIG_CONSOLE_JTAG)
-#define CFG_NIOS_CONSOLE 0x00920820 /* JTAG UART base addr */
+#define CFG_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */
#else
-#define CFG_NIOS_CONSOLE 0x009208a0 /* UART base addr */
+#define CFG_NIOS_CONSOLE 0x02120840 /* UART base addr */
#endif
#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
@@ -110,9 +110,9 @@
* EPCS Device -- wne CFG_NIOS_EPCSBASE is defined code/commands for
* epcs device access is enabled. The base address is the epcs
* _register_ base address, NOT THE ADDRESS OF THE MEMORY BLOCK.
- * The register base is currently at offset 0x400 from the memory base.
+ * The register base is currently at offset 0x600 from the memory base.
*----------------------------------------------------------------------*/
-#define CFG_NIOS_EPCSBASE 0x00900400 /* EPCS register base */
+#define CFG_NIOS_EPCSBASE 0x02100200 /* EPCS register base */
/*------------------------------------------------------------------------
* DEBUG
@@ -126,7 +126,7 @@
* registers, we can slow it down to 10 msec using TMRCNT. If the default
* period is acceptable, TMRCNT can be left undefined.
*----------------------------------------------------------------------*/
-#define CFG_NIOS_TMRBASE 0x00920860 /* Tick timer base addr */
+#define CFG_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */
#define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */
#define CFG_NIOS_TMRMS 10 /* 10 msec per tick */
#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
@@ -137,7 +137,7 @@
* must implement its own led routines -- leds are, after all,
* board-specific, no?
*----------------------------------------------------------------------*/
-#define CFG_LEDPIO_ADDR 0x00920840 /* LED PIO base addr */
+#define CFG_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */
#define CONFIG_STATUS_LED /* Enable status driver */
#define STATUS_LED_BIT 1 /* Bit-0 on PIO */
@@ -150,7 +150,7 @@
* way out to avoid changes there -- define the base address to ensure
* cache bypass so there's no need to monkey with inx/outx macros.
*----------------------------------------------------------------------*/
-#define CONFIG_SMC91111_BASE 0x80910300 /* Base addr (bypass) */
+#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
diff --git a/include/nios2-epcs.h b/include/nios2-epcs.h
index 2c9522c..20e0c87 100644
--- a/include/nios2-epcs.h
+++ b/include/nios2-epcs.h
@@ -38,6 +38,11 @@
unsigned char prot_mask; /* Protection mask */
}epcs_devinfo_t;
+/* Resets the epcs controller -- to prevent (potential) soft-reset
+ * problems when booting from the epcs controller
+ */
+extern int epcs_reset (void);
+
/* Returns the devinfo struct if EPCS device is found;
* NULL otherwise.
*/
diff --git a/lib_nios2/board.c b/lib_nios2/board.c
index cd23037..7ffb3f0 100644
--- a/lib_nios2/board.c
+++ b/lib_nios2/board.c
@@ -31,6 +31,9 @@
#ifdef CONFIG_STATUS_LED
#include <status_led.h>
#endif
+#if defined(CFG_NIOS_EPCSBASE)
+#include <nios2-epcs.h>
+#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -93,6 +96,9 @@
#if defined(CONFIG_BOARD_EARLY_INIT_F)
board_early_init_f, /* Call board-specific init code early.*/
#endif
+#if defined(CFG_NIOS_EPCSBASE)
+ epcs_reset,
+#endif
env_init,
serial_init,
@@ -165,6 +171,10 @@
WATCHDOG_RESET ();
interrupt_init ();
+#if defined(CONFIG_BOARD_LATE_INIT)
+ board_late_init ();
+#endif
+
/* main_loop */
for (;;) {
WATCHDOG_RESET ();
diff --git a/nios2_config.mk b/nios2_config.mk
index 03253a3..3f23b56 100644
--- a/nios2_config.mk
+++ b/nios2_config.mk
@@ -23,4 +23,4 @@
#
PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__
-PLATFORM_CPPFLAGS += -ffixed-r15
+PLATFORM_CPPFLAGS += -ffixed-r15 -G0