tree 56a3ddc43a5390e38e24b528c7a3db1f93659980
parent fdbfbca1d030a4634d5351c03335fc143758eb62
author Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> 1669373053 +0530
committer Michal Simek <michal.simek@amd.com> 1670226954 +0100

spi: zynqmp_qspi: Add support for 64-bit read/write

When we pass the 64-bit address to read/write, only lower 32-bit
address is getting updated. Program the upper 32-bit address in the
DMA destination memory address MSBs register, which can handle upto
44-bit destination address.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20221125104413.26140-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>