Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra into next
Device tree improvents for Paz00 and DM PMIC convertion of recently
merged Tegra boards.
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index d6f3fa4..b9d6aa9 100644
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -287,9 +287,6 @@
sandbox64_clang:
TEST_PY_BD: "sandbox64"
OVERRIDE: "-O clang-16"
- sandbox_nolto:
- TEST_PY_BD: "sandbox"
- BUILD_ENV: "NO_LTO=1"
sandbox_spl:
TEST_PY_BD: "sandbox_spl"
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index fee1651..fbf99f0 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -258,12 +258,6 @@
OVERRIDE: "-O clang-16"
<<: *buildman_and_testpy_dfn
-sandbox without LTO test.py:
- variables:
- TEST_PY_BD: "sandbox"
- BUILD_ENV: "NO_LTO=1"
- <<: *buildman_and_testpy_dfn
-
sandbox64 test.py:
variables:
TEST_PY_BD: "sandbox64"
@@ -275,12 +269,6 @@
OVERRIDE: "-O clang-16"
<<: *buildman_and_testpy_dfn
-sandbox64 without LTO test.py:
- variables:
- TEST_PY_BD: "sandbox64"
- BUILD_ENV: "NO_LTO=1"
- <<: *buildman_and_testpy_dfn
-
sandbox_spl test.py:
variables:
TEST_PY_BD: "sandbox_spl"
diff --git a/Makefile b/Makefile
index a581110..1b347f4 100644
--- a/Makefile
+++ b/Makefile
@@ -750,6 +750,7 @@
ifeq ($(CONFIG_STACKPROTECTOR),y)
KBUILD_CFLAGS += $(call cc-option,-fstack-protector-strong)
+KBUILD_CFLAGS += $(call cc-option,-mstack-protector-guard=global)
CFLAGS_EFI += $(call cc-option,-fno-stack-protector)
else
KBUILD_CFLAGS += $(call cc-option,-fno-stack-protector)
@@ -851,7 +852,7 @@
libs-$(CONFIG_API) += api/
libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
libs-y += boot/
-libs-y += cmd/
+libs-$(CONFIG_CMDLINE) += cmd/
libs-y += common/
libs-$(CONFIG_OF_EMBED) += dts/
libs-y += env/
@@ -1153,7 +1154,6 @@
@# is enable to tell 'deprecated' that one of these symbols exists
$(call deprecated,CONFIG_TIMER,Timer drivers,v2023.01,$(if $(strip $(CFG_SYS_TIMER_RATE)$(CFG_SYS_TIMER_COUNTER)),x))
$(call deprecated,CONFIG_DM_SERIAL,Serial drivers,v2023.04,$(CONFIG_SERIAL))
- $(call deprecated,CONFIG_DM_SCSI,SCSI drivers,v2023.04,$(CONFIG_SCSI))
@# Check that this build does not override OF_HAS_PRIOR_STAGE by
@# disabling OF_BOARD.
$(call cmd,ofcheck,$(KCONFIG_CONFIG))
diff --git a/README b/README
index 60c6b8a..00d4227 100644
--- a/README
+++ b/README
@@ -1191,11 +1191,10 @@
Support for a lightweight UBI (fastmap) scanner and
loader
- CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
- CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
- CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
- CFG_SYS_NAND_ECCPOS, CFG_SYS_NAND_ECCSIZE,
- CFG_SYS_NAND_ECCBYTES
+ CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_SIZE,
+ CONFIG_SYS_NAND_OOBSIZE, CONFIG_SYS_NAND_BLOCK_SIZE,
+ CONFIG_SYS_NAND_BAD_BLOCK_POS, CFG_SYS_NAND_ECCPOS,
+ CFG_SYS_NAND_ECCSIZE, CFG_SYS_NAND_ECCBYTES
Defines the size and behavior of the NAND that SPL uses
to read U-Boot
diff --git a/api/api_storage.c b/api/api_storage.c
index 997e872..78becbe 100644
--- a/api/api_storage.c
+++ b/api/api_storage.c
@@ -67,13 +67,6 @@
specs[ENUM_SATA].type = DEV_TYP_STOR | DT_STOR_SATA;
specs[ENUM_SATA].name = "sata";
#endif
-#if defined(CONFIG_SCSI)
- specs[ENUM_SCSI].max_dev = SCSI_MAX_DEVICE;
- specs[ENUM_SCSI].enum_started = 0;
- specs[ENUM_SCSI].enum_ended = 0;
- specs[ENUM_SCSI].type = DEV_TYP_STOR | DT_STOR_SCSI;
- specs[ENUM_SCSI].name = "scsi";
-#endif
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
specs[ENUM_USB].max_dev = USB_MAX_STOR_DEV;
specs[ENUM_USB].enum_started = 0;
diff --git a/arch/Kconfig b/arch/Kconfig
index 4f5b751..2e0528d 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -134,7 +134,7 @@
select ARCH_SUPPORTS_LTO
select BOARD_LATE_INIT
select BZIP2
- select CMD_POWEROFF
+ select CMD_POWEROFF if CMDLINE
select DM
select DM_EVENT
select DM_FUZZING_ENGINE
@@ -152,10 +152,10 @@
select PCI_ENDPOINT
select SPI
select SUPPORT_OF_CONTROL
- select SYSRESET_CMD_POWEROFF
+ select SYSRESET_CMD_POWEROFF if CMD_POWEROFF
select SYS_CACHE_SHIFT_4
select IRQ
- select SUPPORT_EXTENSION_SCAN
+ select SUPPORT_EXTENSION_SCAN if CMDLINE
select SUPPORT_ACPI
imply BITREVERSE
select BLOBLIST
@@ -210,6 +210,9 @@
imply BINMAN
imply CMD_MBR
imply CMD_MMC
+ imply BOOTSTD_DEFAULTS if BOOTSTD_FULL && CMDLINE
+ imply BOOTMETH_DISTRO if BOOTSTD_FULL && CMDLINE
+ imply CMD_SYSBOOT if BOOTSTD_FULL
config SH
bool "SuperH architecture"
@@ -248,7 +251,7 @@
imply DM_KEYBOARD
imply DM_MMC
imply DM_RTC
- imply DM_SCSI
+ imply SCSI
imply DM_SERIAL
imply DM_SPI
imply DM_SPI_FLASH
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d812685..1fd7aac 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -568,6 +568,7 @@
select GPIO_EXTRA_HEADER
select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
select SPL_SEPARATE_BSS if SPL
+ imply SYS_THUMB_BUILD
config ARCH_DAVINCI
bool "TI DaVinci"
@@ -1133,7 +1134,6 @@
select DM_SPI_FLASH if SPI
select DM_KEYBOARD
select DM_MMC if MMC
- select DM_SCSI if SCSI
select DM_SERIAL
select OF_BOARD_SETUP
select OF_CONTROL
@@ -1838,7 +1838,7 @@
select PCI
select DM_RNG
select DM_RTC
- select DM_SCSI
+ select SCSI
select DM_SERIAL
select DM_SPI
select GPIO_EXTRA_HEADER
@@ -1945,7 +1945,7 @@
select REGMAP
select SYSCON
select SYSRESET
- select SYS_THUMB_BUILD
+ select SYS_THUMB_BUILD if !ARM64
imply SPL_SYSRESET
imply CMD_DM
imply CMD_POWEROFF
@@ -2053,7 +2053,6 @@
select PCI
select DM_PCI
select SCSI
- select DM_SCSI
select DM_SERIAL
imply CMD_PCI
help
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1be08c5..ea420db 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1381,6 +1381,9 @@
stm32mp15xx-dhcor-drc-compact.dtb \
stm32mp15xx-dhcor-testbench.dtb
+dtb-$(CONFIG_STM32MP25X) += \
+ stm32mp257f-ev1.dtb
+
dtb-$(CONFIG_SOC_K3_AM654) += \
k3-am654-base-board.dtb \
k3-am654-r5-base-board.dtb \
@@ -1397,7 +1400,10 @@
k3-j7200-common-proc-board.dtb \
k3-j7200-r5-common-proc-board.dtb \
k3-j721e-sk.dtb \
- k3-j721e-r5-sk.dtb
+ k3-j721e-r5-sk.dtb \
+ k3-j721e-beagleboneai64.dtb \
+ k3-j721e-r5-beagleboneai64.dtb
+
dtb-$(CONFIG_SOC_K3_J721S2) += k3-am68-sk-base-board.dtb\
k3-am68-sk-r5-base-board.dtb\
k3-j721s2-common-proc-board.dtb\
diff --git a/arch/arm/dts/k3-am62-main.dtsi b/arch/arm/dts/k3-am62-main.dtsi
index 284b90c..e5c64c8 100644
--- a/arch/arm/dts/k3-am62-main.dtsi
+++ b/arch/arm/dts/k3-am62-main.dtsi
@@ -81,7 +81,8 @@
};
dmss: bus@48000000 {
- compatible = "simple-mfd";
+ bootph-all;
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
dma-ranges;
@@ -90,6 +91,7 @@
ti,sci-dev-id = <25>;
secure_proxy_main: mailbox@4d000000 {
+ bootph-all;
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg-names = "target_data", "rt", "scfg";
@@ -165,6 +167,7 @@
};
dmsc: system-controller@44043000 {
+ bootph-all;
compatible = "ti,k2g-sci";
ti,host-id = <12>;
mbox-names = "rx", "tx";
@@ -174,16 +177,19 @@
reg = <0x00 0x44043000 0x00 0xfe0>;
k3_pds: power-controller {
+ bootph-all;
compatible = "ti,sci-pm-domain";
#power-domain-cells = <2>;
};
k3_clks: clock-controller {
+ bootph-all;
compatible = "ti,k2g-sci-clk";
#clock-cells = <2>;
};
k3_reset: reset-controller {
+ bootph-all;
compatible = "ti,sci-reset";
#reset-cells = <2>;
};
@@ -202,6 +208,7 @@
};
secure_proxy_sa3: mailbox@43600000 {
+ bootph-pre-ram;
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg-names = "target_data", "rt", "scfg";
@@ -217,6 +224,7 @@
};
main_pmx0: pinctrl@f4000 {
+ bootph-all;
compatible = "pinctrl-single";
reg = <0x00 0xf4000 0x00 0x2ac>;
#pinctrl-cells = <1>;
@@ -225,12 +233,14 @@
};
main_esm: esm@420000 {
+ bootph-pre-ram;
compatible = "ti,j721e-esm";
reg = <0x00 0x420000 0x00 0x1000>;
ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
};
main_timer0: timer@2400000 {
+ bootph-all;
compatible = "ti,am654-timer";
reg = <0x00 0x2400000 0x00 0x400>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/dts/k3-am62-mcu.dtsi b/arch/arm/dts/k3-am62-mcu.dtsi
index 80a3e1d..0e0b234 100644
--- a/arch/arm/dts/k3-am62-mcu.dtsi
+++ b/arch/arm/dts/k3-am62-mcu.dtsi
@@ -7,6 +7,7 @@
&cbass_mcu {
mcu_pmx0: pinctrl@4084000 {
+ bootph-all;
compatible = "pinctrl-single";
reg = <0x00 0x04084000 0x00 0x88>;
#pinctrl-cells = <1>;
@@ -15,6 +16,7 @@
};
mcu_esm: esm@4100000 {
+ bootph-pre-ram;
compatible = "ti,j721e-esm";
reg = <0x00 0x4100000 0x00 0x1000>;
ti,esm-pins = <0>, <1>, <2>, <85>;
diff --git a/arch/arm/dts/k3-am62-verdin-wifi.dtsi b/arch/arm/dts/k3-am62-verdin-wifi.dtsi
index 90ddc71..a6808b1 100644
--- a/arch/arm/dts/k3-am62-verdin-wifi.dtsi
+++ b/arch/arm/dts/k3-am62-verdin-wifi.dtsi
@@ -35,5 +35,11 @@
&main_uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
+ uart-has-rtscts;
status = "okay";
+
+ bluetooth {
+ compatible = "nxp,88w8987-bt";
+ fw-init-baudrate = <3000000>;
+ };
};
diff --git a/arch/arm/dts/k3-am62-verdin.dtsi b/arch/arm/dts/k3-am62-verdin.dtsi
index 40992e7..5db52f2 100644
--- a/arch/arm/dts/k3-am62-verdin.dtsi
+++ b/arch/arm/dts/k3-am62-verdin.dtsi
@@ -1061,6 +1061,7 @@
vddc-supply = <®_1v2_dsi>;
vddmipi-supply = <®_1v2_dsi>;
vddio-supply = <®_1v8_dsi>;
+ status = "disabled";
dsi_bridge_ports: ports {
#address-cells = <1>;
diff --git a/arch/arm/dts/k3-am62-wakeup.dtsi b/arch/arm/dts/k3-am62-wakeup.dtsi
index eae0528..fef76f5 100644
--- a/arch/arm/dts/k3-am62-wakeup.dtsi
+++ b/arch/arm/dts/k3-am62-wakeup.dtsi
@@ -7,6 +7,7 @@
&cbass_wakeup {
wkup_conf: syscon@43000000 {
+ bootph-all;
compatible = "syscon", "simple-mfd";
reg = <0x00 0x43000000 0x00 0x20000>;
#address-cells = <1>;
@@ -14,6 +15,7 @@
ranges = <0x0 0x00 0x43000000 0x20000>;
chipid: chipid@14 {
+ bootph-all;
compatible = "ti,am654-chipid";
reg = <0x14 0x4>;
};
diff --git a/arch/arm/dts/k3-am62.dtsi b/arch/arm/dts/k3-am62.dtsi
index 11f14ee..f1e1520 100644
--- a/arch/arm/dts/k3-am62.dtsi
+++ b/arch/arm/dts/k3-am62.dtsi
@@ -47,6 +47,7 @@
};
cbass_main: bus@f0000 {
+ bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@@ -86,6 +87,7 @@
<0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>;
cbass_mcu: bus@4000000 {
+ bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@@ -93,6 +95,7 @@
};
cbass_wakeup: bus@b00000 {
+ bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
diff --git a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
index d6c6baa..a723caa 100644
--- a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
@@ -6,151 +6,49 @@
* Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation
*/
-#include "k3-am625-sk-binman.dtsi"
+#include "k3-binman.dtsi"
/ {
chosen {
tick-timer = &main_timer0;
};
- memory@80000000 {
- bootph-all;
- };
-
/* Keep the LEDs on by default to indicate life */
leds {
- bootph-all;
led-0 {
default-state = "on";
- bootph-all;
};
led-1 {
default-state = "on";
- bootph-all;
};
led-2 {
default-state = "on";
- bootph-all;
};
led-3 {
default-state = "on";
- bootph-all;
};
led-4 {
default-state = "on";
- bootph-all;
};
};
};
-&cbass_main {
- bootph-all;
-};
-
&main_timer0 {
clock-frequency = <25000000>;
- bootph-all;
-};
-
-&dmss {
- bootph-all;
-};
-
-&secure_proxy_main {
- bootph-all;
-};
-
-&dmsc {
- bootph-all;
-};
-
-&k3_pds {
- bootph-all;
-};
-
-&k3_clks {
- bootph-all;
-};
-
-&k3_reset {
- bootph-all;
};
&dmsc {
- bootph-all;
k3_sysreset: sysreset-controller {
compatible = "ti,sci-sysreset";
bootph-all;
};
};
-&wkup_conf {
- bootph-all;
-};
-
-&chipid {
- bootph-all;
-};
-
-&main_pmx0 {
- bootph-all;
-};
-
-&main_uart0 {
- bootph-all;
-};
-
-&console_pins_default {
- bootph-all;
-};
-
-&cbass_mcu {
- bootph-all;
-};
-
-&cbass_wakeup {
- bootph-all;
-};
-
-&mcu_pmx0 {
- bootph-all;
-};
-
-&main_i2c0 {
- bootph-all;
-};
-
-&local_i2c_pins_default {
- bootph-all;
-};
-
-&gpio0_pins_default {
- bootph-all;
-};
-
-&main_gpio0 {
- bootph-all;
-};
-
-&main_gpio1 {
- bootph-all;
-};
-
-&sdhci0 {
- /* EMMC */
- bootph-all;
-};
-
-&emmc_pins_default {
- bootph-all;
-};
-
&sd_pins_default {
- bootph-all;
/* Force to use SDCD card detect pin */
pinctrl-single,pins = <
AM62X_IOPAD(0x023c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
@@ -163,33 +61,155 @@
>;
};
-&tps65219 {
- bootph-all;
-};
-
-&sdhci1 {
- bootph-all;
-};
-
-#ifdef CONFIG_TARGET_AM625_A53_EVM
+#ifdef CONFIG_TARGET_AM625_A53_BEAGLEPLAY
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_AM625_BEAGLEPLAY_DTB "spl/dts/k3-am625-beagleplay.dtb"
+#define UBOOT_NODTB "u-boot-nodtb.bin"
#define AM625_BEAGLEPLAY_DTB "arch/arm/dts/k3-am625-beagleplay.dtb"
-&spl_am625_sk_dtb {
- filename = SPL_AM625_BEAGLEPLAY_DTB;
-};
+&binman {
+ ti-dm {
+ filename = "ti-dm.bin";
+ blob-ext {
+ filename = "ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f";
+ };
+ };
-&am625_sk_dtb {
- filename = AM625_BEAGLEPLAY_DTB;
-};
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
-&spl_am625_sk_dtb_unsigned {
- filename = SPL_AM625_BEAGLEPLAY_DTB;
-};
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
-&am625_sk_dtb_unsigned {
- filename = AM625_BEAGLEPLAY_DTB;
-};
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OP-TEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-raw.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob {
+ filename = "spl/u-boot-spl-nodtb.bin";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am625-beagleplay";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ spl_am625_bp_dtb_unsigned: blob {
+ filename = SPL_AM625_BEAGLEPLAY_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am625-beagleplay";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM625 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am625-beagleplay";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ am625_bp_dtb_unsigned: blob {
+ filename = AM625_BEAGLEPLAY_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am625-beagleplay";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
#endif
diff --git a/arch/arm/dts/k3-am625-beagleplay.dts b/arch/arm/dts/k3-am625-beagleplay.dts
index 7cfdf56..9a6bd0a 100644
--- a/arch/arm/dts/k3-am625-beagleplay.dts
+++ b/arch/arm/dts/k3-am625-beagleplay.dts
@@ -46,6 +46,7 @@
};
memory@80000000 {
+ bootph-pre-ram;
device_type = "memory";
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
@@ -58,7 +59,7 @@
ramoops: ramoops@9ca00000 {
compatible = "ramoops";
- reg = <0x00 0x9c700000 0x00 0x00100000>;
+ reg = <0x00 0x9ca00000 0x00 0x00100000>;
record-size = <0x8000>;
console-size = <0x8000>;
ftrace-size = <0x00>;
@@ -83,6 +84,7 @@
};
vsys_5v0: regulator-1 {
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vsys_5v0";
regulator-min-microvolt = <5000000>;
@@ -93,6 +95,7 @@
vdd_3v3: regulator-2 {
/* output of TLV62595DMQR-U12 */
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vdd_3v3";
regulator-min-microvolt = <3300000>;
@@ -118,6 +121,7 @@
vdd_3v3_sd: regulator-4 {
/* output of TPS22918DBVR-U21 */
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&vdd_3v3_sd_pins_default>;
@@ -132,6 +136,7 @@
};
vdd_sd_dv: regulator-5 {
+ bootph-all;
compatible = "regulator-gpio";
regulator-name = "sd_hs200_switch";
pinctrl-names = "default";
@@ -146,9 +151,11 @@
};
leds {
+ bootph-all;
compatible = "gpio-leds";
led-0 {
+ bootph-all;
gpios = <&main_gpio0 3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
function = LED_FUNCTION_HEARTBEAT;
@@ -156,6 +163,7 @@
};
led-1 {
+ bootph-all;
gpios = <&main_gpio0 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "disk-activity";
function = LED_FUNCTION_DISK_ACTIVITY;
@@ -163,16 +171,19 @@
};
led-2 {
+ bootph-all;
gpios = <&main_gpio0 5 GPIO_ACTIVE_HIGH>;
function = LED_FUNCTION_CPU;
};
led-3 {
+ bootph-all;
gpios = <&main_gpio0 6 GPIO_ACTIVE_HIGH>;
function = LED_FUNCTION_LAN;
};
led-4 {
+ bootph-all;
gpios = <&main_gpio0 9 GPIO_ACTIVE_HIGH>;
function = LED_FUNCTION_WLAN;
};
@@ -245,6 +256,7 @@
&main_pmx0 {
gpio0_pins_default: gpio0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x0004, PIN_INPUT, 7) /* (G25) OSPI0_LBCLKO.GPIO0_1 */
AM62X_IOPAD(0x0008, PIN_INPUT, 7) /* (J24) OSPI0_DQS.GPIO0_2 */
@@ -264,6 +276,7 @@
};
vdd_sd_dv_pins_default: vdd-sd-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x0244, PIN_OUTPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */
>;
@@ -283,6 +296,7 @@
};
local_i2c_pins_default: local-i2c-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
AM62X_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
@@ -321,6 +335,7 @@
};
emmc_pins_default: emmc-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x0220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
AM62X_IOPAD(0x0218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
@@ -336,12 +351,14 @@
};
vdd_3v3_sd_pins_default: vdd-3v3-sd-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x01c4, PIN_INPUT, 7) /* (B14) SPI0_D1_GPIO1_19 */
>;
};
sd_pins_default: sd-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x023c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
AM62X_IOPAD(0x0234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
@@ -418,6 +435,7 @@
};
mikrobus_gpio_pins_default: mikrobus-gpio-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x019c, PIN_INPUT, 7) /* (B18) MCASP0_AXR1.GPIO1_9 */
AM62X_IOPAD(0x01a0, PIN_INPUT, 7) /* (E18) MCASP0_AXR0.GPIO1_10 */
@@ -426,6 +444,7 @@
};
console_pins_default: console-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x01c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
AM62X_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
@@ -597,6 +616,7 @@
};
&main_gpio0 {
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&gpio0_pins_default>;
gpio-line-names = "BL_EN_3V3", "SPE_PO_EN", "RTC_INT", /* 0-2 */
@@ -616,6 +636,7 @@
};
&main_gpio1 {
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&mikrobus_gpio_pins_default>;
gpio-line-names = "", "", "", "", "", /* 0-4 */
@@ -633,6 +654,7 @@
};
&main_i2c0 {
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&local_i2c_pins_default>;
clock-frequency = <400000>;
@@ -651,6 +673,7 @@
};
tps65219: pmic@30 {
+ bootph-all;
compatible = "ti,tps65219";
reg = <0x30>;
buck1-supply = <&vsys_5v0>;
@@ -801,6 +824,7 @@
};
&sdhci0 {
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&emmc_pins_default>;
ti,driver-strength-ohm = <50>;
@@ -810,6 +834,7 @@
&sdhci1 {
/* SD/MMC */
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&sd_pins_default>;
@@ -850,6 +875,7 @@
};
&main_uart0 {
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&console_pins_default>;
status = "okay";
@@ -870,6 +896,12 @@
pinctrl-names = "default";
pinctrl-0 = <&wifi_debug_uart_pins_default>;
status = "okay";
+
+ mcu {
+ compatible = "ti,cc1352p7";
+ reset-gpios = <&main_gpio0 72 GPIO_ACTIVE_LOW>;
+ vdds-supply = <&vdd_3v3>;
+ };
};
&dss {
diff --git a/arch/arm/dts/k3-am625-r5-beagleplay.dts b/arch/arm/dts/k3-am625-r5-beagleplay.dts
index 9c9d057..9db58f0 100644
--- a/arch/arm/dts/k3-am625-r5-beagleplay.dts
+++ b/arch/arm/dts/k3-am625-r5-beagleplay.dts
@@ -54,12 +54,7 @@
ti,secure-host;
};
-&mcu_esm {
- bootph-pre-ram;
-};
-
&secure_proxy_sa3 {
- bootph-pre-ram;
/* We require this for boot handshake */
status = "okay";
};
@@ -73,10 +68,6 @@
};
};
-&main_esm {
- bootph-pre-ram;
-};
-
&main_pktdma {
ti,sci = <&dm_tifs>;
};
@@ -84,3 +75,42 @@
&main_bcdma {
ti,sci = <&dm_tifs>;
};
+
+&binman {
+ tiboot3-am62x-gp-evm.bin {
+ filename = "tiboot3-am62x-gp-evm.bin";
+ ti-secure-rom {
+ content = <&u_boot_spl_unsigned>, <&ti_fs_gp>,
+ <&combined_tifs_cfg_gp>, <&combined_dm_cfg_gp>;
+ combined;
+ dm-data;
+ content-sbl = <&u_boot_spl_unsigned>;
+ load = <0x43c00000>;
+ content-sysfw = <&ti_fs_gp>;
+ load-sysfw = <0x40000>;
+ content-sysfw-data = <&combined_tifs_cfg_gp>;
+ load-sysfw-data = <0x67000>;
+ content-dm-data = <&combined_dm_cfg_gp>;
+ load-dm-data = <0x43c3a800>;
+ sw-rev = <1>;
+ keyfile = "ti-degenerate-key.pem";
+ };
+ u_boot_spl_unsigned: u-boot-spl {
+ no-expanded;
+ };
+ ti_fs_gp: ti-fs-gp.bin {
+ filename = "ti-sysfw/ti-fs-firmware-am62x-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ combined_tifs_cfg_gp: combined-tifs-cfg-gp.bin {
+ filename = "combined-tifs-cfg.bin";
+ type = "blob-ext";
+ };
+ combined_dm_cfg_gp: combined-dm-cfg-gp.bin {
+ filename = "combined-dm-cfg.bin";
+ type = "blob-ext";
+ };
+
+ };
+};
diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts
index bf21922..6b9f40e 100644
--- a/arch/arm/dts/k3-am625-r5-sk.dts
+++ b/arch/arm/dts/k3-am625-r5-sk.dts
@@ -55,20 +55,11 @@
ti,secure-host;
};
-&mcu_esm {
- bootph-pre-ram;
-};
-
&secure_proxy_sa3 {
- bootph-pre-ram;
/* We require this for boot handshake */
status = "okay";
};
-&main_esm {
- bootph-pre-ram;
-};
-
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-system-controller";
@@ -78,22 +69,14 @@
};
};
-&wkup_uart0_pins_default {
- bootph-pre-ram;
-};
-
-&main_uart1_pins_default {
- bootph-pre-ram;
-};
-
/* WKUP UART0 is used for DM firmware logs */
&wkup_uart0 {
- bootph-pre-ram;
+ status = "okay";
};
/* Main UART1 is used for TIFS firmware logs */
&main_uart1 {
- bootph-pre-ram;
+ status = "okay";
};
&ospi0 {
diff --git a/arch/arm/dts/k3-am625-sk-binman.dtsi b/arch/arm/dts/k3-am625-sk-binman.dtsi
index 41277bf..b7b5368 100644
--- a/arch/arm/dts/k3-am625-sk-binman.dtsi
+++ b/arch/arm/dts/k3-am625-sk-binman.dtsi
@@ -141,10 +141,7 @@
#ifdef CONFIG_TARGET_AM625_A53_EVM
-#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_AM625_SK_DTB "spl/dts/k3-am625-sk.dtb"
-
-#define UBOOT_NODTB "u-boot-nodtb.bin"
#define AM625_SK_DTB "u-boot.dtb"
&binman {
@@ -155,55 +152,11 @@
};
};
ti-spl {
- filename = "tispl.bin";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- ti-secure {
- content = <&atf>;
- keyfile = "custMpk.pem";
- };
- atf: atf-bl31 {
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- ti-secure {
- content = <&tee>;
- keyfile = "custMpk.pem";
- };
- tee: tee-os {
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
ti-secure {
content = <&dm>;
keyfile = "custMpk.pem";
@@ -213,23 +166,6 @@
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_spl_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_spl_nodtb: blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-am625-sk";
type = "flat_dt";
@@ -263,29 +199,12 @@
&binman {
u-boot {
- filename = "u-boot.img";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM625 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_nodtb: u-boot-nodtb {
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM625 Board";
};
fdt-0 {
@@ -323,67 +242,17 @@
&binman {
ti-spl_unsigned {
- filename = "tispl.bin_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_unsigned_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- atf-bl31 {
- filename = "bl31.bin";
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- tee-os {
- filename = "tee-raw.bin";
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
blob-ext {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- blob {
- filename = "spl/u-boot-spl-nodtb.bin";
- };
- };
-
fdt-0 {
description = "k3-am625-sk";
type = "flat_dt";
@@ -411,26 +280,12 @@
&binman {
u-boot_unsigned {
- filename = "u-boot.img_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_unsigned_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM625 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- blob {
- filename = UBOOT_NODTB;
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM625 Board";
};
fdt-0 {
diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index 7ae5e01..fa778b0 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -8,124 +8,14 @@
/ {
chosen {
- stdout-path = "serial2:115200n8";
tick-timer = &main_timer0;
};
-
- aliases {
- mmc1 = &sdhci1;
- };
-
- memory@80000000 {
- bootph-all;
- };
};
-&main_conf {
- bootph-all;
-};
-
-&cbass_main {
- bootph-all;
-};
-
&main_timer0 {
clock-frequency = <25000000>;
- bootph-all;
-};
-
-&dmss {
- bootph-all;
-};
-
-&secure_proxy_main {
- bootph-all;
-};
-
-&dmsc {
- bootph-all;
-};
-
-&k3_pds {
- bootph-all;
-};
-
-&k3_clks {
- bootph-all;
};
-&k3_reset {
- bootph-all;
-};
-
-&wkup_conf {
- bootph-all;
-};
-
-&chipid {
- bootph-all;
-};
-
-&main_pmx0 {
- bootph-all;
-};
-
-&main_uart0 {
- bootph-all;
-};
-
-&main_uart0_pins_default {
- bootph-all;
-};
-
-&cbass_mcu {
- bootph-all;
-};
-
-&cbass_wakeup {
- bootph-all;
-};
-
-&mcu_pmx0 {
- bootph-all;
-};
-
-&sdhci1 {
- bootph-all;
-};
-
-&main_mmc1_pins_default {
- bootph-all;
-};
-
-&fss {
- bootph-all;
-};
-
-&ospi0_pins_default {
- bootph-all;
-};
-
-&ospi0 {
- bootph-all;
-
- flash@0 {
- bootph-all;
-
- partitions {
- bootph-all;
-
- partition@3fc0000 {
- bootph-all;
- };
- };
- };
-};
-
-&inta_main_dmss {
- bootph-all;
-};
-
&main_bcdma {
reg = <0x00 0x485c0100 0x00 0x100>,
<0x00 0x4c000000 0x00 0x20000>,
@@ -153,41 +43,6 @@
bootph-all;
};
-&cpsw3g_mdio {
- bootph-all;
-};
-
-&cpsw3g_phy0 {
- bootph-all;
-};
-
-&cpsw3g_phy1 {
- bootph-all;
-};
-
-&main_rgmii1_pins_default {
- bootph-all;
-};
-
-&main_rgmii2_pins_default {
- bootph-all;
-};
-
-&phy_gmii_sel {
- bootph-all;
-};
-
-&cpsw3g {
- bootph-all;
- ethernet-ports {
- bootph-all;
- };
-};
-
-&cpsw_port1 {
- bootph-all;
-};
-
&cpsw_port2 {
status = "disabled";
};
diff --git a/arch/arm/dts/k3-am625-sk.dts b/arch/arm/dts/k3-am625-sk.dts
index 7c98c1b..b180924 100644
--- a/arch/arm/dts/k3-am625-sk.dts
+++ b/arch/arm/dts/k3-am625-sk.dts
@@ -31,6 +31,7 @@
vmain_pd: regulator-0 {
/* TPS65988 PD CONTROLLER OUTPUT */
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vmain_pd";
regulator-min-microvolt = <5000000>;
@@ -41,6 +42,7 @@
vcc_5v0: regulator-1 {
/* Output of LM34936 */
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vcc_5v0";
regulator-min-microvolt = <5000000>;
@@ -52,6 +54,7 @@
vcc_3v3_sys: regulator-2 {
/* output of LM61460-Q1 */
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_sys";
regulator-min-microvolt = <3300000>;
@@ -63,6 +66,7 @@
vdd_mmc1: regulator-3 {
/* TPS22918DBVR */
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1";
regulator-min-microvolt = <3300000>;
@@ -75,6 +79,7 @@
vdd_sd_dv: regulator-4 {
/* Output of TLV71033 */
+ bootph-all;
compatible = "regulator-gpio";
regulator-name = "tlv71033";
pinctrl-names = "default";
@@ -102,6 +107,7 @@
&main_pmx0 {
main_rgmii2_pins_default: main-rgmii2-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
@@ -119,6 +125,7 @@
};
ospi0_pins_default: ospi0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
@@ -135,20 +142,32 @@
};
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
>;
};
main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
>;
};
};
+&main_gpio0 {
+ bootph-all;
+};
+
+&main_gpio1 {
+ bootph-all;
+};
+
&main_i2c1 {
+ bootph-all;
exp1: gpio@22 {
+ bootph-all;
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
@@ -207,12 +226,18 @@
};
};
+&fss {
+ bootph-all;
+};
+
&ospi0 {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
flash@0 {
+ bootph-all;
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <8>;
@@ -225,6 +250,7 @@
cdns,read-delay = <4>;
partitions {
+ bootph-all;
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
@@ -260,6 +286,7 @@
};
partition@3fc0000 {
+ bootph-pre-ram;
label = "ospi.phypattern";
reg = <0x3fc0000 0x40000>;
};
diff --git a/arch/arm/dts/k3-am625-verdin-r5.dts b/arch/arm/dts/k3-am625-verdin-r5.dts
index 0cae9c5..305d199 100644
--- a/arch/arm/dts/k3-am625-verdin-r5.dts
+++ b/arch/arm/dts/k3-am625-verdin-r5.dts
@@ -69,16 +69,7 @@
ti,secure-host;
};
-&main_esm {
- bootph-pre-ram;
-};
-
-&mcu_esm {
- bootph-pre-ram;
-};
-
&secure_proxy_sa3 {
- bootph-pre-ram;
/* We require this for boot handshake */
status = "okay";
};
diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
index 089b2a5..ed2c448 100644
--- a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
+++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
@@ -5,14 +5,6 @@
#include "k3-binman.dtsi"
-&custmpk_pem {
- filename = "../../ti/keys/custMpk.pem";
-};
-
-&dkey_pem {
- filename = "../../ti/keys/ti-degenerate-key.pem";
-};
-
#ifndef CONFIG_ARM64
&bcfg_yaml {
@@ -214,10 +206,7 @@
#ifdef CONFIG_TARGET_VERDIN_AM62_A53
-#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_VERDIN_AM62_DTB "spl/dts/k3-am625-verdin-wifi-dev.dtb"
-
-#define UBOOT_NODTB "u-boot-nodtb.bin"
#define VERDIN_AM62_DTB "u-boot.dtb"
&binman {
@@ -228,54 +217,12 @@
};
};
ti-spl {
- filename = "tispl.bin";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
images {
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- ti-secure {
- content = <&atf>;
- keyfile = "custMpk.pem";
- };
- atf: atf-bl31 {
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- ti-secure {
- content = <&tee>;
- keyfile = "custMpk.pem";
- };
- tee: tee-os {
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
ti-secure {
content = <&dm>;
keyfile = "custMpk.pem";
@@ -285,23 +232,6 @@
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_spl_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_spl_nodtb: blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-am625-verdin-wifi-dev";
type = "flat_dt";
@@ -333,29 +263,12 @@
&binman {
u-boot {
- filename = "u-boot.img";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM625 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_nodtb: u-boot-nodtb {
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot fot AM625 Verdin Board";
};
fdt-0 {
@@ -392,66 +305,16 @@
&binman {
ti-spl_unsigned {
- filename = "tispl.bin_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_unsigned_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- atf-bl31 {
- filename = "bl31.bin";
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- tee-os {
- filename = "tee-raw.bin";
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
blob-ext {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- blob {
- filename = "spl/u-boot-spl-nodtb.bin";
- };
- };
-
fdt-0 {
description = "k3-am625-verdin-wifi-dev";
type = "flat_dt";
@@ -479,26 +342,12 @@
&binman {
u-boot_unsigned {
- filename = "u-boot.img_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_unsigned_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM625 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- blob {
- filename = UBOOT_NODTB;
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM625 Verdin Board";
};
fdt-0 {
diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
index 75cb60b..02f34c9 100644
--- a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
@@ -21,27 +21,10 @@
};
};
-&cbass_main {
- bootph-all;
-
- timer@2400000 {
- clock-frequency = <25000000>;
- bootph-all;
- };
-};
-
-&cbass_mcu {
- bootph-all;
-};
-
-&cbass_wakeup {
- bootph-all;
+&main_timer0 {
+ clock-frequency = <25000000>;
};
-&chipid {
- bootph-all;
-};
-
&main_bcdma {
reg = <0x00 0x485c0100 0x00 0x100>,
<0x00 0x4c000000 0x00 0x20000>,
@@ -53,6 +36,7 @@
<0x00 0x484c2000 0x00 0x2000>;
reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt",
"ringrt" , "cfg", "tchan", "rchan";
+ bootph-all;
};
&main_pktdma {
@@ -98,34 +82,16 @@
};
&dmsc {
- bootph-all;
-
k3_sysreset: sysreset-controller {
compatible = "ti,sci-sysreset";
bootph-all;
};
};
-&dmss {
- bootph-all;
-};
-
&fss {
bootph-all;
};
-&k3_clks {
- bootph-all;
-};
-
-&k3_pds {
- bootph-all;
-};
-
-&k3_reset {
- bootph-all;
-};
-
&main_gpio0 {
bootph-all;
};
@@ -156,10 +122,6 @@
};
};
-&main_pmx0 {
- bootph-all;
-};
-
/* Verdin UART_3, used as the Linux console */
&main_uart0 {
bootph-all;
@@ -170,10 +132,6 @@
bootph-all;
};
-&mcu_pmx0 {
- bootph-all;
-};
-
&pinctrl_ctrl_sleep_moci {
bootph-all;
};
@@ -210,18 +168,10 @@
status = "disabled";
};
-&secure_proxy_main {
- bootph-all;
-};
-
&verdin_ctrl_sleep_moci {
bootph-all;
};
-&wkup_conf {
- bootph-all;
-};
-
/* Verdin UART_2 */
&wkup_uart0 {
bootph-all;
diff --git a/arch/arm/dts/k3-am62a-main.dtsi b/arch/arm/dts/k3-am62a-main.dtsi
index bc4b50b..4ae7fdc 100644
--- a/arch/arm/dts/k3-am62a-main.dtsi
+++ b/arch/arm/dts/k3-am62a-main.dtsi
@@ -48,6 +48,18 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00 0x00 0x00100000 0x20000>;
+
+ phy_gmii_sel: phy@4044 {
+ compatible = "ti,am654-phy-gmii-sel";
+ reg = <0x4044 0x8>;
+ #phy-cells = <1>;
+ };
+
+ epwm_tbclk: clock-controller@4130 {
+ compatible = "ti,am62-epwm-tbclk";
+ reg = <0x4130 0x4>;
+ #clock-cells = <1>;
+ };
};
dmss: bus@48000000 {
@@ -69,6 +81,67 @@
interrupt-names = "rx_012";
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ inta_main_dmss: interrupt-controller@48000000 {
+ compatible = "ti,sci-inta";
+ reg = <0x00 0x48000000 0x00 0x100000>;
+ #interrupt-cells = <0>;
+ interrupt-controller;
+ interrupt-parent = <&gic500>;
+ msi-controller;
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <28>;
+ ti,interrupt-ranges = <6 70 34>;
+ ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
+ };
+
+ main_bcdma: dma-controller@485c0100 {
+ compatible = "ti,am64-dmss-bcdma";
+ reg = <0x00 0x485c0100 0x00 0x100>,
+ <0x00 0x4c000000 0x00 0x20000>,
+ <0x00 0x4a820000 0x00 0x20000>,
+ <0x00 0x4aa40000 0x00 0x20000>,
+ <0x00 0x4bc00000 0x00 0x100000>;
+ reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
+ msi-parent = <&inta_main_dmss>;
+ #dma-cells = <3>;
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <26>;
+ ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
+ ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
+ ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
+ };
+
+ main_pktdma: dma-controller@485c0000 {
+ compatible = "ti,am64-dmss-pktdma";
+ reg = <0x00 0x485c0000 0x00 0x100>,
+ <0x00 0x4a800000 0x00 0x20000>,
+ <0x00 0x4aa00000 0x00 0x40000>,
+ <0x00 0x4b800000 0x00 0x400000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
+ msi-parent = <&inta_main_dmss>;
+ #dma-cells = <2>;
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <30>;
+ ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
+ <0x24>, /* CPSW_TX_CHAN */
+ <0x25>, /* SAUL_TX_0_CHAN */
+ <0x26>; /* SAUL_TX_1_CHAN */
+ ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
+ <0x11>, /* RING_CPSW_TX_CHAN */
+ <0x12>, /* RING_SAUL_TX_0_CHAN */
+ <0x13>; /* RING_SAUL_TX_1_CHAN */
+ ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
+ <0x2b>, /* CPSW_RX_CHAN */
+ <0x2d>, /* SAUL_RX_0_CHAN */
+ <0x2f>, /* SAUL_RX_1_CHAN */
+ <0x31>, /* SAUL_RX_2_CHAN */
+ <0x33>; /* SAUL_RX_3_CHAN */
+ ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
+ <0x2c>, /* FLOW_CPSW_RX_CHAN */
+ <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
+ <0x32>; /* FLOW_SAUL_RX_2/3_CHAN */
+ };
};
dmsc: system-controller@44043000 {
@@ -77,8 +150,8 @@
reg-names = "debug_messages";
ti,host-id = <12>;
mbox-names = "rx", "tx";
- mboxes= <&secure_proxy_main 12>,
- <&secure_proxy_main 13>;
+ mboxes = <&secure_proxy_main 12>,
+ <&secure_proxy_main 13>;
k3_pds: power-controller {
compatible = "ti,sci-pm-domain";
@@ -96,6 +169,21 @@
};
};
+ secure_proxy_sa3: mailbox@43600000 {
+ compatible = "ti,am654-secure-proxy";
+ #mbox-cells = <1>;
+ reg-names = "target_data", "rt", "scfg";
+ reg = <0x00 0x43600000 0x00 0x10000>,
+ <0x00 0x44880000 0x00 0x20000>,
+ <0x00 0x44860000 0x00 0x20000>;
+ /*
+ * Marked Disabled:
+ * Node is incomplete as it is meant for bootloaders and
+ * firmware on non-MPU processors
+ */
+ status = "disabled";
+ };
+
main_pmx0: pinctrl@f4000 {
compatible = "pinctrl-single";
reg = <0x00 0xf4000 0x00 0x2ac>;
@@ -104,6 +192,102 @@
pinctrl-single,function-mask = <0xffffffff>;
};
+ main_timer0: timer@2400000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2400000 0x00 0x400>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 36 2>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 36 2>;
+ assigned-clock-parents = <&k3_clks 36 3>;
+ power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer1: timer@2410000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2410000 0x00 0x400>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 37 2>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 37 2>;
+ assigned-clock-parents = <&k3_clks 37 3>;
+ power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer2: timer@2420000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2420000 0x00 0x400>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 38 2>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 38 2>;
+ assigned-clock-parents = <&k3_clks 38 3>;
+ power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer3: timer@2430000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2430000 0x00 0x400>;
+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 39 2>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 39 2>;
+ assigned-clock-parents = <&k3_clks 39 3>;
+ power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer4: timer@2440000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2440000 0x00 0x400>;
+ interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 40 2>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 40 2>;
+ assigned-clock-parents = <&k3_clks 40 3>;
+ power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer5: timer@2450000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2450000 0x00 0x400>;
+ interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 41 2>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 41 2>;
+ assigned-clock-parents = <&k3_clks 41 3>;
+ power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer6: timer@2460000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2460000 0x00 0x400>;
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 42 2>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 42 2>;
+ assigned-clock-parents = <&k3_clks 42 3>;
+ power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer7: timer@2470000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2470000 0x00 0x400>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 43 2>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 43 2>;
+ assigned-clock-parents = <&k3_clks 43 3>;
+ power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
main_uart0: serial@2800000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02800000 0x00 0x100>;
@@ -222,6 +406,39 @@
status = "disabled";
};
+ main_spi0: spi@20100000 {
+ compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
+ reg = <0x00 0x20100000 0x00 0x400>;
+ interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 141 0>;
+ status = "disabled";
+ };
+
+ main_spi1: spi@20110000 {
+ compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+ reg = <0x00 0x20110000 0x00 0x400>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 142 0>;
+ status = "disabled";
+ };
+
+ main_spi2: spi@20120000 {
+ compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+ reg = <0x00 0x20120000 0x00 0x400>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 143 0>;
+ status = "disabled";
+ };
+
main_gpio_intr: interrupt-controller@a00000 {
compatible = "ti,sci-intr";
reg = <0x00 0x00a00000 0x00 0x800>;
@@ -295,4 +512,368 @@
no-1-8-v;
status = "disabled";
};
+
+ usbss0: dwc3-usb@f900000 {
+ compatible = "ti,am62-usb";
+ reg = <0x00 0x0f900000 0x00 0x800>;
+ clocks = <&k3_clks 161 3>;
+ clock-names = "ref";
+ ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
+ ranges;
+ status = "disabled";
+
+ usb0: usb@31000000 {
+ compatible = "snps,dwc3";
+ reg = <0x00 0x31000000 0x00 0x50000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
+ <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
+ interrupt-names = "host", "peripheral";
+ maximum-speed = "high-speed";
+ dr_mode = "otg";
+ };
+ };
+
+ usbss1: dwc3-usb@f910000 {
+ compatible = "ti,am62-usb";
+ reg = <0x00 0x0f910000 0x00 0x800>;
+ clocks = <&k3_clks 162 3>;
+ clock-names = "ref";
+ ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
+ ranges;
+ status = "disabled";
+
+ usb1: usb@31100000 {
+ compatible = "snps,dwc3";
+ reg = <0x00 0x31100000 0x00 0x50000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
+ <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
+ interrupt-names = "host", "peripheral";
+ maximum-speed = "high-speed";
+ dr_mode = "otg";
+ };
+ };
+
+ fss: bus@fc00000 {
+ compatible = "simple-bus";
+ reg = <0x00 0x0fc00000 0x00 0x70000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ ospi0: spi@fc40000 {
+ compatible = "ti,am654-ospi", "cdns,qspi-nor";
+ reg = <0x00 0x0fc40000 0x00 0x100>,
+ <0x05 0x00000000 0x01 0x00000000>;
+ interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+ cdns,fifo-depth = <256>;
+ cdns,fifo-width = <4>;
+ cdns,trigger-address = <0x0>;
+ clocks = <&k3_clks 75 7>;
+ assigned-clocks = <&k3_clks 75 7>;
+ assigned-clock-parents = <&k3_clks 75 8>;
+ assigned-clock-rates = <166666666>;
+ power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ cpsw3g: ethernet@8000000 {
+ compatible = "ti,am642-cpsw-nuss";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ reg = <0x0 0x8000000 0x0 0x200000>;
+ reg-names = "cpsw_nuss";
+ ranges = <0x0 0x0 0x0 0x8000000 0x0 0x200000>;
+ clocks = <&k3_clks 13 0>;
+ assigned-clocks = <&k3_clks 13 3>;
+ assigned-clock-parents = <&k3_clks 13 11>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+
+ dmas = <&main_pktdma 0xc600 15>,
+ <&main_pktdma 0xc601 15>,
+ <&main_pktdma 0xc602 15>,
+ <&main_pktdma 0xc603 15>,
+ <&main_pktdma 0xc604 15>,
+ <&main_pktdma 0xc605 15>,
+ <&main_pktdma 0xc606 15>,
+ <&main_pktdma 0xc607 15>,
+ <&main_pktdma 0x4600 15>;
+ dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
+ "tx7", "rx";
+
+ ethernet-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpsw_port1: port@1 {
+ reg = <1>;
+ ti,mac-only;
+ label = "port1";
+ phys = <&phy_gmii_sel 1>;
+ mac-address = [00 00 00 00 00 00];
+ ti,syscon-efuse = <&wkup_conf 0x200>;
+ };
+
+ cpsw_port2: port@2 {
+ reg = <2>;
+ ti,mac-only;
+ label = "port2";
+ phys = <&phy_gmii_sel 2>;
+ mac-address = [00 00 00 00 00 00];
+ };
+ };
+
+ cpsw3g_mdio: mdio@f00 {
+ compatible = "ti,cpsw-mdio","ti,davinci_mdio";
+ reg = <0x0 0xf00 0x0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&k3_clks 13 0>;
+ clock-names = "fck";
+ bus_freq = <1000000>;
+ };
+
+ cpts@3d000 {
+ compatible = "ti,j721e-cpts";
+ reg = <0x0 0x3d000 0x0 0x400>;
+ clocks = <&k3_clks 13 3>;
+ clock-names = "cpts";
+ interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cpts";
+ ti,cpts-ext-ts-inputs = <4>;
+ ti,cpts-periodic-outputs = <2>;
+ };
+ };
+
+ hwspinlock: spinlock@2a000000 {
+ compatible = "ti,am64-hwspinlock";
+ reg = <0x00 0x2a000000 0x00 0x1000>;
+ #hwlock-cells = <1>;
+ };
+
+ mailbox0_cluster0: mailbox@29000000 {
+ compatible = "ti,am64-mailbox";
+ reg = <0x00 0x29000000 0x00 0x200>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ #mbox-cells = <1>;
+ ti,mbox-num-users = <4>;
+ ti,mbox-num-fifos = <16>;
+ };
+
+ mailbox0_cluster1: mailbox@29010000 {
+ compatible = "ti,am64-mailbox";
+ reg = <0x00 0x29010000 0x00 0x200>;
+ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+ #mbox-cells = <1>;
+ ti,mbox-num-users = <4>;
+ ti,mbox-num-fifos = <16>;
+ };
+
+ mailbox0_cluster2: mailbox@29020000 {
+ compatible = "ti,am64-mailbox";
+ reg = <0x00 0x29020000 0x00 0x200>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ #mbox-cells = <1>;
+ ti,mbox-num-users = <4>;
+ ti,mbox-num-fifos = <16>;
+ };
+
+ mailbox0_cluster3: mailbox@29030000 {
+ compatible = "ti,am64-mailbox";
+ reg = <0x00 0x29030000 0x00 0x200>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ #mbox-cells = <1>;
+ ti,mbox-num-users = <4>;
+ ti,mbox-num-fifos = <16>;
+ };
+
+ main_mcan0: can@20701000 {
+ compatible = "bosch,m_can";
+ reg = <0x00 0x20701000 0x00 0x200>,
+ <0x00 0x20708000 0x00 0x8000>;
+ reg-names = "m_can", "message_ram";
+ power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 98 6>, <&k3_clks 98 1>;
+ clock-names = "hclk", "cclk";
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
+
+ main_rti0: watchdog@e000000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x0e000000 0x00 0x100>;
+ clocks = <&k3_clks 125 0>;
+ power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 125 0>;
+ assigned-clock-parents = <&k3_clks 125 2>;
+ };
+
+ main_rti1: watchdog@e010000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x0e010000 0x00 0x100>;
+ clocks = <&k3_clks 126 0>;
+ power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 126 0>;
+ assigned-clock-parents = <&k3_clks 126 2>;
+ };
+
+ main_rti2: watchdog@e020000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x0e020000 0x00 0x100>;
+ clocks = <&k3_clks 127 0>;
+ power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 127 0>;
+ assigned-clock-parents = <&k3_clks 127 2>;
+ };
+
+ main_rti3: watchdog@e030000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x0e030000 0x00 0x100>;
+ clocks = <&k3_clks 128 0>;
+ power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 128 0>;
+ assigned-clock-parents = <&k3_clks 128 2>;
+ };
+
+ main_rti4: watchdog@e040000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x0e040000 0x00 0x100>;
+ clocks = <&k3_clks 205 0>;
+ power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 205 0>;
+ assigned-clock-parents = <&k3_clks 205 2>;
+ };
+
+ epwm0: pwm@23000000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x00 0x23000000 0x00 0x100>;
+ power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
+ clock-names = "tbclk", "fck";
+ status = "disabled";
+ };
+
+ epwm1: pwm@23010000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x00 0x23010000 0x00 0x100>;
+ power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
+ clock-names = "tbclk", "fck";
+ status = "disabled";
+ };
+
+ epwm2: pwm@23020000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x00 0x23020000 0x00 0x100>;
+ power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
+ clock-names = "tbclk", "fck";
+ status = "disabled";
+ };
+
+ ecap0: pwm@23100000 {
+ compatible = "ti,am3352-ecap";
+ #pwm-cells = <3>;
+ reg = <0x00 0x23100000 0x00 0x100>;
+ power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 51 0>;
+ clock-names = "fck";
+ status = "disabled";
+ };
+
+ ecap1: pwm@23110000 {
+ compatible = "ti,am3352-ecap";
+ #pwm-cells = <3>;
+ reg = <0x00 0x23110000 0x00 0x100>;
+ power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 52 0>;
+ clock-names = "fck";
+ status = "disabled";
+ };
+
+ ecap2: pwm@23120000 {
+ compatible = "ti,am3352-ecap";
+ #pwm-cells = <3>;
+ reg = <0x00 0x23120000 0x00 0x100>;
+ power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 53 0>;
+ clock-names = "fck";
+ status = "disabled";
+ };
+
+ mcasp0: audio-controller@2b00000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x00 0x02b00000 0x00 0x2000>,
+ <0x00 0x02b08000 0x00 0x400>;
+ reg-names = "mpu", "dat";
+ interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_bcdma 0 0xc500 0>, <&main_bcdma 0 0x4500 0>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 190 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 190 0>;
+ assigned-clock-parents = <&k3_clks 190 2>;
+ power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
+
+ mcasp1: audio-controller@2b10000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x00 0x02b10000 0x00 0x2000>,
+ <0x00 0x02b18000 0x00 0x400>;
+ reg-names = "mpu", "dat";
+ interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_bcdma 0 0xc501 0>, <&main_bcdma 0 0x4501 0>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 191 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 191 0>;
+ assigned-clock-parents = <&k3_clks 191 2>;
+ power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
+
+ mcasp2: audio-controller@2b20000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x00 0x02b20000 0x00 0x2000>,
+ <0x00 0x02b28000 0x00 0x400>;
+ reg-names = "mpu", "dat";
+ interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_bcdma 0 0xc502 0>, <&main_bcdma 0 0x4502 0>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 192 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 192 0>;
+ assigned-clock-parents = <&k3_clks 192 2>;
+ power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
};
diff --git a/arch/arm/dts/k3-am62a-mcu.dtsi b/arch/arm/dts/k3-am62a-mcu.dtsi
index 6d1e501..a6d16a9 100644
--- a/arch/arm/dts/k3-am62a-mcu.dtsi
+++ b/arch/arm/dts/k3-am62a-mcu.dtsi
@@ -15,6 +15,51 @@
status = "disabled";
};
+ /*
+ * The MCU domain timer interrupts are routed only to the ESM module,
+ * and not currently available for Linux. The MCU domain timers are
+ * of limited use without interrupts, and likely reserved by the ESM.
+ */
+ mcu_timer0: timer@4800000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x4800000 0x00 0x400>;
+ clocks = <&k3_clks 35 2>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ status = "reserved";
+ };
+
+ mcu_timer1: timer@4810000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x4810000 0x00 0x400>;
+ clocks = <&k3_clks 48 2>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ status = "reserved";
+ };
+
+ mcu_timer2: timer@4820000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x4820000 0x00 0x400>;
+ clocks = <&k3_clks 49 2>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ status = "reserved";
+ };
+
+ mcu_timer3: timer@4830000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x4830000 0x00 0x400>;
+ clocks = <&k3_clks 50 2>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ status = "reserved";
+ };
+
mcu_uart0: serial@4a00000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x04a00000 0x00 0x100>;
@@ -36,4 +81,90 @@
clock-names = "fck";
status = "disabled";
};
+
+ mcu_spi0: spi@4b00000 {
+ compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
+ reg = <0x00 0x04b00000 0x00 0x400>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 147 0>;
+ status = "disabled";
+ };
+
+ mcu_spi1: spi@4b10000 {
+ compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+ reg = <0x00 0x04b10000 0x00 0x400>;
+ interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 148 0>;
+ status = "disabled";
+ };
+
+ mcu_gpio_intr: interrupt-controller@4210000 {
+ compatible = "ti,sci-intr";
+ reg = <0x00 0x04210000 0x00 0x200>;
+ ti,intr-trigger-type = <1>;
+ interrupt-controller;
+ interrupt-parent = <&gic500>;
+ #interrupt-cells = <1>;
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <5>;
+ ti,interrupt-ranges = <0 104 4>;
+ };
+
+ mcu_gpio0: gpio@4201000 {
+ compatible = "ti,am64-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x04201000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&mcu_gpio_intr>;
+ interrupts = <30>, <31>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ ti,ngpio = <24>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 79 0>;
+ clock-names = "gpio";
+ status = "disabled";
+ };
+
+ mcu_rti0: watchdog@4880000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x04880000 0x00 0x100>;
+ clocks = <&k3_clks 131 0>;
+ power-domains = <&k3_pds 131 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 131 0>;
+ assigned-clock-parents = <&k3_clks 131 2>;
+ /* Tightly coupled to M4F */
+ status = "reserved";
+ };
+
+ mcu_mcan0: can@4e08000 {
+ compatible = "bosch,m_can";
+ reg = <0x00 0x4e08000 0x00 0x200>,
+ <0x00 0x4e00000 0x00 0x8000>;
+ reg-names = "m_can", "message_ram";
+ power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 188 6>, <&k3_clks 188 1>;
+ clock-names = "hclk", "cclk";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
+
+ mcu_mcan1: can@4e18000 {
+ compatible = "bosch,m_can";
+ reg = <0x00 0x4e18000 0x00 0x200>,
+ <0x00 0x4e10000 0x00 0x8000>;
+ reg-names = "m_can", "message_ram";
+ power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 189 6>, <&k3_clks 189 1>;
+ clock-names = "hclk", "cclk";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
};
diff --git a/arch/arm/dts/k3-am62a-sk-binman.dtsi b/arch/arm/dts/k3-am62a-sk-binman.dtsi
index de09430..c5e027d 100644
--- a/arch/arm/dts/k3-am62a-sk-binman.dtsi
+++ b/arch/arm/dts/k3-am62a-sk-binman.dtsi
@@ -144,10 +144,7 @@
#ifdef CONFIG_TARGET_AM62A7_A53_EVM
-#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_AM62A7_SK_DTB "spl/dts/k3-am62a7-sk.dtb"
-
-#define UBOOT_NODTB "u-boot-nodtb.bin"
#define AM62A7_SK_DTB "u-boot.dtb"
&binman {
@@ -158,55 +155,11 @@
};
};
ti-spl {
- filename = "tispl.bin";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- ti-secure {
- content = <&atf>;
- keyfile = "custMpk.pem";
- };
- atf: atf-bl31 {
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- ti-secure {
- content = <&tee>;
- keyfile = "custMpk.pem";
- };
- tee: tee-os {
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
ti-secure {
content = <&dm>;
keyfile = "custMpk.pem";
@@ -216,23 +169,6 @@
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_spl_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_spl_nodtb: blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-am62a7-sk";
type = "flat_dt";
@@ -266,29 +202,12 @@
&binman {
u-boot {
- filename = "u-boot.img";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM62Ax board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_nodtb: u-boot-nodtb {
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM62Ax Board";
};
fdt-0 {
@@ -326,67 +245,16 @@
&binman {
ti-spl_unsigned {
- filename = "tispl.bin_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_unsigned_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- atf-bl31 {
- filename = "bl31.bin";
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- tee-os {
- filename = "tee-raw.bin";
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
blob-ext {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- blob {
- filename = "spl/u-boot-spl-nodtb.bin";
- };
- };
-
fdt-0 {
description = "k3-am62a7-sk";
type = "flat_dt";
@@ -414,26 +282,12 @@
&binman {
u-boot_unsigned {
- filename = "u-boot.img_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_unsigned_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM62Ax board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- blob {
- filename = UBOOT_NODTB;
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM62Ax Board";
};
fdt-0 {
diff --git a/arch/arm/dts/k3-am62a-thermal.dtsi b/arch/arm/dts/k3-am62a-thermal.dtsi
new file mode 100644
index 0000000..85ce545
--- /dev/null
+++ b/arch/arm/dts/k3-am62a-thermal.dtsi
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/thermal/thermal.h>
+
+thermal_zones: thermal-zones {
+ main0_thermal: main0-thermal {
+ polling-delay-passive = <250>; /* milliSeconds */
+ polling-delay = <500>; /* milliSeconds */
+ thermal-sensors = <&wkup_vtm0 0>;
+
+ trips {
+ main0_crit: main0-crit {
+ temperature = <125000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+
+ main1_thermal: main1-thermal {
+ polling-delay-passive = <250>; /* milliSeconds */
+ polling-delay = <500>; /* milliSeconds */
+ thermal-sensors = <&wkup_vtm0 1>;
+
+ trips {
+ main1_crit: main1-crit {
+ temperature = <125000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+
+ main2_thermal: main2-thermal {
+ polling-delay-passive = <250>; /* milliSeconds */
+ polling-delay = <500>; /* milliSeconds */
+ thermal-sensors = <&wkup_vtm0 2>;
+
+ trips {
+ main2_crit: main2-crit {
+ temperature = <125000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+};
diff --git a/arch/arm/dts/k3-am62a-wakeup.dtsi b/arch/arm/dts/k3-am62a-wakeup.dtsi
index 99afac4..4e8279f 100644
--- a/arch/arm/dts/k3-am62a-wakeup.dtsi
+++ b/arch/arm/dts/k3-am62a-wakeup.dtsi
@@ -31,7 +31,7 @@
wkup_i2c0: i2c@2b200000 {
compatible = "ti,am64-i2c", "ti,omap4-i2c";
- reg = <0x00 0x02b200000 0x00 0x100>;
+ reg = <0x00 0x2b200000 0x00 0x100>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -51,4 +51,23 @@
wakeup-source;
status = "disabled";
};
+
+ wkup_rti0: watchdog@2b000000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2b000000 0x00 0x100>;
+ clocks = <&k3_clks 132 0>;
+ power-domains = <&k3_pds 132 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 132 0>;
+ assigned-clock-parents = <&k3_clks 132 2>;
+ /* Used by DM firmware */
+ status = "reserved";
+ };
+
+ wkup_vtm0: temperature-sensor@b00000 {
+ compatible = "ti,j7200-vtm";
+ reg = <0x00 0xb00000 0x00 0x400>,
+ <0x00 0xb01000 0x00 0x400>;
+ power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
+ #thermal-sensor-cells = <1>;
+ };
};
diff --git a/arch/arm/dts/k3-am62a.dtsi b/arch/arm/dts/k3-am62a.dtsi
index 6eb87c3..61a210e 100644
--- a/arch/arm/dts/k3-am62a.dtsi
+++ b/arch/arm/dts/k3-am62a.dtsi
@@ -8,9 +8,10 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/pinctrl/k3.h>
#include <dt-bindings/soc/ti,sci_pm_domain.h>
+#include "k3-pinctrl.h"
+
/ {
model = "Texas Instruments K3 AM62A SoC";
compatible = "ti,am62a7";
@@ -114,6 +115,8 @@
<0x00 0x78100000 0x00 0x78100000 0x00 0x00008000>; /* DM R5 BTCM*/
};
};
+
+ #include "k3-am62a-thermal.dtsi"
};
/* Now include the peripherals for each bus segments */
diff --git a/arch/arm/dts/k3-am62a7-r5-sk.dts b/arch/arm/dts/k3-am62a7-r5-sk.dts
index bbbd9e5..bc05dcb 100644
--- a/arch/arm/dts/k3-am62a7-r5-sk.dts
+++ b/arch/arm/dts/k3-am62a7-r5-sk.dts
@@ -7,7 +7,6 @@
#include "k3-am62a7-sk.dts"
#include "k3-am62a-ddr-1866mhz-32bit.dtsi"
#include "k3-am62a-ddr.dtsi"
-#include "k3-am62a-sk-binman.dtsi"
#include "k3-am62a7-sk-u-boot.dtsi"
@@ -15,35 +14,8 @@
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
- serial0 = &wkup_uart0;
- serial3 = &main_uart1;
};
- chosen {
- stdout-path = "serial2:115200n8";
- tick-timer = &timer1;
- };
-
- memory@80000000 {
- device_type = "memory";
- /* 4G RAM */
- reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
- <0x00000008 0x80000000 0x00000000 0x80000000>;
- bootph-pre-ram;
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- secure_ddr: optee@9e800000 {
- reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
- alignment = <0x1000>;
- no-map;
- };
- };
-
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
@@ -81,67 +53,39 @@
ti,secure-host;
};
-&cbass_main {
- sa3_secproxy: secproxy@44880000 {
- compatible = "ti,am654-secure-proxy";
- #mbox-cells = <1>;
- reg = <0x00 0x44880000 0x00 0x20000>,
- <0x0 0x44860000 0x0 0x20000>,
- <0x0 0x43600000 0x0 0x10000>;
- reg-names = "rt", "scfg", "target_data";
- bootph-pre-ram;
- };
+&secure_proxy_sa3 {
+ /* Needed for initial handshake with ROM */
+ status = "okay";
+ bootph-pre-ram;
+};
+&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-system-controller";
mboxes= <&secure_proxy_main 1>,
<&secure_proxy_main 0>,
- <&sa3_secproxy 0>;
+ <&secure_proxy_sa3 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
};
-&mcu_pmx0 {
- status = "okay";
+&wkup_uart0_pins_default {
bootph-pre-ram;
-
- wkup_uart0_pins_default: wkup-uart0-pins-default {
- pinctrl-single,pins = <
- AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6) WKUP_UART0_CTSn */
- AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */
- AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */
- AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */
- >;
- bootph-pre-ram;
- };
};
-&main_pmx0 {
+&main_uart1_pins_default {
bootph-pre-ram;
- main_uart1_pins_default: main-uart1-pins-default {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */
- AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */
- AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */
- AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */
- >;
- bootph-pre-ram;
- };
};
/* WKUP UART0 is used for DM firmware logs */
&wkup_uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&wkup_uart0_pins_default>;
status = "okay";
bootph-pre-ram;
};
/* Main UART1 is used for TIFS firmware logs */
&main_uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&main_uart1_pins_default>;
status = "okay";
bootph-pre-ram;
};
diff --git a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
index cf938c4..31b89b4 100644
--- a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
@@ -4,137 +4,186 @@
* Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
*/
+#include "k3-am62a-sk-binman.dtsi"
+
/ {
chosen {
stdout-path = "serial2:115200n8";
- tick-timer = &timer1;
+ tick-timer = &main_timer0;
};
memory@80000000 {
- bootph-pre-ram;
+ bootph-all;
};
};
-&cbass_main{
- bootph-pre-ram;
+&main_timer0 {
+ bootph-all;
+};
- timer1: timer@2400000 {
- compatible = "ti,omap5430-timer";
- reg = <0x00 0x2400000 0x00 0x80>;
- ti,timer-alwon;
- clock-frequency = <25000000>;
- bootph-pre-ram;
- };
+&cbass_main {
+ bootph-all;
};
&dmss {
- bootph-pre-ram;
+ bootph-all;
};
&secure_proxy_main {
- bootph-pre-ram;
+ bootph-all;
};
&dmsc {
- bootph-pre-ram;
+ bootph-all;
};
&k3_pds {
- bootph-pre-ram;
+ bootph-all;
};
&k3_clks {
- bootph-pre-ram;
+ bootph-all;
};
&k3_reset {
- bootph-pre-ram;
+ bootph-all;
};
&wkup_conf {
- bootph-pre-ram;
+ bootph-all;
};
&chipid {
- bootph-pre-ram;
+ bootph-all;
};
&main_pmx0 {
- bootph-pre-ram;
+ bootph-all;
};
&main_uart0 {
- bootph-pre-ram;
+ bootph-all;
};
&main_uart0_pins_default {
- bootph-pre-ram;
+ bootph-all;
};
-&main_uart1 {
- bootph-pre-ram;
-};
-
&cbass_mcu {
- bootph-pre-ram;
+ bootph-all;
};
&cbass_wakeup {
- bootph-pre-ram;
+ bootph-all;
};
&mcu_pmx0 {
- bootph-pre-ram;
-};
-
-&wkup_uart0 {
- bootph-pre-ram;
+ bootph-all;
};
&main_gpio0 {
- bootph-pre-ram;
+ bootph-all;
};
&main_i2c0 {
- bootph-pre-ram;
+ bootph-all;
};
&main_i2c0_pins_default {
- bootph-pre-ram;
+ bootph-all;
};
&main_i2c1 {
- bootph-pre-ram;
+ bootph-all;
};
&main_i2c1_pins_default {
- bootph-pre-ram;
+ bootph-all;
};
&exp1 {
- bootph-pre-ram;
+ bootph-all;
};
&sdhci1 {
- bootph-pre-ram;
+ bootph-all;
};
&main_mmc1_pins_default {
- bootph-pre-ram;
+ bootph-all;
};
&k3_reset {
- bootph-pre-ram;
+ bootph-all;
};
&dmsc {
- bootph-pre-ram;
+ bootph-all;
k3_sysreset: sysreset-controller {
compatible = "ti,sci-sysreset";
- bootph-pre-ram;
+ bootph-all;
};
};
&vdd_mmc1 {
- bootph-pre-ram;
+ bootph-all;
+};
+
+&main_bcdma {
+ reg = <0x00 0x485c0100 0x00 0x100>,
+ <0x00 0x4c000000 0x00 0x20000>,
+ <0x00 0x4a820000 0x00 0x20000>,
+ <0x00 0x4aa40000 0x00 0x20000>,
+ <0x00 0x4bc00000 0x00 0x100000>,
+ <0x00 0x48600000 0x00 0x8000>,
+ <0x00 0x484a4000 0x00 0x2000>,
+ <0x00 0x484c2000 0x00 0x2000>;
+ reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt",
+ "ringrt" , "cfg", "tchan", "rchan";
+ bootph-all;
+};
+
+&main_pktdma {
+ reg = <0x00 0x485c0000 0x00 0x100>,
+ <0x00 0x4a800000 0x00 0x20000>,
+ <0x00 0x4aa00000 0x00 0x20000>,
+ <0x00 0x4b800000 0x00 0x200000>,
+ <0x00 0x485e0000 0x00 0x10000>,
+ <0x00 0x484a0000 0x00 0x2000>,
+ <0x00 0x484c0000 0x00 0x2000>,
+ <0x00 0x48430000 0x00 0x1000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
+ "cfg", "tchan", "rchan", "rflow";
+ bootph-all;
+};
+
+&main_mdio1_pins_default {
+ bootph-all;
+};
+
+&cpsw3g_mdio {
+ bootph-all;
+};
+
+&cpsw3g_phy0 {
+ bootph-all;
+};
+
+&main_rgmii1_pins_default {
+ bootph-all;
+};
+
+&phy_gmii_sel {
+ bootph-all;
+};
+
+&cpsw3g {
+ bootph-all;
+ ethernet-ports {
+ bootph-all;
+ };
+};
+
+&cpsw_port1 {
+ bootph-all;
};
diff --git a/arch/arm/dts/k3-am62a7-sk.dts b/arch/arm/dts/k3-am62a7-sk.dts
index 270e669..8f64ac2 100644
--- a/arch/arm/dts/k3-am62a7-sk.dts
+++ b/arch/arm/dts/k3-am62a7-sk.dts
@@ -9,15 +9,17 @@
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/net/ti-dp83867.h>
#include "k3-am62a7.dtsi"
-#include "k3-am62a-sk-binman.dtsi"
/ {
- compatible = "ti,am62a7-sk", "ti,am62a7";
+ compatible = "ti,am62a7-sk", "ti,am62a7";
model = "Texas Instruments AM62A7 SK";
aliases {
+ serial0 = &wkup_uart0;
serial2 = &main_uart0;
+ serial3 = &main_uart1;
mmc1 = &sdhci1;
};
@@ -77,10 +79,10 @@
regulator-boot-on;
};
- vcc_3v3_sys: regulator-2 {
+ vcc_3v3_main: regulator-2 {
/* output of LM5141-Q1 */
compatible = "regulator-fixed";
- regulator-name = "vcc_3v3_sys";
+ regulator-name = "vcc_3v3_main";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vmain_pd>;
@@ -99,6 +101,17 @@
gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
};
+ vcc_3v3_sys: regulator-4 {
+ /* output of TPS222965DSGT */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_3v3_sys";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_3v3_main>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -111,39 +124,101 @@
function = LED_FUNCTION_HEARTBEAT;
default-state = "off";
};
+ };
+
+ tlv320_mclk: clk-0 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <12288000>;
+ };
+
+ codec_audio: sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "AM62Ax-SKEVM";
+ simple-audio-card,widgets =
+ "Headphone", "Headphone Jack",
+ "Line", "Line In",
+ "Microphone", "Microphone Jack";
+ simple-audio-card,routing =
+ "Headphone Jack", "HPLOUT",
+ "Headphone Jack", "HPROUT",
+ "LINE1L", "Line In",
+ "LINE1R", "Line In",
+ "MIC3R", "Microphone Jack",
+ "Microphone Jack", "Mic Bias";
+ simple-audio-card,format = "dsp_b";
+ simple-audio-card,bitclock-master = <&sound_master>;
+ simple-audio-card,frame-master = <&sound_master>;
+ simple-audio-card,bitclock-inversion;
+
+ simple-audio-card,cpu {
+ sound-dai = <&mcasp1>;
+ };
+
+ sound_master: simple-audio-card,codec {
+ sound-dai = <&tlv320aic3106>;
+ clocks = <&tlv320_mclk>;
+ };
+ };
+};
+
+&mcu_pmx0 {
+ wkup_uart0_pins_default: wkup-uart0-default-pins {
+ pinctrl-single,pins = <
+ AM62AX_MCU_IOPAD(0x0024, PIN_INPUT, 0) /* (C9) WKUP_UART0_RXD */
+ AM62AX_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (E9) WKUP_UART0_TXD */
+ AM62AX_MCU_IOPAD(0x002c, PIN_INPUT, 0) /* (C10) WKUP_UART0_CTSn */
+ AM62AX_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (C8) WKUP_UART0_RTSn */
+ >;
};
};
+/* WKUP UART0 is used for DM firmware logs */
+&wkup_uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&wkup_uart0_pins_default>;
+ status = "reserved";
+};
+
&main_pmx0 {
- main_uart0_pins_default: main-uart0-pins-default {
+ main_uart0_pins_default: main-uart0-default-pins {
pinctrl-single,pins = <
- AM62AX_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
- AM62AX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
+ AM62AX_IOPAD(0x1c8, PIN_INPUT, 0) /* (E14) UART0_RXD */
+ AM62AX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */
>;
};
- main_i2c0_pins_default: main-i2c0-pins-default {
+ main_uart1_pins_default: main-uart1-default-pins {
+ pinctrl-single,pins = <
+ AM62AX_IOPAD(0x01e8, PIN_INPUT, 1) /* (C17) I2C1_SCL.UART1_RXD */
+ AM62AX_IOPAD(0x01ec, PIN_OUTPUT, 1) /* (E17) I2C1_SDA.UART1_TXD */
+ AM62AX_IOPAD(0x0194, PIN_INPUT, 2) /* (C19) MCASP0_AXR3.UART1_CTSn */
+ AM62AX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (B19) MCASP0_AXR2.UART1_RTSn */
+ >;
+ };
+
+ main_i2c0_pins_default: main-i2c0-default-pins {
pinctrl-single,pins = <
AM62AX_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
AM62AX_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
>;
};
- main_i2c1_pins_default: main-i2c1-pins-default {
+ main_i2c1_pins_default: main-i2c1-default-pins {
pinctrl-single,pins = <
AM62AX_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
AM62AX_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
>;
};
- main_i2c2_pins_default: main-i2c2-pins-default {
+ main_i2c2_pins_default: main-i2c2-default-pins {
pinctrl-single,pins = <
AM62AX_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */
AM62AX_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */
>;
};
- main_mmc1_pins_default: main-mmc1-pins-default {
+ main_mmc1_pins_default: main-mmc1-default-pins {
pinctrl-single,pins = <
AM62AX_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
AM62AX_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
@@ -155,25 +230,177 @@
>;
};
- usr_led_pins_default: usr-led-pins-default {
+ usr_led_pins_default: usr-led-default-pins {
pinctrl-single,pins = <
AM62AX_IOPAD(0x244, PIN_OUTPUT, 7) /* (D18) MMC1_SDWP.GPIO1_49 */
>;
};
+
+ main_usb1_pins_default: main-usb1-default-pins {
+ pinctrl-single,pins = <
+ AM62AX_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */
+ >;
+ };
+
+ main_mdio1_pins_default: main-mdio1-default-pins {
+ pinctrl-single,pins = <
+ AM62AX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */
+ AM62AX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */
+ >;
+ };
+
+ main_rgmii1_pins_default: main-rgmii1-default-pins {
+ pinctrl-single,pins = <
+ AM62AX_IOPAD(0x14c, PIN_INPUT, 0) /* (AB16) RGMII1_RD0 */
+ AM62AX_IOPAD(0x150, PIN_INPUT, 0) /* (V15) RGMII1_RD1 */
+ AM62AX_IOPAD(0x154, PIN_INPUT, 0) /* (W15) RGMII1_RD2 */
+ AM62AX_IOPAD(0x158, PIN_INPUT, 0) /* (V14) RGMII1_RD3 */
+ AM62AX_IOPAD(0x148, PIN_INPUT, 0) /* (AA16) RGMII1_RXC */
+ AM62AX_IOPAD(0x144, PIN_INPUT, 0) /* (AA15) RGMII1_RX_CTL */
+ AM62AX_IOPAD(0x134, PIN_INPUT, 0) /* (Y17) RGMII1_TD0 */
+ AM62AX_IOPAD(0x138, PIN_INPUT, 0) /* (V16) RGMII1_TD1 */
+ AM62AX_IOPAD(0x13c, PIN_INPUT, 0) /* (Y16) RGMII1_TD2 */
+ AM62AX_IOPAD(0x140, PIN_INPUT, 0) /* (AA17) RGMII1_TD3 */
+ AM62AX_IOPAD(0x130, PIN_INPUT, 0) /* (AB17) RGMII1_TXC */
+ AM62AX_IOPAD(0x12c, PIN_INPUT, 0) /* (W16) RGMII1_TX_CTL */
+ >;
+ };
+
+ main_mcasp1_pins_default: main-mcasp1-default-pins {
+ pinctrl-single,pins = <
+ AM62AX_IOPAD(0x090, PIN_INPUT, 2) /* (L19) GPMC0_BE0n_CLE.MCASP1_ACLKX */
+ AM62AX_IOPAD(0x098, PIN_INPUT, 2) /* (R18) GPMC0_WAIT0.MCASP1_AFSX */
+ AM62AX_IOPAD(0x08c, PIN_OUTPUT, 2) /* (K19) GPMC0_WEn.MCASP1_AXR0 */
+ AM62AX_IOPAD(0x084, PIN_INPUT, 2) /* (L18) GPMC0_ADVn_ALE.MCASP1_AXR2 */
+ >;
+ };
};
+&mcu_pmx0 {
+ status = "okay";
+
+ pmic_irq_pins_default: pmic-irq-default-pins {
+ pinctrl-single,pins = <
+ AM62AX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */
+ >;
+ };
+};
+
+&mcu_gpio0 {
+ status = "okay";
+};
+
&main_i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
clock-frequency = <400000>;
+
+ typec_pd0: usb-power-controller@3f {
+ compatible = "ti,tps6598x";
+ reg = <0x3f>;
+
+ connector {
+ compatible = "usb-c-connector";
+ label = "USB-C";
+ self-powered;
+ data-role = "dual";
+ power-role = "sink";
+ port {
+ usb_con_hs: endpoint {
+ remote-endpoint = <&usb0_hs_ep>;
+ };
+ };
+ };
+ };
+
+ tps659312: pmic@48 {
+ compatible = "ti,tps6593-q1";
+ reg = <0x48>;
+ ti,primary-pmic;
+ system-power-controller;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_irq_pins_default>;
+ interrupt-parent = <&mcu_gpio0>;
+ interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
+
+ buck123-supply = <&vcc_3v3_sys>;
+ buck4-supply = <&vcc_3v3_sys>;
+ buck5-supply = <&vcc_3v3_sys>;
+ ldo1-supply = <&vcc_3v3_sys>;
+ ldo2-supply = <&vcc_3v3_sys>;
+ ldo3-supply = <&buck5>;
+ ldo4-supply = <&vcc_3v3_sys>;
+
+ regulators {
+ buck123: buck123 {
+ regulator-name = "vcc_core";
+ regulator-min-microvolt = <715000>;
+ regulator-max-microvolt = <895000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck4: buck4 {
+ regulator-name = "vcc_1v1";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5: buck5 {
+ regulator-name = "vcc_1v8_sys";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1: ldo1 {
+ regulator-name = "vddshv5_sdio";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo2: ldo2 {
+ regulator-name = "vpp_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo3: ldo3 {
+ regulator-name = "vcc_0v85";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo4: ldo4 {
+ regulator-name = "vdda_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
};
&main_i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
- clock-frequency = <400000>;
+ clock-frequency = <100000>;
exp1: gpio@22 {
compatible = "ti,tca6424";
@@ -194,6 +421,19 @@
"MCASP1_FET_SEL", "UART1_FET_SEL",
"PD_I2C_IRQ", "IO_EXP_TEST_LED";
};
+
+ tlv320aic3106: audio-codec@1b {
+ #sound-dai-cells = <0>;
+ compatible = "ti,tlv320aic3106";
+ reg = <0x1b>;
+ ai3x-micbias-vg = <1>; /* 2.0V */
+
+ /* Regulators */
+ AVDD-supply = <&vcc_3v3_sys>;
+ IOVDD-supply = <&vcc_3v3_sys>;
+ DRVDD-supply = <&vcc_3v3_sys>;
+ DVDD-supply = <&buck5>;
+ };
};
&sdhci1 {
@@ -223,3 +463,84 @@
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
};
+
+/* Main UART1 is used for TIFS firmware logs */
+&main_uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart1_pins_default>;
+ status = "reserved";
+};
+
+&usbss0 {
+ status = "okay";
+ ti,vbus-divider;
+};
+
+&usb0 {
+ usb-role-switch;
+
+ port {
+ usb0_hs_ep: endpoint {
+ remote-endpoint = <&usb_con_hs>;
+ };
+ };
+};
+
+&usbss1 {
+ status = "okay";
+};
+
+&usb1 {
+ dr_mode = "host";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_usb1_pins_default>;
+};
+
+&cpsw3g {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_rgmii1_pins_default>;
+};
+
+&cpsw_port1 {
+ status = "okay";
+ phy-mode = "rgmii-rxid";
+ phy-handle = <&cpsw3g_phy0>;
+};
+
+&cpsw_port2 {
+ status = "disabled";
+};
+
+&cpsw3g_mdio {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_mdio1_pins_default>;
+
+ cpsw3g_phy0: ethernet-phy@0 {
+ reg = <0>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+ ti,min-output-impedance;
+ };
+};
+
+&mcasp1 {
+ status = "okay";
+ #sound-dai-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_mcasp1_pins_default>;
+
+ op-mode = <0>; /* MCASP_IIS_MODE */
+ tdm-slots = <2>;
+
+ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
+ 1 0 2 0
+ 0 0 0 0
+ 0 0 0 0
+ 0 0 0 0
+ >;
+ tx-num-evt = <32>;
+ rx-num-evt = <32>;
+};
diff --git a/arch/arm/dts/k3-am62a7.dtsi b/arch/arm/dts/k3-am62a7.dtsi
index 331d89f..58f1c43 100644
--- a/arch/arm/dts/k3-am62a7.dtsi
+++ b/arch/arm/dts/k3-am62a7.dtsi
@@ -95,8 +95,9 @@
L2_0: l2-cache0 {
compatible = "cache";
+ cache-unified;
cache-level = <2>;
- cache-size = <0x40000>;
+ cache-size = <0x80000>;
cache-line-size = <64>;
cache-sets = <512>;
};
diff --git a/arch/arm/dts/k3-am62x-sk-common.dtsi b/arch/arm/dts/k3-am62x-sk-common.dtsi
index 34c8ffc..19f57ea 100644
--- a/arch/arm/dts/k3-am62x-sk-common.dtsi
+++ b/arch/arm/dts/k3-am62x-sk-common.dtsi
@@ -28,6 +28,7 @@
};
memory@80000000 {
+ bootph-pre-ram;
device_type = "memory";
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
@@ -114,11 +115,23 @@
clocks = <&tlv320_mclk>;
};
};
+
+ hdmi0: connector-hdmi {
+ compatible = "hdmi-connector";
+ label = "hdmi";
+ type = "a";
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&sii9022_out>;
+ };
+ };
+ };
};
&main_pmx0 {
/* First pad number is ALW package and second is AMC package */
main_uart0_pins_default: main-uart0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14/A13) UART0_RXD */
AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14/E11) UART0_TXD */
@@ -126,6 +139,7 @@
};
main_uart1_pins_default: main-uart1-default-pins {
+ bootph-pre-ram;
pinctrl-single,pins = <
AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19/B18) MCASP0_AXR3.UART1_CTSn */
AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19/B17) MCASP0_AXR2.UART1_RTSn */
@@ -156,6 +170,7 @@
};
main_mmc0_pins_default: main-mmc0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3/V3) MMC0_CMD */
AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1/Y1) MMC0_CLK */
@@ -171,6 +186,7 @@
};
main_mmc1_pins_default: main-mmc1-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21/C18) MMC1_CMD */
AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22/A20) MMC1_CLK */
@@ -196,6 +212,7 @@
};
main_rgmii1_pins_default: main-rgmii1-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17/W15) RGMII1_RD0 */
AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17/Y16) RGMII1_RD1 */
@@ -226,10 +243,44 @@
AM62X_IOPAD(0x084, PIN_INPUT, 2) /* (L23/K20) GPMC0_ADVN_ALE.MCASP1_AXR2 */
>;
};
+
+ main_dss0_pins_default: main-dss0-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x100, PIN_OUTPUT, 0) /* (AC25) VOUT0_VSYNC */
+ AM62X_IOPAD(0x0f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */
+ AM62X_IOPAD(0x104, PIN_OUTPUT, 0) /* (AC24) VOUT0_PCLK */
+ AM62X_IOPAD(0x0fc, PIN_OUTPUT, 0) /* (Y20) VOUT0_DE */
+ AM62X_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */
+ AM62X_IOPAD(0x0bc, PIN_OUTPUT, 0) /* (V24) VOUT0_DATA1 */
+ AM62X_IOPAD(0x0c0, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA2 */
+ AM62X_IOPAD(0x0c4, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA3 */
+ AM62X_IOPAD(0x0c8, PIN_OUTPUT, 0) /* (Y25) VOUT0_DATA4 */
+ AM62X_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (Y24) VOUT0_DATA5 */
+ AM62X_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (Y23) VOUT0_DATA6 */
+ AM62X_IOPAD(0x0d4, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA7 */
+ AM62X_IOPAD(0x0d8, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA8 */
+ AM62X_IOPAD(0x0dc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA9 */
+ AM62X_IOPAD(0x0e0, PIN_OUTPUT, 0) /* (V20) VOUT0_DATA10 */
+ AM62X_IOPAD(0x0e4, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA11 */
+ AM62X_IOPAD(0x0e8, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA12 */
+ AM62X_IOPAD(0x0ec, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA13 */
+ AM62X_IOPAD(0x0f0, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA14 */
+ AM62X_IOPAD(0x0f4, PIN_OUTPUT, 0) /* (AA21) VOUT0_DATA15 */
+ AM62X_IOPAD(0x05c, PIN_OUTPUT, 1) /* (R24) GPMC0_AD8.VOUT0_DATA16 */
+ AM62X_IOPAD(0x060, PIN_OUTPUT, 1) /* (R25) GPMC0_AD9.VOUT0_DATA17 */
+ AM62X_IOPAD(0x064, PIN_OUTPUT, 1) /* (T25) GPMC0_AD10.VOUT0_DATA18 */
+ AM62X_IOPAD(0x068, PIN_OUTPUT, 1) /* (R21) GPMC0_AD11.VOUT0_DATA19 */
+ AM62X_IOPAD(0x06c, PIN_OUTPUT, 1) /* (T22) GPMC0_AD12.VOUT0_DATA20 */
+ AM62X_IOPAD(0x070, PIN_OUTPUT, 1) /* (T24) GPMC0_AD13.VOUT0_DATA21 */
+ AM62X_IOPAD(0x074, PIN_OUTPUT, 1) /* (U25) GPMC0_AD14.VOUT0_DATA22 */
+ AM62X_IOPAD(0x078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */
+ >;
+ };
};
&mcu_pmx0 {
wkup_uart0_pins_default: wkup-uart0-default-pins {
+ bootph-pre-ram;
pinctrl-single,pins = <
AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6/A7) WKUP_UART0_CTSn */
AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4/B4) WKUP_UART0_RTSn */
@@ -241,12 +292,14 @@
&wkup_uart0 {
/* WKUP UART0 is used by DM firmware */
+ bootph-pre-ram;
status = "reserved";
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
};
&main_uart0 {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
@@ -254,6 +307,7 @@
&main_uart1 {
/* Main UART1 is used by TIFS firmware */
+ bootph-pre-ram;
status = "reserved";
pinctrl-names = "default";
pinctrl-0 = <&main_uart1_pins_default>;
@@ -300,7 +354,7 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
- clock-frequency = <400000>;
+ clock-frequency = <100000>;
tlv320aic3106: audio-codec@1b {
#sound-dai-cells = <0>;
@@ -313,9 +367,40 @@
IOVDD-supply = <&vcc_3v3_sys>;
DRVDD-supply = <&vcc_3v3_sys>;
};
+
+ sii9022: bridge-hdmi@3b {
+ compatible = "sil,sii9022";
+ reg = <0x3b>;
+ interrupt-parent = <&exp1>;
+ interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
+ #sound-dai-cells = <0>;
+ sil,i2s-data-lanes = < 0 >;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ sii9022_in: endpoint {
+ remote-endpoint = <&dpi1_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ sii9022_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+ };
+ };
+ };
};
&sdhci0 {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mmc0_pins_default>;
@@ -325,6 +410,7 @@
&sdhci1 {
/* SD/MMC */
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
@@ -333,21 +419,25 @@
};
&cpsw3g {
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&main_rgmii1_pins_default>;
};
&cpsw_port1 {
+ bootph-all;
phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy0>;
};
&cpsw3g_mdio {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mdio1_pins_default>;
cpsw3g_phy0: ethernet-phy@0 {
+ bootph-all;
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
@@ -410,3 +500,20 @@
tx-num-evt = <32>;
rx-num-evt = <32>;
};
+
+&dss {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_dss0_pins_default>;
+};
+
+&dss_ports {
+ /* VP2: DPI Output */
+ port@1 {
+ reg = <1>;
+
+ dpi1_out: endpoint {
+ remote-endpoint = <&sii9022_in>;
+ };
+ };
+};
diff --git a/arch/arm/dts/k3-am64x-binman.dtsi b/arch/arm/dts/k3-am64x-binman.dtsi
index a5e5400..88df214 100644
--- a/arch/arm/dts/k3-am64x-binman.dtsi
+++ b/arch/arm/dts/k3-am64x-binman.dtsi
@@ -118,87 +118,27 @@
#ifdef CONFIG_TARGET_AM642_A53_EVM
-#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_AM642_EVM_DTB "spl/dts/k3-am642-evm.dtb"
#define SPL_AM642_SK_DTB "spl/dts/k3-am642-sk.dtb"
-#define UBOOT_NODTB "u-boot-nodtb.bin"
#define AM642_EVM_DTB "u-boot.dtb"
#define AM642_SK_DTB "arch/arm/dts/k3-am642-sk.dtb"
&binman {
ti-spl {
- filename = "tispl.bin";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_template>;
fit {
description = "Configuration to load ATF and SPL";
#address-cells = <1>;
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- ti-secure {
- content = <&atf>;
- keyfile = "custMpk.pem";
- };
- atf: atf-bl31 {
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- ti-secure {
- content = <&tee>;
- keyfile = "custMpk.pem";
- };
- tee: tee-os {
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
blob-ext {
filename = "/dev/null";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_spl_nodtb>;
- keyfile = "custMpk.pem";
-
- };
- u_boot_spl_nodtb: blob-ext {
- filename = SPL_NODTB;
- };
- };
fdt-0 {
description = "k3-am642-evm";
@@ -254,29 +194,12 @@
&binman {
u-boot {
- filename = "u-boot.img";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM64 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_nodtb: u-boot-nodtb {
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM64 Board";
};
fdt-0 {
@@ -340,65 +263,17 @@
&binman {
ti-spl_unsigned {
- filename = "tispl.bin_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_unsigned_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- atf-bl31 {
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- tee-os {
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
blob-ext {
filename = "/dev/null";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- blob {
- filename = "spl/u-boot-spl-nodtb.bin";
- };
- };
-
fdt-0 {
description = "k3-am642-evm";
type = "flat_dt";
@@ -443,26 +318,12 @@
&binman {
u-boot_unsigned {
- filename = "u-boot.img_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_unsigned_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM64 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- blob {
- filename = UBOOT_NODTB;
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM64 Board";
};
fdt-0 {
diff --git a/arch/arm/dts/k3-am65x-binman.dtsi b/arch/arm/dts/k3-am65x-binman.dtsi
index 59605ca..8cc24da 100644
--- a/arch/arm/dts/k3-am65x-binman.dtsi
+++ b/arch/arm/dts/k3-am65x-binman.dtsi
@@ -42,77 +42,7 @@
};
itb {
filename = "sysfw-am65x_sr2-hs-evm.itb";
- fit {
- description = "SYSFW and Config fragments";
- #address-cells = <1>;
- images {
- sysfw.bin {
- description = "sysfw";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "sysfw.bin";
- };
- };
- board-cfg.bin {
- description = "board-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- ti-secure {
- content = <&board_cfg>;
- keyfile = "custMpk.pem";
- };
- board_cfg: board-cfg {
- filename = "board-cfg.bin";
- type = "blob-ext";
- };
- };
- pm-cfg.bin {
- description = "pm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- ti-secure {
- content = <&pm_cfg>;
- keyfile = "custMpk.pem";
- };
- pm_cfg: pm-cfg {
- filename = "pm-cfg.bin";
- type = "blob-ext";
- };
- };
- rm-cfg.bin {
- description = "rm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- ti-secure {
- content = <&rm_cfg>;
- keyfile = "custMpk.pem";\
- };
- rm_cfg: rm-cfg {
- filename = "rm-cfg.bin";
- type = "blob-ext";
- };
- };
- sec-cfg.bin {
- description = "sec-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- ti-secure {
- content = <&sec_cfg>;
- keyfile = "custMpk.pem";
- };
- sec_cfg: sec-cfg {
- filename = "sec-cfg.bin";
- type = "blob-ext";
- };
- };
- };
- };
+ insert-template = <&itb_template>;
};
};
@@ -149,55 +79,14 @@
itb_gp {
filename = "sysfw-am65x_sr2-gp-evm.itb";
symlink = "sysfw.itb";
+ insert-template = <&itb_unsigned_template>;
fit {
- description = "SYSFW and Config fragments";
- #address-cells = <1>;
images {
sysfw.bin {
- description = "sysfw";
- type = "firmware";
- arch = "arm";
- compression = "none";
blob-ext {
filename = "sysfw.bin_gp";
};
};
- board-cfg.bin {
- description = "board-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "board-cfg.bin";
- };
- };
- pm-cfg.bin {
- description = "pm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "pm-cfg.bin";
- };
- };
- rm-cfg.bin {
- description = "rm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "rm-cfg.bin";
- };
- };
- sec-cfg.bin {
- description = "sec-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "sec-cfg.bin";
- };
- };
};
};
};
@@ -206,86 +95,22 @@
#ifdef CONFIG_TARGET_AM654_A53_EVM
-#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_AM654_EVM_DTB "spl/dts/k3-am654-base-board.dtb"
-
-#define UBOOT_NODTB "u-boot-nodtb.bin"
#define AM654_EVM_DTB "u-boot.dtb"
&binman {
ti-spl {
- filename = "tispl.bin";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- ti-secure {
- content = <&atf>;
- keyfile = "custMpk.pem";
- };
- atf: atf-bl31 {
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- ti-secure {
- content = <&tee>;
- keyfile = "custMpk.pem";
- };
- tee: tee-os {
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
blob-ext {
filename = "/dev/null";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_spl_nodtb>;
- keyfile = "custMpk.pem";
-
- };
- u_boot_spl_nodtb: blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-am654-base-board";
type = "flat_dt";
@@ -317,29 +142,12 @@
&binman {
u-boot {
- filename = "u-boot.img";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM65 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_nodtb: u-boot-nodtb {
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM65 Board";
};
fdt-0 {
@@ -378,67 +186,16 @@
&binman {
ti-spl_unsigned {
- filename = "tispl.bin_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_unsigned_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- atf-bl31 {
- filename = "bl31.bin";
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- tee-os {
- filename = "tee-raw.bin";
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
blob-ext {
filename = "/dev/null";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-j721e-common-proc-board";
type = "flat_dt";
@@ -466,26 +223,12 @@
&binman {
u-boot_unsigned {
- filename = "u-boot.img_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_unsigned_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM65 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- blob {
- filename = UBOOT_NODTB;
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM65 Board";
};
fdt-0 {
diff --git a/arch/arm/dts/k3-am68-sk-base-board.dts b/arch/arm/dts/k3-am68-sk-base-board.dts
index 5df5946..1e1a82f 100644
--- a/arch/arm/dts/k3-am68-sk-base-board.dts
+++ b/arch/arm/dts/k3-am68-sk-base-board.dts
@@ -553,3 +553,59 @@
};
};
};
+
+&serdes_ln_ctrl {
+ idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_PCIE1_LANE1>,
+ <J721S2_SERDES0_LANE2_USB_SWAP>, <J721S2_SERDES0_LANE3_USB>;
+};
+
+&serdes_refclk {
+ clock-frequency = <100000000>;
+};
+
+&serdes0 {
+ status = "okay";
+
+ serdes0_pcie_link: phy@0 {
+ reg = <0>;
+ cdns,num-lanes = <2>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_PCIE>;
+ resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
+ };
+
+ serdes0_usb_link: phy@2 {
+ status = "okay";
+ reg = <2>;
+ cdns,num-lanes = <1>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_USB3>;
+ resets = <&serdes_wiz0 3>;
+ };
+};
+
+&pcie1_rc {
+ status = "okay";
+ reset-gpios = <&exp1 10 GPIO_ACTIVE_HIGH>;
+ phys = <&serdes0_pcie_link>;
+ phy-names = "pcie-phy";
+ num-lanes = <2>;
+};
+
+&usb_serdes_mux {
+ idle-states = <0>; /* USB0 to SERDES lane 2 */
+};
+
+&usbss0 {
+ status = "okay";
+ pinctrl-0 = <&main_usbss0_pins_default>;
+ pinctrl-names = "default";
+ ti,vbus-divider;
+};
+
+&usb0 {
+ dr_mode = "host";
+ maximum-speed = "super-speed";
+ phys = <&serdes0_usb_link>;
+ phy-names = "cdns3,usb3-phy";
+};
diff --git a/arch/arm/dts/k3-am68-sk-som.dtsi b/arch/arm/dts/k3-am68-sk-som.dtsi
index 6c9139f..20861a0 100644
--- a/arch/arm/dts/k3-am68-sk-som.dtsi
+++ b/arch/arm/dts/k3-am68-sk-som.dtsi
@@ -25,6 +25,108 @@
reg = <0x00 0x9e800000 0x00 0x01800000>;
no-map;
};
+
+ mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa0000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa0100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa5000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa5100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c71_0_dma_memory_region: c71-dma-memory@a6000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa6000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c71_0_memory_region: c71-memory@a6100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa6100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c71_1_dma_memory_region: c71-dma-memory@a7000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa7000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c71_1_memory_region: c71-memory@a7100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa7100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ rtos_ipc_memory_region: ipc-memories@a8000000 {
+ reg = <0x00 0xa8000000 0x00 0x01c00000>;
+ alignment = <0x1000>;
+ no-map;
+ };
};
};
@@ -49,3 +151,109 @@
reg = <0x51>;
};
};
+
+&mailbox0_cluster0 {
+ status = "okay";
+ interrupts = <436>;
+ mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster1 {
+ status = "okay";
+ interrupts = <432>;
+ mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster2 {
+ status = "okay";
+ interrupts = <428>;
+ mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster4 {
+ status = "okay";
+ interrupts = <420>;
+ mbox_c71_0: mbox-c71-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_c71_1: mbox-c71-1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mcu_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>;
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+};
+
+&mcu_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>;
+ memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
+ <&mcu_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>;
+ memory-region = <&main_r5fss0_core0_dma_memory_region>,
+ <&main_r5fss0_core0_memory_region>;
+};
+
+&main_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>;
+ memory-region = <&main_r5fss0_core1_dma_memory_region>,
+ <&main_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss1_core0 {
+ mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core0>;
+ memory-region = <&main_r5fss1_core0_dma_memory_region>,
+ <&main_r5fss1_core0_memory_region>;
+};
+
+&main_r5fss1_core1 {
+ mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core1>;
+ memory-region = <&main_r5fss1_core1_dma_memory_region>,
+ <&main_r5fss1_core1_memory_region>;
+};
+
+&c71_0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>;
+ memory-region = <&c71_0_dma_memory_region>,
+ <&c71_0_memory_region>;
+};
+
+&c71_1 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster4>, <&mbox_c71_1>;
+ memory-region = <&c71_1_dma_memory_region>,
+ <&c71_1_memory_region>;
+};
diff --git a/arch/arm/dts/k3-binman.dtsi b/arch/arm/dts/k3-binman.dtsi
index 2ea2dd1..c7513e1 100644
--- a/arch/arm/dts/k3-binman.dtsi
+++ b/arch/arm/dts/k3-binman.dtsi
@@ -13,14 +13,14 @@
custMpk {
filename = "custMpk.pem";
custmpk_pem: blob-ext {
- filename = "../keys/custMpk.pem";
+ filename = "arch/arm/mach-k3/keys/custMpk.pem";
};
};
ti-degenerate-key {
filename = "ti-degenerate-key.pem";
dkey_pem: blob-ext {
- filename = "../keys/ti-degenerate-key.pem";
+ filename = "arch/arm/mach-k3/keys/ti-degenerate-key.pem";
};
};
};
@@ -32,28 +32,28 @@
filename = "board-cfg.bin";
bcfg_yaml: ti-board-config {
config = "board-cfg.yaml";
- schema = "../common/schema.yaml";
+ schema = "board/ti/common/schema.yaml";
};
};
pm-cfg {
filename = "pm-cfg.bin";
pcfg_yaml: ti-board-config {
config = "pm-cfg.yaml";
- schema = "../common/schema.yaml";
+ schema = "board/ti/common/schema.yaml";
};
};
rm-cfg {
filename = "rm-cfg.bin";
rcfg_yaml: ti-board-config {
config = "rm-cfg.yaml";
- schema = "../common/schema.yaml";
+ schema = "board/ti/common/schema.yaml";
};
};
sec-cfg {
filename = "sec-cfg.bin";
scfg_yaml: ti-board-config {
config = "sec-cfg.yaml";
- schema = "../common/schema.yaml";
+ schema = "board/ti/common/schema.yaml";
};
};
combined-tifs-cfg {
@@ -61,19 +61,19 @@
ti-board-config {
bcfg_yaml_tifs: board-cfg {
config = "board-cfg.yaml";
- schema = "../common/schema.yaml";
+ schema = "board/ti/common/schema.yaml";
};
scfg_yaml_tifs: sec-cfg {
config = "sec-cfg.yaml";
- schema = "../common/schema.yaml";
+ schema = "board/ti/common/schema.yaml";
};
pcfg_yaml_tifs: pm-cfg {
config = "pm-cfg.yaml";
- schema = "../common/schema.yaml";
+ schema = "board/ti/common/schema.yaml";
};
rcfg_yaml_tifs: rm-cfg {
config = "rm-cfg.yaml";
- schema = "../common/schema.yaml";
+ schema = "board/ti/common/schema.yaml";
};
};
};
@@ -82,11 +82,11 @@
ti-board-config {
pcfg_yaml_dm: pm-cfg {
config = "pm-cfg.yaml";
- schema = "../common/schema.yaml";
+ schema = "board/ti/common/schema.yaml";
};
rcfg_yaml_dm: rm-cfg {
config = "rm-cfg.yaml";
- schema = "../common/schema.yaml";
+ schema = "board/ti/common/schema.yaml";
};
};
};
@@ -95,22 +95,349 @@
ti-board-config {
bcfg_yaml_sysfw: board-cfg {
config = "board-cfg.yaml";
- schema = "../common/schema.yaml";
+ schema = "board/ti/common/schema.yaml";
};
scfg_yaml_sysfw: sec-cfg {
config = "sec-cfg.yaml";
- schema = "../common/schema.yaml";
+ schema = "board/ti/common/schema.yaml";
};
pcfg_yaml_sysfw: pm-cfg {
config = "pm-cfg.yaml";
- schema = "../common/schema.yaml";
+ schema = "board/ti/common/schema.yaml";
};
rcfg_yaml_sysfw: rm-cfg {
config = "rm-cfg.yaml";
- schema = "../common/schema.yaml";
+ schema = "board/ti/common/schema.yaml";
};
};
};
};
+&binman {
+ itb_template: template-5 {
+ fit {
+ description = "SYSFW and Config fragments";
+ #address-cells = <1>;
+ images {
+ sysfw.bin {
+ description = "sysfw";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sysfw.bin";
+ };
+ };
+ board-cfg.bin {
+ description = "board-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&board_cfg>;
+ keyfile = "custMpk.pem";
+ };
+ board_cfg: board-cfg {
+ filename = "board-cfg.bin";
+ type = "blob-ext";
+ };
+
+ };
+ pm-cfg.bin {
+ description = "pm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&pm_cfg>;
+ keyfile = "custMpk.pem";
+ };
+ pm_cfg: pm-cfg {
+ filename = "pm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ rm-cfg.bin {
+ description = "rm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&rm_cfg>;
+ keyfile = "custMpk.pem";
+ };
+ rm_cfg: rm-cfg {
+ filename = "rm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ sec-cfg.bin {
+ description = "sec-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&sec_cfg>;
+ keyfile = "custMpk.pem";
+ };
+ sec_cfg: sec-cfg {
+ filename = "sec-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ };
+ };
+ };
+
+ itb_unsigned_template: template-6 {
+ fit {
+ description = "SYSFW and Config fragments";
+ #address-cells = <1>;
+ images {
+ sysfw.bin {
+ description = "sysfw";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sysfw.bin_fs";
+ };
+ };
+ board-cfg.bin {
+ description = "board-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ board-cfg {
+ filename = "board-cfg.bin";
+ type = "blob-ext";
+ };
+
+ };
+ pm-cfg.bin {
+ description = "pm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ pm-cfg {
+ filename = "pm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ rm-cfg.bin {
+ description = "rm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ rm-cfg {
+ filename = "rm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ sec-cfg.bin {
+ description = "sec-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ sec-cfg {
+ filename = "sec-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ };
+ };
+ };
+};
+
+#else
+
+&binman {
+ ti_spl_template: template-1 {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ ti-secure {
+ content = <&atf>;
+ keyfile = "custMpk.pem";
+ };
+ atf: atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OP-TEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ ti-secure {
+ content = <&tee>;
+ keyfile = "custMpk.pem";
+ };
+ tee: tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_spl_nodtb>;
+ keyfile = "custMpk.pem";
+
+ };
+ u_boot_spl_nodtb: blob-ext {
+ filename = "spl/u-boot-spl-nodtb.bin";
+ };
+ };
+
+ };
+ };
+ };
+ ti_spl_unsigned_template: template-2 {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OP-TEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-raw.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob-ext {
+ filename = "spl/u-boot-spl-nodtb.bin";
+ };
+ };
+ };
+ };
+ };
+ u_boot_template: template-3 {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_nodtb>;
+ keyfile = "custMpk.pem";
+ };
+ u_boot_nodtb: u-boot-nodtb {
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+ };
+ };
+ u_boot_unsigned_template: template-4 {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = "u-boot-nodtb.bin";
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+ };
+ };
+
+};
+
#endif
diff --git a/arch/arm/dts/k3-j7200-binman.dtsi b/arch/arm/dts/k3-j7200-binman.dtsi
index 14f7dea..10c9d6c 100644
--- a/arch/arm/dts/k3-j7200-binman.dtsi
+++ b/arch/arm/dts/k3-j7200-binman.dtsi
@@ -180,10 +180,7 @@
#ifdef CONFIG_TARGET_J7200_A72_EVM
-#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_J7200_EVM_DTB "spl/dts/k3-j7200-common-proc-board.dtb"
-
-#define UBOOT_NODTB "u-boot-nodtb.bin"
#define J7200_EVM_DTB "u-boot.dtb"
&binman {
@@ -194,82 +191,20 @@
};
};
ti-spl {
- filename = "tispl.bin";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- ti-secure {
- content = <&atf>;
- keyfile = "custMpk.pem";
- };
- atf: atf-bl31 {
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- ti-secure {
- content = <&tee>;
- keyfile = "custMpk.pem";
- };
- tee: tee-os {
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
ti-secure {
content = <&dm>;
keyfile = "custMpk.pem";
};
-
dm: blob-ext {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_spl_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_spl_nodtb: blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-j7200-common-proc-board";
type = "flat_dt";
@@ -302,29 +237,12 @@
&binman {
u-boot {
- filename = "u-boot.img";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for J7200 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_nodtb: u-boot-nodtb {
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for J7200 Board";
};
fdt-0 {
@@ -362,67 +280,16 @@
&binman {
ti-spl_unsigned {
- filename = "tispl.bin_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_unsigned_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- atf-bl31 {
- filename = "bl31.bin";
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- tee-os {
- filename = "tee-raw.bin";
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
blob-ext {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- blob {
- filename = SPL_NODTB;
- };
- };
-
fdt-1 {
description = "k3-j7200-common-proc-board";
type = "flat_dt";
@@ -450,26 +317,12 @@
&binman {
u-boot_unsigned {
- filename = "u-boot.img_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_unsigned_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for J7200 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- blob {
- filename = UBOOT_NODTB;
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for J7200 Board";
};
fdt-1 {
diff --git a/arch/arm/dts/k3-j7200-main.dtsi b/arch/arm/dts/k3-j7200-main.dtsi
index cdb1d6b..264913f 100644
--- a/arch/arm/dts/k3-j7200-main.dtsi
+++ b/arch/arm/dts/k3-j7200-main.dtsi
@@ -91,7 +91,7 @@
};
main_navss: bus@30000000 {
- compatible = "simple-mfd";
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>;
diff --git a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
index 6ffaf85..3fc588b 100644
--- a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
@@ -318,7 +318,7 @@
};
mcu_navss: bus@28380000 {
- compatible = "simple-mfd";
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>;
@@ -637,4 +637,11 @@
power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
#thermal-sensor-cells = <1>;
};
+
+ mcu_esm: esm@40800000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x40800000 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
};
diff --git a/arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi b/arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi
new file mode 100644
index 0000000..f83caf7
--- /dev/null
+++ b/arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi
@@ -0,0 +1,358 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * https://beagleboard.org/ai-64
+ *
+ * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2022 Jason Kridner, BeagleBoard.org Foundation
+ * Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation
+ */
+
+#include "k3-binman.dtsi"
+
+/ {
+ memory@80000000 {
+ bootph-all;
+ };
+
+ /* Keep the LEDs on by default to indicate life */
+ leds {
+ bootph-all;
+ led-0 {
+ default-state = "on";
+ bootph-all;
+ };
+
+ led-1 {
+ default-state = "on";
+ bootph-all;
+ };
+
+ led-2 {
+ default-state = "on";
+ bootph-all;
+ };
+
+ led-3 {
+ default-state = "on";
+ bootph-all;
+ };
+
+ led-4 {
+ default-state = "on";
+ bootph-all;
+ };
+ };
+};
+
+&cbass_main {
+ bootph-all;
+};
+
+&main_navss {
+ bootph-all;
+};
+
+&cbass_mcu_wakeup {
+ bootph-all;
+
+ chipid@43000014 {
+ bootph-all;
+ };
+};
+
+&mcu_navss {
+ bootph-all;
+};
+
+&mcu_ringacc {
+ reg = <0x0 0x2b800000 0x0 0x400000>,
+ <0x0 0x2b000000 0x0 0x400000>,
+ <0x0 0x28590000 0x0 0x100>,
+ <0x0 0x2a500000 0x0 0x40000>,
+ <0x0 0x28440000 0x0 0x40000>;
+ reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
+ bootph-all;
+};
+
+&mcu_udmap {
+ reg = <0x0 0x285c0000 0x0 0x100>,
+ <0x0 0x284c0000 0x0 0x4000>,
+ <0x0 0x2a800000 0x0 0x40000>,
+ <0x0 0x284a0000 0x0 0x4000>,
+ <0x0 0x2aa00000 0x0 0x40000>,
+ <0x0 0x28400000 0x0 0x2000>;
+ reg-names = "gcfg", "rchan", "rchanrt", "tchan",
+ "tchanrt", "rflow";
+ bootph-all;
+};
+
+&secure_proxy_main {
+ bootph-all;
+};
+
+&dmsc {
+ bootph-all;
+ k3_sysreset: sysreset-controller {
+ compatible = "ti,sci-sysreset";
+ bootph-all;
+ };
+};
+
+&k3_pds {
+ bootph-all;
+};
+
+&k3_clks {
+ bootph-all;
+};
+
+&k3_reset {
+ bootph-all;
+};
+
+&wkup_pmx0 {
+ bootph-all;
+};
+
+&main_pmx0 {
+ bootph-all;
+};
+
+&main_uart0 {
+ bootph-all;
+};
+
+&main_gpio0 {
+ bootph-all;
+};
+
+&main_uart0_pins_default {
+ bootph-all;
+};
+
+&main_sdhci0 {
+ bootph-all;
+};
+
+&main_sdhci1 {
+ bootph-all;
+ sdhci-caps-mask = <0x00000007 0x00000000>;
+ /delete-property/ cd-gpios;
+ /delete-property/ cd-debounce-delay-ms;
+ /delete-property/ ti,fails-without-test-cd;
+ /delete-property/ no-1-8-v;
+};
+
+&main_mmc1_pins_default {
+ bootph-all;
+};
+
+&mcu_cpsw {
+ bootph-all;
+};
+
+&davinci_mdio {
+ bootph-all;
+};
+
+&phy0 {
+ bootph-all;
+};
+
+&serdes2 {
+ bootph-all;
+};
+
+&serdes_ln_ctrl {
+ bootph-all;
+};
+
+&serdes2_usb_link {
+ bootph-all;
+};
+
+&usb_serdes_mux {
+ bootph-all;
+};
+
+&serdes_wiz2 {
+ bootph-all;
+};
+
+&main_usbss1_pins_default {
+ bootph-all;
+};
+
+&mcu_usbss1_pins_default {
+ bootph-all;
+};
+
+&usbss1 {
+ bootph-all;
+};
+
+&usb1 {
+ bootph-all;
+};
+
+&wkup_i2c0_pins_default {
+ bootph-all;
+};
+
+&wkup_i2c0 {
+ bootph-all;
+};
+
+#ifdef CONFIG_TARGET_J721E_A72_BEAGLEBONEAI64
+
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
+#define SPL_J721E_BBAI64_DTB "spl/dts/k3-j721e-beagleboneai64.dtb"
+
+#define UBOOT_NODTB "u-boot-nodtb.bin"
+#define J721E_BBAI64_DTB "arch/arm/dts/k3-j721e-beagleboneai64.dtb"
+
+&binman {
+ ti-dm {
+ filename = "ti-dm.bin";
+ blob-ext {
+ filename = "ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f";
+ };
+ };
+
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OP-TEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-raw.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob-ext {
+ filename = SPL_NODTB;
+ };
+ };
+
+ fdt-0 {
+ description = "k3-j721e-beagleboneai64";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_J721E_BBAI64_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-j721e-beagleboneai64";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for j721e board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-j721e-beagleboneai64";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = J721E_BBAI64_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-j721e-beagleboneai64";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/arch/arm/dts/k3-j721e-beagleboneai64.dts b/arch/arm/dts/k3-j721e-beagleboneai64.dts
new file mode 100644
index 0000000..2f95472
--- /dev/null
+++ b/arch/arm/dts/k3-j721e-beagleboneai64.dts
@@ -0,0 +1,993 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * https://beagleboard.org/ai-64
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2022 Jason Kridner, BeagleBoard.org Foundation
+ * Copyright (C) 2022 Robert Nelson, BeagleBoard.org Foundation
+ */
+
+/dts-v1/;
+
+#include "k3-j721e.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/net/ti-dp83867.h>
+#include <dt-bindings/phy/phy-cadence.h>
+
+/ {
+ compatible = "beagle,j721e-beagleboneai64", "ti,j721e";
+ model = "BeagleBoard.org BeagleBone AI-64";
+
+ aliases {
+ serial0 = &wkup_uart0;
+ serial2 = &main_uart0;
+ mmc0 = &main_sdhci0;
+ mmc1 = &main_sdhci1;
+ i2c0 = &wkup_i2c0;
+ i2c1 = &main_i2c6;
+ i2c2 = &main_i2c2;
+ i2c3 = &main_i2c4;
+ };
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ /* 4G RAM */
+ reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
+ <0x00000008 0x80000000 0x00000000 0x80000000>;
+ };
+
+ reserved_memory: reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ secure_ddr: optee@9e800000 {
+ reg = <0x00 0x9e800000 0x00 0x01800000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa0000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa0100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa5000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa5100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c66_1_dma_memory_region: c66-dma-memory@a6000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa6000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c66_0_memory_region: c66-memory@a6100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa6100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c66_0_dma_memory_region: c66-dma-memory@a7000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa7000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c66_1_memory_region: c66-memory@a7100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa7100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c71_0_dma_memory_region: c71-dma-memory@a8000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa8000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c71_0_memory_region: c71-memory@a8100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa8100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ rtos_ipc_memory_region: ipc-memories@aa000000 {
+ reg = <0x00 0xaa000000 0x00 0x01c00000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+ };
+
+ gpio_keys: gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sw_pwr_pins_default>;
+
+ button-1 {
+ label = "BOOT";
+ linux,code = <BTN_0>;
+ gpios = <&wkup_gpio0 0 GPIO_ACTIVE_LOW>;
+ };
+
+ button-2 {
+ label = "POWER";
+ linux,code = <KEY_POWER>;
+ gpios = <&wkup_gpio0 4 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pins_default>;
+
+ led-0 {
+ gpios = <&main_gpio0 96 GPIO_ACTIVE_HIGH>;
+ function = LED_FUNCTION_HEARTBEAT;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led-1 {
+ gpios = <&main_gpio0 95 GPIO_ACTIVE_HIGH>;
+ function = LED_FUNCTION_DISK_ACTIVITY;
+ linux,default-trigger = "mmc0";
+ };
+
+ led-2 {
+ gpios = <&main_gpio0 97 GPIO_ACTIVE_HIGH>;
+ function = LED_FUNCTION_CPU;
+ linux,default-trigger = "cpu";
+ };
+
+ led-3 {
+ gpios = <&main_gpio0 110 GPIO_ACTIVE_HIGH>;
+ function = LED_FUNCTION_DISK_ACTIVITY;
+ linux,default-trigger = "mmc1";
+ };
+
+ led-4 {
+ gpios = <&main_gpio0 109 GPIO_ACTIVE_HIGH>;
+ function = LED_FUNCTION_WLAN;
+ default-state = "off";
+ };
+ };
+
+ evm_12v0: regulator-0 {
+ /* main supply */
+ compatible = "regulator-fixed";
+ regulator-name = "evm_12v0";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vsys_3v3: regulator-1 {
+ /* Output of LMS140 */
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&evm_12v0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vsys_5v0: regulator-2 {
+ /* Output of LM5140 */
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&evm_12v0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vdd_mmc1: regulator-3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd_pwr_en_pins_default>;
+ regulator-name = "vdd_mmc1";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ enable-active-high;
+ vin-supply = <&vsys_3v3>;
+ gpio = <&main_gpio0 82 GPIO_ACTIVE_HIGH>;
+ };
+
+ vdd_sd_dv_alt: regulator-4 {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&vdd_sd_dv_alt_pins_default>;
+ regulator-name = "tlv71033";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ vin-supply = <&vsys_5v0>;
+ gpios = <&main_gpio0 117 GPIO_ACTIVE_HIGH>;
+ states = <1800000 0x0>,
+ <3300000 0x1>;
+ };
+
+ dp_pwr_3v3: regulator-5 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&dp0_3v3_en_pins_default>;
+ regulator-name = "dp-pwr";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&main_gpio0 49 GPIO_ACTIVE_HIGH>; /* DP0_PWR_SW_EN */
+ enable-active-high;
+ };
+
+ dp0: connector {
+ compatible = "dp-connector";
+ label = "DP0";
+ type = "full-size";
+ dp-pwr-supply = <&dp_pwr_3v3>;
+
+ port {
+ dp_connector_in: endpoint {
+ remote-endpoint = <&dp0_out>;
+ };
+ };
+ };
+};
+
+&main_pmx0 {
+ led_pins_default: led-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x184, PIN_INPUT, 7) /* (T23) RGMII5_RD0.GPIO0_96 */
+ J721E_IOPAD(0x180, PIN_INPUT, 7) /* (R23) RGMII5_RD1.GPIO0_95 */
+ J721E_IOPAD(0x188, PIN_INPUT, 7) /* (Y28) RGMII6_TX_CTL.GPIO0_97 */
+ J721E_IOPAD(0x1bc, PIN_INPUT, 7) /* (V24) MDIO0_MDC.GPIO0_110 */
+ J721E_IOPAD(0x1b8, PIN_INPUT, 7) /* (V26) MDIO0_MDIO.GPIO0_109 */
+ >;
+ };
+
+ main_mmc1_pins_default: main-mmc1-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */
+ J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */
+ J721E_IOPAD(0x2ac, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
+ J721E_IOPAD(0x24c, PIN_INPUT, 0) /* (R24) MMC1_DAT0 */
+ J721E_IOPAD(0x248, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
+ J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */
+ J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */
+ J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */
+ >;
+ };
+
+ main_uart0_pins_default: main-uart0-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x1e8, PIN_INPUT, 0) /* (AB2) UART0_RXD */
+ J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */
+ >;
+ };
+
+ sd_pwr_en_pins_default: sd-pwr-en-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x14c, PIN_INPUT, 7) /* (AA29) PRG0_PRU1_GPO19.GPIO0_82 */
+ >;
+ };
+
+ vdd_sd_dv_alt_pins_default: vdd-sd-dv-alt-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x1d8, PIN_INPUT, 7) /* (W4) SPI1_CS1.GPIO0_117 */
+ >;
+ };
+
+ main_usbss0_pins_default: main-usbss0-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 - USBC_DIR */
+ >;
+ };
+
+ main_usbss1_pins_default: main-usbss1-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x290, INPUT_DISABLE, 1) /* (U6) USB0_DRVVBUS.USB1_DRVVBUS */
+ >;
+ };
+
+ dp0_3v3_en_pins_default:dp0-3v3-en-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xc8, PIN_INPUT, 7) /* (AE26) PRG0_PRU0_GPO6.GPIO0_49 */
+ >;
+ };
+
+ dp0_pins_default: dp0-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x1c4, PIN_INPUT, 5) /* (Y4) SPI0_CS1.DP0_HPD */
+ >;
+ };
+
+ main_i2c0_pins_default: main-i2c0-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */
+ J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */
+ >;
+ };
+
+ main_i2c1_pins_default: main-i2c1-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x228, PIN_INPUT_PULLUP, 0) /* (Y6) I2C1_SCL */
+ J721E_IOPAD(0x22c, PIN_INPUT_PULLUP, 0) /* (AA6) I2C1_SDA */
+ >;
+ };
+
+ main_i2c2_pins_default: main-i2c2-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x208, PIN_INPUT_PULLUP, 4) /* (W5) MCAN0_RX.I2C2_SCL */
+ J721E_IOPAD(0x20c, PIN_INPUT_PULLUP, 4) /* (W6) MCAN0_TX.I2C2_SDA */
+ J721E_IOPAD(0x138, PIN_INPUT, 7) /* (AE25) PRG0_PRU1_GPO14.GPIO0_77 */
+ J721E_IOPAD(0x13c, PIN_INPUT, 7) /* (AF29) PRG0_PRU1_GPO15.GPIO0_78 */
+ >;
+ };
+
+ main_i2c3_pins_default: main-i2c3-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x270, PIN_INPUT_PULLUP, 4) /* (T26) MMC2_CLK.I2C3_SCL */
+ J721E_IOPAD(0x274, PIN_INPUT_PULLUP, 4) /* (T25) MMC2_CMD.I2C3_SDA */
+ >;
+ };
+
+ main_i2c4_pins_default: main-i2c4-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x1e0, PIN_INPUT_PULLUP, 2) /* (Y5) SPI1_D0.I2C4_SCL */
+ J721E_IOPAD(0x1dc, PIN_INPUT_PULLUP, 2) /* (Y1) SPI1_CLK.I2C4_SDA */
+ J721E_IOPAD(0x30, PIN_INPUT, 7) /* (AF24) PRG1_PRU0_GPO11.GPIO0_12 */
+ J721E_IOPAD(0x34, PIN_INPUT, 7) /* (AJ24) PRG1_PRU0_GPO12.GPIO0_13 */
+ >;
+ };
+
+ main_i2c5_pins_default: main-i2c5-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x150, PIN_INPUT_PULLUP, 2) /* (Y26) PRG0_MDIO0_MDIO.I2C5_SCL */
+ J721E_IOPAD(0x154, PIN_INPUT_PULLUP, 2) /* (AA27) PRG0_MDIO0_MDC.I2C5_SDA */
+ >;
+ };
+
+ main_i2c6_pins_default: main-i2c6-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x1d0, PIN_INPUT_PULLUP, 2) /* (AA3) SPI0_D1.I2C6_SCL */
+ J721E_IOPAD(0x1e4, PIN_INPUT_PULLUP, 2) /* (Y2) SPI1_D1.I2C6_SDA */
+ J721E_IOPAD(0x74, PIN_INPUT, 7) /* (AC21) PRG1_PRU1_GPO7.GPIO0_28 */
+ J721E_IOPAD(0xa4, PIN_INPUT, 7) /* (AH22) PRG1_PRU1_GPO19.GPIO0_40 */
+ >;
+ };
+
+ csi0_gpio_pins_default: csi0-gpio-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x19c, PIN_INPUT_PULLDOWN, 7) /* (W27) RGMII6_TD0.GPIO0_102 */
+ J721E_IOPAD(0x1a0, PIN_INPUT_PULLDOWN, 7) /* (W29) RGMII6_TXC.GPIO0_103 */
+ >;
+ };
+
+ csi1_gpio_pins_default: csi1-gpio-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x198, PIN_INPUT_PULLDOWN, 7) /* (V25) RGMII6_TD1.GPIO0_101 */
+ J721E_IOPAD(0x1b0, PIN_INPUT_PULLDOWN, 7) /* (W24) RGMII6_RD1.GPIO0_107 */
+ >;
+ };
+
+ pcie1_rst_pins_default: pcie1-rst-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x5c, PIN_INPUT, 7) /* (AG23) PRG1_PRU1_GPO1.GPIO0_22 */
+ >;
+ };
+};
+
+&wkup_pmx0 {
+ eeprom_wp_pins_default: eeprom-wp-default-pins {
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0xc4, PIN_OUTPUT_PULLUP, 7) /* (G24) WKUP_GPIO0_5 */
+ >;
+ };
+
+ mcu_adc0_pins_default: mcu-adc0-default-pins {
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0x130, PIN_INPUT, 0) /* (K25) MCU_ADC0_AIN0 */
+ J721E_WKUP_IOPAD(0x134, PIN_INPUT, 0) /* (K26) MCU_ADC0_AIN1 */
+ J721E_WKUP_IOPAD(0x138, PIN_INPUT, 0) /* (K28) MCU_ADC0_AIN2 */
+ J721E_WKUP_IOPAD(0x13c, PIN_INPUT, 0) /* (L28) MCU_ADC0_AIN3 */
+ J721E_WKUP_IOPAD(0x140, PIN_INPUT, 0) /* (K24) MCU_ADC0_AIN4 */
+ J721E_WKUP_IOPAD(0x144, PIN_INPUT, 0) /* (K27) MCU_ADC0_AIN5 */
+ J721E_WKUP_IOPAD(0x148, PIN_INPUT, 0) /* (K29) MCU_ADC0_AIN6 */
+ >;
+ };
+
+ mcu_adc1_pins_default: mcu-adc1-default-pins {
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0x150, PIN_INPUT, 0) /* (N23) MCU_ADC1_AIN0 */
+ >;
+ };
+
+ mikro_bus_pins_default: mikro-bus-default-pins {
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0x108, PIN_INPUT, 7) /* SDAPULLEN (E26) PMIC_POWER_EN0.WKUP_GPIO0_66 */
+ J721E_WKUP_IOPAD(0xd4, PIN_INPUT, 7) /* SDA (G26) WKUP_GPIO0_9.MCU_I2C1_SDA */
+ J721E_WKUP_IOPAD(0xf4, PIN_INPUT, 7) /* SDA (D25) MCU_I3C0_SDA.WKUP_GPIO0_61 */
+ J721E_WKUP_IOPAD(0xd0, PIN_INPUT, 7) /* SCL (G27) WKUP_GPIO0_8.MCU_I2C1_SCL */
+ J721E_WKUP_IOPAD(0xf0, PIN_INPUT, 7) /* SCL (D26) MCU_I3C0_SCL.WKUP_GPIO0_60 */
+
+ J721E_WKUP_IOPAD(0xb8, PIN_INPUT, 7) /* MOSI (F28) WKUP_GPIO0_2.MCU_SPI1_D1 */
+ J721E_WKUP_IOPAD(0xb4, PIN_INPUT, 7) /* MISO (F25) WKUP_GPIO0_1.MCU_SPI1_D0 */
+ J721E_WKUP_IOPAD(0xb0, PIN_INPUT, 7) /* CLK (F26) WKUP_GPIO0_0.MCU_SPI1_CLK */
+ J721E_WKUP_IOPAD(0xbc, PIN_INPUT, 7) /* CS (F27) WKUP_GPIO0_3.MCU_SPI1_CS0 */
+
+ J721E_WKUP_IOPAD(0x44, PIN_INPUT, 7) /* RX (G22) MCU_OSPI1_D1.WKUP_GPIO0_33 */
+ J721E_WKUP_IOPAD(0x48, PIN_INPUT, 7) /* TX (D23) MCU_OSPI1_D2.WKUP_GPIO0_34 */
+
+ J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 7) /* INT (C23) MCU_OSPI1_D3.WKUP_GPIO0_35 */
+ J721E_WKUP_IOPAD(0x54, PIN_INPUT, 7) /* RST (E22) MCU_OSPI1_CSn1.WKUP_GPIO0_37 */
+ J721E_WKUP_IOPAD(0xdc, PIN_INPUT, 7) /* PWM (H27) WKUP_GPIO0_11 */
+ J721E_WKUP_IOPAD(0xac, PIN_INPUT, 7) /* AN (C29) MCU_MCAN0_RX.WKUP_GPIO0_59 */
+ >;
+ };
+
+ mcu_cpsw_pins_default: mcu-cpsw-default-pins {
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0x84, PIN_INPUT, 0) /* (B24) MCU_RGMII1_RD0 */
+ J721E_WKUP_IOPAD(0x80, PIN_INPUT, 0) /* (A24) MCU_RGMII1_RD1 */
+ J721E_WKUP_IOPAD(0x7c, PIN_INPUT, 0) /* (D24) MCU_RGMII1_RD2 */
+ J721E_WKUP_IOPAD(0x78, PIN_INPUT, 0) /* (A25) MCU_RGMII1_RD3 */
+ J721E_WKUP_IOPAD(0x74, PIN_INPUT, 0) /* (C24) MCU_RGMII1_RXC */
+ J721E_WKUP_IOPAD(0x5c, PIN_INPUT, 0) /* (C25) MCU_RGMII1_RX_CTL */
+ J721E_WKUP_IOPAD(0x6c, PIN_OUTPUT, 0) /* (B25) MCU_RGMII1_TD0 */
+ J721E_WKUP_IOPAD(0x68, PIN_OUTPUT, 0) /* (A26) MCU_RGMII1_TD1 */
+ J721E_WKUP_IOPAD(0x64, PIN_OUTPUT, 0) /* (A27) MCU_RGMII1_TD2 */
+ J721E_WKUP_IOPAD(0x60, PIN_OUTPUT, 0) /* (A28) MCU_RGMII1_TD3 */
+ J721E_WKUP_IOPAD(0x70, PIN_OUTPUT, 0) /* (B26) MCU_RGMII1_TXC */
+ J721E_WKUP_IOPAD(0x58, PIN_OUTPUT, 0) /* (B27) MCU_RGMII1_TX_CTL */
+ >;
+ };
+
+ mcu_mdio_pins_default: mcu-mdio1-default-pins {
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0x8c, PIN_OUTPUT, 0) /* (F23) MCU_MDIO0_MDC */
+ J721E_WKUP_IOPAD(0x88, PIN_INPUT, 0) /* (E23) MCU_MDIO0_MDIO */
+ >;
+ };
+
+ sw_pwr_pins_default: sw-pwr-default-pins {
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0xc0, PIN_INPUT, 7) /* (G25) WKUP_GPIO0_4 */
+ >;
+ };
+
+ wkup_i2c0_pins_default: wkup-i2c0-default-pins {
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */
+ J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
+ >;
+ };
+
+ wkup_uart0_pins_default: wkup-uart0-default-pins {
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */
+ J721E_WKUP_IOPAD(0xa4, PIN_OUTPUT, 0) /* (J28) WKUP_UART0_TXD */
+ >;
+ };
+
+ mcu_usbss1_pins_default: mcu-usbss1-default-pins {
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0x3c, PIN_OUTPUT_PULLUP, 5) /* (A23) MCU_OSPI1_LBCLKO.WKUP_GPIO0_30 */
+ >;
+ };
+};
+
+&wkup_uart0 {
+ /* Wakeup UART is used by TIFS firmware. */
+ status = "reserved";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wkup_uart0_pins_default>;
+};
+
+&main_uart0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart0_pins_default>;
+ /* Shared with ATF on this platform */
+ power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
+};
+
+&main_sdhci0 {
+ /* eMMC */
+ status = "okay";
+ non-removable;
+ ti,driver-strength-ohm = <50>;
+ disable-wp;
+};
+
+&main_sdhci1 {
+ /* SD Card */
+ status = "okay";
+ vmmc-supply = <&vdd_mmc1>;
+ vqmmc-supply = <&vdd_sd_dv_alt>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_mmc1_pins_default>;
+ ti,driver-strength-ohm = <50>;
+ disable-wp;
+};
+
+&main_i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c0_pins_default>;
+ clock-frequency = <400000>;
+};
+
+&main_i2c1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c1_pins_default>;
+ clock-frequency = <400000>;
+};
+
+&main_i2c2 {
+ /* BBB Header: P9.19 and P9.20 */
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c2_pins_default>;
+ clock-frequency = <100000>;
+};
+
+&main_i2c3 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c3_pins_default>;
+ clock-frequency = <400000>;
+};
+
+&main_i2c4 {
+ /* BBB Header: P9.24 and P9.26 */
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c4_pins_default>;
+ clock-frequency = <100000>;
+};
+
+&main_i2c5 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c5_pins_default>;
+ clock-frequency = <400000>;
+};
+
+&main_i2c6 {
+ /* BBB Header: P9.17 and P9.18 */
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c6_pins_default>;
+ clock-frequency = <100000>;
+ status = "okay";
+};
+
+&wkup_i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wkup_i2c0_pins_default>;
+ clock-frequency = <400000>;
+
+ eeprom@50 {
+ compatible = "atmel,24c04";
+ reg = <0x50>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&eeprom_wp_pins_default>;
+ };
+};
+
+&wkup_gpio0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_adc0_pins_default>, <&mcu_adc1_pins_default>,
+ <&mikro_bus_pins_default>;
+};
+
+&main_gpio0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&csi1_gpio_pins_default>, <&csi0_gpio_pins_default>;
+};
+
+&main_gpio1 {
+ status = "okay";
+};
+
+&usb_serdes_mux {
+ idle-states = <1>, <1>; /* USB0 to SERDES3, USB1 to SERDES2 */
+};
+
+&serdes_ln_ctrl {
+ idle-states = <J721E_SERDES0_LANE0_IP4_UNUSED>, <J721E_SERDES0_LANE1_IP4_UNUSED>,
+ <J721E_SERDES1_LANE0_PCIE1_LANE0>, <J721E_SERDES1_LANE1_PCIE1_LANE1>,
+ <J721E_SERDES2_LANE0_IP1_UNUSED>, <J721E_SERDES2_LANE1_USB3_1>,
+ <J721E_SERDES3_LANE0_USB3_0_SWAP>, <J721E_SERDES3_LANE1_USB3_0>,
+ <J721E_SERDES4_LANE0_EDP_LANE0>, <J721E_SERDES4_LANE1_EDP_LANE1>,
+ <J721E_SERDES4_LANE2_EDP_LANE2>, <J721E_SERDES4_LANE3_EDP_LANE3>;
+};
+
+&serdes_wiz3 {
+ typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_LOW>;
+ typec-dir-debounce-ms = <700>; /* TUSB321, tCCB_DEFAULT 133 ms */
+};
+
+&serdes3 {
+ serdes3_usb_link: phy@0 {
+ reg = <0>;
+ cdns,num-lanes = <2>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_USB3>;
+ resets = <&serdes_wiz3 1>, <&serdes_wiz3 2>;
+ };
+};
+
+&serdes4 {
+ torrent_phy_dp: phy@0 {
+ reg = <0>;
+ resets = <&serdes_wiz4 1>;
+ cdns,phy-type = <PHY_TYPE_DP>;
+ cdns,num-lanes = <4>;
+ cdns,max-bit-rate = <5400>;
+ #phy-cells = <0>;
+ };
+};
+
+&mhdp {
+ phys = <&torrent_phy_dp>;
+ phy-names = "dpphy";
+ pinctrl-names = "default";
+ pinctrl-0 = <&dp0_pins_default>;
+};
+
+&usbss0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_usbss0_pins_default>;
+ ti,vbus-divider;
+};
+
+&usb0 {
+ dr_mode = "peripheral";
+ maximum-speed = "super-speed";
+ phys = <&serdes3_usb_link>;
+ phy-names = "cdns3,usb3-phy";
+};
+
+&serdes2 {
+ serdes2_usb_link: phy@1 {
+ reg = <1>;
+ cdns,num-lanes = <1>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_USB3>;
+ resets = <&serdes_wiz2 2>;
+ };
+};
+
+&usbss1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_usbss1_pins_default>, <&mcu_usbss1_pins_default>;
+ ti,vbus-divider;
+};
+
+&usb1 {
+ dr_mode = "host";
+ maximum-speed = "super-speed";
+ phys = <&serdes2_usb_link>;
+ phy-names = "cdns3,usb3-phy";
+};
+
+&tscadc0 {
+ status = "okay";
+ /* BBB Header: P9.39, P9.40, P9.37, P9.38, P9.33, P9.36, P9.35 */
+ adc {
+ ti,adc-channels = <0 1 2 3 4 5 6>;
+ };
+};
+
+&tscadc1 {
+ status = "okay";
+ /* MCU mikroBUS Header J10.1 - MCU_ADC1_AIN0 */
+ adc {
+ ti,adc-channels = <0>;
+ };
+};
+
+&mcu_cpsw {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_cpsw_pins_default>;
+};
+
+&davinci_mdio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_mdio_pins_default>;
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+ };
+};
+
+&cpsw_port1 {
+ phy-mode = "rgmii-rxid";
+ phy-handle = <&phy0>;
+};
+
+&dss {
+ /*
+ * These clock assignments are chosen to enable the following outputs:
+ *
+ * VP0 - DisplayPort SST
+ * VP1 - DPI0
+ * VP2 - DSI
+ * VP3 - DPI1
+ */
+
+ assigned-clocks = <&k3_clks 152 1>, /* VP 1 pixel clock */
+ <&k3_clks 152 4>, /* VP 2 pixel clock */
+ <&k3_clks 152 9>, /* VP 3 pixel clock */
+ <&k3_clks 152 13>; /* VP 4 pixel clock */
+ assigned-clock-parents = <&k3_clks 152 2>, /* PLL16_HSDIV0 */
+ <&k3_clks 152 6>, /* PLL19_HSDIV0 */
+ <&k3_clks 152 11>, /* PLL18_HSDIV0 */
+ <&k3_clks 152 18>; /* PLL23_HSDIV0 */
+};
+
+&dss_ports {
+ port {
+ dpi0_out: endpoint {
+ remote-endpoint = <&dp0_in>;
+ };
+ };
+};
+
+&dp0_ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dp0_in: endpoint {
+ remote-endpoint = <&dpi0_out>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+ dp0_out: endpoint {
+ remote-endpoint = <&dp_connector_in>;
+ };
+ };
+};
+
+&serdes0 {
+ serdes0_pcie_link: phy@0 {
+ reg = <0>;
+ cdns,num-lanes = <1>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_PCIE>;
+ resets = <&serdes_wiz0 1>;
+ };
+};
+
+&serdes1 {
+ serdes1_pcie_link: phy@0 {
+ reg = <0>;
+ cdns,num-lanes = <2>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_PCIE>;
+ resets = <&serdes_wiz1 1>, <&serdes_wiz1 2>;
+ };
+};
+
+&pcie1_rc {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie1_rst_pins_default>;
+ phys = <&serdes1_pcie_link>;
+ phy-names = "pcie-phy";
+ num-lanes = <2>;
+ max-link-speed = <3>;
+ reset-gpios = <&main_gpio0 22 GPIO_ACTIVE_HIGH>;
+};
+
+&ufs_wrapper {
+ status = "disabled";
+};
+
+&mailbox0_cluster0 {
+ status = "okay";
+ interrupts = <436>;
+
+ mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster1 {
+ status = "okay";
+ interrupts = <432>;
+
+ mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster2 {
+ status = "okay";
+ interrupts = <428>;
+
+ mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster3 {
+ status = "okay";
+ interrupts = <424>;
+
+ mbox_c66_0: mbox-c66-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_c66_1: mbox-c66-1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster4 {
+ status = "okay";
+ interrupts = <420>;
+
+ mbox_c71_0: mbox-c71-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+&mcu_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>;
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+};
+
+&mcu_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>;
+ memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
+ <&mcu_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>;
+ memory-region = <&main_r5fss0_core0_dma_memory_region>,
+ <&main_r5fss0_core0_memory_region>;
+};
+
+&main_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>;
+ memory-region = <&main_r5fss0_core1_dma_memory_region>,
+ <&main_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss1_core0 {
+ mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core0>;
+ memory-region = <&main_r5fss1_core0_dma_memory_region>,
+ <&main_r5fss1_core0_memory_region>;
+};
+
+&main_r5fss1_core1 {
+ mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core1>;
+ memory-region = <&main_r5fss1_core1_dma_memory_region>,
+ <&main_r5fss1_core1_memory_region>;
+};
+
+&c66_0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster3>, <&mbox_c66_0>;
+ memory-region = <&c66_0_dma_memory_region>,
+ <&c66_0_memory_region>;
+};
+
+&c66_1 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster3>, <&mbox_c66_1>;
+ memory-region = <&c66_1_dma_memory_region>,
+ <&c66_1_memory_region>;
+};
+
+&c71_0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>;
+ memory-region = <&c71_0_dma_memory_region>,
+ <&c71_0_memory_region>;
+};
diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi
index 4f566c2..5ddb474 100644
--- a/arch/arm/dts/k3-j721e-binman.dtsi
+++ b/arch/arm/dts/k3-j721e-binman.dtsi
@@ -42,78 +42,7 @@
};
itb {
filename = "sysfw-j721e_sr1_1-hs-evm.itb";
- fit {
- description = "SYSFW and Config fragments";
- #address-cells = <1>;
- images {
- sysfw.bin {
- description = "sysfw";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "sysfw.bin";
- };
- };
- board-cfg.bin {
- description = "board-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- ti-secure {
- content = <&board_cfg>;
- keyfile = "custMpk.pem";
- };
- board_cfg: board-cfg {
- filename = "board-cfg.bin";
- type = "blob-ext";
- };
-
- };
- pm-cfg.bin {
- description = "pm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- ti-secure {
- content = <&pm_cfg>;
- keyfile = "custMpk.pem";
- };
- pm_cfg: pm-cfg {
- filename = "pm-cfg.bin";
- type = "blob-ext";
- };
- };
- rm-cfg.bin {
- description = "rm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- ti-secure {
- content = <&rm_cfg>;
- keyfile = "custMpk.pem";
- };
- rm_cfg: rm-cfg {
- filename = "rm-cfg.bin";
- type = "blob-ext";
- };
- };
- sec-cfg.bin {
- description = "sec-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- ti-secure {
- content = <&sec_cfg>;
- keyfile = "custMpk.pem";
- };
- sec_cfg: sec-cfg {
- filename = "sec-cfg.bin";
- type = "blob-ext";
- };
- };
- };
- };
+ insert-template = <&itb_template>;
};
};
@@ -145,62 +74,7 @@
};
itb_fs {
filename = "sysfw-j721e_sr2-hs-fs-evm.itb";
- fit {
- description = "SYSFW and Config fragments";
- #address-cells = <1>;
- images {
- sysfw.bin {
- description = "sysfw";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "sysfw.bin_fs";
- };
- };
- board-cfg.bin {
- description = "board-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- board-cfg {
- filename = "board-cfg.bin";
- type = "blob-ext";
- };
-
- };
- pm-cfg.bin {
- description = "pm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- pm-cfg {
- filename = "pm-cfg.bin";
- type = "blob-ext";
- };
- };
- rm-cfg.bin {
- description = "rm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- rm-cfg {
- filename = "rm-cfg.bin";
- type = "blob-ext";
- };
- };
- sec-cfg.bin {
- description = "sec-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- sec-cfg {
- filename = "sec-cfg.bin";
- type = "blob-ext";
- };
- };
- };
- };
+ insert-template = <&itb_unsigned_template>;
};
};
@@ -237,55 +111,15 @@
itb_gp {
filename = "sysfw-j721e-gp-evm.itb";
symlink = "sysfw.itb";
+ insert-template = <&itb_unsigned_template>;
+
fit {
- description = "SYSFW and Config fragments";
- #address-cells = <1>;
images {
sysfw.bin {
- description = "sysfw";
- type = "firmware";
- arch = "arm";
- compression = "none";
blob-ext {
filename = "sysfw.bin_gp";
};
};
- board-cfg.bin {
- description = "board-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "board-cfg.bin";
- };
- };
- pm-cfg.bin {
- description = "pm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "pm-cfg.bin";
- };
- };
- rm-cfg.bin {
- description = "rm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "rm-cfg.bin";
- };
- };
- sec-cfg.bin {
- description = "sec-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "sec-cfg.bin";
- };
- };
};
};
};
@@ -294,11 +128,9 @@
#ifdef CONFIG_TARGET_J721E_A72_EVM
-#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_J721E_EVM_DTB "spl/dts/k3-j721e-common-proc-board.dtb"
#define SPL_J721E_SK_DTB "spl/dts/k3-j721e-sk.dtb"
-#define UBOOT_NODTB "u-boot-nodtb.bin"
#define J721E_EVM_DTB "u-boot.dtb"
#define J721E_SK_DTB "arch/arm/dts/k3-j721e-sk.dtb"
@@ -310,55 +142,11 @@
};
};
ti-spl {
- filename = "tispl.bin";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- ti-secure {
- content = <&atf>;
- keyfile = "custMpk.pem";
- };
- atf: atf-bl31 {
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- ti-secure {
- content = <&tee>;
- keyfile = "custMpk.pem";
- };
- tee: tee-os {
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
ti-secure {
content = <&dm>;
keyfile = "custMpk.pem";
@@ -368,24 +156,6 @@
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_spl_nodtb>;
- keyfile = "custMpk.pem";
-
- };
- u_boot_spl_nodtb: blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-j721e-common-proc-board";
type = "flat_dt";
@@ -439,29 +209,12 @@
&binman {
u-boot {
- filename = "u-boot.img";
- pad-byte = <0xff>;
-
+ insert-template = <&u_boot_template>;
fit {
- description = "FIT image with multiple configurations";
images {
uboot {
- description = "U-Boot for j721e board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_nodtb: u-boot-nodtb {
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for J721E Board";
};
fdt-0 {
@@ -524,67 +277,16 @@
&binman {
ti-spl_unsigned {
- filename = "tispl.bin_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_unsigned_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- atf-bl31 {
- filename = "bl31.bin";
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- tee-os {
- filename = "tee-raw.bin";
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
blob-ext {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-j721e-common-proc-board";
type = "flat_dt";
@@ -629,26 +331,12 @@
&binman {
u-boot_unsigned {
- filename = "u-boot.img_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_unsigned_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for j721e board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- blob {
- filename = UBOOT_NODTB;
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for J721E Board";
};
fdt-0 {
diff --git a/arch/arm/dts/k3-j721e-ddr-beagleboneai64-lp4-3200.dtsi b/arch/arm/dts/k3-j721e-ddr-beagleboneai64-lp4-3200.dtsi
new file mode 100644
index 0000000..89e1775
--- /dev/null
+++ b/arch/arm/dts/k3-j721e-ddr-beagleboneai64-lp4-3200.dtsi
@@ -0,0 +1,2200 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019-2023 Texas Instruments Incorporated - http://www.ti.com/
+ * This file was generated by the Jacinto7_DDRSS_RegConfigTool, Revision: 0.10.1
+ * This file was generated on 02/08/2023
+ * Part Number: Kingston Q3222PM1WDGTK-U
+ * Configuration: LPDDR4-3200, wrDBI enabled, j721e-SK latencies
+ * Also common for:
+ * * Part Number: Samsung K4FBE3D4HM-MGC @ LPDDR4-3200 (instead of 3700)
+ */
+
+#define DDRSS_PLL_FHS_CNT 10
+#define DDRSS_PLL_FREQUENCY_0 27500000
+#define DDRSS_PLL_FREQUENCY_1 800000000
+#define DDRSS_PLL_FREQUENCY_2 800000000
+
+#define DDRSS_CTL_00_DATA 0x00000B00
+#define DDRSS_CTL_01_DATA 0x00000000
+#define DDRSS_CTL_02_DATA 0x00000000
+#define DDRSS_CTL_03_DATA 0x00000000
+#define DDRSS_CTL_04_DATA 0x00000000
+#define DDRSS_CTL_05_DATA 0x00000000
+#define DDRSS_CTL_06_DATA 0x00000000
+#define DDRSS_CTL_07_DATA 0x00002AF8
+#define DDRSS_CTL_08_DATA 0x0001ADAF
+#define DDRSS_CTL_09_DATA 0x00000005
+#define DDRSS_CTL_10_DATA 0x0000006E
+#define DDRSS_CTL_11_DATA 0x0004E200
+#define DDRSS_CTL_12_DATA 0x0030D400
+#define DDRSS_CTL_13_DATA 0x00000005
+#define DDRSS_CTL_14_DATA 0x00000C80
+#define DDRSS_CTL_15_DATA 0x0004E200
+#define DDRSS_CTL_16_DATA 0x0030D400
+#define DDRSS_CTL_17_DATA 0x00000005
+#define DDRSS_CTL_18_DATA 0x00000C80
+#define DDRSS_CTL_19_DATA 0x01010000
+#define DDRSS_CTL_20_DATA 0x02011001
+#define DDRSS_CTL_21_DATA 0x02010000
+#define DDRSS_CTL_22_DATA 0x00020100
+#define DDRSS_CTL_23_DATA 0x0000000B
+#define DDRSS_CTL_24_DATA 0x0000001C
+#define DDRSS_CTL_25_DATA 0x00000000
+#define DDRSS_CTL_26_DATA 0x00000000
+#define DDRSS_CTL_27_DATA 0x03020200
+#define DDRSS_CTL_28_DATA 0x00004040
+#define DDRSS_CTL_29_DATA 0x00100000
+#define DDRSS_CTL_30_DATA 0x00000000
+#define DDRSS_CTL_31_DATA 0x00000000
+#define DDRSS_CTL_32_DATA 0x00000000
+#define DDRSS_CTL_33_DATA 0x00000000
+#define DDRSS_CTL_34_DATA 0x040C0000
+#define DDRSS_CTL_35_DATA 0x0E380E38
+#define DDRSS_CTL_36_DATA 0x00050804
+#define DDRSS_CTL_37_DATA 0x09040008
+#define DDRSS_CTL_38_DATA 0x14000304
+#define DDRSS_CTL_39_DATA 0x15480068
+#define DDRSS_CTL_40_DATA 0x14004220
+#define DDRSS_CTL_41_DATA 0x15480068
+#define DDRSS_CTL_42_DATA 0x20004220
+#define DDRSS_CTL_43_DATA 0x000A0A09
+#define DDRSS_CTL_44_DATA 0x0400078A
+#define DDRSS_CTL_45_DATA 0x17100D04
+#define DDRSS_CTL_46_DATA 0x0C00DB60
+#define DDRSS_CTL_47_DATA 0x17100D0C
+#define DDRSS_CTL_48_DATA 0x0C00DB60
+#define DDRSS_CTL_49_DATA 0x0203040C
+#define DDRSS_CTL_50_DATA 0x21040500
+#define DDRSS_CTL_51_DATA 0x08222122
+#define DDRSS_CTL_52_DATA 0x14000E0A
+#define DDRSS_CTL_53_DATA 0x03010A0A
+#define DDRSS_CTL_54_DATA 0x01010003
+#define DDRSS_CTL_55_DATA 0x04424208
+#define DDRSS_CTL_56_DATA 0x04252504
+#define DDRSS_CTL_57_DATA 0x00002525
+#define DDRSS_CTL_58_DATA 0x00010100
+#define DDRSS_CTL_59_DATA 0x03010000
+#define DDRSS_CTL_60_DATA 0x00001008
+#define DDRSS_CTL_61_DATA 0x000000CE
+#define DDRSS_CTL_62_DATA 0x000001C0
+#define DDRSS_CTL_63_DATA 0x00001858
+#define DDRSS_CTL_64_DATA 0x000001C0
+#define DDRSS_CTL_65_DATA 0x00001858
+#define DDRSS_CTL_66_DATA 0x00000005
+#define DDRSS_CTL_67_DATA 0x00040000
+#define DDRSS_CTL_68_DATA 0x00700012
+#define DDRSS_CTL_69_DATA 0x00700304
+#define DDRSS_CTL_70_DATA 0x00400304
+#define DDRSS_CTL_71_DATA 0x00120103
+#define DDRSS_CTL_72_DATA 0x000C0005
+#define DDRSS_CTL_73_DATA 0x2408000C
+#define DDRSS_CTL_74_DATA 0x05050124
+#define DDRSS_CTL_75_DATA 0x0301030A
+#define DDRSS_CTL_76_DATA 0x03170C08
+#define DDRSS_CTL_77_DATA 0x0C080301
+#define DDRSS_CTL_78_DATA 0x00010317
+#define DDRSS_CTL_79_DATA 0x00100010
+#define DDRSS_CTL_80_DATA 0x01CC01CC
+#define DDRSS_CTL_81_DATA 0x01CC01CC
+#define DDRSS_CTL_82_DATA 0x03050505
+#define DDRSS_CTL_83_DATA 0x03010303
+#define DDRSS_CTL_84_DATA 0x18080C08
+#define DDRSS_CTL_85_DATA 0x03030C03
+#define DDRSS_CTL_86_DATA 0x18080C08
+#define DDRSS_CTL_87_DATA 0x03030C03
+#define DDRSS_CTL_88_DATA 0x03010000
+#define DDRSS_CTL_89_DATA 0x00010000
+#define DDRSS_CTL_90_DATA 0x00000000
+#define DDRSS_CTL_91_DATA 0x00000000
+#define DDRSS_CTL_92_DATA 0x01000000
+#define DDRSS_CTL_93_DATA 0x80104002
+#define DDRSS_CTL_94_DATA 0x00000000
+#define DDRSS_CTL_95_DATA 0x00040005
+#define DDRSS_CTL_96_DATA 0x00000000
+#define DDRSS_CTL_97_DATA 0x00050000
+#define DDRSS_CTL_98_DATA 0x00000004
+#define DDRSS_CTL_99_DATA 0x00000000
+#define DDRSS_CTL_100_DATA 0x00040005
+#define DDRSS_CTL_101_DATA 0x00000000
+#define DDRSS_CTL_102_DATA 0x00003380
+#define DDRSS_CTL_103_DATA 0x00003380
+#define DDRSS_CTL_104_DATA 0x00003380
+#define DDRSS_CTL_105_DATA 0x00003380
+#define DDRSS_CTL_106_DATA 0x00003380
+#define DDRSS_CTL_107_DATA 0x00000000
+#define DDRSS_CTL_108_DATA 0x000005A2
+#define DDRSS_CTL_109_DATA 0x00061600
+#define DDRSS_CTL_110_DATA 0x00061600
+#define DDRSS_CTL_111_DATA 0x00061600
+#define DDRSS_CTL_112_DATA 0x00061600
+#define DDRSS_CTL_113_DATA 0x00061600
+#define DDRSS_CTL_114_DATA 0x00000000
+#define DDRSS_CTL_115_DATA 0x0000AA68
+#define DDRSS_CTL_116_DATA 0x00061600
+#define DDRSS_CTL_117_DATA 0x00061600
+#define DDRSS_CTL_118_DATA 0x00061600
+#define DDRSS_CTL_119_DATA 0x00061600
+#define DDRSS_CTL_120_DATA 0x00061600
+#define DDRSS_CTL_121_DATA 0x00000000
+#define DDRSS_CTL_122_DATA 0x0000AA68
+#define DDRSS_CTL_123_DATA 0x00000000
+#define DDRSS_CTL_124_DATA 0x00000000
+#define DDRSS_CTL_125_DATA 0x00000000
+#define DDRSS_CTL_126_DATA 0x00000000
+#define DDRSS_CTL_127_DATA 0x00000000
+#define DDRSS_CTL_128_DATA 0x00000000
+#define DDRSS_CTL_129_DATA 0x00000000
+#define DDRSS_CTL_130_DATA 0x00000000
+#define DDRSS_CTL_131_DATA 0x08030500
+#define DDRSS_CTL_132_DATA 0x00030803
+#define DDRSS_CTL_133_DATA 0x0A090000
+#define DDRSS_CTL_134_DATA 0x0A090701
+#define DDRSS_CTL_135_DATA 0x0900000E
+#define DDRSS_CTL_136_DATA 0x0907010A
+#define DDRSS_CTL_137_DATA 0x00000E0A
+#define DDRSS_CTL_138_DATA 0x07010A09
+#define DDRSS_CTL_139_DATA 0x000E0A09
+#define DDRSS_CTL_140_DATA 0x07000401
+#define DDRSS_CTL_141_DATA 0x00000000
+#define DDRSS_CTL_142_DATA 0x00000000
+#define DDRSS_CTL_143_DATA 0x00000000
+#define DDRSS_CTL_144_DATA 0x00000000
+#define DDRSS_CTL_145_DATA 0x00000000
+#define DDRSS_CTL_146_DATA 0x00000000
+#define DDRSS_CTL_147_DATA 0x00000000
+#define DDRSS_CTL_148_DATA 0x08080000
+#define DDRSS_CTL_149_DATA 0x01000000
+#define DDRSS_CTL_150_DATA 0x800000C0
+#define DDRSS_CTL_151_DATA 0x800000C0
+#define DDRSS_CTL_152_DATA 0x800000C0
+#define DDRSS_CTL_153_DATA 0x00000000
+#define DDRSS_CTL_154_DATA 0x00001500
+#define DDRSS_CTL_155_DATA 0x00000000
+#define DDRSS_CTL_156_DATA 0x00000001
+#define DDRSS_CTL_157_DATA 0x00000002
+#define DDRSS_CTL_158_DATA 0x0000100E
+#define DDRSS_CTL_159_DATA 0x00000000
+#define DDRSS_CTL_160_DATA 0x00000000
+#define DDRSS_CTL_161_DATA 0x00000000
+#define DDRSS_CTL_162_DATA 0x00000000
+#define DDRSS_CTL_163_DATA 0x00000000
+#define DDRSS_CTL_164_DATA 0x000B0000
+#define DDRSS_CTL_165_DATA 0x000E0006
+#define DDRSS_CTL_166_DATA 0x000E0404
+#define DDRSS_CTL_167_DATA 0x00A00140
+#define DDRSS_CTL_168_DATA 0x0C0C0190
+#define DDRSS_CTL_169_DATA 0x01400190
+#define DDRSS_CTL_170_DATA 0x019000A0
+#define DDRSS_CTL_171_DATA 0x01900C0C
+#define DDRSS_CTL_172_DATA 0x00000000
+#define DDRSS_CTL_173_DATA 0x00000000
+#define DDRSS_CTL_174_DATA 0x00000000
+#define DDRSS_CTL_175_DATA 0x2DD40084
+#define DDRSS_CTL_176_DATA 0xAB002DD4
+#define DDRSS_CTL_177_DATA 0x0000ABAB
+#define DDRSS_CTL_178_DATA 0x45450000
+#define DDRSS_CTL_179_DATA 0x27272745
+#define DDRSS_CTL_180_DATA 0x0F0F0F00
+#define DDRSS_CTL_181_DATA 0x1D000000
+#define DDRSS_CTL_182_DATA 0x00841D1D
+#define DDRSS_CTL_183_DATA 0x2DD42DD4
+#define DDRSS_CTL_184_DATA 0xABABAB00
+#define DDRSS_CTL_185_DATA 0x00000000
+#define DDRSS_CTL_186_DATA 0x27454545
+#define DDRSS_CTL_187_DATA 0x0F002727
+#define DDRSS_CTL_188_DATA 0x00000F0F
+#define DDRSS_CTL_189_DATA 0x1D1D1D00
+#define DDRSS_CTL_190_DATA 0x00000020
+#define DDRSS_CTL_191_DATA 0x00000000
+#define DDRSS_CTL_192_DATA 0x00000001
+#define DDRSS_CTL_193_DATA 0x00000000
+#define DDRSS_CTL_194_DATA 0x01000000
+#define DDRSS_CTL_195_DATA 0x00000001
+#define DDRSS_CTL_196_DATA 0x00000000
+#define DDRSS_CTL_197_DATA 0x00000000
+#define DDRSS_CTL_198_DATA 0x00000000
+#define DDRSS_CTL_199_DATA 0x00000000
+#define DDRSS_CTL_200_DATA 0x00000000
+#define DDRSS_CTL_201_DATA 0x00000000
+#define DDRSS_CTL_202_DATA 0x00000000
+#define DDRSS_CTL_203_DATA 0x00000000
+#define DDRSS_CTL_204_DATA 0x00000000
+#define DDRSS_CTL_205_DATA 0x00000000
+#define DDRSS_CTL_206_DATA 0x02000000
+#define DDRSS_CTL_207_DATA 0x01080101
+#define DDRSS_CTL_208_DATA 0x00000000
+#define DDRSS_CTL_209_DATA 0x00000000
+#define DDRSS_CTL_210_DATA 0x00000000
+#define DDRSS_CTL_211_DATA 0x00000000
+#define DDRSS_CTL_212_DATA 0x00000000
+#define DDRSS_CTL_213_DATA 0x00000000
+#define DDRSS_CTL_214_DATA 0x00000000
+#define DDRSS_CTL_215_DATA 0x00000000
+#define DDRSS_CTL_216_DATA 0x00000000
+#define DDRSS_CTL_217_DATA 0x00000000
+#define DDRSS_CTL_218_DATA 0x00000000
+#define DDRSS_CTL_219_DATA 0x00000000
+#define DDRSS_CTL_220_DATA 0x00000000
+#define DDRSS_CTL_221_DATA 0x00000000
+#define DDRSS_CTL_222_DATA 0x00001000
+#define DDRSS_CTL_223_DATA 0x006403E8
+#define DDRSS_CTL_224_DATA 0x00000000
+#define DDRSS_CTL_225_DATA 0x00000000
+#define DDRSS_CTL_226_DATA 0x00000000
+#define DDRSS_CTL_227_DATA 0x15110000
+#define DDRSS_CTL_228_DATA 0x00040C18
+#define DDRSS_CTL_229_DATA 0xF000C000
+#define DDRSS_CTL_230_DATA 0x0000F000
+#define DDRSS_CTL_231_DATA 0x00000000
+#define DDRSS_CTL_232_DATA 0x00000000
+#define DDRSS_CTL_233_DATA 0xC0000000
+#define DDRSS_CTL_234_DATA 0xF000F000
+#define DDRSS_CTL_235_DATA 0x00000000
+#define DDRSS_CTL_236_DATA 0x00000000
+#define DDRSS_CTL_237_DATA 0x00000000
+#define DDRSS_CTL_238_DATA 0xF000C000
+#define DDRSS_CTL_239_DATA 0x0000F000
+#define DDRSS_CTL_240_DATA 0x00000000
+#define DDRSS_CTL_241_DATA 0x00000000
+#define DDRSS_CTL_242_DATA 0x00030000
+#define DDRSS_CTL_243_DATA 0x00000000
+#define DDRSS_CTL_244_DATA 0x00000000
+#define DDRSS_CTL_245_DATA 0x00000000
+#define DDRSS_CTL_246_DATA 0x00000000
+#define DDRSS_CTL_247_DATA 0x00000000
+#define DDRSS_CTL_248_DATA 0x00000000
+#define DDRSS_CTL_249_DATA 0x00000000
+#define DDRSS_CTL_250_DATA 0x00000000
+#define DDRSS_CTL_251_DATA 0x00000000
+#define DDRSS_CTL_252_DATA 0x00000000
+#define DDRSS_CTL_253_DATA 0x00000000
+#define DDRSS_CTL_254_DATA 0x00000000
+#define DDRSS_CTL_255_DATA 0x00000000
+#define DDRSS_CTL_256_DATA 0x00000000
+#define DDRSS_CTL_257_DATA 0x01000200
+#define DDRSS_CTL_258_DATA 0x00370040
+#define DDRSS_CTL_259_DATA 0x00020008
+#define DDRSS_CTL_260_DATA 0x00400100
+#define DDRSS_CTL_261_DATA 0x00300640
+#define DDRSS_CTL_262_DATA 0x01000200
+#define DDRSS_CTL_263_DATA 0x06400040
+#define DDRSS_CTL_264_DATA 0x00000030
+#define DDRSS_CTL_265_DATA 0x00500003
+#define DDRSS_CTL_266_DATA 0x01000050
+#define DDRSS_CTL_267_DATA 0x03030303
+#define DDRSS_CTL_268_DATA 0x01010000
+#define DDRSS_CTL_269_DATA 0x00000202
+#define DDRSS_CTL_270_DATA 0x00000FFF
+#define DDRSS_CTL_271_DATA 0x1FFF1000
+#define DDRSS_CTL_272_DATA 0x01FF0000
+#define DDRSS_CTL_273_DATA 0x000101FF
+#define DDRSS_CTL_274_DATA 0x0FFF0B00
+#define DDRSS_CTL_275_DATA 0x01010001
+#define DDRSS_CTL_276_DATA 0x01010101
+#define DDRSS_CTL_277_DATA 0x01180101
+#define DDRSS_CTL_278_DATA 0x00030000
+#define DDRSS_CTL_279_DATA 0x00000000
+#define DDRSS_CTL_280_DATA 0x00000000
+#define DDRSS_CTL_281_DATA 0x00000000
+#define DDRSS_CTL_282_DATA 0x00000000
+#define DDRSS_CTL_283_DATA 0x00000000
+#define DDRSS_CTL_284_DATA 0x00000000
+#define DDRSS_CTL_285_DATA 0x00000000
+#define DDRSS_CTL_286_DATA 0x00040101
+#define DDRSS_CTL_287_DATA 0x04010100
+#define DDRSS_CTL_288_DATA 0x00000000
+#define DDRSS_CTL_289_DATA 0x00000000
+#define DDRSS_CTL_290_DATA 0x03030300
+#define DDRSS_CTL_291_DATA 0x00000101
+#define DDRSS_CTL_292_DATA 0x00000000
+#define DDRSS_CTL_293_DATA 0x00000000
+#define DDRSS_CTL_294_DATA 0x00000000
+#define DDRSS_CTL_295_DATA 0x00000000
+#define DDRSS_CTL_296_DATA 0x00000000
+#define DDRSS_CTL_297_DATA 0x00000000
+#define DDRSS_CTL_298_DATA 0x00000000
+#define DDRSS_CTL_299_DATA 0x00000000
+#define DDRSS_CTL_300_DATA 0x00000000
+#define DDRSS_CTL_301_DATA 0x00000000
+#define DDRSS_CTL_302_DATA 0x00000000
+#define DDRSS_CTL_303_DATA 0x00000000
+#define DDRSS_CTL_304_DATA 0x00000000
+#define DDRSS_CTL_305_DATA 0x00000000
+#define DDRSS_CTL_306_DATA 0x00000000
+#define DDRSS_CTL_307_DATA 0x00000000
+#define DDRSS_CTL_308_DATA 0x00000000
+#define DDRSS_CTL_309_DATA 0x00000000
+#define DDRSS_CTL_310_DATA 0x00000000
+#define DDRSS_CTL_311_DATA 0x00000000
+#define DDRSS_CTL_312_DATA 0x00000000
+#define DDRSS_CTL_313_DATA 0x01000000
+#define DDRSS_CTL_314_DATA 0x00020201
+#define DDRSS_CTL_315_DATA 0x01000101
+#define DDRSS_CTL_316_DATA 0x01010001
+#define DDRSS_CTL_317_DATA 0x00010101
+#define DDRSS_CTL_318_DATA 0x05080803
+#define DDRSS_CTL_319_DATA 0x0C081818
+#define DDRSS_CTL_320_DATA 0x0009030C
+#define DDRSS_CTL_321_DATA 0x090B030F
+#define DDRSS_CTL_322_DATA 0x090B0306
+#define DDRSS_CTL_323_DATA 0x0B090006
+#define DDRSS_CTL_324_DATA 0x0100000B
+#define DDRSS_CTL_325_DATA 0x06030601
+#define DDRSS_CTL_326_DATA 0x00000003
+#define DDRSS_CTL_327_DATA 0x00000000
+#define DDRSS_CTL_328_DATA 0x00010000
+#define DDRSS_CTL_329_DATA 0x00280D00
+#define DDRSS_CTL_330_DATA 0x00000001
+#define DDRSS_CTL_331_DATA 0x00030001
+#define DDRSS_CTL_332_DATA 0x00000000
+#define DDRSS_CTL_333_DATA 0x00000000
+#define DDRSS_CTL_334_DATA 0x00000000
+#define DDRSS_CTL_335_DATA 0x00000000
+#define DDRSS_CTL_336_DATA 0x00000000
+#define DDRSS_CTL_337_DATA 0x00000000
+#define DDRSS_CTL_338_DATA 0x00000000
+#define DDRSS_CTL_339_DATA 0x00000000
+#define DDRSS_CTL_340_DATA 0x01000000
+#define DDRSS_CTL_341_DATA 0x00000001
+#define DDRSS_CTL_342_DATA 0x00010100
+#define DDRSS_CTL_343_DATA 0x03030000
+#define DDRSS_CTL_344_DATA 0x00000000
+#define DDRSS_CTL_345_DATA 0x00000000
+#define DDRSS_CTL_346_DATA 0x00000000
+#define DDRSS_CTL_347_DATA 0x00000000
+#define DDRSS_CTL_348_DATA 0x00000000
+#define DDRSS_CTL_349_DATA 0x00000000
+#define DDRSS_CTL_350_DATA 0x00000000
+#define DDRSS_CTL_351_DATA 0x00000000
+#define DDRSS_CTL_352_DATA 0x00000000
+#define DDRSS_CTL_353_DATA 0x00000000
+#define DDRSS_CTL_354_DATA 0x00000000
+#define DDRSS_CTL_355_DATA 0x00000000
+#define DDRSS_CTL_356_DATA 0x00000000
+#define DDRSS_CTL_357_DATA 0x00000000
+#define DDRSS_CTL_358_DATA 0x00000000
+#define DDRSS_CTL_359_DATA 0x00000000
+#define DDRSS_CTL_360_DATA 0x000556AA
+#define DDRSS_CTL_361_DATA 0x000AAAAA
+#define DDRSS_CTL_362_DATA 0x000AA955
+#define DDRSS_CTL_363_DATA 0x00055555
+#define DDRSS_CTL_364_DATA 0x000B3133
+#define DDRSS_CTL_365_DATA 0x0004CD33
+#define DDRSS_CTL_366_DATA 0x0004CECC
+#define DDRSS_CTL_367_DATA 0x000B32CC
+#define DDRSS_CTL_368_DATA 0x00010300
+#define DDRSS_CTL_369_DATA 0x03000100
+#define DDRSS_CTL_370_DATA 0x00000000
+#define DDRSS_CTL_371_DATA 0x00000000
+#define DDRSS_CTL_372_DATA 0x00000000
+#define DDRSS_CTL_373_DATA 0x00000000
+#define DDRSS_CTL_374_DATA 0x00000000
+#define DDRSS_CTL_375_DATA 0x00000000
+#define DDRSS_CTL_376_DATA 0x00000000
+#define DDRSS_CTL_377_DATA 0x00010000
+#define DDRSS_CTL_378_DATA 0x00000404
+#define DDRSS_CTL_379_DATA 0x00000000
+#define DDRSS_CTL_380_DATA 0x00000000
+#define DDRSS_CTL_381_DATA 0x00000000
+#define DDRSS_CTL_382_DATA 0x00000000
+#define DDRSS_CTL_383_DATA 0x00000000
+#define DDRSS_CTL_384_DATA 0x00000000
+#define DDRSS_CTL_385_DATA 0x00000000
+#define DDRSS_CTL_386_DATA 0x00000000
+#define DDRSS_CTL_387_DATA 0x33331B00
+#define DDRSS_CTL_388_DATA 0x000A0000
+#define DDRSS_CTL_389_DATA 0x0000019C
+#define DDRSS_CTL_390_DATA 0x00000200
+#define DDRSS_CTL_391_DATA 0x00000200
+#define DDRSS_CTL_392_DATA 0x00000200
+#define DDRSS_CTL_393_DATA 0x00000200
+#define DDRSS_CTL_394_DATA 0x000004D4
+#define DDRSS_CTL_395_DATA 0x00001018
+#define DDRSS_CTL_396_DATA 0x00000204
+#define DDRSS_CTL_397_DATA 0x000030B0
+#define DDRSS_CTL_398_DATA 0x00000200
+#define DDRSS_CTL_399_DATA 0x00000200
+#define DDRSS_CTL_400_DATA 0x00000200
+#define DDRSS_CTL_401_DATA 0x00000200
+#define DDRSS_CTL_402_DATA 0x00009210
+#define DDRSS_CTL_403_DATA 0x0001E6E0
+#define DDRSS_CTL_404_DATA 0x00000A10
+#define DDRSS_CTL_405_DATA 0x000030B0
+#define DDRSS_CTL_406_DATA 0x00000200
+#define DDRSS_CTL_407_DATA 0x00000200
+#define DDRSS_CTL_408_DATA 0x00000200
+#define DDRSS_CTL_409_DATA 0x00000200
+#define DDRSS_CTL_410_DATA 0x00009210
+#define DDRSS_CTL_411_DATA 0x0001E6E0
+#define DDRSS_CTL_412_DATA 0x02020A10
+#define DDRSS_CTL_413_DATA 0x03030202
+#define DDRSS_CTL_414_DATA 0x00000022
+#define DDRSS_CTL_415_DATA 0x00000000
+#define DDRSS_CTL_416_DATA 0x00000000
+#define DDRSS_CTL_417_DATA 0x00001403
+#define DDRSS_CTL_418_DATA 0x000007D0
+#define DDRSS_CTL_419_DATA 0x00000000
+#define DDRSS_CTL_420_DATA 0x00000000
+#define DDRSS_CTL_421_DATA 0x00030000
+#define DDRSS_CTL_422_DATA 0x0007001F
+#define DDRSS_CTL_423_DATA 0x0016002E
+#define DDRSS_CTL_424_DATA 0x0016002E
+#define DDRSS_CTL_425_DATA 0x00000000
+#define DDRSS_CTL_426_DATA 0x00000000
+#define DDRSS_CTL_427_DATA 0x02000000
+#define DDRSS_CTL_428_DATA 0x01000404
+#define DDRSS_CTL_429_DATA 0x07160716
+#define DDRSS_CTL_430_DATA 0x00000105
+#define DDRSS_CTL_431_DATA 0x00010101
+#define DDRSS_CTL_432_DATA 0x00010101
+#define DDRSS_CTL_433_DATA 0x00010001
+#define DDRSS_CTL_434_DATA 0x00000101
+#define DDRSS_CTL_435_DATA 0x02000201
+#define DDRSS_CTL_436_DATA 0x02010000
+#define DDRSS_CTL_437_DATA 0x00000200
+#define DDRSS_CTL_438_DATA 0x1E060000
+#define DDRSS_CTL_439_DATA 0x0000011E
+#define DDRSS_CTL_440_DATA 0xFFFFFFFF
+#define DDRSS_CTL_441_DATA 0xFFFFFFFF
+#define DDRSS_CTL_442_DATA 0x00000000
+#define DDRSS_CTL_443_DATA 0x00000000
+#define DDRSS_CTL_444_DATA 0x00000000
+#define DDRSS_CTL_445_DATA 0x00000000
+#define DDRSS_CTL_446_DATA 0x00000000
+#define DDRSS_CTL_447_DATA 0x00000000
+#define DDRSS_CTL_448_DATA 0x00000000
+#define DDRSS_CTL_449_DATA 0x00000000
+#define DDRSS_CTL_450_DATA 0x00000000
+#define DDRSS_CTL_451_DATA 0x00000000
+#define DDRSS_CTL_452_DATA 0x00000000
+#define DDRSS_CTL_453_DATA 0x00000000
+#define DDRSS_CTL_454_DATA 0x00000000
+#define DDRSS_CTL_455_DATA 0x00000000
+#define DDRSS_CTL_456_DATA 0x00000000
+#define DDRSS_CTL_457_DATA 0x00000000
+#define DDRSS_CTL_458_DATA 0x00000000
+
+#define DDRSS_PI_00_DATA 0x00000B00
+#define DDRSS_PI_01_DATA 0x00000000
+#define DDRSS_PI_02_DATA 0x00000000
+#define DDRSS_PI_03_DATA 0x00000000
+#define DDRSS_PI_04_DATA 0x00000000
+#define DDRSS_PI_05_DATA 0x00000101
+#define DDRSS_PI_06_DATA 0x00640000
+#define DDRSS_PI_07_DATA 0x00000001
+#define DDRSS_PI_08_DATA 0x00000000
+#define DDRSS_PI_09_DATA 0x00000000
+#define DDRSS_PI_10_DATA 0x00000000
+#define DDRSS_PI_11_DATA 0x00000000
+#define DDRSS_PI_12_DATA 0x00000007
+#define DDRSS_PI_13_DATA 0x00010002
+#define DDRSS_PI_14_DATA 0x0800000F
+#define DDRSS_PI_15_DATA 0x00000103
+#define DDRSS_PI_16_DATA 0x00000005
+#define DDRSS_PI_17_DATA 0x00000000
+#define DDRSS_PI_18_DATA 0x00000000
+#define DDRSS_PI_19_DATA 0x00000000
+#define DDRSS_PI_20_DATA 0x00000000
+#define DDRSS_PI_21_DATA 0x00000000
+#define DDRSS_PI_22_DATA 0x00000000
+#define DDRSS_PI_23_DATA 0x00000000
+#define DDRSS_PI_24_DATA 0x00000000
+#define DDRSS_PI_25_DATA 0x00000000
+#define DDRSS_PI_26_DATA 0x00010100
+#define DDRSS_PI_27_DATA 0x00280A00
+#define DDRSS_PI_28_DATA 0x00000000
+#define DDRSS_PI_29_DATA 0x0F000000
+#define DDRSS_PI_30_DATA 0x00003200
+#define DDRSS_PI_31_DATA 0x00000000
+#define DDRSS_PI_32_DATA 0x00000000
+#define DDRSS_PI_33_DATA 0x01010102
+#define DDRSS_PI_34_DATA 0x00000000
+#define DDRSS_PI_35_DATA 0x000000AA
+#define DDRSS_PI_36_DATA 0x00000055
+#define DDRSS_PI_37_DATA 0x000000B5
+#define DDRSS_PI_38_DATA 0x0000004A
+#define DDRSS_PI_39_DATA 0x00000056
+#define DDRSS_PI_40_DATA 0x000000A9
+#define DDRSS_PI_41_DATA 0x000000A9
+#define DDRSS_PI_42_DATA 0x000000B5
+#define DDRSS_PI_43_DATA 0x00000000
+#define DDRSS_PI_44_DATA 0x00000000
+#define DDRSS_PI_45_DATA 0x000F0F00
+#define DDRSS_PI_46_DATA 0x00000019
+#define DDRSS_PI_47_DATA 0x000007D0
+#define DDRSS_PI_48_DATA 0x00000300
+#define DDRSS_PI_49_DATA 0x00000000
+#define DDRSS_PI_50_DATA 0x00000000
+#define DDRSS_PI_51_DATA 0x01000000
+#define DDRSS_PI_52_DATA 0x00010101
+#define DDRSS_PI_53_DATA 0x00000000
+#define DDRSS_PI_54_DATA 0x00030000
+#define DDRSS_PI_55_DATA 0x0F000000
+#define DDRSS_PI_56_DATA 0x00000017
+#define DDRSS_PI_57_DATA 0x00000000
+#define DDRSS_PI_58_DATA 0x00000000
+#define DDRSS_PI_59_DATA 0x00000000
+#define DDRSS_PI_60_DATA 0x0A0A140A
+#define DDRSS_PI_61_DATA 0x10020101
+#define DDRSS_PI_62_DATA 0x00020805
+#define DDRSS_PI_63_DATA 0x01000404
+#define DDRSS_PI_64_DATA 0x00000000
+#define DDRSS_PI_65_DATA 0x00000000
+#define DDRSS_PI_66_DATA 0x00000100
+#define DDRSS_PI_67_DATA 0x0001010F
+#define DDRSS_PI_68_DATA 0x00340000
+#define DDRSS_PI_69_DATA 0x00000000
+#define DDRSS_PI_70_DATA 0x00000000
+#define DDRSS_PI_71_DATA 0x0000FFFF
+#define DDRSS_PI_72_DATA 0x00000000
+#define DDRSS_PI_73_DATA 0x00080100
+#define DDRSS_PI_74_DATA 0x02000200
+#define DDRSS_PI_75_DATA 0x01000100
+#define DDRSS_PI_76_DATA 0x01000000
+#define DDRSS_PI_77_DATA 0x02000200
+#define DDRSS_PI_78_DATA 0x00000200
+#define DDRSS_PI_79_DATA 0x00000000
+#define DDRSS_PI_80_DATA 0x00000000
+#define DDRSS_PI_81_DATA 0x00000000
+#define DDRSS_PI_82_DATA 0x00000000
+#define DDRSS_PI_83_DATA 0x00000000
+#define DDRSS_PI_84_DATA 0x00000000
+#define DDRSS_PI_85_DATA 0x00000000
+#define DDRSS_PI_86_DATA 0x00000000
+#define DDRSS_PI_87_DATA 0x00000000
+#define DDRSS_PI_88_DATA 0x00000000
+#define DDRSS_PI_89_DATA 0x00000000
+#define DDRSS_PI_90_DATA 0x00000000
+#define DDRSS_PI_91_DATA 0x00000400
+#define DDRSS_PI_92_DATA 0x02010000
+#define DDRSS_PI_93_DATA 0x00080003
+#define DDRSS_PI_94_DATA 0x00080000
+#define DDRSS_PI_95_DATA 0x00000001
+#define DDRSS_PI_96_DATA 0x00000000
+#define DDRSS_PI_97_DATA 0x0000AA00
+#define DDRSS_PI_98_DATA 0x00000000
+#define DDRSS_PI_99_DATA 0x00000000
+#define DDRSS_PI_100_DATA 0x00010000
+#define DDRSS_PI_101_DATA 0x00000000
+#define DDRSS_PI_102_DATA 0x00000000
+#define DDRSS_PI_103_DATA 0x00000000
+#define DDRSS_PI_104_DATA 0x00000000
+#define DDRSS_PI_105_DATA 0x00000000
+#define DDRSS_PI_106_DATA 0x00000000
+#define DDRSS_PI_107_DATA 0x00000000
+#define DDRSS_PI_108_DATA 0x00000000
+#define DDRSS_PI_109_DATA 0x00000000
+#define DDRSS_PI_110_DATA 0x00000000
+#define DDRSS_PI_111_DATA 0x00000000
+#define DDRSS_PI_112_DATA 0x00000000
+#define DDRSS_PI_113_DATA 0x00000000
+#define DDRSS_PI_114_DATA 0x00000000
+#define DDRSS_PI_115_DATA 0x00000000
+#define DDRSS_PI_116_DATA 0x00000000
+#define DDRSS_PI_117_DATA 0x00000000
+#define DDRSS_PI_118_DATA 0x00000000
+#define DDRSS_PI_119_DATA 0x00000000
+#define DDRSS_PI_120_DATA 0x00000000
+#define DDRSS_PI_121_DATA 0x00000000
+#define DDRSS_PI_122_DATA 0x00000000
+#define DDRSS_PI_123_DATA 0x00000000
+#define DDRSS_PI_124_DATA 0x00000000
+#define DDRSS_PI_125_DATA 0x00000008
+#define DDRSS_PI_126_DATA 0x00000000
+#define DDRSS_PI_127_DATA 0x00000000
+#define DDRSS_PI_128_DATA 0x00000000
+#define DDRSS_PI_129_DATA 0x00000000
+#define DDRSS_PI_130_DATA 0x00000000
+#define DDRSS_PI_131_DATA 0x00000000
+#define DDRSS_PI_132_DATA 0x00000000
+#define DDRSS_PI_133_DATA 0x00000000
+#define DDRSS_PI_134_DATA 0x00000002
+#define DDRSS_PI_135_DATA 0x00000000
+#define DDRSS_PI_136_DATA 0x00000000
+#define DDRSS_PI_137_DATA 0x0000000A
+#define DDRSS_PI_138_DATA 0x00000019
+#define DDRSS_PI_139_DATA 0x00000100
+#define DDRSS_PI_140_DATA 0x00000000
+#define DDRSS_PI_141_DATA 0x00000000
+#define DDRSS_PI_142_DATA 0x00000000
+#define DDRSS_PI_143_DATA 0x00000000
+#define DDRSS_PI_144_DATA 0x01000000
+#define DDRSS_PI_145_DATA 0x00010003
+#define DDRSS_PI_146_DATA 0x02000101
+#define DDRSS_PI_147_DATA 0x01030001
+#define DDRSS_PI_148_DATA 0x00010400
+#define DDRSS_PI_149_DATA 0x06000105
+#define DDRSS_PI_150_DATA 0x01070001
+#define DDRSS_PI_151_DATA 0x00000000
+#define DDRSS_PI_152_DATA 0x00000000
+#define DDRSS_PI_153_DATA 0x00000000
+#define DDRSS_PI_154_DATA 0x00010001
+#define DDRSS_PI_155_DATA 0x00000000
+#define DDRSS_PI_156_DATA 0x00000000
+#define DDRSS_PI_157_DATA 0x00000000
+#define DDRSS_PI_158_DATA 0x00000000
+#define DDRSS_PI_159_DATA 0x00000401
+#define DDRSS_PI_160_DATA 0x00000000
+#define DDRSS_PI_161_DATA 0x00010000
+#define DDRSS_PI_162_DATA 0x00000000
+#define DDRSS_PI_163_DATA 0x20200200
+#define DDRSS_PI_164_DATA 0x00000034
+#define DDRSS_PI_165_DATA 0x00000058
+#define DDRSS_PI_166_DATA 0x00020058
+#define DDRSS_PI_167_DATA 0x02000200
+#define DDRSS_PI_168_DATA 0x380E0C04
+#define DDRSS_PI_169_DATA 0x0010380E
+#define DDRSS_PI_170_DATA 0x000000CE
+#define DDRSS_PI_171_DATA 0x000001C0
+#define DDRSS_PI_172_DATA 0x00001858
+#define DDRSS_PI_173_DATA 0x000001C0
+#define DDRSS_PI_174_DATA 0x04001858
+#define DDRSS_PI_175_DATA 0x01010404
+#define DDRSS_PI_176_DATA 0x00001501
+#define DDRSS_PI_177_DATA 0x00150015
+#define DDRSS_PI_178_DATA 0x01000100
+#define DDRSS_PI_179_DATA 0x00000100
+#define DDRSS_PI_180_DATA 0x00000000
+#define DDRSS_PI_181_DATA 0x01010101
+#define DDRSS_PI_182_DATA 0x00000101
+#define DDRSS_PI_183_DATA 0x00000000
+#define DDRSS_PI_184_DATA 0x00000000
+#define DDRSS_PI_185_DATA 0x10040000
+#define DDRSS_PI_186_DATA 0x0A0A0210
+#define DDRSS_PI_187_DATA 0x00040402
+#define DDRSS_PI_188_DATA 0x000D0035
+#define DDRSS_PI_189_DATA 0x001C0044
+#define DDRSS_PI_190_DATA 0x001C0044
+#define DDRSS_PI_191_DATA 0x01010101
+#define DDRSS_PI_192_DATA 0x0003000E
+#define DDRSS_PI_193_DATA 0x00030190
+#define DDRSS_PI_194_DATA 0x01000190
+#define DDRSS_PI_195_DATA 0x000F000F
+#define DDRSS_PI_196_DATA 0x01910100
+#define DDRSS_PI_197_DATA 0x01000191
+#define DDRSS_PI_198_DATA 0x01910191
+#define DDRSS_PI_199_DATA 0x32103200
+#define DDRSS_PI_200_DATA 0x01013210
+#define DDRSS_PI_201_DATA 0x0A070601
+#define DDRSS_PI_202_DATA 0x180F090D
+#define DDRSS_PI_203_DATA 0x180F0911
+#define DDRSS_PI_204_DATA 0x0000C011
+#define DDRSS_PI_205_DATA 0x00C01000
+#define DDRSS_PI_206_DATA 0x00C01000
+#define DDRSS_PI_207_DATA 0x00021000
+#define DDRSS_PI_208_DATA 0x001E000E
+#define DDRSS_PI_209_DATA 0x001E0190
+#define DDRSS_PI_210_DATA 0x00110190
+#define DDRSS_PI_211_DATA 0x32000056
+#define DDRSS_PI_212_DATA 0x00000301
+#define DDRSS_PI_213_DATA 0x005A0030
+#define DDRSS_PI_214_DATA 0x03013212
+#define DDRSS_PI_215_DATA 0x00003000
+#define DDRSS_PI_216_DATA 0x3212005A
+#define DDRSS_PI_217_DATA 0x09000301
+#define DDRSS_PI_218_DATA 0x04010504
+#define DDRSS_PI_219_DATA 0x040006C9
+#define DDRSS_PI_220_DATA 0x0A032001
+#define DDRSS_PI_221_DATA 0x21250D0A
+#define DDRSS_PI_222_DATA 0x00002216
+#define DDRSS_PI_223_DATA 0x4800C570
+#define DDRSS_PI_224_DATA 0x17182006
+#define DDRSS_PI_225_DATA 0x21250D10
+#define DDRSS_PI_226_DATA 0x00002216
+#define DDRSS_PI_227_DATA 0x4800C570
+#define DDRSS_PI_228_DATA 0x17182006
+#define DDRSS_PI_229_DATA 0x00019C10
+#define DDRSS_PI_230_DATA 0x00001018
+#define DDRSS_PI_231_DATA 0x000030B0
+#define DDRSS_PI_232_DATA 0x0001E6E0
+#define DDRSS_PI_233_DATA 0x000030B0
+#define DDRSS_PI_234_DATA 0x0001E6E0
+#define DDRSS_PI_235_DATA 0x01CC0010
+#define DDRSS_PI_236_DATA 0x030301CC
+#define DDRSS_PI_237_DATA 0x002AF803
+#define DDRSS_PI_238_DATA 0x0001ADAF
+#define DDRSS_PI_239_DATA 0x00000005
+#define DDRSS_PI_240_DATA 0x0000006E
+#define DDRSS_PI_241_DATA 0x00000010
+#define DDRSS_PI_242_DATA 0x0004E200
+#define DDRSS_PI_243_DATA 0x0001ADAF
+#define DDRSS_PI_244_DATA 0x00000005
+#define DDRSS_PI_245_DATA 0x00000C80
+#define DDRSS_PI_246_DATA 0x000001CC
+#define DDRSS_PI_247_DATA 0x0004E200
+#define DDRSS_PI_248_DATA 0x0001ADAF
+#define DDRSS_PI_249_DATA 0x00000005
+#define DDRSS_PI_250_DATA 0x00000C80
+#define DDRSS_PI_251_DATA 0x010001CC
+#define DDRSS_PI_252_DATA 0x00370040
+#define DDRSS_PI_253_DATA 0x00010008
+#define DDRSS_PI_254_DATA 0x06400040
+#define DDRSS_PI_255_DATA 0x00010030
+#define DDRSS_PI_256_DATA 0x06400040
+#define DDRSS_PI_257_DATA 0x00000330
+#define DDRSS_PI_258_DATA 0x00500050
+#define DDRSS_PI_259_DATA 0x08040404
+#define DDRSS_PI_260_DATA 0x00000055
+#define DDRSS_PI_261_DATA 0x55083C5A
+#define DDRSS_PI_262_DATA 0x5A000000
+#define DDRSS_PI_263_DATA 0x0055083C
+#define DDRSS_PI_264_DATA 0x3C5A0000
+#define DDRSS_PI_265_DATA 0x00005508
+#define DDRSS_PI_266_DATA 0x0C3C5A00
+#define DDRSS_PI_267_DATA 0x080F0E0D
+#define DDRSS_PI_268_DATA 0x000B0A09
+#define DDRSS_PI_269_DATA 0x00030201
+#define DDRSS_PI_270_DATA 0x01000000
+#define DDRSS_PI_271_DATA 0x04020201
+#define DDRSS_PI_272_DATA 0x00080804
+#define DDRSS_PI_273_DATA 0x00000000
+#define DDRSS_PI_274_DATA 0x00000000
+#define DDRSS_PI_275_DATA 0x45AB0084
+#define DDRSS_PI_276_DATA 0x001D0F27
+#define DDRSS_PI_277_DATA 0x45AB2DD4
+#define DDRSS_PI_278_DATA 0x001D0F27
+#define DDRSS_PI_279_DATA 0x45AB2DD4
+#define DDRSS_PI_280_DATA 0x001D0F27
+#define DDRSS_PI_281_DATA 0x45AB0084
+#define DDRSS_PI_282_DATA 0x001D0F27
+#define DDRSS_PI_283_DATA 0x45AB2DD4
+#define DDRSS_PI_284_DATA 0x001D0F27
+#define DDRSS_PI_285_DATA 0x45AB2DD4
+#define DDRSS_PI_286_DATA 0x001D0F27
+#define DDRSS_PI_287_DATA 0x45AB0084
+#define DDRSS_PI_288_DATA 0x001D0F27
+#define DDRSS_PI_289_DATA 0x45AB2DD4
+#define DDRSS_PI_290_DATA 0x001D0F27
+#define DDRSS_PI_291_DATA 0x45AB2DD4
+#define DDRSS_PI_292_DATA 0x001D0F27
+#define DDRSS_PI_293_DATA 0x45AB0084
+#define DDRSS_PI_294_DATA 0x001D0F27
+#define DDRSS_PI_295_DATA 0x45AB2DD4
+#define DDRSS_PI_296_DATA 0x001D0F27
+#define DDRSS_PI_297_DATA 0x45AB2DD4
+#define DDRSS_PI_298_DATA 0x001D0F27
+#define DDRSS_PI_299_DATA 0x00000000
+
+#define DDRSS_PHY_00_DATA 0x000004F0
+#define DDRSS_PHY_01_DATA 0x00000000
+#define DDRSS_PHY_02_DATA 0x00030200
+#define DDRSS_PHY_03_DATA 0x00000000
+#define DDRSS_PHY_04_DATA 0x00000000
+#define DDRSS_PHY_05_DATA 0x01030000
+#define DDRSS_PHY_06_DATA 0x00010000
+#define DDRSS_PHY_07_DATA 0x01030004
+#define DDRSS_PHY_08_DATA 0x01000000
+#define DDRSS_PHY_09_DATA 0x00000000
+#define DDRSS_PHY_10_DATA 0x00000000
+#define DDRSS_PHY_11_DATA 0x01000001
+#define DDRSS_PHY_12_DATA 0x00000100
+#define DDRSS_PHY_13_DATA 0x000800C0
+#define DDRSS_PHY_14_DATA 0x060100CC
+#define DDRSS_PHY_15_DATA 0x00030066
+#define DDRSS_PHY_16_DATA 0x00000000
+#define DDRSS_PHY_17_DATA 0x00000301
+#define DDRSS_PHY_18_DATA 0x0000AAAA
+#define DDRSS_PHY_19_DATA 0x00005555
+#define DDRSS_PHY_20_DATA 0x0000B5B5
+#define DDRSS_PHY_21_DATA 0x00004A4A
+#define DDRSS_PHY_22_DATA 0x00005656
+#define DDRSS_PHY_23_DATA 0x0000A9A9
+#define DDRSS_PHY_24_DATA 0x0000A9A9
+#define DDRSS_PHY_25_DATA 0x0000B5B5
+#define DDRSS_PHY_26_DATA 0x00000000
+#define DDRSS_PHY_27_DATA 0x00000000
+#define DDRSS_PHY_28_DATA 0x2A000000
+#define DDRSS_PHY_29_DATA 0x00000808
+#define DDRSS_PHY_30_DATA 0x0F000000
+#define DDRSS_PHY_31_DATA 0x00000F0F
+#define DDRSS_PHY_32_DATA 0x10400000
+#define DDRSS_PHY_33_DATA 0x0C002006
+#define DDRSS_PHY_34_DATA 0x00000000
+#define DDRSS_PHY_35_DATA 0x00000000
+#define DDRSS_PHY_36_DATA 0x55555555
+#define DDRSS_PHY_37_DATA 0xAAAAAAAA
+#define DDRSS_PHY_38_DATA 0x55555555
+#define DDRSS_PHY_39_DATA 0xAAAAAAAA
+#define DDRSS_PHY_40_DATA 0x00005555
+#define DDRSS_PHY_41_DATA 0x01000100
+#define DDRSS_PHY_42_DATA 0x00800180
+#define DDRSS_PHY_43_DATA 0x00000001
+#define DDRSS_PHY_44_DATA 0x00000000
+#define DDRSS_PHY_45_DATA 0x00000000
+#define DDRSS_PHY_46_DATA 0x00000000
+#define DDRSS_PHY_47_DATA 0x00000000
+#define DDRSS_PHY_48_DATA 0x00000000
+#define DDRSS_PHY_49_DATA 0x00000000
+#define DDRSS_PHY_50_DATA 0x00000000
+#define DDRSS_PHY_51_DATA 0x00000000
+#define DDRSS_PHY_52_DATA 0x00000000
+#define DDRSS_PHY_53_DATA 0x00000000
+#define DDRSS_PHY_54_DATA 0x00000000
+#define DDRSS_PHY_55_DATA 0x00000000
+#define DDRSS_PHY_56_DATA 0x00000000
+#define DDRSS_PHY_57_DATA 0x00000000
+#define DDRSS_PHY_58_DATA 0x00000000
+#define DDRSS_PHY_59_DATA 0x00000000
+#define DDRSS_PHY_60_DATA 0x00000000
+#define DDRSS_PHY_61_DATA 0x00000000
+#define DDRSS_PHY_62_DATA 0x00000000
+#define DDRSS_PHY_63_DATA 0x00000000
+#define DDRSS_PHY_64_DATA 0x00000000
+#define DDRSS_PHY_65_DATA 0x00000000
+#define DDRSS_PHY_66_DATA 0x00000104
+#define DDRSS_PHY_67_DATA 0x00000120
+#define DDRSS_PHY_68_DATA 0x00000000
+#define DDRSS_PHY_69_DATA 0x00000000
+#define DDRSS_PHY_70_DATA 0x00000000
+#define DDRSS_PHY_71_DATA 0x00000000
+#define DDRSS_PHY_72_DATA 0x00000000
+#define DDRSS_PHY_73_DATA 0x00000000
+#define DDRSS_PHY_74_DATA 0x00000000
+#define DDRSS_PHY_75_DATA 0x00000001
+#define DDRSS_PHY_76_DATA 0x07FF0000
+#define DDRSS_PHY_77_DATA 0x0080081F
+#define DDRSS_PHY_78_DATA 0x00081020
+#define DDRSS_PHY_79_DATA 0x04010000
+#define DDRSS_PHY_80_DATA 0x00000000
+#define DDRSS_PHY_81_DATA 0x00000000
+#define DDRSS_PHY_82_DATA 0x00000000
+#define DDRSS_PHY_83_DATA 0x00000100
+#define DDRSS_PHY_84_DATA 0x01BB0B01
+#define DDRSS_PHY_85_DATA 0x1003BB0B
+#define DDRSS_PHY_86_DATA 0x20000140
+#define DDRSS_PHY_87_DATA 0x07FF0200
+#define DDRSS_PHY_88_DATA 0x0000DD01
+#define DDRSS_PHY_89_DATA 0x10100303
+#define DDRSS_PHY_90_DATA 0x10101010
+#define DDRSS_PHY_91_DATA 0x10101010
+#define DDRSS_PHY_92_DATA 0x00021010
+#define DDRSS_PHY_93_DATA 0x00100010
+#define DDRSS_PHY_94_DATA 0x00100010
+#define DDRSS_PHY_95_DATA 0x00100010
+#define DDRSS_PHY_96_DATA 0x00100010
+#define DDRSS_PHY_97_DATA 0x00050010
+#define DDRSS_PHY_98_DATA 0x51517041
+#define DDRSS_PHY_99_DATA 0x31C06000
+#define DDRSS_PHY_100_DATA 0x07AB0340
+#define DDRSS_PHY_101_DATA 0x00C0C001
+#define DDRSS_PHY_102_DATA 0x0B0A0001
+#define DDRSS_PHY_103_DATA 0x10001000
+#define DDRSS_PHY_104_DATA 0x0C073E42
+#define DDRSS_PHY_105_DATA 0x0F0C2D01
+#define DDRSS_PHY_106_DATA 0x01000140
+#define DDRSS_PHY_107_DATA 0x0C000420
+#define DDRSS_PHY_108_DATA 0x00000198
+#define DDRSS_PHY_109_DATA 0x0A0000D0
+#define DDRSS_PHY_110_DATA 0x00030200
+#define DDRSS_PHY_111_DATA 0x02800000
+#define DDRSS_PHY_112_DATA 0x80800000
+#define DDRSS_PHY_113_DATA 0x000B2010
+#define DDRSS_PHY_114_DATA 0x76543210
+#define DDRSS_PHY_115_DATA 0x00000008
+#define DDRSS_PHY_116_DATA 0x02800280
+#define DDRSS_PHY_117_DATA 0x02800280
+#define DDRSS_PHY_118_DATA 0x02800280
+#define DDRSS_PHY_119_DATA 0x02800280
+#define DDRSS_PHY_120_DATA 0x00000280
+#define DDRSS_PHY_121_DATA 0x0000A000
+#define DDRSS_PHY_122_DATA 0x00A000A0
+#define DDRSS_PHY_123_DATA 0x00A000A0
+#define DDRSS_PHY_124_DATA 0x00A000A0
+#define DDRSS_PHY_125_DATA 0x00A000A0
+#define DDRSS_PHY_126_DATA 0x00A000A0
+#define DDRSS_PHY_127_DATA 0x00A000A0
+#define DDRSS_PHY_128_DATA 0x00A000A0
+#define DDRSS_PHY_129_DATA 0x00A000A0
+#define DDRSS_PHY_130_DATA 0x011900A0
+#define DDRSS_PHY_131_DATA 0x01A00004
+#define DDRSS_PHY_132_DATA 0x00000000
+#define DDRSS_PHY_133_DATA 0x00000000
+#define DDRSS_PHY_134_DATA 0x00080200
+#define DDRSS_PHY_135_DATA 0x00000000
+#define DDRSS_PHY_136_DATA 0x20202000
+#define DDRSS_PHY_137_DATA 0x20202020
+#define DDRSS_PHY_138_DATA 0xF0F02020
+#define DDRSS_PHY_139_DATA 0x00000000
+#define DDRSS_PHY_140_DATA 0x00000000
+#define DDRSS_PHY_141_DATA 0x00000000
+#define DDRSS_PHY_142_DATA 0x00000000
+#define DDRSS_PHY_143_DATA 0x00000000
+#define DDRSS_PHY_144_DATA 0x00000000
+#define DDRSS_PHY_145_DATA 0x00000000
+#define DDRSS_PHY_146_DATA 0x00000000
+#define DDRSS_PHY_147_DATA 0x00000000
+#define DDRSS_PHY_148_DATA 0x00000000
+#define DDRSS_PHY_149_DATA 0x00000000
+#define DDRSS_PHY_150_DATA 0x00000000
+#define DDRSS_PHY_151_DATA 0x00000000
+#define DDRSS_PHY_152_DATA 0x00000000
+#define DDRSS_PHY_153_DATA 0x00000000
+#define DDRSS_PHY_154_DATA 0x00000000
+#define DDRSS_PHY_155_DATA 0x00000000
+#define DDRSS_PHY_156_DATA 0x00000000
+#define DDRSS_PHY_157_DATA 0x00000000
+#define DDRSS_PHY_158_DATA 0x00000000
+#define DDRSS_PHY_159_DATA 0x00000000
+#define DDRSS_PHY_160_DATA 0x00000000
+#define DDRSS_PHY_161_DATA 0x00000000
+#define DDRSS_PHY_162_DATA 0x00000000
+#define DDRSS_PHY_163_DATA 0x00000000
+#define DDRSS_PHY_164_DATA 0x00000000
+#define DDRSS_PHY_165_DATA 0x00000000
+#define DDRSS_PHY_166_DATA 0x00000000
+#define DDRSS_PHY_167_DATA 0x00000000
+#define DDRSS_PHY_168_DATA 0x00000000
+#define DDRSS_PHY_169_DATA 0x00000000
+#define DDRSS_PHY_170_DATA 0x00000000
+#define DDRSS_PHY_171_DATA 0x00000000
+#define DDRSS_PHY_172_DATA 0x00000000
+#define DDRSS_PHY_173_DATA 0x00000000
+#define DDRSS_PHY_174_DATA 0x00000000
+#define DDRSS_PHY_175_DATA 0x00000000
+#define DDRSS_PHY_176_DATA 0x00000000
+#define DDRSS_PHY_177_DATA 0x00000000
+#define DDRSS_PHY_178_DATA 0x00000000
+#define DDRSS_PHY_179_DATA 0x00000000
+#define DDRSS_PHY_180_DATA 0x00000000
+#define DDRSS_PHY_181_DATA 0x00000000
+#define DDRSS_PHY_182_DATA 0x00000000
+#define DDRSS_PHY_183_DATA 0x00000000
+#define DDRSS_PHY_184_DATA 0x00000000
+#define DDRSS_PHY_185_DATA 0x00000000
+#define DDRSS_PHY_186_DATA 0x00000000
+#define DDRSS_PHY_187_DATA 0x00000000
+#define DDRSS_PHY_188_DATA 0x00000000
+#define DDRSS_PHY_189_DATA 0x00000000
+#define DDRSS_PHY_190_DATA 0x00000000
+#define DDRSS_PHY_191_DATA 0x00000000
+#define DDRSS_PHY_192_DATA 0x00000000
+#define DDRSS_PHY_193_DATA 0x00000000
+#define DDRSS_PHY_194_DATA 0x00000000
+#define DDRSS_PHY_195_DATA 0x00000000
+#define DDRSS_PHY_196_DATA 0x00000000
+#define DDRSS_PHY_197_DATA 0x00000000
+#define DDRSS_PHY_198_DATA 0x00000000
+#define DDRSS_PHY_199_DATA 0x00000000
+#define DDRSS_PHY_200_DATA 0x00000000
+#define DDRSS_PHY_201_DATA 0x00000000
+#define DDRSS_PHY_202_DATA 0x00000000
+#define DDRSS_PHY_203_DATA 0x00000000
+#define DDRSS_PHY_204_DATA 0x00000000
+#define DDRSS_PHY_205_DATA 0x00000000
+#define DDRSS_PHY_206_DATA 0x00000000
+#define DDRSS_PHY_207_DATA 0x00000000
+#define DDRSS_PHY_208_DATA 0x00000000
+#define DDRSS_PHY_209_DATA 0x00000000
+#define DDRSS_PHY_210_DATA 0x00000000
+#define DDRSS_PHY_211_DATA 0x00000000
+#define DDRSS_PHY_212_DATA 0x00000000
+#define DDRSS_PHY_213_DATA 0x00000000
+#define DDRSS_PHY_214_DATA 0x00000000
+#define DDRSS_PHY_215_DATA 0x00000000
+#define DDRSS_PHY_216_DATA 0x00000000
+#define DDRSS_PHY_217_DATA 0x00000000
+#define DDRSS_PHY_218_DATA 0x00000000
+#define DDRSS_PHY_219_DATA 0x00000000
+#define DDRSS_PHY_220_DATA 0x00000000
+#define DDRSS_PHY_221_DATA 0x00000000
+#define DDRSS_PHY_222_DATA 0x00000000
+#define DDRSS_PHY_223_DATA 0x00000000
+#define DDRSS_PHY_224_DATA 0x00000000
+#define DDRSS_PHY_225_DATA 0x00000000
+#define DDRSS_PHY_226_DATA 0x00000000
+#define DDRSS_PHY_227_DATA 0x00000000
+#define DDRSS_PHY_228_DATA 0x00000000
+#define DDRSS_PHY_229_DATA 0x00000000
+#define DDRSS_PHY_230_DATA 0x00000000
+#define DDRSS_PHY_231_DATA 0x00000000
+#define DDRSS_PHY_232_DATA 0x00000000
+#define DDRSS_PHY_233_DATA 0x00000000
+#define DDRSS_PHY_234_DATA 0x00000000
+#define DDRSS_PHY_235_DATA 0x00000000
+#define DDRSS_PHY_236_DATA 0x00000000
+#define DDRSS_PHY_237_DATA 0x00000000
+#define DDRSS_PHY_238_DATA 0x00000000
+#define DDRSS_PHY_239_DATA 0x00000000
+#define DDRSS_PHY_240_DATA 0x00000000
+#define DDRSS_PHY_241_DATA 0x00000000
+#define DDRSS_PHY_242_DATA 0x00000000
+#define DDRSS_PHY_243_DATA 0x00000000
+#define DDRSS_PHY_244_DATA 0x00000000
+#define DDRSS_PHY_245_DATA 0x00000000
+#define DDRSS_PHY_246_DATA 0x00000000
+#define DDRSS_PHY_247_DATA 0x00000000
+#define DDRSS_PHY_248_DATA 0x00000000
+#define DDRSS_PHY_249_DATA 0x00000000
+#define DDRSS_PHY_250_DATA 0x00000000
+#define DDRSS_PHY_251_DATA 0x00000000
+#define DDRSS_PHY_252_DATA 0x00000000
+#define DDRSS_PHY_253_DATA 0x00000000
+#define DDRSS_PHY_254_DATA 0x00000000
+#define DDRSS_PHY_255_DATA 0x00000000
+#define DDRSS_PHY_256_DATA 0x000004F0
+#define DDRSS_PHY_257_DATA 0x00000000
+#define DDRSS_PHY_258_DATA 0x00030200
+#define DDRSS_PHY_259_DATA 0x00000000
+#define DDRSS_PHY_260_DATA 0x00000000
+#define DDRSS_PHY_261_DATA 0x01030000
+#define DDRSS_PHY_262_DATA 0x00010000
+#define DDRSS_PHY_263_DATA 0x01030004
+#define DDRSS_PHY_264_DATA 0x01000000
+#define DDRSS_PHY_265_DATA 0x00000000
+#define DDRSS_PHY_266_DATA 0x00000000
+#define DDRSS_PHY_267_DATA 0x01000001
+#define DDRSS_PHY_268_DATA 0x00000100
+#define DDRSS_PHY_269_DATA 0x000800C0
+#define DDRSS_PHY_270_DATA 0x060100CC
+#define DDRSS_PHY_271_DATA 0x00030066
+#define DDRSS_PHY_272_DATA 0x00000000
+#define DDRSS_PHY_273_DATA 0x00000301
+#define DDRSS_PHY_274_DATA 0x0000AAAA
+#define DDRSS_PHY_275_DATA 0x00005555
+#define DDRSS_PHY_276_DATA 0x0000B5B5
+#define DDRSS_PHY_277_DATA 0x00004A4A
+#define DDRSS_PHY_278_DATA 0x00005656
+#define DDRSS_PHY_279_DATA 0x0000A9A9
+#define DDRSS_PHY_280_DATA 0x0000A9A9
+#define DDRSS_PHY_281_DATA 0x0000B5B5
+#define DDRSS_PHY_282_DATA 0x00000000
+#define DDRSS_PHY_283_DATA 0x00000000
+#define DDRSS_PHY_284_DATA 0x2A000000
+#define DDRSS_PHY_285_DATA 0x00000808
+#define DDRSS_PHY_286_DATA 0x0F000000
+#define DDRSS_PHY_287_DATA 0x00000F0F
+#define DDRSS_PHY_288_DATA 0x10400000
+#define DDRSS_PHY_289_DATA 0x0C002006
+#define DDRSS_PHY_290_DATA 0x00000000
+#define DDRSS_PHY_291_DATA 0x00000000
+#define DDRSS_PHY_292_DATA 0x55555555
+#define DDRSS_PHY_293_DATA 0xAAAAAAAA
+#define DDRSS_PHY_294_DATA 0x55555555
+#define DDRSS_PHY_295_DATA 0xAAAAAAAA
+#define DDRSS_PHY_296_DATA 0x00005555
+#define DDRSS_PHY_297_DATA 0x01000100
+#define DDRSS_PHY_298_DATA 0x00800180
+#define DDRSS_PHY_299_DATA 0x00000000
+#define DDRSS_PHY_300_DATA 0x00000000
+#define DDRSS_PHY_301_DATA 0x00000000
+#define DDRSS_PHY_302_DATA 0x00000000
+#define DDRSS_PHY_303_DATA 0x00000000
+#define DDRSS_PHY_304_DATA 0x00000000
+#define DDRSS_PHY_305_DATA 0x00000000
+#define DDRSS_PHY_306_DATA 0x00000000
+#define DDRSS_PHY_307_DATA 0x00000000
+#define DDRSS_PHY_308_DATA 0x00000000
+#define DDRSS_PHY_309_DATA 0x00000000
+#define DDRSS_PHY_310_DATA 0x00000000
+#define DDRSS_PHY_311_DATA 0x00000000
+#define DDRSS_PHY_312_DATA 0x00000000
+#define DDRSS_PHY_313_DATA 0x00000000
+#define DDRSS_PHY_314_DATA 0x00000000
+#define DDRSS_PHY_315_DATA 0x00000000
+#define DDRSS_PHY_316_DATA 0x00000000
+#define DDRSS_PHY_317_DATA 0x00000000
+#define DDRSS_PHY_318_DATA 0x00000000
+#define DDRSS_PHY_319_DATA 0x00000000
+#define DDRSS_PHY_320_DATA 0x00000000
+#define DDRSS_PHY_321_DATA 0x00000000
+#define DDRSS_PHY_322_DATA 0x00000104
+#define DDRSS_PHY_323_DATA 0x00000120
+#define DDRSS_PHY_324_DATA 0x00000000
+#define DDRSS_PHY_325_DATA 0x00000000
+#define DDRSS_PHY_326_DATA 0x00000000
+#define DDRSS_PHY_327_DATA 0x00000000
+#define DDRSS_PHY_328_DATA 0x00000000
+#define DDRSS_PHY_329_DATA 0x00000000
+#define DDRSS_PHY_330_DATA 0x00000000
+#define DDRSS_PHY_331_DATA 0x00000001
+#define DDRSS_PHY_332_DATA 0x07FF0000
+#define DDRSS_PHY_333_DATA 0x0080081F
+#define DDRSS_PHY_334_DATA 0x00081020
+#define DDRSS_PHY_335_DATA 0x04010000
+#define DDRSS_PHY_336_DATA 0x00000000
+#define DDRSS_PHY_337_DATA 0x00000000
+#define DDRSS_PHY_338_DATA 0x00000000
+#define DDRSS_PHY_339_DATA 0x00000100
+#define DDRSS_PHY_340_DATA 0x01BB0B01
+#define DDRSS_PHY_341_DATA 0x1003BB0B
+#define DDRSS_PHY_342_DATA 0x20000140
+#define DDRSS_PHY_343_DATA 0x07FF0200
+#define DDRSS_PHY_344_DATA 0x0000DD01
+#define DDRSS_PHY_345_DATA 0x10100303
+#define DDRSS_PHY_346_DATA 0x10101010
+#define DDRSS_PHY_347_DATA 0x10101010
+#define DDRSS_PHY_348_DATA 0x00021010
+#define DDRSS_PHY_349_DATA 0x00100010
+#define DDRSS_PHY_350_DATA 0x00100010
+#define DDRSS_PHY_351_DATA 0x00100010
+#define DDRSS_PHY_352_DATA 0x00100010
+#define DDRSS_PHY_353_DATA 0x00050010
+#define DDRSS_PHY_354_DATA 0x51517041
+#define DDRSS_PHY_355_DATA 0x31C06000
+#define DDRSS_PHY_356_DATA 0x07AB0340
+#define DDRSS_PHY_357_DATA 0x00C0C001
+#define DDRSS_PHY_358_DATA 0x0B0A0001
+#define DDRSS_PHY_359_DATA 0x10001000
+#define DDRSS_PHY_360_DATA 0x0C073E42
+#define DDRSS_PHY_361_DATA 0x0F0C2D01
+#define DDRSS_PHY_362_DATA 0x01000140
+#define DDRSS_PHY_363_DATA 0x0C000420
+#define DDRSS_PHY_364_DATA 0x00000198
+#define DDRSS_PHY_365_DATA 0x0A0000D0
+#define DDRSS_PHY_366_DATA 0x00030200
+#define DDRSS_PHY_367_DATA 0x02800000
+#define DDRSS_PHY_368_DATA 0x80800000
+#define DDRSS_PHY_369_DATA 0x000B2010
+#define DDRSS_PHY_370_DATA 0x76543210
+#define DDRSS_PHY_371_DATA 0x00000008
+#define DDRSS_PHY_372_DATA 0x02800280
+#define DDRSS_PHY_373_DATA 0x02800280
+#define DDRSS_PHY_374_DATA 0x02800280
+#define DDRSS_PHY_375_DATA 0x02800280
+#define DDRSS_PHY_376_DATA 0x00000280
+#define DDRSS_PHY_377_DATA 0x0000A000
+#define DDRSS_PHY_378_DATA 0x00A000A0
+#define DDRSS_PHY_379_DATA 0x00A000A0
+#define DDRSS_PHY_380_DATA 0x00A000A0
+#define DDRSS_PHY_381_DATA 0x00A000A0
+#define DDRSS_PHY_382_DATA 0x00A000A0
+#define DDRSS_PHY_383_DATA 0x00A000A0
+#define DDRSS_PHY_384_DATA 0x00A000A0
+#define DDRSS_PHY_385_DATA 0x00A000A0
+#define DDRSS_PHY_386_DATA 0x011900A0
+#define DDRSS_PHY_387_DATA 0x01A00004
+#define DDRSS_PHY_388_DATA 0x00000000
+#define DDRSS_PHY_389_DATA 0x00000000
+#define DDRSS_PHY_390_DATA 0x00080200
+#define DDRSS_PHY_391_DATA 0x00000000
+#define DDRSS_PHY_392_DATA 0x20202000
+#define DDRSS_PHY_393_DATA 0x20202020
+#define DDRSS_PHY_394_DATA 0xF0F02020
+#define DDRSS_PHY_395_DATA 0x00000000
+#define DDRSS_PHY_396_DATA 0x00000000
+#define DDRSS_PHY_397_DATA 0x00000000
+#define DDRSS_PHY_398_DATA 0x00000000
+#define DDRSS_PHY_399_DATA 0x00000000
+#define DDRSS_PHY_400_DATA 0x00000000
+#define DDRSS_PHY_401_DATA 0x00000000
+#define DDRSS_PHY_402_DATA 0x00000000
+#define DDRSS_PHY_403_DATA 0x00000000
+#define DDRSS_PHY_404_DATA 0x00000000
+#define DDRSS_PHY_405_DATA 0x00000000
+#define DDRSS_PHY_406_DATA 0x00000000
+#define DDRSS_PHY_407_DATA 0x00000000
+#define DDRSS_PHY_408_DATA 0x00000000
+#define DDRSS_PHY_409_DATA 0x00000000
+#define DDRSS_PHY_410_DATA 0x00000000
+#define DDRSS_PHY_411_DATA 0x00000000
+#define DDRSS_PHY_412_DATA 0x00000000
+#define DDRSS_PHY_413_DATA 0x00000000
+#define DDRSS_PHY_414_DATA 0x00000000
+#define DDRSS_PHY_415_DATA 0x00000000
+#define DDRSS_PHY_416_DATA 0x00000000
+#define DDRSS_PHY_417_DATA 0x00000000
+#define DDRSS_PHY_418_DATA 0x00000000
+#define DDRSS_PHY_419_DATA 0x00000000
+#define DDRSS_PHY_420_DATA 0x00000000
+#define DDRSS_PHY_421_DATA 0x00000000
+#define DDRSS_PHY_422_DATA 0x00000000
+#define DDRSS_PHY_423_DATA 0x00000000
+#define DDRSS_PHY_424_DATA 0x00000000
+#define DDRSS_PHY_425_DATA 0x00000000
+#define DDRSS_PHY_426_DATA 0x00000000
+#define DDRSS_PHY_427_DATA 0x00000000
+#define DDRSS_PHY_428_DATA 0x00000000
+#define DDRSS_PHY_429_DATA 0x00000000
+#define DDRSS_PHY_430_DATA 0x00000000
+#define DDRSS_PHY_431_DATA 0x00000000
+#define DDRSS_PHY_432_DATA 0x00000000
+#define DDRSS_PHY_433_DATA 0x00000000
+#define DDRSS_PHY_434_DATA 0x00000000
+#define DDRSS_PHY_435_DATA 0x00000000
+#define DDRSS_PHY_436_DATA 0x00000000
+#define DDRSS_PHY_437_DATA 0x00000000
+#define DDRSS_PHY_438_DATA 0x00000000
+#define DDRSS_PHY_439_DATA 0x00000000
+#define DDRSS_PHY_440_DATA 0x00000000
+#define DDRSS_PHY_441_DATA 0x00000000
+#define DDRSS_PHY_442_DATA 0x00000000
+#define DDRSS_PHY_443_DATA 0x00000000
+#define DDRSS_PHY_444_DATA 0x00000000
+#define DDRSS_PHY_445_DATA 0x00000000
+#define DDRSS_PHY_446_DATA 0x00000000
+#define DDRSS_PHY_447_DATA 0x00000000
+#define DDRSS_PHY_448_DATA 0x00000000
+#define DDRSS_PHY_449_DATA 0x00000000
+#define DDRSS_PHY_450_DATA 0x00000000
+#define DDRSS_PHY_451_DATA 0x00000000
+#define DDRSS_PHY_452_DATA 0x00000000
+#define DDRSS_PHY_453_DATA 0x00000000
+#define DDRSS_PHY_454_DATA 0x00000000
+#define DDRSS_PHY_455_DATA 0x00000000
+#define DDRSS_PHY_456_DATA 0x00000000
+#define DDRSS_PHY_457_DATA 0x00000000
+#define DDRSS_PHY_458_DATA 0x00000000
+#define DDRSS_PHY_459_DATA 0x00000000
+#define DDRSS_PHY_460_DATA 0x00000000
+#define DDRSS_PHY_461_DATA 0x00000000
+#define DDRSS_PHY_462_DATA 0x00000000
+#define DDRSS_PHY_463_DATA 0x00000000
+#define DDRSS_PHY_464_DATA 0x00000000
+#define DDRSS_PHY_465_DATA 0x00000000
+#define DDRSS_PHY_466_DATA 0x00000000
+#define DDRSS_PHY_467_DATA 0x00000000
+#define DDRSS_PHY_468_DATA 0x00000000
+#define DDRSS_PHY_469_DATA 0x00000000
+#define DDRSS_PHY_470_DATA 0x00000000
+#define DDRSS_PHY_471_DATA 0x00000000
+#define DDRSS_PHY_472_DATA 0x00000000
+#define DDRSS_PHY_473_DATA 0x00000000
+#define DDRSS_PHY_474_DATA 0x00000000
+#define DDRSS_PHY_475_DATA 0x00000000
+#define DDRSS_PHY_476_DATA 0x00000000
+#define DDRSS_PHY_477_DATA 0x00000000
+#define DDRSS_PHY_478_DATA 0x00000000
+#define DDRSS_PHY_479_DATA 0x00000000
+#define DDRSS_PHY_480_DATA 0x00000000
+#define DDRSS_PHY_481_DATA 0x00000000
+#define DDRSS_PHY_482_DATA 0x00000000
+#define DDRSS_PHY_483_DATA 0x00000000
+#define DDRSS_PHY_484_DATA 0x00000000
+#define DDRSS_PHY_485_DATA 0x00000000
+#define DDRSS_PHY_486_DATA 0x00000000
+#define DDRSS_PHY_487_DATA 0x00000000
+#define DDRSS_PHY_488_DATA 0x00000000
+#define DDRSS_PHY_489_DATA 0x00000000
+#define DDRSS_PHY_490_DATA 0x00000000
+#define DDRSS_PHY_491_DATA 0x00000000
+#define DDRSS_PHY_492_DATA 0x00000000
+#define DDRSS_PHY_493_DATA 0x00000000
+#define DDRSS_PHY_494_DATA 0x00000000
+#define DDRSS_PHY_495_DATA 0x00000000
+#define DDRSS_PHY_496_DATA 0x00000000
+#define DDRSS_PHY_497_DATA 0x00000000
+#define DDRSS_PHY_498_DATA 0x00000000
+#define DDRSS_PHY_499_DATA 0x00000000
+#define DDRSS_PHY_500_DATA 0x00000000
+#define DDRSS_PHY_501_DATA 0x00000000
+#define DDRSS_PHY_502_DATA 0x00000000
+#define DDRSS_PHY_503_DATA 0x00000000
+#define DDRSS_PHY_504_DATA 0x00000000
+#define DDRSS_PHY_505_DATA 0x00000000
+#define DDRSS_PHY_506_DATA 0x00000000
+#define DDRSS_PHY_507_DATA 0x00000000
+#define DDRSS_PHY_508_DATA 0x00000000
+#define DDRSS_PHY_509_DATA 0x00000000
+#define DDRSS_PHY_510_DATA 0x00000000
+#define DDRSS_PHY_511_DATA 0x00000000
+#define DDRSS_PHY_512_DATA 0x000004F0
+#define DDRSS_PHY_513_DATA 0x00000000
+#define DDRSS_PHY_514_DATA 0x00030200
+#define DDRSS_PHY_515_DATA 0x00000000
+#define DDRSS_PHY_516_DATA 0x00000000
+#define DDRSS_PHY_517_DATA 0x01030000
+#define DDRSS_PHY_518_DATA 0x00010000
+#define DDRSS_PHY_519_DATA 0x01030004
+#define DDRSS_PHY_520_DATA 0x01000000
+#define DDRSS_PHY_521_DATA 0x00000000
+#define DDRSS_PHY_522_DATA 0x00000000
+#define DDRSS_PHY_523_DATA 0x01000001
+#define DDRSS_PHY_524_DATA 0x00000100
+#define DDRSS_PHY_525_DATA 0x000800C0
+#define DDRSS_PHY_526_DATA 0x060100CC
+#define DDRSS_PHY_527_DATA 0x00030066
+#define DDRSS_PHY_528_DATA 0x00000000
+#define DDRSS_PHY_529_DATA 0x00000301
+#define DDRSS_PHY_530_DATA 0x0000AAAA
+#define DDRSS_PHY_531_DATA 0x00005555
+#define DDRSS_PHY_532_DATA 0x0000B5B5
+#define DDRSS_PHY_533_DATA 0x00004A4A
+#define DDRSS_PHY_534_DATA 0x00005656
+#define DDRSS_PHY_535_DATA 0x0000A9A9
+#define DDRSS_PHY_536_DATA 0x0000A9A9
+#define DDRSS_PHY_537_DATA 0x0000B5B5
+#define DDRSS_PHY_538_DATA 0x00000000
+#define DDRSS_PHY_539_DATA 0x00000000
+#define DDRSS_PHY_540_DATA 0x2A000000
+#define DDRSS_PHY_541_DATA 0x00000808
+#define DDRSS_PHY_542_DATA 0x0F000000
+#define DDRSS_PHY_543_DATA 0x00000F0F
+#define DDRSS_PHY_544_DATA 0x10400000
+#define DDRSS_PHY_545_DATA 0x0C002006
+#define DDRSS_PHY_546_DATA 0x00000000
+#define DDRSS_PHY_547_DATA 0x00000000
+#define DDRSS_PHY_548_DATA 0x55555555
+#define DDRSS_PHY_549_DATA 0xAAAAAAAA
+#define DDRSS_PHY_550_DATA 0x55555555
+#define DDRSS_PHY_551_DATA 0xAAAAAAAA
+#define DDRSS_PHY_552_DATA 0x00005555
+#define DDRSS_PHY_553_DATA 0x01000100
+#define DDRSS_PHY_554_DATA 0x00800180
+#define DDRSS_PHY_555_DATA 0x00000001
+#define DDRSS_PHY_556_DATA 0x00000000
+#define DDRSS_PHY_557_DATA 0x00000000
+#define DDRSS_PHY_558_DATA 0x00000000
+#define DDRSS_PHY_559_DATA 0x00000000
+#define DDRSS_PHY_560_DATA 0x00000000
+#define DDRSS_PHY_561_DATA 0x00000000
+#define DDRSS_PHY_562_DATA 0x00000000
+#define DDRSS_PHY_563_DATA 0x00000000
+#define DDRSS_PHY_564_DATA 0x00000000
+#define DDRSS_PHY_565_DATA 0x00000000
+#define DDRSS_PHY_566_DATA 0x00000000
+#define DDRSS_PHY_567_DATA 0x00000000
+#define DDRSS_PHY_568_DATA 0x00000000
+#define DDRSS_PHY_569_DATA 0x00000000
+#define DDRSS_PHY_570_DATA 0x00000000
+#define DDRSS_PHY_571_DATA 0x00000000
+#define DDRSS_PHY_572_DATA 0x00000000
+#define DDRSS_PHY_573_DATA 0x00000000
+#define DDRSS_PHY_574_DATA 0x00000000
+#define DDRSS_PHY_575_DATA 0x00000000
+#define DDRSS_PHY_576_DATA 0x00000000
+#define DDRSS_PHY_577_DATA 0x00000000
+#define DDRSS_PHY_578_DATA 0x00000104
+#define DDRSS_PHY_579_DATA 0x00000120
+#define DDRSS_PHY_580_DATA 0x00000000
+#define DDRSS_PHY_581_DATA 0x00000000
+#define DDRSS_PHY_582_DATA 0x00000000
+#define DDRSS_PHY_583_DATA 0x00000000
+#define DDRSS_PHY_584_DATA 0x00000000
+#define DDRSS_PHY_585_DATA 0x00000000
+#define DDRSS_PHY_586_DATA 0x00000000
+#define DDRSS_PHY_587_DATA 0x00000001
+#define DDRSS_PHY_588_DATA 0x07FF0000
+#define DDRSS_PHY_589_DATA 0x0080081F
+#define DDRSS_PHY_590_DATA 0x00081020
+#define DDRSS_PHY_591_DATA 0x04010000
+#define DDRSS_PHY_592_DATA 0x00000000
+#define DDRSS_PHY_593_DATA 0x00000000
+#define DDRSS_PHY_594_DATA 0x00000000
+#define DDRSS_PHY_595_DATA 0x00000100
+#define DDRSS_PHY_596_DATA 0x01BB0B01
+#define DDRSS_PHY_597_DATA 0x1003BB0B
+#define DDRSS_PHY_598_DATA 0x20000140
+#define DDRSS_PHY_599_DATA 0x07FF0200
+#define DDRSS_PHY_600_DATA 0x0000DD01
+#define DDRSS_PHY_601_DATA 0x10100303
+#define DDRSS_PHY_602_DATA 0x10101010
+#define DDRSS_PHY_603_DATA 0x10101010
+#define DDRSS_PHY_604_DATA 0x00021010
+#define DDRSS_PHY_605_DATA 0x00100010
+#define DDRSS_PHY_606_DATA 0x00100010
+#define DDRSS_PHY_607_DATA 0x00100010
+#define DDRSS_PHY_608_DATA 0x00100010
+#define DDRSS_PHY_609_DATA 0x00050010
+#define DDRSS_PHY_610_DATA 0x51517041
+#define DDRSS_PHY_611_DATA 0x31C06000
+#define DDRSS_PHY_612_DATA 0x07AB0340
+#define DDRSS_PHY_613_DATA 0x00C0C001
+#define DDRSS_PHY_614_DATA 0x0B0A0001
+#define DDRSS_PHY_615_DATA 0x10001000
+#define DDRSS_PHY_616_DATA 0x0C073E42
+#define DDRSS_PHY_617_DATA 0x0F0C2D01
+#define DDRSS_PHY_618_DATA 0x01000140
+#define DDRSS_PHY_619_DATA 0x0C000420
+#define DDRSS_PHY_620_DATA 0x00000198
+#define DDRSS_PHY_621_DATA 0x0A0000D0
+#define DDRSS_PHY_622_DATA 0x00030200
+#define DDRSS_PHY_623_DATA 0x02800000
+#define DDRSS_PHY_624_DATA 0x80800000
+#define DDRSS_PHY_625_DATA 0x000B2010
+#define DDRSS_PHY_626_DATA 0x76543210
+#define DDRSS_PHY_627_DATA 0x00000008
+#define DDRSS_PHY_628_DATA 0x02800280
+#define DDRSS_PHY_629_DATA 0x02800280
+#define DDRSS_PHY_630_DATA 0x02800280
+#define DDRSS_PHY_631_DATA 0x02800280
+#define DDRSS_PHY_632_DATA 0x00000280
+#define DDRSS_PHY_633_DATA 0x0000A000
+#define DDRSS_PHY_634_DATA 0x00A000A0
+#define DDRSS_PHY_635_DATA 0x00A000A0
+#define DDRSS_PHY_636_DATA 0x00A000A0
+#define DDRSS_PHY_637_DATA 0x00A000A0
+#define DDRSS_PHY_638_DATA 0x00A000A0
+#define DDRSS_PHY_639_DATA 0x00A000A0
+#define DDRSS_PHY_640_DATA 0x00A000A0
+#define DDRSS_PHY_641_DATA 0x00A000A0
+#define DDRSS_PHY_642_DATA 0x011900A0
+#define DDRSS_PHY_643_DATA 0x01A00004
+#define DDRSS_PHY_644_DATA 0x00000000
+#define DDRSS_PHY_645_DATA 0x00000000
+#define DDRSS_PHY_646_DATA 0x00080200
+#define DDRSS_PHY_647_DATA 0x00000000
+#define DDRSS_PHY_648_DATA 0x20202000
+#define DDRSS_PHY_649_DATA 0x20202020
+#define DDRSS_PHY_650_DATA 0xF0F02020
+#define DDRSS_PHY_651_DATA 0x00000000
+#define DDRSS_PHY_652_DATA 0x00000000
+#define DDRSS_PHY_653_DATA 0x00000000
+#define DDRSS_PHY_654_DATA 0x00000000
+#define DDRSS_PHY_655_DATA 0x00000000
+#define DDRSS_PHY_656_DATA 0x00000000
+#define DDRSS_PHY_657_DATA 0x00000000
+#define DDRSS_PHY_658_DATA 0x00000000
+#define DDRSS_PHY_659_DATA 0x00000000
+#define DDRSS_PHY_660_DATA 0x00000000
+#define DDRSS_PHY_661_DATA 0x00000000
+#define DDRSS_PHY_662_DATA 0x00000000
+#define DDRSS_PHY_663_DATA 0x00000000
+#define DDRSS_PHY_664_DATA 0x00000000
+#define DDRSS_PHY_665_DATA 0x00000000
+#define DDRSS_PHY_666_DATA 0x00000000
+#define DDRSS_PHY_667_DATA 0x00000000
+#define DDRSS_PHY_668_DATA 0x00000000
+#define DDRSS_PHY_669_DATA 0x00000000
+#define DDRSS_PHY_670_DATA 0x00000000
+#define DDRSS_PHY_671_DATA 0x00000000
+#define DDRSS_PHY_672_DATA 0x00000000
+#define DDRSS_PHY_673_DATA 0x00000000
+#define DDRSS_PHY_674_DATA 0x00000000
+#define DDRSS_PHY_675_DATA 0x00000000
+#define DDRSS_PHY_676_DATA 0x00000000
+#define DDRSS_PHY_677_DATA 0x00000000
+#define DDRSS_PHY_678_DATA 0x00000000
+#define DDRSS_PHY_679_DATA 0x00000000
+#define DDRSS_PHY_680_DATA 0x00000000
+#define DDRSS_PHY_681_DATA 0x00000000
+#define DDRSS_PHY_682_DATA 0x00000000
+#define DDRSS_PHY_683_DATA 0x00000000
+#define DDRSS_PHY_684_DATA 0x00000000
+#define DDRSS_PHY_685_DATA 0x00000000
+#define DDRSS_PHY_686_DATA 0x00000000
+#define DDRSS_PHY_687_DATA 0x00000000
+#define DDRSS_PHY_688_DATA 0x00000000
+#define DDRSS_PHY_689_DATA 0x00000000
+#define DDRSS_PHY_690_DATA 0x00000000
+#define DDRSS_PHY_691_DATA 0x00000000
+#define DDRSS_PHY_692_DATA 0x00000000
+#define DDRSS_PHY_693_DATA 0x00000000
+#define DDRSS_PHY_694_DATA 0x00000000
+#define DDRSS_PHY_695_DATA 0x00000000
+#define DDRSS_PHY_696_DATA 0x00000000
+#define DDRSS_PHY_697_DATA 0x00000000
+#define DDRSS_PHY_698_DATA 0x00000000
+#define DDRSS_PHY_699_DATA 0x00000000
+#define DDRSS_PHY_700_DATA 0x00000000
+#define DDRSS_PHY_701_DATA 0x00000000
+#define DDRSS_PHY_702_DATA 0x00000000
+#define DDRSS_PHY_703_DATA 0x00000000
+#define DDRSS_PHY_704_DATA 0x00000000
+#define DDRSS_PHY_705_DATA 0x00000000
+#define DDRSS_PHY_706_DATA 0x00000000
+#define DDRSS_PHY_707_DATA 0x00000000
+#define DDRSS_PHY_708_DATA 0x00000000
+#define DDRSS_PHY_709_DATA 0x00000000
+#define DDRSS_PHY_710_DATA 0x00000000
+#define DDRSS_PHY_711_DATA 0x00000000
+#define DDRSS_PHY_712_DATA 0x00000000
+#define DDRSS_PHY_713_DATA 0x00000000
+#define DDRSS_PHY_714_DATA 0x00000000
+#define DDRSS_PHY_715_DATA 0x00000000
+#define DDRSS_PHY_716_DATA 0x00000000
+#define DDRSS_PHY_717_DATA 0x00000000
+#define DDRSS_PHY_718_DATA 0x00000000
+#define DDRSS_PHY_719_DATA 0x00000000
+#define DDRSS_PHY_720_DATA 0x00000000
+#define DDRSS_PHY_721_DATA 0x00000000
+#define DDRSS_PHY_722_DATA 0x00000000
+#define DDRSS_PHY_723_DATA 0x00000000
+#define DDRSS_PHY_724_DATA 0x00000000
+#define DDRSS_PHY_725_DATA 0x00000000
+#define DDRSS_PHY_726_DATA 0x00000000
+#define DDRSS_PHY_727_DATA 0x00000000
+#define DDRSS_PHY_728_DATA 0x00000000
+#define DDRSS_PHY_729_DATA 0x00000000
+#define DDRSS_PHY_730_DATA 0x00000000
+#define DDRSS_PHY_731_DATA 0x00000000
+#define DDRSS_PHY_732_DATA 0x00000000
+#define DDRSS_PHY_733_DATA 0x00000000
+#define DDRSS_PHY_734_DATA 0x00000000
+#define DDRSS_PHY_735_DATA 0x00000000
+#define DDRSS_PHY_736_DATA 0x00000000
+#define DDRSS_PHY_737_DATA 0x00000000
+#define DDRSS_PHY_738_DATA 0x00000000
+#define DDRSS_PHY_739_DATA 0x00000000
+#define DDRSS_PHY_740_DATA 0x00000000
+#define DDRSS_PHY_741_DATA 0x00000000
+#define DDRSS_PHY_742_DATA 0x00000000
+#define DDRSS_PHY_743_DATA 0x00000000
+#define DDRSS_PHY_744_DATA 0x00000000
+#define DDRSS_PHY_745_DATA 0x00000000
+#define DDRSS_PHY_746_DATA 0x00000000
+#define DDRSS_PHY_747_DATA 0x00000000
+#define DDRSS_PHY_748_DATA 0x00000000
+#define DDRSS_PHY_749_DATA 0x00000000
+#define DDRSS_PHY_750_DATA 0x00000000
+#define DDRSS_PHY_751_DATA 0x00000000
+#define DDRSS_PHY_752_DATA 0x00000000
+#define DDRSS_PHY_753_DATA 0x00000000
+#define DDRSS_PHY_754_DATA 0x00000000
+#define DDRSS_PHY_755_DATA 0x00000000
+#define DDRSS_PHY_756_DATA 0x00000000
+#define DDRSS_PHY_757_DATA 0x00000000
+#define DDRSS_PHY_758_DATA 0x00000000
+#define DDRSS_PHY_759_DATA 0x00000000
+#define DDRSS_PHY_760_DATA 0x00000000
+#define DDRSS_PHY_761_DATA 0x00000000
+#define DDRSS_PHY_762_DATA 0x00000000
+#define DDRSS_PHY_763_DATA 0x00000000
+#define DDRSS_PHY_764_DATA 0x00000000
+#define DDRSS_PHY_765_DATA 0x00000000
+#define DDRSS_PHY_766_DATA 0x00000000
+#define DDRSS_PHY_767_DATA 0x00000000
+#define DDRSS_PHY_768_DATA 0x000004F0
+#define DDRSS_PHY_769_DATA 0x00000000
+#define DDRSS_PHY_770_DATA 0x00030200
+#define DDRSS_PHY_771_DATA 0x00000000
+#define DDRSS_PHY_772_DATA 0x00000000
+#define DDRSS_PHY_773_DATA 0x01030000
+#define DDRSS_PHY_774_DATA 0x00010000
+#define DDRSS_PHY_775_DATA 0x01030004
+#define DDRSS_PHY_776_DATA 0x01000000
+#define DDRSS_PHY_777_DATA 0x00000000
+#define DDRSS_PHY_778_DATA 0x00000000
+#define DDRSS_PHY_779_DATA 0x01000001
+#define DDRSS_PHY_780_DATA 0x00000100
+#define DDRSS_PHY_781_DATA 0x000800C0
+#define DDRSS_PHY_782_DATA 0x060100CC
+#define DDRSS_PHY_783_DATA 0x00030066
+#define DDRSS_PHY_784_DATA 0x00000000
+#define DDRSS_PHY_785_DATA 0x00000301
+#define DDRSS_PHY_786_DATA 0x0000AAAA
+#define DDRSS_PHY_787_DATA 0x00005555
+#define DDRSS_PHY_788_DATA 0x0000B5B5
+#define DDRSS_PHY_789_DATA 0x00004A4A
+#define DDRSS_PHY_790_DATA 0x00005656
+#define DDRSS_PHY_791_DATA 0x0000A9A9
+#define DDRSS_PHY_792_DATA 0x0000A9A9
+#define DDRSS_PHY_793_DATA 0x0000B5B5
+#define DDRSS_PHY_794_DATA 0x00000000
+#define DDRSS_PHY_795_DATA 0x00000000
+#define DDRSS_PHY_796_DATA 0x2A000000
+#define DDRSS_PHY_797_DATA 0x00000808
+#define DDRSS_PHY_798_DATA 0x0F000000
+#define DDRSS_PHY_799_DATA 0x00000F0F
+#define DDRSS_PHY_800_DATA 0x10400000
+#define DDRSS_PHY_801_DATA 0x0C002006
+#define DDRSS_PHY_802_DATA 0x00000000
+#define DDRSS_PHY_803_DATA 0x00000000
+#define DDRSS_PHY_804_DATA 0x55555555
+#define DDRSS_PHY_805_DATA 0xAAAAAAAA
+#define DDRSS_PHY_806_DATA 0x55555555
+#define DDRSS_PHY_807_DATA 0xAAAAAAAA
+#define DDRSS_PHY_808_DATA 0x00005555
+#define DDRSS_PHY_809_DATA 0x01000100
+#define DDRSS_PHY_810_DATA 0x00800180
+#define DDRSS_PHY_811_DATA 0x00000000
+#define DDRSS_PHY_812_DATA 0x00000000
+#define DDRSS_PHY_813_DATA 0x00000000
+#define DDRSS_PHY_814_DATA 0x00000000
+#define DDRSS_PHY_815_DATA 0x00000000
+#define DDRSS_PHY_816_DATA 0x00000000
+#define DDRSS_PHY_817_DATA 0x00000000
+#define DDRSS_PHY_818_DATA 0x00000000
+#define DDRSS_PHY_819_DATA 0x00000000
+#define DDRSS_PHY_820_DATA 0x00000000
+#define DDRSS_PHY_821_DATA 0x00000000
+#define DDRSS_PHY_822_DATA 0x00000000
+#define DDRSS_PHY_823_DATA 0x00000000
+#define DDRSS_PHY_824_DATA 0x00000000
+#define DDRSS_PHY_825_DATA 0x00000000
+#define DDRSS_PHY_826_DATA 0x00000000
+#define DDRSS_PHY_827_DATA 0x00000000
+#define DDRSS_PHY_828_DATA 0x00000000
+#define DDRSS_PHY_829_DATA 0x00000000
+#define DDRSS_PHY_830_DATA 0x00000000
+#define DDRSS_PHY_831_DATA 0x00000000
+#define DDRSS_PHY_832_DATA 0x00000000
+#define DDRSS_PHY_833_DATA 0x00000000
+#define DDRSS_PHY_834_DATA 0x00000104
+#define DDRSS_PHY_835_DATA 0x00000120
+#define DDRSS_PHY_836_DATA 0x00000000
+#define DDRSS_PHY_837_DATA 0x00000000
+#define DDRSS_PHY_838_DATA 0x00000000
+#define DDRSS_PHY_839_DATA 0x00000000
+#define DDRSS_PHY_840_DATA 0x00000000
+#define DDRSS_PHY_841_DATA 0x00000000
+#define DDRSS_PHY_842_DATA 0x00000000
+#define DDRSS_PHY_843_DATA 0x00000001
+#define DDRSS_PHY_844_DATA 0x07FF0000
+#define DDRSS_PHY_845_DATA 0x0080081F
+#define DDRSS_PHY_846_DATA 0x00081020
+#define DDRSS_PHY_847_DATA 0x04010000
+#define DDRSS_PHY_848_DATA 0x00000000
+#define DDRSS_PHY_849_DATA 0x00000000
+#define DDRSS_PHY_850_DATA 0x00000000
+#define DDRSS_PHY_851_DATA 0x00000100
+#define DDRSS_PHY_852_DATA 0x01BB0B01
+#define DDRSS_PHY_853_DATA 0x1003BB0B
+#define DDRSS_PHY_854_DATA 0x20000140
+#define DDRSS_PHY_855_DATA 0x07FF0200
+#define DDRSS_PHY_856_DATA 0x0000DD01
+#define DDRSS_PHY_857_DATA 0x10100303
+#define DDRSS_PHY_858_DATA 0x10101010
+#define DDRSS_PHY_859_DATA 0x10101010
+#define DDRSS_PHY_860_DATA 0x00021010
+#define DDRSS_PHY_861_DATA 0x00100010
+#define DDRSS_PHY_862_DATA 0x00100010
+#define DDRSS_PHY_863_DATA 0x00100010
+#define DDRSS_PHY_864_DATA 0x00100010
+#define DDRSS_PHY_865_DATA 0x00050010
+#define DDRSS_PHY_866_DATA 0x51517041
+#define DDRSS_PHY_867_DATA 0x31C06000
+#define DDRSS_PHY_868_DATA 0x07AB0340
+#define DDRSS_PHY_869_DATA 0x00C0C001
+#define DDRSS_PHY_870_DATA 0x0B0A0001
+#define DDRSS_PHY_871_DATA 0x10001000
+#define DDRSS_PHY_872_DATA 0x0C073E42
+#define DDRSS_PHY_873_DATA 0x0F0C2D01
+#define DDRSS_PHY_874_DATA 0x01000140
+#define DDRSS_PHY_875_DATA 0x0C000420
+#define DDRSS_PHY_876_DATA 0x00000198
+#define DDRSS_PHY_877_DATA 0x0A0000D0
+#define DDRSS_PHY_878_DATA 0x00030200
+#define DDRSS_PHY_879_DATA 0x02800000
+#define DDRSS_PHY_880_DATA 0x80800000
+#define DDRSS_PHY_881_DATA 0x000B2010
+#define DDRSS_PHY_882_DATA 0x76543210
+#define DDRSS_PHY_883_DATA 0x00000008
+#define DDRSS_PHY_884_DATA 0x02800280
+#define DDRSS_PHY_885_DATA 0x02800280
+#define DDRSS_PHY_886_DATA 0x02800280
+#define DDRSS_PHY_887_DATA 0x02800280
+#define DDRSS_PHY_888_DATA 0x00000280
+#define DDRSS_PHY_889_DATA 0x0000A000
+#define DDRSS_PHY_890_DATA 0x00A000A0
+#define DDRSS_PHY_891_DATA 0x00A000A0
+#define DDRSS_PHY_892_DATA 0x00A000A0
+#define DDRSS_PHY_893_DATA 0x00A000A0
+#define DDRSS_PHY_894_DATA 0x00A000A0
+#define DDRSS_PHY_895_DATA 0x00A000A0
+#define DDRSS_PHY_896_DATA 0x00A000A0
+#define DDRSS_PHY_897_DATA 0x00A000A0
+#define DDRSS_PHY_898_DATA 0x011900A0
+#define DDRSS_PHY_899_DATA 0x01A00004
+#define DDRSS_PHY_900_DATA 0x00000000
+#define DDRSS_PHY_901_DATA 0x00000000
+#define DDRSS_PHY_902_DATA 0x00080200
+#define DDRSS_PHY_903_DATA 0x00000000
+#define DDRSS_PHY_904_DATA 0x20202000
+#define DDRSS_PHY_905_DATA 0x20202020
+#define DDRSS_PHY_906_DATA 0xF0F02020
+#define DDRSS_PHY_907_DATA 0x00000000
+#define DDRSS_PHY_908_DATA 0x00000000
+#define DDRSS_PHY_909_DATA 0x00000000
+#define DDRSS_PHY_910_DATA 0x00000000
+#define DDRSS_PHY_911_DATA 0x00000000
+#define DDRSS_PHY_912_DATA 0x00000000
+#define DDRSS_PHY_913_DATA 0x00000000
+#define DDRSS_PHY_914_DATA 0x00000000
+#define DDRSS_PHY_915_DATA 0x00000000
+#define DDRSS_PHY_916_DATA 0x00000000
+#define DDRSS_PHY_917_DATA 0x00000000
+#define DDRSS_PHY_918_DATA 0x00000000
+#define DDRSS_PHY_919_DATA 0x00000000
+#define DDRSS_PHY_920_DATA 0x00000000
+#define DDRSS_PHY_921_DATA 0x00000000
+#define DDRSS_PHY_922_DATA 0x00000000
+#define DDRSS_PHY_923_DATA 0x00000000
+#define DDRSS_PHY_924_DATA 0x00000000
+#define DDRSS_PHY_925_DATA 0x00000000
+#define DDRSS_PHY_926_DATA 0x00000000
+#define DDRSS_PHY_927_DATA 0x00000000
+#define DDRSS_PHY_928_DATA 0x00000000
+#define DDRSS_PHY_929_DATA 0x00000000
+#define DDRSS_PHY_930_DATA 0x00000000
+#define DDRSS_PHY_931_DATA 0x00000000
+#define DDRSS_PHY_932_DATA 0x00000000
+#define DDRSS_PHY_933_DATA 0x00000000
+#define DDRSS_PHY_934_DATA 0x00000000
+#define DDRSS_PHY_935_DATA 0x00000000
+#define DDRSS_PHY_936_DATA 0x00000000
+#define DDRSS_PHY_937_DATA 0x00000000
+#define DDRSS_PHY_938_DATA 0x00000000
+#define DDRSS_PHY_939_DATA 0x00000000
+#define DDRSS_PHY_940_DATA 0x00000000
+#define DDRSS_PHY_941_DATA 0x00000000
+#define DDRSS_PHY_942_DATA 0x00000000
+#define DDRSS_PHY_943_DATA 0x00000000
+#define DDRSS_PHY_944_DATA 0x00000000
+#define DDRSS_PHY_945_DATA 0x00000000
+#define DDRSS_PHY_946_DATA 0x00000000
+#define DDRSS_PHY_947_DATA 0x00000000
+#define DDRSS_PHY_948_DATA 0x00000000
+#define DDRSS_PHY_949_DATA 0x00000000
+#define DDRSS_PHY_950_DATA 0x00000000
+#define DDRSS_PHY_951_DATA 0x00000000
+#define DDRSS_PHY_952_DATA 0x00000000
+#define DDRSS_PHY_953_DATA 0x00000000
+#define DDRSS_PHY_954_DATA 0x00000000
+#define DDRSS_PHY_955_DATA 0x00000000
+#define DDRSS_PHY_956_DATA 0x00000000
+#define DDRSS_PHY_957_DATA 0x00000000
+#define DDRSS_PHY_958_DATA 0x00000000
+#define DDRSS_PHY_959_DATA 0x00000000
+#define DDRSS_PHY_960_DATA 0x00000000
+#define DDRSS_PHY_961_DATA 0x00000000
+#define DDRSS_PHY_962_DATA 0x00000000
+#define DDRSS_PHY_963_DATA 0x00000000
+#define DDRSS_PHY_964_DATA 0x00000000
+#define DDRSS_PHY_965_DATA 0x00000000
+#define DDRSS_PHY_966_DATA 0x00000000
+#define DDRSS_PHY_967_DATA 0x00000000
+#define DDRSS_PHY_968_DATA 0x00000000
+#define DDRSS_PHY_969_DATA 0x00000000
+#define DDRSS_PHY_970_DATA 0x00000000
+#define DDRSS_PHY_971_DATA 0x00000000
+#define DDRSS_PHY_972_DATA 0x00000000
+#define DDRSS_PHY_973_DATA 0x00000000
+#define DDRSS_PHY_974_DATA 0x00000000
+#define DDRSS_PHY_975_DATA 0x00000000
+#define DDRSS_PHY_976_DATA 0x00000000
+#define DDRSS_PHY_977_DATA 0x00000000
+#define DDRSS_PHY_978_DATA 0x00000000
+#define DDRSS_PHY_979_DATA 0x00000000
+#define DDRSS_PHY_980_DATA 0x00000000
+#define DDRSS_PHY_981_DATA 0x00000000
+#define DDRSS_PHY_982_DATA 0x00000000
+#define DDRSS_PHY_983_DATA 0x00000000
+#define DDRSS_PHY_984_DATA 0x00000000
+#define DDRSS_PHY_985_DATA 0x00000000
+#define DDRSS_PHY_986_DATA 0x00000000
+#define DDRSS_PHY_987_DATA 0x00000000
+#define DDRSS_PHY_988_DATA 0x00000000
+#define DDRSS_PHY_989_DATA 0x00000000
+#define DDRSS_PHY_990_DATA 0x00000000
+#define DDRSS_PHY_991_DATA 0x00000000
+#define DDRSS_PHY_992_DATA 0x00000000
+#define DDRSS_PHY_993_DATA 0x00000000
+#define DDRSS_PHY_994_DATA 0x00000000
+#define DDRSS_PHY_995_DATA 0x00000000
+#define DDRSS_PHY_996_DATA 0x00000000
+#define DDRSS_PHY_997_DATA 0x00000000
+#define DDRSS_PHY_998_DATA 0x00000000
+#define DDRSS_PHY_999_DATA 0x00000000
+#define DDRSS_PHY_1000_DATA 0x00000000
+#define DDRSS_PHY_1001_DATA 0x00000000
+#define DDRSS_PHY_1002_DATA 0x00000000
+#define DDRSS_PHY_1003_DATA 0x00000000
+#define DDRSS_PHY_1004_DATA 0x00000000
+#define DDRSS_PHY_1005_DATA 0x00000000
+#define DDRSS_PHY_1006_DATA 0x00000000
+#define DDRSS_PHY_1007_DATA 0x00000000
+#define DDRSS_PHY_1008_DATA 0x00000000
+#define DDRSS_PHY_1009_DATA 0x00000000
+#define DDRSS_PHY_1010_DATA 0x00000000
+#define DDRSS_PHY_1011_DATA 0x00000000
+#define DDRSS_PHY_1012_DATA 0x00000000
+#define DDRSS_PHY_1013_DATA 0x00000000
+#define DDRSS_PHY_1014_DATA 0x00000000
+#define DDRSS_PHY_1015_DATA 0x00000000
+#define DDRSS_PHY_1016_DATA 0x00000000
+#define DDRSS_PHY_1017_DATA 0x00000000
+#define DDRSS_PHY_1018_DATA 0x00000000
+#define DDRSS_PHY_1019_DATA 0x00000000
+#define DDRSS_PHY_1020_DATA 0x00000000
+#define DDRSS_PHY_1021_DATA 0x00000000
+#define DDRSS_PHY_1022_DATA 0x00000000
+#define DDRSS_PHY_1023_DATA 0x00000000
+#define DDRSS_PHY_1024_DATA 0x00000000
+#define DDRSS_PHY_1025_DATA 0x00000000
+#define DDRSS_PHY_1026_DATA 0x00000000
+#define DDRSS_PHY_1027_DATA 0x00000000
+#define DDRSS_PHY_1028_DATA 0x00000000
+#define DDRSS_PHY_1029_DATA 0x00000100
+#define DDRSS_PHY_1030_DATA 0x00000200
+#define DDRSS_PHY_1031_DATA 0x00000000
+#define DDRSS_PHY_1032_DATA 0x00000000
+#define DDRSS_PHY_1033_DATA 0x00000000
+#define DDRSS_PHY_1034_DATA 0x00000000
+#define DDRSS_PHY_1035_DATA 0x00400000
+#define DDRSS_PHY_1036_DATA 0x00000080
+#define DDRSS_PHY_1037_DATA 0x00DCBA98
+#define DDRSS_PHY_1038_DATA 0x03000000
+#define DDRSS_PHY_1039_DATA 0x00200000
+#define DDRSS_PHY_1040_DATA 0x00000000
+#define DDRSS_PHY_1041_DATA 0x00000000
+#define DDRSS_PHY_1042_DATA 0x00000000
+#define DDRSS_PHY_1043_DATA 0x00000000
+#define DDRSS_PHY_1044_DATA 0x00000000
+#define DDRSS_PHY_1045_DATA 0x0000002A
+#define DDRSS_PHY_1046_DATA 0x00000015
+#define DDRSS_PHY_1047_DATA 0x00000015
+#define DDRSS_PHY_1048_DATA 0x0000002A
+#define DDRSS_PHY_1049_DATA 0x00000033
+#define DDRSS_PHY_1050_DATA 0x0000000C
+#define DDRSS_PHY_1051_DATA 0x0000000C
+#define DDRSS_PHY_1052_DATA 0x00000033
+#define DDRSS_PHY_1053_DATA 0x00543210
+#define DDRSS_PHY_1054_DATA 0x003F0000
+#define DDRSS_PHY_1055_DATA 0x000F013F
+#define DDRSS_PHY_1056_DATA 0x20202003
+#define DDRSS_PHY_1057_DATA 0x00202020
+#define DDRSS_PHY_1058_DATA 0x20008008
+#define DDRSS_PHY_1059_DATA 0x00000810
+#define DDRSS_PHY_1060_DATA 0x00000F00
+#define DDRSS_PHY_1061_DATA 0x00000000
+#define DDRSS_PHY_1062_DATA 0x00000000
+#define DDRSS_PHY_1063_DATA 0x00000000
+#define DDRSS_PHY_1064_DATA 0x000305FF
+#define DDRSS_PHY_1065_DATA 0x00030000
+#define DDRSS_PHY_1066_DATA 0x00000300
+#define DDRSS_PHY_1067_DATA 0x00000300
+#define DDRSS_PHY_1068_DATA 0x00000300
+#define DDRSS_PHY_1069_DATA 0x00000300
+#define DDRSS_PHY_1070_DATA 0x00000300
+#define DDRSS_PHY_1071_DATA 0x42080010
+#define DDRSS_PHY_1072_DATA 0x0000803E
+#define DDRSS_PHY_1073_DATA 0x00000001
+#define DDRSS_PHY_1074_DATA 0x01000102
+#define DDRSS_PHY_1075_DATA 0x00008000
+#define DDRSS_PHY_1076_DATA 0x00000000
+#define DDRSS_PHY_1077_DATA 0x00000000
+#define DDRSS_PHY_1078_DATA 0x00000000
+#define DDRSS_PHY_1079_DATA 0x00000000
+#define DDRSS_PHY_1080_DATA 0x00000000
+#define DDRSS_PHY_1081_DATA 0x00000000
+#define DDRSS_PHY_1082_DATA 0x00000000
+#define DDRSS_PHY_1083_DATA 0x00000000
+#define DDRSS_PHY_1084_DATA 0x00000000
+#define DDRSS_PHY_1085_DATA 0x00000000
+#define DDRSS_PHY_1086_DATA 0x00000000
+#define DDRSS_PHY_1087_DATA 0x00000000
+#define DDRSS_PHY_1088_DATA 0x00000000
+#define DDRSS_PHY_1089_DATA 0x00000000
+#define DDRSS_PHY_1090_DATA 0x00000000
+#define DDRSS_PHY_1091_DATA 0x00000000
+#define DDRSS_PHY_1092_DATA 0x00000000
+#define DDRSS_PHY_1093_DATA 0x00000000
+#define DDRSS_PHY_1094_DATA 0x00000000
+#define DDRSS_PHY_1095_DATA 0x00000000
+#define DDRSS_PHY_1096_DATA 0x00000000
+#define DDRSS_PHY_1097_DATA 0x00000000
+#define DDRSS_PHY_1098_DATA 0x00000000
+#define DDRSS_PHY_1099_DATA 0x00000000
+#define DDRSS_PHY_1100_DATA 0x00000000
+#define DDRSS_PHY_1101_DATA 0x00000000
+#define DDRSS_PHY_1102_DATA 0x00000000
+#define DDRSS_PHY_1103_DATA 0x00000000
+#define DDRSS_PHY_1104_DATA 0x00000000
+#define DDRSS_PHY_1105_DATA 0x00000000
+#define DDRSS_PHY_1106_DATA 0x00000000
+#define DDRSS_PHY_1107_DATA 0x00000000
+#define DDRSS_PHY_1108_DATA 0x00000000
+#define DDRSS_PHY_1109_DATA 0x00000000
+#define DDRSS_PHY_1110_DATA 0x00000000
+#define DDRSS_PHY_1111_DATA 0x00000000
+#define DDRSS_PHY_1112_DATA 0x00000000
+#define DDRSS_PHY_1113_DATA 0x00000000
+#define DDRSS_PHY_1114_DATA 0x00000000
+#define DDRSS_PHY_1115_DATA 0x00000000
+#define DDRSS_PHY_1116_DATA 0x00000000
+#define DDRSS_PHY_1117_DATA 0x00000000
+#define DDRSS_PHY_1118_DATA 0x00000000
+#define DDRSS_PHY_1119_DATA 0x00000000
+#define DDRSS_PHY_1120_DATA 0x00000000
+#define DDRSS_PHY_1121_DATA 0x00000000
+#define DDRSS_PHY_1122_DATA 0x00000000
+#define DDRSS_PHY_1123_DATA 0x00000000
+#define DDRSS_PHY_1124_DATA 0x00000000
+#define DDRSS_PHY_1125_DATA 0x00000000
+#define DDRSS_PHY_1126_DATA 0x00000000
+#define DDRSS_PHY_1127_DATA 0x00000000
+#define DDRSS_PHY_1128_DATA 0x00000000
+#define DDRSS_PHY_1129_DATA 0x00000000
+#define DDRSS_PHY_1130_DATA 0x00000000
+#define DDRSS_PHY_1131_DATA 0x00000000
+#define DDRSS_PHY_1132_DATA 0x00000000
+#define DDRSS_PHY_1133_DATA 0x00000000
+#define DDRSS_PHY_1134_DATA 0x00000000
+#define DDRSS_PHY_1135_DATA 0x00000000
+#define DDRSS_PHY_1136_DATA 0x00000000
+#define DDRSS_PHY_1137_DATA 0x00000000
+#define DDRSS_PHY_1138_DATA 0x00000000
+#define DDRSS_PHY_1139_DATA 0x00000000
+#define DDRSS_PHY_1140_DATA 0x00000000
+#define DDRSS_PHY_1141_DATA 0x00000000
+#define DDRSS_PHY_1142_DATA 0x00000000
+#define DDRSS_PHY_1143_DATA 0x00000000
+#define DDRSS_PHY_1144_DATA 0x00000000
+#define DDRSS_PHY_1145_DATA 0x00000000
+#define DDRSS_PHY_1146_DATA 0x00000000
+#define DDRSS_PHY_1147_DATA 0x00000000
+#define DDRSS_PHY_1148_DATA 0x00000000
+#define DDRSS_PHY_1149_DATA 0x00000000
+#define DDRSS_PHY_1150_DATA 0x00000000
+#define DDRSS_PHY_1151_DATA 0x00000000
+#define DDRSS_PHY_1152_DATA 0x00000000
+#define DDRSS_PHY_1153_DATA 0x00000000
+#define DDRSS_PHY_1154_DATA 0x00000000
+#define DDRSS_PHY_1155_DATA 0x00000000
+#define DDRSS_PHY_1156_DATA 0x00000000
+#define DDRSS_PHY_1157_DATA 0x00000000
+#define DDRSS_PHY_1158_DATA 0x00000000
+#define DDRSS_PHY_1159_DATA 0x00000000
+#define DDRSS_PHY_1160_DATA 0x00000000
+#define DDRSS_PHY_1161_DATA 0x00000000
+#define DDRSS_PHY_1162_DATA 0x00000000
+#define DDRSS_PHY_1163_DATA 0x00000000
+#define DDRSS_PHY_1164_DATA 0x00000000
+#define DDRSS_PHY_1165_DATA 0x00000000
+#define DDRSS_PHY_1166_DATA 0x00000000
+#define DDRSS_PHY_1167_DATA 0x00000000
+#define DDRSS_PHY_1168_DATA 0x00000000
+#define DDRSS_PHY_1169_DATA 0x00000000
+#define DDRSS_PHY_1170_DATA 0x00000000
+#define DDRSS_PHY_1171_DATA 0x00000000
+#define DDRSS_PHY_1172_DATA 0x00000000
+#define DDRSS_PHY_1173_DATA 0x00000000
+#define DDRSS_PHY_1174_DATA 0x00000000
+#define DDRSS_PHY_1175_DATA 0x00000000
+#define DDRSS_PHY_1176_DATA 0x00000000
+#define DDRSS_PHY_1177_DATA 0x00000000
+#define DDRSS_PHY_1178_DATA 0x00000000
+#define DDRSS_PHY_1179_DATA 0x00000000
+#define DDRSS_PHY_1180_DATA 0x00000000
+#define DDRSS_PHY_1181_DATA 0x00000000
+#define DDRSS_PHY_1182_DATA 0x00000000
+#define DDRSS_PHY_1183_DATA 0x00000000
+#define DDRSS_PHY_1184_DATA 0x00000000
+#define DDRSS_PHY_1185_DATA 0x00000000
+#define DDRSS_PHY_1186_DATA 0x00000000
+#define DDRSS_PHY_1187_DATA 0x00000000
+#define DDRSS_PHY_1188_DATA 0x00000000
+#define DDRSS_PHY_1189_DATA 0x00000000
+#define DDRSS_PHY_1190_DATA 0x00000000
+#define DDRSS_PHY_1191_DATA 0x00000000
+#define DDRSS_PHY_1192_DATA 0x00000000
+#define DDRSS_PHY_1193_DATA 0x00000000
+#define DDRSS_PHY_1194_DATA 0x00000000
+#define DDRSS_PHY_1195_DATA 0x00000000
+#define DDRSS_PHY_1196_DATA 0x00000000
+#define DDRSS_PHY_1197_DATA 0x00000000
+#define DDRSS_PHY_1198_DATA 0x00000000
+#define DDRSS_PHY_1199_DATA 0x00000000
+#define DDRSS_PHY_1200_DATA 0x00000000
+#define DDRSS_PHY_1201_DATA 0x00000000
+#define DDRSS_PHY_1202_DATA 0x00000000
+#define DDRSS_PHY_1203_DATA 0x00000000
+#define DDRSS_PHY_1204_DATA 0x00000000
+#define DDRSS_PHY_1205_DATA 0x00000000
+#define DDRSS_PHY_1206_DATA 0x00000000
+#define DDRSS_PHY_1207_DATA 0x00000000
+#define DDRSS_PHY_1208_DATA 0x00000000
+#define DDRSS_PHY_1209_DATA 0x00000000
+#define DDRSS_PHY_1210_DATA 0x00000000
+#define DDRSS_PHY_1211_DATA 0x00000000
+#define DDRSS_PHY_1212_DATA 0x00000000
+#define DDRSS_PHY_1213_DATA 0x00000000
+#define DDRSS_PHY_1214_DATA 0x00000000
+#define DDRSS_PHY_1215_DATA 0x00000000
+#define DDRSS_PHY_1216_DATA 0x00000000
+#define DDRSS_PHY_1217_DATA 0x00000000
+#define DDRSS_PHY_1218_DATA 0x00000000
+#define DDRSS_PHY_1219_DATA 0x00000000
+#define DDRSS_PHY_1220_DATA 0x00000000
+#define DDRSS_PHY_1221_DATA 0x00000000
+#define DDRSS_PHY_1222_DATA 0x00000000
+#define DDRSS_PHY_1223_DATA 0x00000000
+#define DDRSS_PHY_1224_DATA 0x00000000
+#define DDRSS_PHY_1225_DATA 0x00000000
+#define DDRSS_PHY_1226_DATA 0x00000000
+#define DDRSS_PHY_1227_DATA 0x00000000
+#define DDRSS_PHY_1228_DATA 0x00000000
+#define DDRSS_PHY_1229_DATA 0x00000000
+#define DDRSS_PHY_1230_DATA 0x00000000
+#define DDRSS_PHY_1231_DATA 0x00000000
+#define DDRSS_PHY_1232_DATA 0x00000000
+#define DDRSS_PHY_1233_DATA 0x00000000
+#define DDRSS_PHY_1234_DATA 0x00000000
+#define DDRSS_PHY_1235_DATA 0x00000000
+#define DDRSS_PHY_1236_DATA 0x00000000
+#define DDRSS_PHY_1237_DATA 0x00000000
+#define DDRSS_PHY_1238_DATA 0x00000000
+#define DDRSS_PHY_1239_DATA 0x00000000
+#define DDRSS_PHY_1240_DATA 0x00000000
+#define DDRSS_PHY_1241_DATA 0x00000000
+#define DDRSS_PHY_1242_DATA 0x00000000
+#define DDRSS_PHY_1243_DATA 0x00000000
+#define DDRSS_PHY_1244_DATA 0x00000000
+#define DDRSS_PHY_1245_DATA 0x00000000
+#define DDRSS_PHY_1246_DATA 0x00000000
+#define DDRSS_PHY_1247_DATA 0x00000000
+#define DDRSS_PHY_1248_DATA 0x00000000
+#define DDRSS_PHY_1249_DATA 0x00000000
+#define DDRSS_PHY_1250_DATA 0x00000000
+#define DDRSS_PHY_1251_DATA 0x00000000
+#define DDRSS_PHY_1252_DATA 0x00000000
+#define DDRSS_PHY_1253_DATA 0x00000000
+#define DDRSS_PHY_1254_DATA 0x00000000
+#define DDRSS_PHY_1255_DATA 0x00000000
+#define DDRSS_PHY_1256_DATA 0x00000000
+#define DDRSS_PHY_1257_DATA 0x00000000
+#define DDRSS_PHY_1258_DATA 0x00000000
+#define DDRSS_PHY_1259_DATA 0x00000000
+#define DDRSS_PHY_1260_DATA 0x00000000
+#define DDRSS_PHY_1261_DATA 0x00000000
+#define DDRSS_PHY_1262_DATA 0x00000000
+#define DDRSS_PHY_1263_DATA 0x00000000
+#define DDRSS_PHY_1264_DATA 0x00000000
+#define DDRSS_PHY_1265_DATA 0x00000000
+#define DDRSS_PHY_1266_DATA 0x00000000
+#define DDRSS_PHY_1267_DATA 0x00000000
+#define DDRSS_PHY_1268_DATA 0x00000000
+#define DDRSS_PHY_1269_DATA 0x00000000
+#define DDRSS_PHY_1270_DATA 0x00000000
+#define DDRSS_PHY_1271_DATA 0x00000000
+#define DDRSS_PHY_1272_DATA 0x00000000
+#define DDRSS_PHY_1273_DATA 0x00000000
+#define DDRSS_PHY_1274_DATA 0x00000000
+#define DDRSS_PHY_1275_DATA 0x00000000
+#define DDRSS_PHY_1276_DATA 0x00000000
+#define DDRSS_PHY_1277_DATA 0x00000000
+#define DDRSS_PHY_1278_DATA 0x00000000
+#define DDRSS_PHY_1279_DATA 0x00000000
+#define DDRSS_PHY_1280_DATA 0x00000000
+#define DDRSS_PHY_1281_DATA 0x00010100
+#define DDRSS_PHY_1282_DATA 0x00000000
+#define DDRSS_PHY_1283_DATA 0x00000000
+#define DDRSS_PHY_1284_DATA 0x00050000
+#define DDRSS_PHY_1285_DATA 0x04000000
+#define DDRSS_PHY_1286_DATA 0x00000055
+#define DDRSS_PHY_1287_DATA 0x00000000
+#define DDRSS_PHY_1288_DATA 0x00000000
+#define DDRSS_PHY_1289_DATA 0x00000000
+#define DDRSS_PHY_1290_DATA 0x00000000
+#define DDRSS_PHY_1291_DATA 0x00002001
+#define DDRSS_PHY_1292_DATA 0x0000400F
+#define DDRSS_PHY_1293_DATA 0x50020028
+#define DDRSS_PHY_1294_DATA 0x01010000
+#define DDRSS_PHY_1295_DATA 0x80080001
+#define DDRSS_PHY_1296_DATA 0x10200000
+#define DDRSS_PHY_1297_DATA 0x00000008
+#define DDRSS_PHY_1298_DATA 0x00000000
+#define DDRSS_PHY_1299_DATA 0x01090E00
+#define DDRSS_PHY_1300_DATA 0x00040101
+#define DDRSS_PHY_1301_DATA 0x0000010F
+#define DDRSS_PHY_1302_DATA 0x00000000
+#define DDRSS_PHY_1303_DATA 0x0000FFFF
+#define DDRSS_PHY_1304_DATA 0x00000000
+#define DDRSS_PHY_1305_DATA 0x01010000
+#define DDRSS_PHY_1306_DATA 0x01080402
+#define DDRSS_PHY_1307_DATA 0x01200F02
+#define DDRSS_PHY_1308_DATA 0x00194280
+#define DDRSS_PHY_1309_DATA 0x00000004
+#define DDRSS_PHY_1310_DATA 0x00052000
+#define DDRSS_PHY_1311_DATA 0x00000000
+#define DDRSS_PHY_1312_DATA 0x00000000
+#define DDRSS_PHY_1313_DATA 0x00000000
+#define DDRSS_PHY_1314_DATA 0x00000000
+#define DDRSS_PHY_1315_DATA 0x00000000
+#define DDRSS_PHY_1316_DATA 0x00000000
+#define DDRSS_PHY_1317_DATA 0x01000000
+#define DDRSS_PHY_1318_DATA 0x00000705
+#define DDRSS_PHY_1319_DATA 0x00000054
+#define DDRSS_PHY_1320_DATA 0x00030820
+#define DDRSS_PHY_1321_DATA 0x00010820
+#define DDRSS_PHY_1322_DATA 0x00010820
+#define DDRSS_PHY_1323_DATA 0x00010820
+#define DDRSS_PHY_1324_DATA 0x00010820
+#define DDRSS_PHY_1325_DATA 0x00010820
+#define DDRSS_PHY_1326_DATA 0x00010820
+#define DDRSS_PHY_1327_DATA 0x00010820
+#define DDRSS_PHY_1328_DATA 0x00010820
+#define DDRSS_PHY_1329_DATA 0x00000000
+#define DDRSS_PHY_1330_DATA 0x00000074
+#define DDRSS_PHY_1331_DATA 0x00000400
+#define DDRSS_PHY_1332_DATA 0x00000108
+#define DDRSS_PHY_1333_DATA 0x00000000
+#define DDRSS_PHY_1334_DATA 0x00000000
+#define DDRSS_PHY_1335_DATA 0x00000000
+#define DDRSS_PHY_1336_DATA 0x00000000
+#define DDRSS_PHY_1337_DATA 0x00000000
+#define DDRSS_PHY_1338_DATA 0x03000000
+#define DDRSS_PHY_1339_DATA 0x00000000
+#define DDRSS_PHY_1340_DATA 0x00000000
+#define DDRSS_PHY_1341_DATA 0x00000000
+#define DDRSS_PHY_1342_DATA 0x04102006
+#define DDRSS_PHY_1343_DATA 0x00041020
+#define DDRSS_PHY_1344_DATA 0x01C98C98
+#define DDRSS_PHY_1345_DATA 0x3F400000
+#define DDRSS_PHY_1346_DATA 0x3F3F1F3F
+#define DDRSS_PHY_1347_DATA 0x0000001F
+#define DDRSS_PHY_1348_DATA 0x00000000
+#define DDRSS_PHY_1349_DATA 0x00000000
+#define DDRSS_PHY_1350_DATA 0x00000000
+#define DDRSS_PHY_1351_DATA 0x00010000
+#define DDRSS_PHY_1352_DATA 0x00000000
+#define DDRSS_PHY_1353_DATA 0x00000000
+#define DDRSS_PHY_1354_DATA 0x00000000
+#define DDRSS_PHY_1355_DATA 0x00000000
+#define DDRSS_PHY_1356_DATA 0x76543210
+#define DDRSS_PHY_1357_DATA 0x00010198
+#define DDRSS_PHY_1358_DATA 0x00000000
+#define DDRSS_PHY_1359_DATA 0x00000000
+#define DDRSS_PHY_1360_DATA 0x00000000
+#define DDRSS_PHY_1361_DATA 0x00040700
+#define DDRSS_PHY_1362_DATA 0x00000000
+#define DDRSS_PHY_1363_DATA 0x00000000
+#define DDRSS_PHY_1364_DATA 0x00000000
+#define DDRSS_PHY_1365_DATA 0x00000000
+#define DDRSS_PHY_1366_DATA 0x00000000
+#define DDRSS_PHY_1367_DATA 0x00000002
+#define DDRSS_PHY_1368_DATA 0x00000000
+#define DDRSS_PHY_1369_DATA 0x00000000
+#define DDRSS_PHY_1370_DATA 0x00000000
+#define DDRSS_PHY_1371_DATA 0x00000000
+#define DDRSS_PHY_1372_DATA 0x00000000
+#define DDRSS_PHY_1373_DATA 0x00000000
+#define DDRSS_PHY_1374_DATA 0x00080000
+#define DDRSS_PHY_1375_DATA 0x000007FF
+#define DDRSS_PHY_1376_DATA 0x00000000
+#define DDRSS_PHY_1377_DATA 0x00000000
+#define DDRSS_PHY_1378_DATA 0x00000000
+#define DDRSS_PHY_1379_DATA 0x00000000
+#define DDRSS_PHY_1380_DATA 0x00000000
+#define DDRSS_PHY_1381_DATA 0x00000000
+#define DDRSS_PHY_1382_DATA 0x000FFFFF
+#define DDRSS_PHY_1383_DATA 0x000FFFFF
+#define DDRSS_PHY_1384_DATA 0x0000FFFF
+#define DDRSS_PHY_1385_DATA 0xFFFFFFF0
+#define DDRSS_PHY_1386_DATA 0x030FFFFF
+#define DDRSS_PHY_1387_DATA 0x01FFFFFF
+#define DDRSS_PHY_1388_DATA 0x0000FFFF
+#define DDRSS_PHY_1389_DATA 0x00000000
+#define DDRSS_PHY_1390_DATA 0x00000000
+#define DDRSS_PHY_1391_DATA 0x00000000
+#define DDRSS_PHY_1392_DATA 0x00000000
+#define DDRSS_PHY_1393_DATA 0x0001F7C0
+#define DDRSS_PHY_1394_DATA 0x00000003
+#define DDRSS_PHY_1395_DATA 0x00000000
+#define DDRSS_PHY_1396_DATA 0x00001142
+#define DDRSS_PHY_1397_DATA 0x010207AB
+#define DDRSS_PHY_1398_DATA 0x01000080
+#define DDRSS_PHY_1399_DATA 0x03900390
+#define DDRSS_PHY_1400_DATA 0x03900390
+#define DDRSS_PHY_1401_DATA 0x00000390
+#define DDRSS_PHY_1402_DATA 0x00000390
+#define DDRSS_PHY_1403_DATA 0x00000390
+#define DDRSS_PHY_1404_DATA 0x00000390
+#define DDRSS_PHY_1405_DATA 0x00000005
+#define DDRSS_PHY_1406_DATA 0x01813FFF
+#define DDRSS_PHY_1407_DATA 0x000000FF
+#define DDRSS_PHY_1408_DATA 0x0C000DFF
+#define DDRSS_PHY_1409_DATA 0x30000DFF
+#define DDRSS_PHY_1410_DATA 0x3F0DFF11
+#define DDRSS_PHY_1411_DATA 0x000100F0
+#define DDRSS_PHY_1412_DATA 0x780DFFFF
+#define DDRSS_PHY_1413_DATA 0x00007E31
+#define DDRSS_PHY_1414_DATA 0x000CBF11
+#define DDRSS_PHY_1415_DATA 0x01FF0010
+#define DDRSS_PHY_1416_DATA 0x000CBF11
+#define DDRSS_PHY_1417_DATA 0x01FF0010
+#define DDRSS_PHY_1418_DATA 0x3F0DFF11
+#define DDRSS_PHY_1419_DATA 0x01FF00F0
+#define DDRSS_PHY_1420_DATA 0x3F0DFF11
+#define DDRSS_PHY_1421_DATA 0x01FF00F0
+#define DDRSS_PHY_1422_DATA 0x20040006
diff --git a/arch/arm/dts/k3-j721e-main.dtsi b/arch/arm/dts/k3-j721e-main.dtsi
index f6c7e16..746b9f8 100644
--- a/arch/arm/dts/k3-j721e-main.dtsi
+++ b/arch/arm/dts/k3-j721e-main.dtsi
@@ -181,7 +181,7 @@
};
main_navss: bus@30000000 {
- compatible = "simple-mfd";
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>;
diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
index 05d6ef1..f7ab771 100644
--- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
@@ -440,7 +440,7 @@
};
mcu_navss: bus@28380000 {
- compatible = "simple-mfd";
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>;
@@ -671,4 +671,11 @@
power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
#thermal-sensor-cells = <1>;
};
+
+ mcu_esm: esm@40800000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x40800000 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
};
diff --git a/arch/arm/dts/k3-j721e-r5-beagleboneai64.dts b/arch/arm/dts/k3-j721e-r5-beagleboneai64.dts
new file mode 100644
index 0000000..43da4da
--- /dev/null
+++ b/arch/arm/dts/k3-j721e-r5-beagleboneai64.dts
@@ -0,0 +1,185 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * https://beagleboard.org/ai-64
+ *
+ * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2022 Jason Kridner, BeagleBoard.org Foundation
+ * Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation
+ */
+
+#include "k3-j721e-beagleboneai64.dts"
+#include "k3-j721e-ddr-beagleboneai64-lp4-3200.dtsi"
+#include "k3-j721e-ddr.dtsi"
+
+#include "k3-j721e-beagleboneai64-u-boot.dtsi"
+
+/ {
+ aliases {
+ remoteproc0 = &sysctrler;
+ remoteproc1 = &a72_0;
+ };
+
+ chosen {
+ tick-timer = &mcu_timer0;
+ };
+
+ a72_0: a72@0 {
+ compatible = "ti,am654-rproc";
+ reg = <0x0 0x00a90000 0x0 0x10>;
+ power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
+ <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>,
+ <&k3_pds 4 TI_SCI_PD_EXCLUSIVE>;
+ resets = <&k3_reset 202 0>;
+ clocks = <&k3_clks 61 1>;
+ assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>;
+ assigned-clock-rates = <2000000000>, <200000000>;
+ ti,sci = <&dmsc>;
+ ti,sci-proc-id = <32>;
+ ti,sci-host-id = <10>;
+ bootph-pre-ram;
+ };
+
+ dm_tifs: dm-tifs {
+ compatible = "ti,j721e-dm-sci";
+ ti,host-id = <3>;
+ ti,secure-host;
+ mbox-names = "rx", "tx";
+ mboxes= <&secure_proxy_mcu 21>,
+ <&secure_proxy_mcu 23>;
+ bootph-pre-ram;
+ };
+};
+
+&dmsc {
+ mboxes= <&secure_proxy_mcu 6>,
+ <&secure_proxy_mcu 8>,
+ <&secure_proxy_mcu 5>;
+ mbox-names = "rx", "tx", "notify";
+ ti,host-id = <4>;
+ ti,secure-host;
+};
+
+&mcu_timer0 {
+ status = "okay";
+ bootph-pre-ram;
+};
+
+&secure_proxy_mcu {
+ bootph-pre-ram;
+ /* We require this for boot handshake */
+ status = "okay";
+};
+
+&cbass_mcu_wakeup {
+ sysctrler: sysctrler {
+ compatible = "ti,am654-system-controller";
+ mboxes= <&secure_proxy_mcu 4>, <&secure_proxy_mcu 5>;
+ mbox-names = "tx", "rx";
+ bootph-pre-ram;
+ };
+};
+
+&mcu_ringacc {
+ ti,sci = <&dm_tifs>;
+};
+
+&mcu_udmap {
+ ti,sci = <&dm_tifs>;
+};
+
+&wkup_uart0_pins_default {
+ bootph-pre-ram;
+};
+
+&wkup_i2c0 {
+ bootph-pre-ram;
+};
+
+&binman {
+ tiboot3-j721e-gp-evm.bin {
+ filename = "tiboot3-j721e-gp-evm.bin";
+ symlink = "tiboot3.bin";
+ ti-secure-rom {
+ content = <&u_boot_spl_unsigned>;
+ core = "public";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ keyfile = "ti-degenerate-key.pem";
+ };
+ u_boot_spl_unsigned: u-boot-spl {
+ no-expanded;
+ };
+ };
+
+ sysfw_gp {
+ filename = "sysfw.bin_gp";
+ ti-secure-rom {
+ content = <&ti_fs>;
+ core = "secure";
+ load = <0x40000>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ keyfile = "ti-degenerate-key.pem";
+ };
+ ti_fs: ti-fs.bin {
+ filename = "ti-sysfw/ti-fs-firmware-j721e-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+
+ itb_gp {
+ filename = "sysfw-j721e-gp-evm.itb";
+ symlink = "sysfw.itb";
+ fit {
+ description = "SYSFW and Config fragments";
+ #address-cells = <1>;
+ images {
+ sysfw.bin {
+ description = "sysfw";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sysfw.bin_gp";
+ };
+ };
+ board-cfg.bin {
+ description = "board-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "board-cfg.bin";
+ };
+ };
+ pm-cfg.bin {
+ description = "pm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "pm-cfg.bin";
+ };
+ };
+ rm-cfg.bin {
+ description = "rm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "rm-cfg.bin";
+ };
+ };
+ sec-cfg.bin {
+ description = "sec-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sec-cfg.bin";
+ };
+ };
+ };
+ };
+ };
+};
diff --git a/arch/arm/dts/k3-j721s2-binman.dtsi b/arch/arm/dts/k3-j721s2-binman.dtsi
index 5bca4e9..3922007 100644
--- a/arch/arm/dts/k3-j721s2-binman.dtsi
+++ b/arch/arm/dts/k3-j721s2-binman.dtsi
@@ -141,11 +141,9 @@
#ifdef CONFIG_TARGET_J721S2_A72_EVM
-#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_J721S2_EVM_DTB "spl/dts/k3-j721s2-common-proc-board.dtb"
#define SPL_AM68_SK_DTB "spl/dts/k3-am68-sk-base-board.dtb"
-#define UBOOT_NODTB "u-boot-nodtb.bin"
#define J721S2_EVM_DTB "u-boot.dtb"
#define AM68_SK_DTB "arch/arm/dts/k3-am68-sk-base-board.dtb"
@@ -157,55 +155,11 @@
};
};
ti-spl {
- filename = "tispl.bin";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- ti-secure {
- content = <&atf>;
- keyfile = "custMpk.pem";
- };
- atf: atf-bl31 {
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- ti-secure {
- content = <&tee>;
- keyfile = "custMpk.pem";
- };
- tee: tee-os {
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
ti-secure {
content = <&dm>;
keyfile = "custMpk.pem";
@@ -215,23 +169,6 @@
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_spl_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_spl_nodtb: blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-j721s2-common-proc-board";
type = "flat_dt";
@@ -285,29 +222,12 @@
&binman {
u-boot {
- filename = "u-boot.img";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for J721S2 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_nodtb: u-boot-nodtb {
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for J721S2 Board";
};
fdt-0 {
@@ -371,67 +291,16 @@
&binman {
ti-spl_unsigned {
- filename = "tispl.bin_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_unsigned_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- atf-bl31 {
- filename = "bl31.bin";
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- tee-os {
- filename = "tee-raw.bin";
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
blob-ext {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- blob {
- filename = "spl/u-boot-spl-nodtb.bin";
- };
- };
-
fdt-0 {
description = "k3-j721s2-common-proc-board";
type = "flat_dt";
@@ -475,26 +344,12 @@
&binman {
u-boot_unsigned {
- filename = "u-boot.img_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_unsigned_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for J721S2 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- blob {
- filename = UBOOT_NODTB;
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for J721S2 Board";
};
fdt-0 {
diff --git a/arch/arm/dts/k3-j721s2-main.dtsi b/arch/arm/dts/k3-j721s2-main.dtsi
index 084f8f5..b03731b 100644
--- a/arch/arm/dts/k3-j721s2-main.dtsi
+++ b/arch/arm/dts/k3-j721s2-main.dtsi
@@ -775,7 +775,7 @@
};
main_navss: bus@30000000 {
- compatible = "simple-mfd";
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>;
@@ -807,6 +807,7 @@
ti,sci = <&sms>;
ti,sci-dev-id = <265>;
ti,interrupt-ranges = <0 0 256>;
+ ti,unmapped-event-sources = <&main_bcdma_csi>;
};
secure_proxy_main: mailbox@32c00000 {
@@ -1103,6 +1104,22 @@
ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
};
+ main_bcdma_csi: dma-controller@311a0000 {
+ compatible = "ti,j721s2-dmss-bcdma-csi";
+ reg = <0x00 0x311a0000 0x00 0x100>,
+ <0x00 0x35d00000 0x00 0x20000>,
+ <0x00 0x35c00000 0x00 0x10000>,
+ <0x00 0x35e00000 0x00 0x80000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
+ msi-parent = <&main_udmass_inta>;
+ #dma-cells = <3>;
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <225>;
+ ti,sci-rm-range-rchan = <0x21>;
+ ti,sci-rm-range-tchan = <0x22>;
+ status = "disabled";
+ };
+
cpts@310d0000 {
compatible = "ti,j721e-cpts";
reg = <0x0 0x310d0000 0x0 0x400>;
@@ -1695,4 +1712,217 @@
dss_ports: ports {
};
};
+
+ main_r5fss0: r5fss@5c00000 {
+ compatible = "ti,j721s2-r5fss";
+ ti,cluster-mode = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
+ <0x5d00000 0x00 0x5d00000 0x20000>;
+ power-domains = <&k3_pds 277 TI_SCI_PD_EXCLUSIVE>;
+
+ main_r5fss0_core0: r5f@5c00000 {
+ compatible = "ti,j721s2-r5f";
+ reg = <0x5c00000 0x00010000>,
+ <0x5c10000 0x00010000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <279>;
+ ti,sci-proc-ids = <0x06 0xff>;
+ resets = <&k3_reset 279 1>;
+ firmware-name = "j721s2-main-r5f0_0-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+
+ main_r5fss0_core1: r5f@5d00000 {
+ compatible = "ti,j721s2-r5f";
+ reg = <0x5d00000 0x00010000>,
+ <0x5d10000 0x00010000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <280>;
+ ti,sci-proc-ids = <0x07 0xff>;
+ resets = <&k3_reset 280 1>;
+ firmware-name = "j721s2-main-r5f0_1-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+ };
+
+ main_r5fss1: r5fss@5e00000 {
+ compatible = "ti,j721s2-r5fss";
+ ti,cluster-mode = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x5e00000 0x00 0x5e00000 0x20000>,
+ <0x5f00000 0x00 0x5f00000 0x20000>;
+ power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>;
+
+ main_r5fss1_core0: r5f@5e00000 {
+ compatible = "ti,j721s2-r5f";
+ reg = <0x5e00000 0x00010000>,
+ <0x5e10000 0x00010000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <281>;
+ ti,sci-proc-ids = <0x08 0xff>;
+ resets = <&k3_reset 281 1>;
+ firmware-name = "j721s2-main-r5f1_0-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+
+ main_r5fss1_core1: r5f@5f00000 {
+ compatible = "ti,j721s2-r5f";
+ reg = <0x5f00000 0x00010000>,
+ <0x5f10000 0x00010000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <282>;
+ ti,sci-proc-ids = <0x09 0xff>;
+ resets = <&k3_reset 282 1>;
+ firmware-name = "j721s2-main-r5f1_1-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+ };
+
+ c71_0: dsp@64800000 {
+ compatible = "ti,j721s2-c71-dsp";
+ reg = <0x00 0x64800000 0x00 0x00080000>,
+ <0x00 0x64e00000 0x00 0x0000c000>;
+ reg-names = "l2sram", "l1dram";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <8>;
+ ti,sci-proc-ids = <0x30 0xff>;
+ resets = <&k3_reset 8 1>;
+ firmware-name = "j721s2-c71_0-fw";
+ status = "disabled";
+ };
+
+ c71_1: dsp@65800000 {
+ compatible = "ti,j721s2-c71-dsp";
+ reg = <0x00 0x65800000 0x00 0x00080000>,
+ <0x00 0x65e00000 0x00 0x0000c000>;
+ reg-names = "l2sram", "l1dram";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <11>;
+ ti,sci-proc-ids = <0x31 0xff>;
+ resets = <&k3_reset 11 1>;
+ firmware-name = "j721s2-c71_1-fw";
+ status = "disabled";
+ };
+
+ main_esm: esm@700000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x700000 0x00 0x1000>;
+ ti,esm-pins = <688>, <689>;
+ bootph-pre-ram;
+ };
+
+ watchdog0: watchdog@2200000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2200000 0x00 0x100>;
+ clocks = <&k3_clks 286 1>;
+ power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 286 1>;
+ assigned-clock-parents = <&k3_clks 286 5>;
+ };
+
+ watchdog1: watchdog@2210000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2210000 0x00 0x100>;
+ clocks = <&k3_clks 287 1>;
+ power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 287 1>;
+ assigned-clock-parents = <&k3_clks 287 5>;
+ };
+
+ /*
+ * The following RTI instances are coupled with MCU R5Fs, c7x and
+ * GPU so keeping them reserved as these will be used by their
+ * respective firmware
+ */
+ watchdog2: watchdog@22f0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x22f0000 0x00 0x100>;
+ clocks = <&k3_clks 290 1>;
+ power-domains = <&k3_pds 290 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 290 1>;
+ assigned-clock-parents = <&k3_clks 290 5>;
+ /* reserved for GPU */
+ status = "reserved";
+ };
+
+ watchdog3: watchdog@2300000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2300000 0x00 0x100>;
+ clocks = <&k3_clks 288 1>;
+ power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 288 1>;
+ assigned-clock-parents = <&k3_clks 288 5>;
+ /* reserved for C7X_0 */
+ status = "reserved";
+ };
+
+ watchdog4: watchdog@2310000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2310000 0x00 0x100>;
+ clocks = <&k3_clks 289 1>;
+ power-domains = <&k3_pds 289 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 289 1>;
+ assigned-clock-parents = <&k3_clks 289 5>;
+ /* reserved for C7X_1 */
+ status = "reserved";
+ };
+
+ watchdog5: watchdog@23c0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23c0000 0x00 0x100>;
+ clocks = <&k3_clks 291 1>;
+ power-domains = <&k3_pds 291 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 291 1>;
+ assigned-clock-parents = <&k3_clks 291 5>;
+ /* reserved for MAIN_R5F0_0 */
+ status = "reserved";
+ };
+
+ watchdog6: watchdog@23d0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23d0000 0x00 0x100>;
+ clocks = <&k3_clks 292 1>;
+ power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 292 1>;
+ assigned-clock-parents = <&k3_clks 292 5>;
+ /* reserved for MAIN_R5F0_1 */
+ status = "reserved";
+ };
+
+ watchdog7: watchdog@23e0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23e0000 0x00 0x100>;
+ clocks = <&k3_clks 293 1>;
+ power-domains = <&k3_pds 293 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 293 1>;
+ assigned-clock-parents = <&k3_clks 293 5>;
+ /* reserved for MAIN_R5F1_0 */
+ status = "reserved";
+ };
+
+ watchdog8: watchdog@23f0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23f0000 0x00 0x100>;
+ clocks = <&k3_clks 294 1>;
+ power-domains = <&k3_pds 294 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 294 1>;
+ assigned-clock-parents = <&k3_clks 294 5>;
+ /* reserved for MAIN_R5F1_1 */
+ status = "reserved";
+ };
};
diff --git a/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
index 2ddad93..7254f3b 100644
--- a/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
@@ -443,7 +443,7 @@
};
mcu_navss: bus@28380000 {
- compatible = "simple-mfd";
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>;
@@ -655,4 +655,84 @@
power-domains = <&k3_pds 154 TI_SCI_PD_SHARED>;
#thermal-sensor-cells = <1>;
};
+
+ mcu_r5fss0: r5fss@41000000 {
+ compatible = "ti,j721s2-r5fss";
+ ti,cluster-mode = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x41000000 0x00 0x41000000 0x20000>,
+ <0x41400000 0x00 0x41400000 0x20000>;
+ power-domains = <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>;
+
+ mcu_r5fss0_core0: r5f@41000000 {
+ compatible = "ti,j721s2-r5f";
+ reg = <0x41000000 0x00010000>,
+ <0x41010000 0x00010000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <284>;
+ ti,sci-proc-ids = <0x01 0xff>;
+ resets = <&k3_reset 284 1>;
+ firmware-name = "j721s2-mcu-r5f0_0-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+
+ mcu_r5fss0_core1: r5f@41400000 {
+ compatible = "ti,j721s2-r5f";
+ reg = <0x41400000 0x00010000>,
+ <0x41410000 0x00010000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <285>;
+ ti,sci-proc-ids = <0x02 0xff>;
+ resets = <&k3_reset 285 1>;
+ firmware-name = "j721s2-mcu-r5f0_1-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+ };
+
+ mcu_esm: esm@40800000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x40800000 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
+
+ wkup_esm: esm@42080000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x42080000 0x00 0x1000>;
+ ti,esm-pins = <63>;
+ bootph-pre-ram;
+ };
+
+ /*
+ * The 2 RTI instances are couple with MCU R5Fs so keeping them
+ * reserved as these will be used by their respective firmware
+ */
+ mcu_watchdog0: watchdog@40600000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x40600000 0x00 0x100>;
+ clocks = <&k3_clks 295 1>;
+ power-domains = <&k3_pds 295 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 295 1>;
+ assigned-clock-parents = <&k3_clks 295 5>;
+ /* reserved for MCU_R5F0_0 */
+ status = "reserved";
+ };
+
+ mcu_watchdog1: watchdog@40610000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x40610000 0x00 0x100>;
+ clocks = <&k3_clks 296 1>;
+ power-domains = <&k3_pds 296 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 296 1>;
+ assigned-clock-parents = <&k3_clks 296 5>;
+ /* reserved for MCU_R5F0_1 */
+ status = "reserved";
+ };
};
diff --git a/arch/arm/dts/k3-j721s2-som-p0.dtsi b/arch/arm/dts/k3-j721s2-som-p0.dtsi
index a4006f3..dcad372 100644
--- a/arch/arm/dts/k3-j721s2-som-p0.dtsi
+++ b/arch/arm/dts/k3-j721s2-som-p0.dtsi
@@ -29,6 +29,108 @@
alignment = <0x1000>;
no-map;
};
+
+ mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa0000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa0100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa5000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa5100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c71_0_dma_memory_region: c71-dma-memory@a6000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa6000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c71_0_memory_region: c71-memory@a6100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa6100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c71_1_dma_memory_region: c71-dma-memory@a7000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa7000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c71_1_memory_region: c71-memory@a7100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa7100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ rtos_ipc_memory_region: ipc-memories@a8000000 {
+ reg = <0x00 0xa8000000 0x00 0x01c00000>;
+ alignment = <0x1000>;
+ no-map;
+ };
};
mux0: mux-controller {
@@ -151,3 +253,109 @@
cdns,read-delay = <4>;
};
};
+
+&mailbox0_cluster0 {
+ status = "okay";
+ interrupts = <436>;
+ mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster1 {
+ status = "okay";
+ interrupts = <432>;
+ mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster2 {
+ status = "okay";
+ interrupts = <428>;
+ mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster4 {
+ status = "okay";
+ interrupts = <420>;
+ mbox_c71_0: mbox-c71-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_c71_1: mbox-c71-1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mcu_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>;
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+};
+
+&mcu_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>;
+ memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
+ <&mcu_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>;
+ memory-region = <&main_r5fss0_core0_dma_memory_region>,
+ <&main_r5fss0_core0_memory_region>;
+};
+
+&main_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>;
+ memory-region = <&main_r5fss0_core1_dma_memory_region>,
+ <&main_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss1_core0 {
+ mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core0>;
+ memory-region = <&main_r5fss1_core0_dma_memory_region>,
+ <&main_r5fss1_core0_memory_region>;
+};
+
+&main_r5fss1_core1 {
+ mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core1>;
+ memory-region = <&main_r5fss1_core1_dma_memory_region>,
+ <&main_r5fss1_core1_memory_region>;
+};
+
+&c71_0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>;
+ memory-region = <&c71_0_dma_memory_region>,
+ <&c71_0_memory_region>;
+};
+
+&c71_1 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster4>, <&mbox_c71_1>;
+ memory-region = <&c71_1_dma_memory_region>,
+ <&c71_1_memory_region>;
+};
diff --git a/arch/arm/dts/k3-serdes.h b/arch/arm/dts/k3-serdes.h
index 29167f8..21b4886 100644
--- a/arch/arm/dts/k3-serdes.h
+++ b/arch/arm/dts/k3-serdes.h
@@ -111,7 +111,7 @@
#define J721S2_SERDES0_LANE2_EDP_LANE2 0x0
#define J721S2_SERDES0_LANE2_PCIE1_LANE2 0x1
-#define J721S2_SERDES0_LANE2_IP3_UNUSED 0x2
+#define J721S2_SERDES0_LANE2_USB_SWAP 0x2
#define J721S2_SERDES0_LANE2_IP4_UNUSED 0x3
#define J721S2_SERDES0_LANE3_EDP_LANE3 0x0
diff --git a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi
index fabe592..1694ef8 100644
--- a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi
+++ b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi
@@ -133,7 +133,16 @@
ranges = <0x0 0x0 0xf0000000 0x00300000>,
<0xfff00000 0x0 0xfff00000 0x00016000>;
- spi1: spi@201000 {
+ host_intf: host_intf@9f000 {
+ compatible = "nuvoton,npcm845-host-intf";
+ reg = <0x9f000 0x1000>;
+ type = "espi";
+ ioaddr = <0x4e>;
+ channel-support = <0xf>;
+ syscon = <&gcr>;
+ };
+
+ pspi: spi@201000 {
compatible = "nuvoton,npcm845-pspi";
reg = <0x201000 0x1000>;
pinctrl-names = "default";
diff --git a/arch/arm/dts/nuvoton-npcm845-evb.dts b/arch/arm/dts/nuvoton-npcm845-evb.dts
index a93666c..0d3aaa0 100644
--- a/arch/arm/dts/nuvoton-npcm845-evb.dts
+++ b/arch/arm/dts/nuvoton-npcm845-evb.dts
@@ -2,6 +2,8 @@
// Copyright (c) 2021 Nuvoton Technology tomer.maimon@nuvoton.com
/dts-v1/;
+
+#include <dt-bindings/phy/nuvoton,npcm-usbphy.h>
#include "nuvoton-npcm845.dtsi"
#include "nuvoton-npcm845-pincfg.dtsi"
@@ -46,10 +48,10 @@
spi1 = &fiu1;
spi3 = &fiu3;
spi4 = &fiux;
- spi5 = &spi1;
+ spi5 = &pspi;
usb0 = &udc0;
usb1 = &ehci1;
- usb2 = &ehci2;
+ usb2 = &udc8;
};
chosen {
@@ -60,6 +62,17 @@
reg = <0x0 0x0 0x0 0x40000000>;
};
+ tpm@0 {
+ compatible = "microsoft,ftpm";
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
vsbr2: vsbr2 {
compatible = "regulator-npcm845";
regulator-name = "vr2";
@@ -149,6 +162,8 @@
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-gpio = <&gpio5 2 GPIO_ACTIVE_LOW>; /* gpio162 */
+ phy-supply = <&vsbr2>;
+ phy-supply-microvolt = <1800000>;
status = "okay";
};
@@ -179,7 +194,7 @@
status = "okay";
};
-&spi1 {
+&pspi {
status = "okay";
};
@@ -197,7 +212,7 @@
&udc0 {
status = "okay";
- phys = <&usbphy1 0>;
+ phys = <&usbphy1 NPCM_UDC0_7>;
};
&sdhci0 {
@@ -207,12 +222,12 @@
&ehci1 {
status = "okay";
- phys = <&usbphy2 3>;
+ phys = <&usbphy2 NPCM_USBH1>;
};
-&ehci2 {
+&udc8 {
status = "okay";
- phys = <&usbphy3 4>;
+ phys = <&usbphy3 NPCM_UDC8>;
};
&rng {
diff --git a/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi b/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi
index e49e564..4c6d5be 100644
--- a/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi
+++ b/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi
@@ -174,7 +174,7 @@
compatible = "nuvoton,npcm845-usb-phy";
#phy-cells = <1>;
reg = <3>;
- resets = <&rstc3 NPCM8XX_RESET_USBPHY3>;
+ resets = <&rstc4 NPCM8XX_RESET_USBPHY3>;
status = "disabled";
};
};
diff --git a/arch/arm/dts/stm32mp25-pinctrl.dtsi b/arch/arm/dts/stm32mp25-pinctrl.dtsi
new file mode 100644
index 0000000..d34a1d5
--- /dev/null
+++ b/arch/arm/dts/stm32mp25-pinctrl.dtsi
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+#include <dt-bindings/pinctrl/stm32-pinfunc.h>
+
+&pinctrl {
+ usart2_pins_a: usart2-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('A', 4, AF6)>; /* USART2_TX */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
+ bias-disable;
+ };
+ };
+
+ usart2_idle_pins_a: usart2-idle-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('A', 4, ANALOG)>; /* USART2_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
+ bias-disable;
+ };
+ };
+
+ usart2_sleep_pins_a: usart2-sleep-0 {
+ pins {
+ pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* USART2_TX */
+ <STM32_PINMUX('A', 8, ANALOG)>; /* USART2_RX */
+ };
+ };
+};
diff --git a/arch/arm/dts/stm32mp25-u-boot.dtsi b/arch/arm/dts/stm32mp25-u-boot.dtsi
new file mode 100644
index 0000000..f4f26ad
--- /dev/null
+++ b/arch/arm/dts/stm32mp25-u-boot.dtsi
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright : STMicroelectronics 2023
+ */
+
+/ {
+ aliases {
+ gpio0 = &gpioa;
+ gpio1 = &gpiob;
+ gpio2 = &gpioc;
+ gpio3 = &gpiod;
+ gpio4 = &gpioe;
+ gpio5 = &gpiof;
+ gpio6 = &gpiog;
+ gpio7 = &gpioh;
+ gpio8 = &gpioi;
+ gpio9 = &gpioj;
+ gpio10 = &gpiok;
+ gpio25 = &gpioz;
+ pinctrl0 = &pinctrl;
+ pinctrl1 = &pinctrl_z;
+ };
+
+ firmware {
+ optee {
+ bootph-all;
+ };
+ };
+
+ /* need PSCI for sysreset during board_f */
+ psci {
+ bootph-all;
+ };
+
+ soc@0 {
+ bootph-all;
+ };
+};
+
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
+};
+
+&gpioz {
+ bootph-all;
+};
+
+&pinctrl {
+ bootph-all;
+};
+
+&rifsc {
+ bootph-all;
+};
+
+&scmi_clk {
+ bootph-all;
+};
+
+&syscfg {
+ bootph-all;
+};
diff --git a/arch/arm/dts/stm32mp251.dtsi b/arch/arm/dts/stm32mp251.dtsi
new file mode 100644
index 0000000..cf2f28d
--- /dev/null
+++ b/arch/arm/dts/stm32mp251.dtsi
@@ -0,0 +1,285 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ compatible = "arm,cortex-a35";
+ device_type = "cpu";
+ reg = <0>;
+ enable-method = "psci";
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a35-pmu";
+ interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>;
+ interrupt-parent = <&intc>;
+ };
+
+ arm_wdt: watchdog {
+ compatible = "arm,smc-wdt";
+ arm,smc-id = <0xb200005a>;
+ status = "disabled";
+ };
+
+ clocks {
+ ck_flexgen_08: ck-flexgen-08 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <100000000>;
+ };
+
+ ck_flexgen_51: ck-flexgen-51 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <200000000>;
+ };
+
+ ck_icn_ls_mcu: ck-icn-ls-mcu {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <200000000>;
+ };
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+
+ scmi {
+ compatible = "linaro,scmi-optee";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ linaro,optee-channel-id = <0>;
+
+ scmi_clk: protocol@14 {
+ reg = <0x14>;
+ #clock-cells = <1>;
+ };
+
+ scmi_reset: protocol@16 {
+ reg = <0x16>;
+ #reset-cells = <1>;
+ };
+ };
+ };
+
+ intc: interrupt-controller@4ac00000 {
+ compatible = "arm,cortex-a7-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <1>;
+ interrupt-controller;
+ reg = <0x0 0x4ac10000 0x0 0x1000>,
+ <0x0 0x4ac20000 0x0 0x2000>,
+ <0x0 0x4ac40000 0x0 0x2000>,
+ <0x0 0x4ac60000 0x0 0x2000>;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupt-parent = <&intc>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ always-on;
+ };
+
+ soc@0 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&intc>;
+ ranges = <0x0 0x0 0x0 0x80000000>;
+
+ rifsc: rifsc-bus@42080000 {
+ compatible = "simple-bus";
+ reg = <0x42080000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ usart2: serial@400e0000 {
+ compatible = "st,stm32h7-uart";
+ reg = <0x400e0000 0x400>;
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ck_flexgen_08>;
+ status = "disabled";
+ };
+ };
+
+ syscfg: syscon@44230000 {
+ compatible = "st,stm32mp25-syscfg", "syscon";
+ reg = <0x44230000 0x10000>;
+ };
+
+ pinctrl: pinctrl@44240000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "st,stm32mp257-pinctrl";
+ ranges = <0 0x44240000 0xa0400>;
+ pins-are-numbered;
+
+ gpioa: gpio@44240000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x0 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOA";
+ status = "disabled";
+ };
+
+ gpiob: gpio@44250000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x10000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOB";
+ status = "disabled";
+ };
+
+ gpioc: gpio@44260000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x20000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOC";
+ status = "disabled";
+ };
+
+ gpiod: gpio@44270000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x30000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOD";
+ status = "disabled";
+ };
+
+ gpioe: gpio@44280000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x40000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOE";
+ status = "disabled";
+ };
+
+ gpiof: gpio@44290000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x50000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOF";
+ status = "disabled";
+ };
+
+ gpiog: gpio@442a0000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x60000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOG";
+ status = "disabled";
+ };
+
+ gpioh: gpio@442b0000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x70000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOH";
+ status = "disabled";
+ };
+
+ gpioi: gpio@442c0000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x80000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOI";
+ status = "disabled";
+ };
+
+ gpioj: gpio@442d0000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x90000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOJ";
+ status = "disabled";
+ };
+
+ gpiok: gpio@442e0000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0xa0000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOK";
+ status = "disabled";
+ };
+ };
+
+ pinctrl_z: pinctrl@46200000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "st,stm32mp257-z-pinctrl";
+ ranges = <0 0x46200000 0x400>;
+ pins-are-numbered;
+
+ gpioz: gpio@46200000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOZ";
+ st,bank-ioport = <11>;
+ status = "disabled";
+ };
+
+ };
+ };
+};
diff --git a/arch/arm/dts/stm32mp253.dtsi b/arch/arm/dts/stm32mp253.dtsi
new file mode 100644
index 0000000..af48e82
--- /dev/null
+++ b/arch/arm/dts/stm32mp253.dtsi
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+#include "stm32mp251.dtsi"
+
+/ {
+ cpus {
+ cpu1: cpu@1 {
+ compatible = "arm,cortex-a35";
+ device_type = "cpu";
+ reg = <1>;
+ enable-method = "psci";
+ };
+ };
+
+ arm-pmu {
+ interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>;
+ };
+};
diff --git a/arch/arm/dts/stm32mp255.dtsi b/arch/arm/dts/stm32mp255.dtsi
new file mode 100644
index 0000000..e6fa596
--- /dev/null
+++ b/arch/arm/dts/stm32mp255.dtsi
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+#include "stm32mp253.dtsi"
+
+/ {
+};
diff --git a/arch/arm/dts/stm32mp257.dtsi b/arch/arm/dts/stm32mp257.dtsi
new file mode 100644
index 0000000..5c5000d
--- /dev/null
+++ b/arch/arm/dts/stm32mp257.dtsi
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+#include "stm32mp255.dtsi"
+
+/ {
+};
diff --git a/arch/arm/dts/stm32mp257f-ev1-u-boot.dtsi b/arch/arm/dts/stm32mp257f-ev1-u-boot.dtsi
new file mode 100644
index 0000000..a35a9b9
--- /dev/null
+++ b/arch/arm/dts/stm32mp257f-ev1-u-boot.dtsi
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ */
+
+#include "stm32mp25-u-boot.dtsi"
+
+&usart2 {
+ bootph-all;
+};
+
+&usart2_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
diff --git a/arch/arm/dts/stm32mp257f-ev1.dts b/arch/arm/dts/stm32mp257f-ev1.dts
new file mode 100644
index 0000000..a88494e
--- /dev/null
+++ b/arch/arm/dts/stm32mp257f-ev1.dts
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+
+/dts-v1/;
+
+#include "stm32mp257.dtsi"
+#include "stm32mp25xf.dtsi"
+#include "stm32mp25-pinctrl.dtsi"
+#include "stm32mp25xxai-pinctrl.dtsi"
+
+/ {
+ model = "STMicroelectronics STM32MP257F-EV1 Evaluation Board";
+ compatible = "st,stm32mp257f-ev1", "st,stm32mp257";
+
+ aliases {
+ serial0 = &usart2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0x1 0x0>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ fw@80000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x80000000 0x0 0x4000000>;
+ no-map;
+ };
+ };
+};
+
+&arm_wdt {
+ timeout-sec = <32>;
+ status = "okay";
+};
+
+&usart2 {
+ pinctrl-names = "default", "idle", "sleep";
+ pinctrl-0 = <&usart2_pins_a>;
+ pinctrl-1 = <&usart2_idle_pins_a>;
+ pinctrl-2 = <&usart2_sleep_pins_a>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/stm32mp25xc.dtsi b/arch/arm/dts/stm32mp25xc.dtsi
new file mode 100644
index 0000000..5e83a69
--- /dev/null
+++ b/arch/arm/dts/stm32mp25xc.dtsi
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+
+/ {
+};
diff --git a/arch/arm/dts/stm32mp25xf.dtsi b/arch/arm/dts/stm32mp25xf.dtsi
new file mode 100644
index 0000000..5e83a69
--- /dev/null
+++ b/arch/arm/dts/stm32mp25xf.dtsi
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+
+/ {
+};
diff --git a/arch/arm/dts/stm32mp25xxai-pinctrl.dtsi b/arch/arm/dts/stm32mp25xxai-pinctrl.dtsi
new file mode 100644
index 0000000..abdbc7a
--- /dev/null
+++ b/arch/arm/dts/stm32mp25xxai-pinctrl.dtsi
@@ -0,0 +1,83 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+
+&pinctrl {
+ st,package = <STM32MP_PKG_AI>;
+
+ gpioa: gpio@44240000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 0 16>;
+ };
+
+ gpiob: gpio@44250000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 16 16>;
+ };
+
+ gpioc: gpio@44260000 {
+ status = "okay";
+ ngpios = <14>;
+ gpio-ranges = <&pinctrl 0 32 14>;
+ };
+
+ gpiod: gpio@44270000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 48 16>;
+ };
+
+ gpioe: gpio@44280000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 64 16>;
+ };
+
+ gpiof: gpio@44290000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 80 16>;
+ };
+
+ gpiog: gpio@442a0000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 96 16>;
+ };
+
+ gpioh: gpio@442b0000 {
+ status = "okay";
+ ngpios = <12>;
+ gpio-ranges = <&pinctrl 2 114 12>;
+ };
+
+ gpioi: gpio@442c0000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 128 16>;
+ };
+
+ gpioj: gpio@442d0000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 144 16>;
+ };
+
+ gpiok: gpio@442e0000 {
+ status = "okay";
+ ngpios = <8>;
+ gpio-ranges = <&pinctrl 0 160 8>;
+ };
+};
+
+&pinctrl_z {
+ gpioz: gpio@46200000 {
+ status = "okay";
+ ngpios = <10>;
+ gpio-ranges = <&pinctrl_z 0 400 10>;
+ };
+};
diff --git a/arch/arm/dts/stm32mp25xxak-pinctrl.dtsi b/arch/arm/dts/stm32mp25xxak-pinctrl.dtsi
new file mode 100644
index 0000000..2e0d4d3
--- /dev/null
+++ b/arch/arm/dts/stm32mp25xxak-pinctrl.dtsi
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+
+&pinctrl {
+ st,package = <STM32MP_PKG_AK>;
+
+ gpioa: gpio@44240000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 0 16>;
+ };
+
+ gpiob: gpio@44250000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 16 16>;
+ };
+
+ gpioc: gpio@44260000 {
+ status = "okay";
+ ngpios = <14>;
+ gpio-ranges = <&pinctrl 0 32 14>;
+ };
+
+ gpiod: gpio@44270000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 48 16>;
+ };
+
+ gpioe: gpio@44280000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 64 16>;
+ };
+
+ gpiof: gpio@44290000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 80 16>;
+ };
+
+ gpiog: gpio@442a0000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 96 16>;
+ };
+
+ gpioh: gpio@442b0000 {
+ status = "okay";
+ ngpios = <12>;
+ gpio-ranges = <&pinctrl 2 114 12>;
+ };
+
+ gpioi: gpio@442c0000 {
+ status = "okay";
+ ngpios = <12>;
+ gpio-ranges = <&pinctrl 0 128 12>;
+ };
+};
+
+&pinctrl_z {
+ gpioz: gpio@46200000 {
+ status = "okay";
+ ngpios = <10>;
+ gpio-ranges = <&pinctrl_z 0 400 10>;
+ };
+};
diff --git a/arch/arm/dts/stm32mp25xxal-pinctrl.dtsi b/arch/arm/dts/stm32mp25xxal-pinctrl.dtsi
new file mode 100644
index 0000000..2406e97
--- /dev/null
+++ b/arch/arm/dts/stm32mp25xxal-pinctrl.dtsi
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+
+&pinctrl {
+ st,package = <STM32MP_PKG_AL>;
+
+ gpioa: gpio@44240000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 0 16>;
+ };
+
+ gpiob: gpio@44250000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 16 16>;
+ };
+
+ gpioc: gpio@44260000 {
+ status = "okay";
+ ngpios = <14>;
+ gpio-ranges = <&pinctrl 0 32 14>;
+ };
+
+ gpiod: gpio@44270000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 48 16>;
+ };
+
+ gpioe: gpio@44280000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 64 16>;
+ };
+
+ gpiof: gpio@44290000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 80 16>;
+ };
+
+ gpiog: gpio@442a0000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 96 16>;
+ };
+
+ gpioh: gpio@442b0000 {
+ status = "okay";
+ ngpios = <12>;
+ gpio-ranges = <&pinctrl 2 114 12>;
+ };
+
+ gpioi: gpio@442c0000 {
+ status = "okay";
+ ngpios = <12>;
+ gpio-ranges = <&pinctrl 0 128 12>;
+ };
+};
+
+&pinctrl_z {
+ gpioz: gpio@46200000 {
+ status = "okay";
+ ngpios = <10>;
+ gpio-ranges = <&pinctrl_z 0 400 10>;
+ };
+};
diff --git a/arch/arm/include/asm/arch-omap3/cpu.h b/arch/arm/include/asm/arch-omap3/cpu.h
index 3f0182e..d2fbf91 100644
--- a/arch/arm/include/asm/arch-omap3/cpu.h
+++ b/arch/arm/include/asm/arch-omap3/cpu.h
@@ -7,6 +7,7 @@
#ifndef _CPU_H
#define _CPU_H
+#include <asm/arch/omap.h>
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
#include <asm/types.h>
#endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 0eae857..43f7503 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -513,14 +513,6 @@
};
#endif
-#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
-#define DCACHE_DEFAULT_OPTION DCACHE_WRITETHROUGH
-#elif defined(CONFIG_SYS_ARM_CACHE_WRITEALLOC)
-#define DCACHE_DEFAULT_OPTION DCACHE_WRITEALLOC
-#elif defined(CONFIG_SYS_ARM_CACHE_WRITEBACK)
-#define DCACHE_DEFAULT_OPTION DCACHE_WRITEBACK
-#endif
-
/* Size of an MMU section */
enum {
#ifdef CONFIG_ARMV7_LPAE
@@ -578,6 +570,14 @@
#endif /* CONFIG_ARM64 */
+#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
+#define DCACHE_DEFAULT_OPTION DCACHE_WRITETHROUGH
+#elif defined(CONFIG_SYS_ARM_CACHE_WRITEALLOC)
+#define DCACHE_DEFAULT_OPTION DCACHE_WRITEALLOC
+#elif defined(CONFIG_SYS_ARM_CACHE_WRITEBACK)
+#define DCACHE_DEFAULT_OPTION DCACHE_WRITEBACK
+#endif
+
#ifndef __ASSEMBLY__
/**
* save_boot_params() - Save boot parameters before starting reset sequence
diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index 6dc27d1..9961472 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -22,6 +22,7 @@
#include <cpu_func.h>
#include <efi_loader.h>
#include <irq_func.h>
+#include <semihosting.h>
#include <asm/global_data.h>
#include <asm/proc-armv/ptrace.h>
#include <asm/ptrace.h>
@@ -135,6 +136,32 @@
regs->ARM_pc = pc | (regs->ARM_pc & PCMASK);
}
+/*
+ * Try to "emulate" a semihosting call in the event that we don't have a
+ * debugger attached.
+ */
+static bool smh_emulate_trap(struct pt_regs *regs)
+{
+ if (regs->ARM_cpsr & T_BIT) {
+ u16 *insn = (u16 *)(regs->ARM_pc - 2);
+
+ if (*insn != SMH_T32_SVC)
+ return false;
+ } else {
+ u32 *insn = (u32 *)(regs->ARM_pc - 4);
+
+ if (*insn != SMH_A32_SVC)
+ return false;
+ }
+
+ /* Avoid future semihosting calls */
+ disable_semihosting();
+
+ /* Just pretend the call failed */
+ regs->ARM_r0 = -1;
+ return true;
+}
+
void do_undefined_instruction (struct pt_regs *pt_regs)
{
efi_restore_gd();
@@ -147,6 +174,10 @@
void do_software_interrupt (struct pt_regs *pt_regs)
{
+ if (CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK) &&
+ smh_emulate_trap(pt_regs))
+ return;
+
efi_restore_gd();
printf ("software interrupt\n");
fixup_pc(pt_regs, -4);
diff --git a/arch/arm/lib/semihosting.S b/arch/arm/lib/semihosting.S
index 393aade..6e1691a 100644
--- a/arch/arm/lib/semihosting.S
+++ b/arch/arm/lib/semihosting.S
@@ -18,11 +18,17 @@
#elif defined(CONFIG_SYS_THUMB_BUILD)
svc #0xab
#else
+#if CONFIG_SYS_ARM_ARCH < 7
+ /* Before the ARMv7 exception model, svc (swi) clobbers lr */
+ mov r2, lr
+#endif
svc #0x123456
#endif
#if defined(CONFIG_ARM64)
ret
+#elif CONFIG_SYS_ARM_ARCH < 7
+ bx r2
#else
bx lr
#endif
diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S
index 7cf7d16..843f9b9 100644
--- a/arch/arm/lib/vectors.S
+++ b/arch/arm/lib/vectors.S
@@ -240,6 +240,18 @@
movs pc, lr @ jump to next instruction & switch modes.
.endm
+ .macro get_bad_stack_swi
+ sub r13, r13, #4 @ space on current stack for scratch reg.
+ str r0, [r13] @ save R0's value.
+ ldr r0, IRQ_STACK_START_IN @ get data regions start
+ str lr, [r0] @ save caller lr in position 0 of saved stack
+ mrs lr, spsr @ get the spsr
+ str lr, [r0, #4] @ save spsr in position 1 of saved stack
+ ldr lr, [r0] @ restore lr
+ ldr r0, [r13] @ restore r0
+ add r13, r13, #4 @ pop stack entry
+ .endm
+
.macro get_irq_stack @ setup IRQ stack
ldr sp, IRQ_STACK_START
.endm
@@ -260,9 +272,16 @@
.align 5
software_interrupt:
- get_bad_stack
+ get_bad_stack_swi
bad_save_user_regs
bl do_software_interrupt
+#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)
+ ldmia sp, {r0 - lr}^ @ Calling r0 - lr
+ mov r0, r0
+ ldr lr, [sp, #S_PC] @ Get PC
+ add sp, sp, #S_FRAME_SIZE
+ movs pc, lr @ return & move spsr_svc into cpsr
+#endif
.align 5
prefetch_abort:
diff --git a/arch/arm/mach-davinci/include/mach/dm365_lowlevel.h b/arch/arm/mach-davinci/include/mach/dm365_lowlevel.h
index eb1488e..0cd13d8 100644
--- a/arch/arm/mach-davinci/include/mach/dm365_lowlevel.h
+++ b/arch/arm/mach-davinci/include/mach/dm365_lowlevel.h
@@ -8,7 +8,6 @@
#ifndef __DM365_LOWLEVEL_H
#define __DM365_LOWLEVEL_H
-#include <common.h>
#include <asm/arch/hardware.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 7529b31..50a9c3e 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -246,7 +246,7 @@
select DM_GPIO
select DM_MMC
select PCI
- select DM_SCSI
+ select SCSI
select VIDEO
select OF_CONTROL
select SUPPORT_SPL
diff --git a/arch/arm/mach-imx/spl_imx_romapi.c b/arch/arm/mach-imx/spl_imx_romapi.c
index 5eb5a3d..b9ff9bb 100644
--- a/arch/arm/mach-imx/spl_imx_romapi.c
+++ b/arch/arm/mach-imx/spl_imx_romapi.c
@@ -53,16 +53,10 @@
}
static ulong spl_romapi_read_seekable(struct spl_load_info *load,
- ulong sector, ulong count,
+ ulong offset, ulong byte,
void *buf)
{
- u32 pagesize = *(u32 *)load->priv;
- ulong byte = count * pagesize;
- u32 offset;
-
- offset = sector * pagesize;
-
- return spl_romapi_raw_seekable_read(offset, byte, buf) / pagesize;
+ return spl_romapi_raw_seekable_read(offset, byte, buf);
}
static int spl_romapi_load_image_seekable(struct spl_image_info *spl_image,
@@ -107,20 +101,18 @@
struct spl_load_info load;
memset(&load, 0, sizeof(load));
- load.bl_len = pagesize;
+ spl_set_bl_len(&load, pagesize);
load.read = spl_romapi_read_seekable;
- load.priv = &pagesize;
- return spl_load_simple_fit(spl_image, &load, offset / pagesize, header);
+ return spl_load_simple_fit(spl_image, &load, offset, header);
} else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER) &&
valid_container_hdr((void *)header)) {
struct spl_load_info load;
memset(&load, 0, sizeof(load));
- load.bl_len = pagesize;
+ spl_set_bl_len(&load, pagesize);
load.read = spl_romapi_read_seekable;
- load.priv = &pagesize;
- ret = spl_load_imx_container(spl_image, &load, offset / pagesize);
+ ret = spl_load_imx_container(spl_image, &load, offset);
} else {
/* TODO */
puts("Can't support legacy image\n");
@@ -342,7 +334,7 @@
ss.pagesize = pagesize;
memset(&load, 0, sizeof(load));
- load.bl_len = 1;
+ spl_set_bl_len(&load, 1);
load.read = spl_romapi_read_stream;
load.priv = &ss;
@@ -366,7 +358,7 @@
printf("ROM download failure %d\n", imagesize);
memset(&load, 0, sizeof(load));
- load.bl_len = 1;
+ spl_set_bl_len(&load, 1);
load.read = spl_ram_load_read;
if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER))
diff --git a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.h b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.h
index 2341a71..b4823a3 100644
--- a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.h
+++ b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.h
@@ -8,8 +8,6 @@
#ifndef _PINCTRL_SNAPDRAGON_H
#define _PINCTRL_SNAPDRAGON_H
-#include <common.h>
-
struct msm_pinctrl_data {
int pin_count;
int functions_count;
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 9168bf8..0389842 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -24,6 +24,11 @@
endchoice
+if SOC_K3_J721E
+config SOC_K3_J721E_J7200
+ bool "TI's K3 based J7200 SoC variant Family Support"
+endif
+
config SYS_SOC
default "k3"
@@ -109,56 +114,9 @@
Use this option to set the index of the serial device to be used
for the early console during SPL execution.
-config K3_LOAD_SYSFW
- bool
- depends on SPL
-
-config K3_SYSFW_IMAGE_NAME
- string "File name of SYSFW firmware and configuration blob"
- depends on K3_LOAD_SYSFW
- default "sysfw.itb"
- help
- Filename of the combined System Firmware and configuration image tree
- blob to be loaded when booting from a filesystem.
-
-config K3_SYSFW_IMAGE_MMCSD_RAW_MODE_SECT
- hex "MMC sector to load SYSFW firmware and configuration blob from"
- depends on K3_LOAD_SYSFW && SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
- default 0x3600
- help
- Address on the MMC to load the combined System Firmware and
- configuration image tree blob from, when the MMC is being used
- in raw mode. Units: MMC sectors (1 sector = 512 bytes).
-
-config K3_SYSFW_IMAGE_MMCSD_RAW_MODE_PART
- hex "MMC partition to load SYSFW firmware and configuration blob from"
- depends on K3_LOAD_SYSFW && SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
- default 2
- help
- Partition on the MMC to the combined System Firmware and configuration
- image tree blob from, when the MMC is being used in raw mode.
-
-config K3_SYSFW_IMAGE_SIZE_MAX
- int "Amount of memory dynamically allocated for loading SYSFW blob"
- depends on K3_LOAD_SYSFW
- default 280000
- help
- Amount of memory (in bytes) reserved through dynamic allocation at
- runtime for loading the combined System Firmware and configuration image
- tree blob. Keep it as tight as possible, as this directly affects the
- overall SPL memory footprint.
-
-config K3_SYSFW_IMAGE_SPI_OFFS
- hex "SPI offset of SYSFW firmware and configuration blob"
- depends on K3_LOAD_SYSFW
- default 0x6C0000
- help
- Offset of the combined System Firmware and configuration image tree
- blob to be loaded when booting from a SPI flash memory.
-
config SYS_K3_SPL_ATF
bool "Start Cortex-A from SPL"
- depends on SPL && CPU_V7R
+ depends on CPU_V7R
help
Enabling this will try to start Cortex-A (typically with ATF)
after SPL from R5.
@@ -172,7 +130,7 @@
config K3_DM_FW
bool "Separate DM firmware image"
- depends on SPL && CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_AM625 || SOC_K3_AM62A7) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN
+ depends on CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_AM625 || SOC_K3_AM62A7) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN
default y
help
Enabling this will indicate that the system has separate DM
@@ -187,12 +145,15 @@
help
SWRV for X509 certificate used for boot images
+if CPU_V7R
+source "arch/arm/mach-k3/r5/Kconfig"
+endif
+
+source "arch/arm/mach-k3/am65x/Kconfig"
+source "arch/arm/mach-k3/am64x/Kconfig"
+source "arch/arm/mach-k3/am62x/Kconfig"
+source "arch/arm/mach-k3/am62ax/Kconfig"
+source "arch/arm/mach-k3/j721e/Kconfig"
+source "arch/arm/mach-k3/j721s2/Kconfig"
+
-source "board/ti/am65x/Kconfig"
-source "board/ti/am64x/Kconfig"
-source "board/ti/am62x/Kconfig"
-source "board/ti/am62ax/Kconfig"
-source "board/ti/j721e/Kconfig"
-source "board/siemens/iot2050/Kconfig"
-source "board/ti/j721s2/Kconfig"
-source "board/toradex/verdin-am62/Kconfig"
endif
diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile
index c7ca0fd..4216137 100644
--- a/arch/arm/mach-k3/Makefile
+++ b/arch/arm/mach-k3/Makefile
@@ -3,12 +3,8 @@
# Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/
# Lokesh Vutla <lokeshvutla@ti.com>
-obj-$(CONFIG_SOC_K3_J721E) += j721e/ j7200/
-obj-$(CONFIG_SOC_K3_J721S2) += j721s2/
-obj-$(CONFIG_SOC_K3_AM625) += am62x/
-obj-$(CONFIG_SOC_K3_AM62A7) += am62ax/
+obj-$(CONFIG_CPU_V7R) += r5/
obj-$(CONFIG_ARM64) += arm64-mmu.o
-obj-$(CONFIG_CPU_V7R) += r5_mpu.o lowlevel_init.o
obj-$(CONFIG_ARM64) += cache.o
obj-$(CONFIG_OF_LIBFDT) += common_fdt.o
ifeq ($(CONFIG_OF_LIBFDT)$(CONFIG_OF_SYSTEM_SETUP),yy)
@@ -24,6 +20,5 @@
obj-$(CONFIG_SOC_K3_AM642) += am642_init.o
obj-$(CONFIG_SOC_K3_AM625) += am625_init.o
obj-$(CONFIG_SOC_K3_AM62A7) += am62a7_init.o
-obj-$(CONFIG_K3_LOAD_SYSFW) += sysfw-loader.o
endif
obj-y += common.o security.o
diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
index 8fa36f7..1d4ef35 100644
--- a/arch/arm/mach-k3/am625_init.c
+++ b/arch/arm/mach-k3/am625_init.c
@@ -209,7 +209,7 @@
if (ret)
panic("DRAM init failed: %d\n", ret);
}
- spl_enable_dcache();
+ spl_enable_cache();
}
u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
diff --git a/arch/arm/mach-k3/am62ax/Kconfig b/arch/arm/mach-k3/am62ax/Kconfig
new file mode 100644
index 0000000..c5f1ef8
--- /dev/null
+++ b/arch/arm/mach-k3/am62ax/Kconfig
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+# Andrew Davis <afd@ti.com>
+
+if SOC_K3_AM62A7
+
+choice
+ prompt "K3 AM62Ax based boards"
+ optional
+
+config TARGET_AM62A7_A53_EVM
+ bool "TI K3 based AM62A7 EVM running on A53"
+ select ARM64
+ select BINMAN
+ imply BOARD
+ imply SPL_BOARD
+ imply TI_I2C_BOARD_DETECT
+
+config TARGET_AM62A7_R5_EVM
+ bool "TI K3 based AM62A7 EVM running on R5"
+ select CPU_V7R
+ select SYS_THUMB_BUILD
+ select K3_LOAD_SYSFW
+ select RAM
+ select SPL_RAM
+ select K3_DDRSS
+ select BINMAN
+ imply SYS_K3_SPL_ATF
+ imply TI_I2C_BOARD_DETECT
+
+endchoice
+
+source "board/ti/am62ax/Kconfig"
+
+endif
diff --git a/arch/arm/mach-k3/am62x/Kconfig b/arch/arm/mach-k3/am62x/Kconfig
new file mode 100644
index 0000000..8091d72
--- /dev/null
+++ b/arch/arm/mach-k3/am62x/Kconfig
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+# Andrew Davis <afd@ti.com>
+
+if SOC_K3_AM625
+
+choice
+ prompt "K3 AM62x based boards"
+ optional
+
+config TARGET_AM625_A53_EVM
+ bool "TI K3 based AM625 EVM running on A53"
+ select ARM64
+ select BINMAN
+
+config TARGET_AM625_R5_EVM
+ bool "TI K3 based AM625 EVM running on R5"
+ select CPU_V7R
+ select SYS_THUMB_BUILD
+ select K3_LOAD_SYSFW
+ select RAM
+ select SPL_RAM
+ select K3_DDRSS
+ select BINMAN
+ imply SYS_K3_SPL_ATF
+
+config TARGET_VERDIN_AM62_A53
+ bool "Toradex Verdin AM62 running on A53"
+ select ARM64
+ select BINMAN
+
+config TARGET_VERDIN_AM62_R5
+ bool "Toradex Verdin AM62 running on R5"
+ select CPU_V7R
+ select SYS_THUMB_BUILD
+ select K3_LOAD_SYSFW
+ select RAM
+ select SPL_RAM
+ select K3_DDRSS
+ select BINMAN
+ imply SYS_K3_SPL_ATF
+
+endchoice
+
+source "board/beagle/beagleplay/Kconfig"
+source "board/ti/am62x/Kconfig"
+source "board/toradex/verdin-am62/Kconfig"
+
+endif
diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c
index c871e92..6085379 100644
--- a/arch/arm/mach-k3/am642_init.c
+++ b/arch/arm/mach-k3/am642_init.c
@@ -7,7 +7,6 @@
* Dave Gerlach <d-gerlach@ti.com>
*/
-#include <common.h>
#include <fdt_support.h>
#include <spl.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-k3/am64x/Kconfig b/arch/arm/mach-k3/am64x/Kconfig
new file mode 100644
index 0000000..6f7b003
--- /dev/null
+++ b/arch/arm/mach-k3/am64x/Kconfig
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+# Andrew Davis <afd@ti.com>
+
+if SOC_K3_AM642
+
+choice
+ prompt "K3 AM64 based boards"
+ optional
+
+config TARGET_AM642_A53_EVM
+ bool "TI K3 based AM642 EVM running on A53"
+ select ARM64
+ select BINMAN
+ imply BOARD
+ imply SPL_BOARD
+ imply TI_I2C_BOARD_DETECT
+
+config TARGET_AM642_R5_EVM
+ bool "TI K3 based AM642 EVM running on R5"
+ select CPU_V7R
+ select SYS_THUMB_BUILD
+ select K3_LOAD_SYSFW
+ select RAM
+ select SPL_RAM
+ select K3_DDRSS
+ select BINMAN
+ imply SYS_K3_SPL_ATF
+ imply TI_I2C_BOARD_DETECT
+
+endchoice
+
+source "board/ti/am64x/Kconfig"
+
+endif
diff --git a/arch/arm/mach-k3/am654_init.c b/arch/arm/mach-k3/am654_init.c
index 9353a47..7c2a143 100644
--- a/arch/arm/mach-k3/am654_init.c
+++ b/arch/arm/mach-k3/am654_init.c
@@ -6,7 +6,6 @@
* Lokesh Vutla <lokeshvutla@ti.com>
*/
-#include <common.h>
#include <fdt_support.h>
#include <init.h>
#include <asm/global_data.h>
@@ -259,7 +258,7 @@
if (ret)
panic("DRAM init failed: %d\n", ret);
#endif
- spl_enable_dcache();
+ spl_enable_cache();
}
u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
diff --git a/arch/arm/mach-k3/am65x/Kconfig b/arch/arm/mach-k3/am65x/Kconfig
new file mode 100644
index 0000000..f17b641
--- /dev/null
+++ b/arch/arm/mach-k3/am65x/Kconfig
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+# Andrew Davis <afd@ti.com>
+
+if SOC_K3_AM654
+
+choice
+ prompt "K3 AM65 based boards"
+ optional
+
+config TARGET_AM654_A53_EVM
+ bool "TI K3 based AM654 EVM running on A53"
+ select ARM64
+ select SYS_DISABLE_DCACHE_OPS
+ select BOARD_LATE_INIT
+ select BINMAN
+ imply TI_I2C_BOARD_DETECT
+
+config TARGET_AM654_R5_EVM
+ bool "TI K3 based AM654 EVM running on R5"
+ select CPU_V7R
+ select SYS_THUMB_BUILD
+ select K3_LOAD_SYSFW
+ select K3_AM654_DDRSS
+ select BINMAN
+ imply SYS_K3_SPL_ATF
+ imply TI_I2C_BOARD_DETECT
+
+config TARGET_IOT2050_A53
+ bool "IOT2050 running on A53"
+ depends on SOC_K3_AM654
+ select ARM64
+ select BOARD_LATE_INIT
+ select SYS_DISABLE_DCACHE_OPS
+ select BINMAN
+ help
+ This builds U-Boot for the IOT2050 devices.
+
+endchoice
+
+source "board/ti/am65x/Kconfig"
+source "board/siemens/iot2050/Kconfig"
+
+endif
diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c
index f8087d2..e8db533 100644
--- a/arch/arm/mach-k3/arm64-mmu.c
+++ b/arch/arm/mach-k3/arm64-mmu.c
@@ -9,7 +9,6 @@
*
*/
-#include <common.h>
#include <asm/system.h>
#include <asm/armv8/mmu.h>
@@ -68,12 +67,11 @@
#ifdef CONFIG_SOC_K3_J721E
-#ifdef CONFIG_TARGET_J721E_A72_EVM
-/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 6)
+#ifdef CONFIG_SOC_K3_J721E_J7200
+#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 5)
/* ToDo: Add 64bit IO */
-struct mm_region j721e_mem_map[NR_MMU_REGIONS] = {
+struct mm_region j7200_mem_map[NR_MMU_REGIONS] = {
{
.virt = 0x0UL,
.phys = 0x0UL,
@@ -90,13 +88,13 @@
}, {
.virt = 0xa0000000UL,
.phys = 0xa0000000UL,
- .size = 0x1bc00000UL,
+ .size = 0x04800000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
PTE_BLOCK_NON_SHARE
}, {
- .virt = 0xbbc00000UL,
- .phys = 0xbbc00000UL,
- .size = 0x44400000UL,
+ .virt = 0xa4800000UL,
+ .phys = 0xa4800000UL,
+ .size = 0x5b800000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
@@ -113,25 +111,20 @@
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
- .virt = 0x4d80000000UL,
- .phys = 0x4d80000000UL,
- .size = 0x0002000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
- PTE_BLOCK_INNER_SHARE
- }, {
/* List terminator */
0,
}
};
-struct mm_region *mem_map = j721e_mem_map;
-#endif /* CONFIG_TARGET_J721E_A72_EVM */
+struct mm_region *mem_map = j7200_mem_map;
-#ifdef CONFIG_TARGET_J7200_A72_EVM
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 5)
+#else /* CONFIG_SOC_K3_J721E_J7200 */
+
+/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
+#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 6)
/* ToDo: Add 64bit IO */
-struct mm_region j7200_mem_map[NR_MMU_REGIONS] = {
+struct mm_region j721e_mem_map[NR_MMU_REGIONS] = {
{
.virt = 0x0UL,
.phys = 0x0UL,
@@ -148,13 +141,13 @@
}, {
.virt = 0xa0000000UL,
.phys = 0xa0000000UL,
- .size = 0x04800000UL,
+ .size = 0x1bc00000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
PTE_BLOCK_NON_SHARE
}, {
- .virt = 0xa4800000UL,
- .phys = 0xa4800000UL,
- .size = 0x5b800000UL,
+ .virt = 0xbbc00000UL,
+ .phys = 0xbbc00000UL,
+ .size = 0x44400000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
@@ -171,13 +164,19 @@
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
+ .virt = 0x4d80000000UL,
+ .phys = 0x4d80000000UL,
+ .size = 0x0002000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
/* List terminator */
0,
}
};
-struct mm_region *mem_map = j7200_mem_map;
-#endif /* CONFIG_TARGET_J7200_A72_EVM */
+struct mm_region *mem_map = j721e_mem_map;
+#endif /* CONFIG_SOC_K3_J721E_J7200 */
#endif /* CONFIG_SOC_K3_J721E */
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index d8974d6..fd400e7 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -6,7 +6,6 @@
* Lokesh Vutla <lokeshvutla@ti.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <image.h>
#include <init.h>
@@ -522,7 +521,7 @@
}
}
-void spl_enable_dcache(void)
+void spl_enable_cache(void)
{
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
phys_addr_t ram_top = CFG_SYS_SDRAM_BASE;
@@ -543,7 +542,7 @@
gd->arch.tlb_addr + gd->arch.tlb_size);
gd->relocaddr = gd->arch.tlb_addr;
- dcache_enable();
+ enable_caches();
#endif
}
diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
index 04f3c0b..e9db9fb 100644
--- a/arch/arm/mach-k3/common.h
+++ b/arch/arm/mach-k3/common.h
@@ -37,7 +37,7 @@
void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size);
int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr);
void k3_sysfw_print_ver(void);
-void spl_enable_dcache(void);
+void spl_enable_cache(void);
void mmr_unlock(uintptr_t base, u32 partition);
bool is_rom_loaded_sysfw(struct rom_extended_boot_data *data);
enum k3_device_type get_device_type(void);
diff --git a/arch/arm/mach-k3/j721e/Kconfig b/arch/arm/mach-k3/j721e/Kconfig
new file mode 100644
index 0000000..0761b82
--- /dev/null
+++ b/arch/arm/mach-k3/j721e/Kconfig
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+# Andrew Davis <afd@ti.com>
+
+if SOC_K3_J721E
+
+choice
+ prompt "K3 J721E based boards"
+ optional
+
+config TARGET_J721E_A72_EVM
+ bool "TI K3 based J721E EVM running on A72"
+ select ARM64
+ select BOARD_LATE_INIT
+ imply TI_I2C_BOARD_DETECT
+ select SYS_DISABLE_DCACHE_OPS
+ select BINMAN
+
+config TARGET_J721E_R5_EVM
+ bool "TI K3 based J721E EVM running on R5"
+ select CPU_V7R
+ select SYS_THUMB_BUILD
+ select K3_LOAD_SYSFW
+ select RAM
+ select SPL_RAM
+ select K3_DDRSS
+ select BINMAN
+ imply SYS_K3_SPL_ATF
+ imply TI_I2C_BOARD_DETECT
+
+config TARGET_J7200_A72_EVM
+ bool "TI K3 based J7200 EVM running on A72"
+ select ARM64
+ select SOC_K3_J721E_J7200
+ select BOARD_LATE_INIT
+ imply TI_I2C_BOARD_DETECT
+ select SYS_DISABLE_DCACHE_OPS
+ select BINMAN
+
+config TARGET_J7200_R5_EVM
+ bool "TI K3 based J7200 EVM running on R5"
+ select CPU_V7R
+ select SYS_THUMB_BUILD
+ select K3_LOAD_SYSFW
+ select RAM
+ select SPL_RAM
+ select K3_DDRSS
+ select BINMAN
+ imply SYS_K3_SPL_ATF
+ imply TI_I2C_BOARD_DETECT
+
+endchoice
+
+source "board/beagle/beagleboneai64/Kconfig"
+source "board/ti/j721e/Kconfig"
+
+endif
diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c
index 18814c3..c2976c4 100644
--- a/arch/arm/mach-k3/j721e_init.c
+++ b/arch/arm/mach-k3/j721e_init.c
@@ -6,7 +6,6 @@
* Lokesh Vutla <lokeshvutla@ti.com>
*/
-#include <common.h>
#include <init.h>
#include <spl.h>
#include <asm/io.h>
@@ -287,14 +286,21 @@
if (ret)
panic("DRAM init failed: %d\n", ret);
#endif
- spl_enable_dcache();
+ spl_enable_cache();
}
u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
{
switch (boot_device) {
case BOOT_DEVICE_MMC1:
- return (spl_mmc_emmc_boot_partition(mmc) ? MMCSD_MODE_EMMCBOOT : MMCSD_MODE_FS);
+ if (IS_ENABLED(CONFIG_SUPPORT_EMMC_BOOT)) {
+ if (spl_mmc_emmc_boot_partition(mmc))
+ return MMCSD_MODE_EMMCBOOT;
+ return MMCSD_MODE_FS;
+ }
+ if (IS_ENABLED(CONFIG_SPL_FS_FAT) || IS_ENABLED(CONFIG_SPL_FS_EXT4))
+ return MMCSD_MODE_FS;
+ return MMCSD_MODE_EMMCBOOT;
case BOOT_DEVICE_MMC2:
return MMCSD_MODE_FS;
default:
diff --git a/arch/arm/mach-k3/j721s2/Kconfig b/arch/arm/mach-k3/j721s2/Kconfig
new file mode 100644
index 0000000..8b54c04
--- /dev/null
+++ b/arch/arm/mach-k3/j721s2/Kconfig
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+# Andrew Davis <afd@ti.com>
+
+if SOC_K3_J721S2
+
+choice
+ prompt "K3 J721S2 based boards"
+ optional
+
+config TARGET_J721S2_A72_EVM
+ bool "TI K3 based J721S2 EVM running on A72"
+ select ARM64
+ select BOARD_LATE_INIT
+ imply TI_I2C_BOARD_DETECT
+ select SYS_DISABLE_DCACHE_OPS
+ select BINMAN
+
+config TARGET_J721S2_R5_EVM
+ bool "TI K3 based J721S2 EVM running on R5"
+ select CPU_V7R
+ select SYS_THUMB_BUILD
+ select K3_LOAD_SYSFW
+ select RAM
+ select SPL_RAM
+ select K3_DDRSS
+ select BINMAN
+ imply SYS_K3_SPL_ATF
+ imply TI_I2C_BOARD_DETECT
+
+endchoice
+
+source "board/ti/j721s2/Kconfig"
+
+endif
diff --git a/arch/arm/mach-k3/j721s2_init.c b/arch/arm/mach-k3/j721s2_init.c
index 7170a80..fb0708b 100644
--- a/arch/arm/mach-k3/j721s2_init.c
+++ b/arch/arm/mach-k3/j721s2_init.c
@@ -6,7 +6,6 @@
* David Huang <d-huang@ti.com>
*/
-#include <common.h>
#include <init.h>
#include <spl.h>
#include <asm/io.h>
@@ -232,7 +231,7 @@
if (ret)
panic("DRAM 1 init failed: %d\n", ret);
}
- spl_enable_dcache();
+ spl_enable_cache();
}
/* Support for the various EVM / SK families */
diff --git a/board/ti/keys/custMpk.crt b/arch/arm/mach-k3/keys/custMpk.crt
similarity index 100%
rename from board/ti/keys/custMpk.crt
rename to arch/arm/mach-k3/keys/custMpk.crt
diff --git a/board/ti/keys/custMpk.key b/arch/arm/mach-k3/keys/custMpk.key
similarity index 100%
rename from board/ti/keys/custMpk.key
rename to arch/arm/mach-k3/keys/custMpk.key
diff --git a/board/ti/keys/custMpk.pem b/arch/arm/mach-k3/keys/custMpk.pem
similarity index 100%
rename from board/ti/keys/custMpk.pem
rename to arch/arm/mach-k3/keys/custMpk.pem
diff --git a/board/ti/keys/ti-degenerate-key.pem b/arch/arm/mach-k3/keys/ti-degenerate-key.pem
similarity index 100%
rename from board/ti/keys/ti-degenerate-key.pem
rename to arch/arm/mach-k3/keys/ti-degenerate-key.pem
diff --git a/arch/arm/mach-k3/r5/Kconfig b/arch/arm/mach-k3/r5/Kconfig
new file mode 100644
index 0000000..ae79f8f
--- /dev/null
+++ b/arch/arm/mach-k3/r5/Kconfig
@@ -0,0 +1,45 @@
+config K3_LOAD_SYSFW
+ bool
+
+config K3_SYSFW_IMAGE_NAME
+ string "File name of SYSFW firmware and configuration blob"
+ depends on K3_LOAD_SYSFW
+ default "sysfw.itb"
+ help
+ Filename of the combined System Firmware and configuration image tree
+ blob to be loaded when booting from a filesystem.
+
+config K3_SYSFW_IMAGE_MMCSD_RAW_MODE_SECT
+ hex "MMC sector to load SYSFW firmware and configuration blob from"
+ depends on K3_LOAD_SYSFW && SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
+ default 0x3600
+ help
+ Address on the MMC to load the combined System Firmware and
+ configuration image tree blob from, when the MMC is being used
+ in raw mode. Units: MMC sectors (1 sector = 512 bytes).
+
+config K3_SYSFW_IMAGE_MMCSD_RAW_MODE_PART
+ hex "MMC partition to load SYSFW firmware and configuration blob from"
+ depends on K3_LOAD_SYSFW && SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
+ default 2
+ help
+ Partition on the MMC to the combined System Firmware and configuration
+ image tree blob from, when the MMC is being used in raw mode.
+
+config K3_SYSFW_IMAGE_SIZE_MAX
+ int "Amount of memory dynamically allocated for loading SYSFW blob"
+ depends on K3_LOAD_SYSFW
+ default 280000
+ help
+ Amount of memory (in bytes) reserved through dynamic allocation at
+ runtime for loading the combined System Firmware and configuration image
+ tree blob. Keep it as tight as possible, as this directly affects the
+ overall SPL memory footprint.
+
+config K3_SYSFW_IMAGE_SPI_OFFS
+ hex "SPI offset of SYSFW firmware and configuration blob"
+ depends on K3_LOAD_SYSFW
+ default 0x6C0000
+ help
+ Offset of the combined System Firmware and configuration image tree
+ blob to be loaded when booting from a SPI flash memory.
diff --git a/arch/arm/mach-k3/r5/Makefile b/arch/arm/mach-k3/r5/Makefile
new file mode 100644
index 0000000..b99199d
--- /dev/null
+++ b/arch/arm/mach-k3/r5/Makefile
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+# Andrew Davis <afd@ti.com>
+
+obj-$(CONFIG_SOC_K3_J721E) += j721e/
+obj-$(CONFIG_SOC_K3_J721E) += j7200/
+obj-$(CONFIG_SOC_K3_J721S2) += j721s2/
+obj-$(CONFIG_SOC_K3_AM625) += am62x/
+obj-$(CONFIG_SOC_K3_AM62A7) += am62ax/
+
+obj-y += lowlevel_init.o
+obj-y += r5_mpu.o
+
+ifeq ($(CONFIG_SPL_BUILD),y)
+obj-$(CONFIG_K3_LOAD_SYSFW) += sysfw-loader.o
+endif
diff --git a/arch/arm/mach-k3/am62ax/Makefile b/arch/arm/mach-k3/r5/am62ax/Makefile
similarity index 100%
rename from arch/arm/mach-k3/am62ax/Makefile
rename to arch/arm/mach-k3/r5/am62ax/Makefile
diff --git a/arch/arm/mach-k3/am62ax/am62a_qos_data.c b/arch/arm/mach-k3/r5/am62ax/am62a_qos_data.c
similarity index 98%
rename from arch/arm/mach-k3/am62ax/am62a_qos_data.c
rename to arch/arm/mach-k3/r5/am62ax/am62a_qos_data.c
index 01b76f7..38db4f2 100644
--- a/arch/arm/mach-k3/am62ax/am62a_qos_data.c
+++ b/arch/arm/mach-k3/r5/am62ax/am62a_qos_data.c
@@ -5,7 +5,6 @@
*
* Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
*/
-#include <common.h>
#include <asm/arch/hardware.h>
#include "common.h"
diff --git a/arch/arm/mach-k3/am62ax/clk-data.c b/arch/arm/mach-k3/r5/am62ax/clk-data.c
similarity index 100%
rename from arch/arm/mach-k3/am62ax/clk-data.c
rename to arch/arm/mach-k3/r5/am62ax/clk-data.c
diff --git a/arch/arm/mach-k3/am62ax/dev-data.c b/arch/arm/mach-k3/r5/am62ax/dev-data.c
similarity index 98%
rename from arch/arm/mach-k3/am62ax/dev-data.c
rename to arch/arm/mach-k3/r5/am62ax/dev-data.c
index abf5d8e..6cced9e 100644
--- a/arch/arm/mach-k3/am62ax/dev-data.c
+++ b/arch/arm/mach-k3/r5/am62ax/dev-data.c
@@ -52,6 +52,7 @@
PSC_DEV(161, &soc_lpsc_list[5]),
PSC_DEV(162, &soc_lpsc_list[6]),
PSC_DEV(75, &soc_lpsc_list[7]),
+ PSC_DEV(36, &soc_lpsc_list[8]),
PSC_DEV(102, &soc_lpsc_list[8]),
PSC_DEV(146, &soc_lpsc_list[8]),
PSC_DEV(166, &soc_lpsc_list[9]),
diff --git a/arch/arm/mach-k3/am62x/Makefile b/arch/arm/mach-k3/r5/am62x/Makefile
similarity index 100%
rename from arch/arm/mach-k3/am62x/Makefile
rename to arch/arm/mach-k3/r5/am62x/Makefile
diff --git a/arch/arm/mach-k3/am62x/clk-data.c b/arch/arm/mach-k3/r5/am62x/clk-data.c
similarity index 100%
rename from arch/arm/mach-k3/am62x/clk-data.c
rename to arch/arm/mach-k3/r5/am62x/clk-data.c
diff --git a/arch/arm/mach-k3/am62x/dev-data.c b/arch/arm/mach-k3/r5/am62x/dev-data.c
similarity index 100%
rename from arch/arm/mach-k3/am62x/dev-data.c
rename to arch/arm/mach-k3/r5/am62x/dev-data.c
diff --git a/arch/arm/mach-k3/j7200/Makefile b/arch/arm/mach-k3/r5/j7200/Makefile
similarity index 100%
rename from arch/arm/mach-k3/j7200/Makefile
rename to arch/arm/mach-k3/r5/j7200/Makefile
diff --git a/arch/arm/mach-k3/j7200/clk-data.c b/arch/arm/mach-k3/r5/j7200/clk-data.c
similarity index 100%
rename from arch/arm/mach-k3/j7200/clk-data.c
rename to arch/arm/mach-k3/r5/j7200/clk-data.c
diff --git a/arch/arm/mach-k3/j7200/dev-data.c b/arch/arm/mach-k3/r5/j7200/dev-data.c
similarity index 100%
rename from arch/arm/mach-k3/j7200/dev-data.c
rename to arch/arm/mach-k3/r5/j7200/dev-data.c
diff --git a/arch/arm/mach-k3/j721e/Makefile b/arch/arm/mach-k3/r5/j721e/Makefile
similarity index 100%
rename from arch/arm/mach-k3/j721e/Makefile
rename to arch/arm/mach-k3/r5/j721e/Makefile
diff --git a/arch/arm/mach-k3/j721e/clk-data.c b/arch/arm/mach-k3/r5/j721e/clk-data.c
similarity index 100%
rename from arch/arm/mach-k3/j721e/clk-data.c
rename to arch/arm/mach-k3/r5/j721e/clk-data.c
diff --git a/arch/arm/mach-k3/j721e/dev-data.c b/arch/arm/mach-k3/r5/j721e/dev-data.c
similarity index 100%
rename from arch/arm/mach-k3/j721e/dev-data.c
rename to arch/arm/mach-k3/r5/j721e/dev-data.c
diff --git a/arch/arm/mach-k3/j721s2/Makefile b/arch/arm/mach-k3/r5/j721s2/Makefile
similarity index 100%
rename from arch/arm/mach-k3/j721s2/Makefile
rename to arch/arm/mach-k3/r5/j721s2/Makefile
diff --git a/arch/arm/mach-k3/j721s2/clk-data.c b/arch/arm/mach-k3/r5/j721s2/clk-data.c
similarity index 100%
rename from arch/arm/mach-k3/j721s2/clk-data.c
rename to arch/arm/mach-k3/r5/j721s2/clk-data.c
diff --git a/arch/arm/mach-k3/j721s2/dev-data.c b/arch/arm/mach-k3/r5/j721s2/dev-data.c
similarity index 100%
rename from arch/arm/mach-k3/j721s2/dev-data.c
rename to arch/arm/mach-k3/r5/j721s2/dev-data.c
diff --git a/arch/arm/mach-k3/lowlevel_init.S b/arch/arm/mach-k3/r5/lowlevel_init.S
similarity index 100%
rename from arch/arm/mach-k3/lowlevel_init.S
rename to arch/arm/mach-k3/r5/lowlevel_init.S
diff --git a/arch/arm/mach-k3/r5_mpu.c b/arch/arm/mach-k3/r5/r5_mpu.c
similarity index 96%
rename from arch/arm/mach-k3/r5_mpu.c
rename to arch/arm/mach-k3/r5/r5_mpu.c
index 605f793..3dbbcae 100644
--- a/arch/arm/mach-k3/r5_mpu.c
+++ b/arch/arm/mach-k3/r5/r5_mpu.c
@@ -6,10 +6,10 @@
* Lokesh Vutla <lokeshvutla@ti.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <linux/kernel.h>
-#include "common.h"
+#include <asm/armv7_mpu.h>
struct mpu_region_config k3_mpu_regions[16] = {
/*
diff --git a/arch/arm/mach-k3/sysfw-loader.c b/arch/arm/mach-k3/r5/sysfw-loader.c
similarity index 99%
rename from arch/arm/mach-k3/sysfw-loader.c
rename to arch/arm/mach-k3/r5/sysfw-loader.c
index 73a1727..94d051b 100644
--- a/arch/arm/mach-k3/sysfw-loader.c
+++ b/arch/arm/mach-k3/r5/sysfw-loader.c
@@ -6,7 +6,6 @@
* Andreas Dannenberg <dannenberg@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <image.h>
#include <log.h>
@@ -23,7 +22,7 @@
#include <spi_flash.h>
#include <asm/io.h>
-#include "common.h"
+#include "../common.h"
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mach-k3/security.c b/arch/arm/mach-k3/security.c
index ebc9704..22697a2 100644
--- a/arch/arm/mach-k3/security.c
+++ b/arch/arm/mach-k3/security.c
@@ -7,7 +7,6 @@
*/
#include <asm/io.h>
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <hang.h>
diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c
index 0c59515..4f19379 100644
--- a/arch/arm/mach-keystone/clock.c
+++ b/arch/arm/mach-keystone/clock.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <asm/arch/clock.h>
#include <asm/arch/clock_defs.h>
#include <linux/bitops.h>
diff --git a/arch/arm/mach-keystone/cmd_clock.c b/arch/arm/mach-keystone/cmd_clock.c
index 72dc394..e9ecc05 100644
--- a/arch/arm/mach-keystone/cmd_clock.c
+++ b/arch/arm/mach-keystone/cmd_clock.c
@@ -6,7 +6,7 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
+#include <vsprintf.h>
#include <command.h>
#include <asm/arch/hardware.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-keystone/cmd_mon.c b/arch/arm/mach-keystone/cmd_mon.c
index dc97bac..c6e7e2c 100644
--- a/arch/arm/mach-keystone/cmd_mon.c
+++ b/arch/arm/mach-keystone/cmd_mon.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <command.h>
#include <image.h>
#include <mach/mon.h>
diff --git a/arch/arm/mach-keystone/cmd_poweroff.c b/arch/arm/mach-keystone/cmd_poweroff.c
index f0ad917..0ad31ef 100644
--- a/arch/arm/mach-keystone/cmd_poweroff.c
+++ b/arch/arm/mach-keystone/cmd_poweroff.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <command.h>
#include <asm/arch/mon.h>
#include <asm/arch/psc_defs.h>
diff --git a/arch/arm/mach-keystone/ddr3.c b/arch/arm/mach-keystone/ddr3.c
index ea7d0b9..ca0fb70 100644
--- a/arch/arm/mach-keystone/ddr3.c
+++ b/arch/arm/mach-keystone/ddr3.c
@@ -9,7 +9,7 @@
#include <cpu_func.h>
#include <env.h>
#include <asm/io.h>
-#include <common.h>
+#include <vsprintf.h>
#include <asm/arch/msmc.h>
#include <asm/arch/ddr3.h>
#include <asm/arch/psc_defs.h>
diff --git a/arch/arm/mach-keystone/ddr3_spd.c b/arch/arm/mach-keystone/ddr3_spd.c
index 6f7f8ab..d4ff442 100644
--- a/arch/arm/mach-keystone/ddr3_spd.c
+++ b/arch/arm/mach-keystone/ddr3_spd.c
@@ -5,8 +5,8 @@
* (C) Copyright 2015-2016 Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <log.h>
+#include <string.h>
#include <i2c.h>
#include <ddr_spd.h>
diff --git a/arch/arm/mach-keystone/include/mach/mux-k2g.h b/arch/arm/mach-keystone/include/mach/mux-k2g.h
index 67d47f8..dfb5ad4 100644
--- a/arch/arm/mach-keystone/include/mach/mux-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/mux-k2g.h
@@ -9,7 +9,6 @@
#ifndef __ASM_ARCH_MUX_K2G_H
#define __ASM_ARCH_MUX_K2G_H
-#include <common.h>
#include <asm/io.h>
#define K2G_PADCFG_REG (KS2_DEVICE_STATE_CTRL_BASE + 0x1000)
diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c
index 1954e69..39afaaa 100644
--- a/arch/arm/mach-keystone/init.c
+++ b/arch/arm/mach-keystone/init.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <ns16550.h>
diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c
index efaabca..8846df3 100644
--- a/arch/arm/mach-keystone/keystone.c
+++ b/arch/arm/mach-keystone/keystone.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-keystone/mon.c b/arch/arm/mach-keystone/mon.c
index e91b0d6..b945e19 100644
--- a/arch/arm/mach-keystone/mon.c
+++ b/arch/arm/mach-keystone/mon.c
@@ -8,7 +8,6 @@
#include <hang.h>
#include <image.h>
#include <asm/unaligned.h>
-#include <common.h>
#include <command.h>
#include <mach/mon.h>
#include <spl.h>
diff --git a/arch/arm/mach-keystone/msmc.c b/arch/arm/mach-keystone/msmc.c
index f5cadfb..a20e0c9 100644
--- a/arch/arm/mach-keystone/msmc.c
+++ b/arch/arm/mach-keystone/msmc.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <asm/arch/msmc.h>
struct mpax {
diff --git a/arch/arm/mach-keystone/psc.c b/arch/arm/mach-keystone/psc.c
index 145aff8..84d64f3 100644
--- a/arch/arm/mach-keystone/psc.c
+++ b/arch/arm/mach-keystone/psc.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c
index 2421acd..95a29da 100644
--- a/arch/arm/mach-meson/board-info.c
+++ b/arch/arm/mach-meson/board-info.c
@@ -168,7 +168,7 @@
return socinfo;
}
-int show_board_info(void)
+int checkboard(void)
{
unsigned int socinfo;
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 6deffb8..8e0de93 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -589,15 +589,6 @@
return 0;
}
-#ifdef CONFIG_SCSI_AHCI_PLAT
-void scsi_init(void)
-{
- printf("MVEBU SATA INIT\n");
- board_ahci_enable();
- ahci_init((void __iomem *)MVEBU_SATA0_BASE);
-}
-#endif
-
#ifdef CONFIG_USB_XHCI_MVEBU
#define USB3_MAX_WINDOWS 4
#define USB3_WIN_CTRL(w) (0x0 + ((w) * 8))
diff --git a/arch/arm/mach-mvebu/include/mach/efuse.h b/arch/arm/mach-mvebu/include/mach/efuse.h
index b125c30..fd8ebce 100644
--- a/arch/arm/mach-mvebu/include/mach/efuse.h
+++ b/arch/arm/mach-mvebu/include/mach/efuse.h
@@ -6,8 +6,6 @@
#ifndef _MVEBU_EFUSE_H
#define _MVEBU_EFUSE_H
-#include <common.h>
-
struct efuse_val {
union {
struct {
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index bb01eab..8c10c69 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -27,13 +27,6 @@
obj-y += abb.o
endif
-ifneq ($(CONFIG_OMAP54XX),)
-ifeq ($(CONFIG_DM_SCSI),)
-obj-y += pipe3-phy.o
-obj-$(CONFIG_SCSI_AHCI_PLAT) += sata.o
-endif
-endif
-
ifeq ($(CONFIG_$(SPL_TPL_)SYS_DCACHE_OFF),)
obj-y += omap-cache.o
endif
diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig
index 8cb0c57..bd5129b 100644
--- a/arch/arm/mach-omap2/am33xx/Kconfig
+++ b/arch/arm/mach-omap2/am33xx/Kconfig
@@ -105,15 +105,6 @@
select DM_SERIAL
imply CMD_DM
-config TARGET_DRACO
- bool "Support draco"
- select BOARD_LATE_INIT
- select DM
- select DM_GPIO
- select DM_SERIAL
- select FACTORYSET
- imply CMD_DM
-
config TARGET_ETAMIN
bool "Support etamin"
select BOARD_LATE_INIT
diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c
index a68b21a..57917da 100644
--- a/arch/arm/mach-omap2/boot-common.c
+++ b/arch/arm/mach-omap2/boot-common.c
@@ -309,13 +309,6 @@
}
#endif
-#ifdef CONFIG_SCSI_AHCI_PLAT
-void arch_preboot_os(void)
-{
- ahci_reset((void __iomem *)DWC_AHSATA_BASE);
-}
-#endif
-
#ifdef CONFIG_TI_SECURE_DEVICE
void board_fit_image_post_process(const void *fit, int node, void **p_image,
size_t *p_size)
diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig
index 3e3e7bd..bd524f8 100644
--- a/arch/arm/mach-omap2/omap3/Kconfig
+++ b/arch/arm/mach-omap2/omap3/Kconfig
@@ -152,7 +152,7 @@
default "omap3"
source "board/logicpd/am3517evm/Kconfig"
-source "board/ti/beagle/Kconfig"
+source "board/beagle/beagle/Kconfig"
source "board/timll/devkit8000/Kconfig"
source "board/ti/omap3evm/Kconfig"
source "board/isee/igep00x0/Kconfig"
diff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c
index e6bee48..b391322 100644
--- a/arch/arm/mach-omap2/omap5/hw_data.c
+++ b/arch/arm/mach-omap2/omap5/hw_data.c
@@ -485,9 +485,6 @@
(*prcm)->cm_l4per_gpio6_clkctrl,
(*prcm)->cm_l4per_gpio7_clkctrl,
(*prcm)->cm_l4per_gpio8_clkctrl,
-#ifdef CONFIG_SCSI_AHCI_PLAT
- (*prcm)->cm_l3init_ocp2scp3_clkctrl,
-#endif
0
};
@@ -507,9 +504,6 @@
#ifdef CONFIG_TI_QSPI
(*prcm)->cm_l4per_qspi_clkctrl,
#endif
-#ifdef CONFIG_SCSI_AHCI_PLAT
- (*prcm)->cm_l3init_sata_clkctrl,
-#endif
0
};
@@ -542,12 +536,6 @@
setbits_le32((*prcm)->cm_l4per_qspi_clkctrl, (1<<24));
#endif
-#ifdef CONFIG_SCSI_AHCI_PLAT
- /* Enable optional functional clock for SATA */
- setbits_le32((*prcm)->cm_l3init_sata_clkctrl,
- SATA_CLKCTRL_OPTFCLKEN_MASK);
-#endif
-
/* Enable SCRM OPT clocks for PER and CORE dpll */
setbits_le32((*prcm)->cm_wkupaon_scrm_clkctrl,
OPTFCLKEN_SCRM_PER_MASK);
diff --git a/arch/arm/mach-omap2/pipe3-phy.c b/arch/arm/mach-omap2/pipe3-phy.c
deleted file mode 100644
index 3dfb184..0000000
--- a/arch/arm/mach-omap2/pipe3-phy.c
+++ /dev/null
@@ -1,231 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * TI PIPE3 PHY
- *
- * (C) Copyright 2013
- * Texas Instruments, <www.ti.com>
- */
-
-#include <common.h>
-#include <sata.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/io.h>
-#include <linux/bitops.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include "pipe3-phy.h"
-
-/* PLLCTRL Registers */
-#define PLL_STATUS 0x00000004
-#define PLL_GO 0x00000008
-#define PLL_CONFIGURATION1 0x0000000C
-#define PLL_CONFIGURATION2 0x00000010
-#define PLL_CONFIGURATION3 0x00000014
-#define PLL_CONFIGURATION4 0x00000020
-
-#define PLL_REGM_MASK 0x001FFE00
-#define PLL_REGM_SHIFT 9
-#define PLL_REGM_F_MASK 0x0003FFFF
-#define PLL_REGM_F_SHIFT 0
-#define PLL_REGN_MASK 0x000001FE
-#define PLL_REGN_SHIFT 1
-#define PLL_SELFREQDCO_MASK 0x0000000E
-#define PLL_SELFREQDCO_SHIFT 1
-#define PLL_SD_MASK 0x0003FC00
-#define PLL_SD_SHIFT 10
-#define SET_PLL_GO 0x1
-#define PLL_TICOPWDN BIT(16)
-#define PLL_LDOPWDN BIT(15)
-#define PLL_LOCK 0x2
-#define PLL_IDLE 0x1
-
-/* PHY POWER CONTROL Register */
-#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK 0x003FC000
-#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT 0xE
-
-#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK 0xFFC00000
-#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT 0x16
-
-#define OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON 0x3
-#define OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF 0x0
-
-
-#define PLL_IDLE_TIME 100 /* in milliseconds */
-#define PLL_LOCK_TIME 100 /* in milliseconds */
-
-static inline u32 omap_pipe3_readl(void __iomem *addr, unsigned offset)
-{
- return __raw_readl(addr + offset);
-}
-
-static inline void omap_pipe3_writel(void __iomem *addr, unsigned offset,
- u32 data)
-{
- __raw_writel(data, addr + offset);
-}
-
-static struct pipe3_dpll_params *omap_pipe3_get_dpll_params(struct omap_pipe3
- *pipe3)
-{
- u32 rate;
- struct pipe3_dpll_map *dpll_map = pipe3->dpll_map;
-
- rate = get_sys_clk_freq();
-
- for (; dpll_map->rate; dpll_map++) {
- if (rate == dpll_map->rate)
- return &dpll_map->params;
- }
-
- printf("%s: No DPLL configuration for %u Hz SYS CLK\n",
- __func__, rate);
- return NULL;
-}
-
-
-static int omap_pipe3_wait_lock(struct omap_pipe3 *phy)
-{
- u32 val;
- int timeout = PLL_LOCK_TIME;
-
- do {
- mdelay(1);
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
- if (val & PLL_LOCK)
- break;
- } while (--timeout);
-
- if (!(val & PLL_LOCK)) {
- printf("%s: DPLL failed to lock\n", __func__);
- return -EBUSY;
- }
-
- return 0;
-}
-
-static int omap_pipe3_dpll_program(struct omap_pipe3 *phy)
-{
- u32 val;
- struct pipe3_dpll_params *dpll_params;
-
- dpll_params = omap_pipe3_get_dpll_params(phy);
- if (!dpll_params) {
- printf("%s: Invalid DPLL parameters\n", __func__);
- return -EINVAL;
- }
-
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);
- val &= ~PLL_REGN_MASK;
- val |= dpll_params->n << PLL_REGN_SHIFT;
- omap_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);
-
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
- val &= ~PLL_SELFREQDCO_MASK;
- val |= dpll_params->freq << PLL_SELFREQDCO_SHIFT;
- omap_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
-
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);
- val &= ~PLL_REGM_MASK;
- val |= dpll_params->m << PLL_REGM_SHIFT;
- omap_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);
-
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION4);
- val &= ~PLL_REGM_F_MASK;
- val |= dpll_params->mf << PLL_REGM_F_SHIFT;
- omap_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION4, val);
-
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION3);
- val &= ~PLL_SD_MASK;
- val |= dpll_params->sd << PLL_SD_SHIFT;
- omap_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION3, val);
-
- omap_pipe3_writel(phy->pll_ctrl_base, PLL_GO, SET_PLL_GO);
-
- return omap_pipe3_wait_lock(phy);
-}
-
-static void omap_control_phy_power(struct omap_pipe3 *phy, int on)
-{
- u32 val, rate;
-
- val = readl(phy->power_reg);
-
- rate = get_sys_clk_freq();
- rate = rate/1000000;
-
- if (on) {
- val &= ~(OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK |
- OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK);
- val |= OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON <<
- OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
- val |= rate <<
- OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT;
- } else {
- val &= ~OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK;
- val |= OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF <<
- OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
- }
-
- writel(val, phy->power_reg);
-}
-
-int phy_pipe3_power_on(struct omap_pipe3 *phy)
-{
- int ret;
- u32 val;
-
- /* Program the DPLL only if not locked */
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
- if (!(val & PLL_LOCK)) {
- ret = omap_pipe3_dpll_program(phy);
- if (ret)
- return ret;
- } else {
- /* else just bring it out of IDLE mode */
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
- if (val & PLL_IDLE) {
- val &= ~PLL_IDLE;
- omap_pipe3_writel(phy->pll_ctrl_base,
- PLL_CONFIGURATION2, val);
- ret = omap_pipe3_wait_lock(phy);
- if (ret)
- return ret;
- }
- }
-
- /* Power up the PHY */
- omap_control_phy_power(phy, 1);
-
- return 0;
-}
-
-int phy_pipe3_power_off(struct omap_pipe3 *phy)
-{
- u32 val;
- int timeout = PLL_IDLE_TIME;
-
- /* Power down the PHY */
- omap_control_phy_power(phy, 0);
-
- /* Put DPLL in IDLE mode */
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
- val |= PLL_IDLE;
- omap_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
-
- /* wait for LDO and Oscillator to power down */
- do {
- mdelay(1);
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
- if ((val & PLL_TICOPWDN) && (val & PLL_LDOPWDN))
- break;
- } while (--timeout);
-
- if (!(val & PLL_TICOPWDN) || !(val & PLL_LDOPWDN)) {
- printf("%s: Failed to power down DPLL: PLL_STATUS 0x%x\n",
- __func__, val);
- return -EBUSY;
- }
-
- return 0;
-}
diff --git a/arch/arm/mach-omap2/pipe3-phy.h b/arch/arm/mach-omap2/pipe3-phy.h
deleted file mode 100644
index 182bdcd..0000000
--- a/arch/arm/mach-omap2/pipe3-phy.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * TI PIPE3 PHY
- *
- * (C) Copyright 2013
- * Texas Instruments, <www.ti.com>
- */
-
-#ifndef __OMAP_PIPE3_PHY_H
-#define __OMAP_PIPE3_PHY_H
-
-struct pipe3_dpll_params {
- u16 m;
- u8 n;
- u8 freq:3;
- u8 sd;
- u32 mf;
-};
-
-struct pipe3_dpll_map {
- unsigned long rate;
- struct pipe3_dpll_params params;
-};
-
-struct omap_pipe3 {
- void __iomem *pll_ctrl_base;
- void __iomem *power_reg;
- struct pipe3_dpll_map *dpll_map;
-};
-
-
-int phy_pipe3_power_on(struct omap_pipe3 *phy);
-int phy_pipe3_power_off(struct omap_pipe3 *pipe3);
-
-#endif /* __OMAP_PIPE3_PHY_H */
diff --git a/arch/arm/mach-omap2/sata.c b/arch/arm/mach-omap2/sata.c
deleted file mode 100644
index 53c39ce..0000000
--- a/arch/arm/mach-omap2/sata.c
+++ /dev/null
@@ -1,72 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * TI SATA platform driver
- *
- * (C) Copyright 2013
- * Texas Instruments, <www.ti.com>
- */
-
-#include <common.h>
-#include <ahci.h>
-#include <scsi.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/sata.h>
-#include <sata.h>
-#include <asm/io.h>
-#include <asm/omap_common.h>
-#include "pipe3-phy.h"
-
-static struct pipe3_dpll_map dpll_map_sata[] = {
- {12000000, {1000, 7, 4, 6, 0} }, /* 12 MHz */
- {16800000, {714, 7, 4, 6, 0} }, /* 16.8 MHz */
- {19200000, {625, 7, 4, 6, 0} }, /* 19.2 MHz */
- {20000000, {600, 7, 4, 6, 0} }, /* 20 MHz */
- {26000000, {461, 7, 4, 6, 0} }, /* 26 MHz */
- {38400000, {312, 7, 4, 6, 0} }, /* 38.4 MHz */
- { }, /* Terminator */
-};
-
-struct omap_pipe3 sata_phy = {
- .pll_ctrl_base = (void __iomem *)TI_SATA_PLLCTRL_BASE,
- /* .power_reg is updated at runtime */
- .dpll_map = dpll_map_sata,
-};
-
-int init_sata(int dev)
-{
- int ret;
- u32 val;
-
- sata_phy.power_reg = (void __iomem *)(*ctrl)->control_phy_power_sata;
-
- /* Power up the PHY */
- phy_pipe3_power_on(&sata_phy);
-
- /* Enable SATA module, No Idle, No Standby */
- val = TI_SATA_IDLE_NO | TI_SATA_STANDBY_NO;
- writel(val, TI_SATA_WRAPPER_BASE + TI_SATA_SYSCONFIG);
-
- ret = ahci_init((void __iomem *)DWC_AHSATA_BASE);
-
- return ret;
-}
-
-int reset_sata(int dev)
-{
- return 0;
-}
-
-/* On OMAP platforms SATA provides the SCSI subsystem */
-void scsi_init(void)
-{
- init_sata(0);
- scsi_scan(1);
-}
-
-int scsi_bus_reset(struct udevice *dev)
-{
- ahci_reset((void __iomem *)DWC_AHSATA_BASE);
- ahci_init((void __iomem *)DWC_AHSATA_BASE);
-
- return 0;
-}
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index db47bab..5fc92d0 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -76,6 +76,30 @@
STM32MP157, STM32MP153 or STM32MP151
STMicroelectronics MPU with core ARMv7
dual core A7 for STM32MP157/3, monocore for STM32MP151
+
+config STM32MP25X
+ bool "Support STMicroelectronics STM32MP25x Soc"
+ select ARM64
+ select CLK_STM32MP25
+ select OF_BOARD
+ select PINCTRL_STM32
+ select STM32_RCC
+ select STM32_RESET
+ select STM32_SERIAL
+ select SYS_ARCH_TIMER
+ select TFABOOT
+ imply CLK_SCMI
+ imply CMD_NVEDIT_INFO
+ imply DM_REGULATOR
+ imply DM_REGULATOR_SCMI
+ imply OPTEE
+ imply RESET_SCMI
+ imply SYSRESET_PSCI
+ imply TEE
+ imply VERSION_VARIABLE
+ help
+ Support of STMicroelectronics SOC STM32MP25x family
+ STMicroelectronics MPU with 2 * A53 core and 1 M33 core
endchoice
config NR_DRAM_BANKS
@@ -128,6 +152,6 @@
source "arch/arm/mach-stm32mp/Kconfig.13x"
source "arch/arm/mach-stm32mp/Kconfig.15x"
-
+source "arch/arm/mach-stm32mp/Kconfig.25x"
source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig"
endif
diff --git a/arch/arm/mach-stm32mp/Kconfig.25x b/arch/arm/mach-stm32mp/Kconfig.25x
new file mode 100644
index 0000000..2c0f691
--- /dev/null
+++ b/arch/arm/mach-stm32mp/Kconfig.25x
@@ -0,0 +1,43 @@
+if STM32MP25X
+
+choice
+ prompt "STM32MP25x board select"
+ optional
+
+config TARGET_ST_STM32MP25X
+ bool "STMicroelectronics STM32MP25x boards"
+ imply BOOTSTAGE
+ imply CMD_BOOTSTAGE
+ help
+ target the STMicroelectronics board with SOC STM32MP25x
+ managed by board/st/stm32mp2
+ The difference between board are managed with devicetree
+
+endchoice
+
+config TEXT_BASE
+ default 0x84000000
+
+config PRE_CON_BUF_ADDR
+ default 0x84800000
+
+config PRE_CON_BUF_SZ
+ default 4096
+
+config BOOTSTAGE_STASH_ADDR
+ default 0x87000000
+
+if DEBUG_UART
+
+config DEBUG_UART_BOARD_INIT
+ default y
+
+# debug on USART2 by default
+config DEBUG_UART_BASE
+ default 0x400e0000
+
+endif
+
+source "board/st/stm32mp2/Kconfig"
+
+endif
diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile
index a19b279..00dc25b 100644
--- a/arch/arm/mach-stm32mp/Makefile
+++ b/arch/arm/mach-stm32mp/Makefile
@@ -3,24 +3,17 @@
# Copyright (C) 2018, STMicroelectronics - All Rights Reserved
#
-obj-y += cpu.o
obj-y += dram_init.o
obj-y += syscon.o
obj-y += bsec.o
-obj-$(CONFIG_STM32MP13x) += stm32mp13x.o
-obj-$(CONFIG_STM32MP15x) += stm32mp15x.o
+obj-$(CONFIG_STM32MP15x) += stm32mp1/
+obj-$(CONFIG_STM32MP13x) += stm32mp1/
+obj-$(CONFIG_STM32MP25X) += stm32mp2/
obj-$(CONFIG_STM32_ECDSA_VERIFY) += ecdsa_romapi.o
-ifdef CONFIG_SPL_BUILD
-obj-y += spl.o
-obj-y += tzc400.o
-else
+ifndef CONFIG_SPL_BUILD
obj-y += cmd_stm32prog/
obj-$(CONFIG_CMD_STM32KEY) += cmd_stm32key.o
-obj-$(CONFIG_ARMV7_PSCI) += psci.o
obj-$(CONFIG_TFABOOT) += boot_params.o
endif
-
-obj-$(CONFIG_$(SPL_)STM32MP15_PWR) += pwr_regulator.o
-obj-$(CONFIG_OF_SYSTEM_SETUP) += fdt.o
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
index 599e63a..28a8280 100644
--- a/arch/arm/mach-stm32mp/bsec.c
+++ b/arch/arm/mach-stm32mp/bsec.c
@@ -110,7 +110,7 @@
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: true if locked else false
*/
-static bool bsec_read_lock(u32 address, u32 otp)
+static bool bsec_read_lock(void __iomem *address, u32 otp)
{
u32 bit;
u32 bank;
@@ -118,7 +118,7 @@
bit = 1 << (otp & OTP_LOCK_MASK);
bank = ((otp >> OTP_LOCK_BANK_SHIFT) & OTP_LOCK_MASK) * sizeof(u32);
- return !!(readl(address + bank) & bit);
+ return !!(readl((address + bank)) & bit);
}
/**
@@ -127,7 +127,7 @@
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: 0 if no error, -EAGAIN or -ENOTSUPP
*/
-static u32 bsec_check_error(u32 base, u32 otp)
+static u32 bsec_check_error(void __iomem *base, u32 otp)
{
u32 bit;
u32 bank;
@@ -149,7 +149,7 @@
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: true if locked else false
*/
-static bool bsec_read_SR_lock(u32 base, u32 otp)
+static bool bsec_read_SR_lock(void __iomem *base, u32 otp)
{
return bsec_read_lock(base + BSEC_SRLOCK_OFF, otp);
}
@@ -160,7 +160,7 @@
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: true if locked else false
*/
-static bool bsec_read_SP_lock(u32 base, u32 otp)
+static bool bsec_read_SP_lock(void __iomem *base, u32 otp)
{
return bsec_read_lock(base + BSEC_SPLOCK_OFF, otp);
}
@@ -171,7 +171,7 @@
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: true if locked else false
*/
-static bool bsec_read_SW_lock(u32 base, u32 otp)
+static bool bsec_read_SW_lock(void __iomem *base, u32 otp)
{
return bsec_read_lock(base + BSEC_SWLOCK_OFF, otp);
}
@@ -182,7 +182,7 @@
* @power: true to power up , false to power down
* Return: 0 if succeed
*/
-static int bsec_power_safmem(u32 base, bool power)
+static int bsec_power_safmem(void __iomem *base, bool power)
{
u32 val;
u32 mask;
@@ -208,7 +208,7 @@
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: 0 if no error
*/
-static int bsec_shadow_register(struct udevice *dev, u32 base, u32 otp)
+static int bsec_shadow_register(struct udevice *dev, void __iomem *base, u32 otp)
{
u32 val;
int ret;
@@ -253,7 +253,8 @@
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: 0 if no error
*/
-static int bsec_read_shadow(struct udevice *dev, u32 base, u32 *val, u32 otp)
+static int bsec_read_shadow(struct udevice *dev, void __iomem *base, u32 *val,
+ u32 otp)
{
*val = readl(base + BSEC_OTP_DATA_OFF + otp * sizeof(u32));
@@ -268,7 +269,7 @@
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: 0 if no error
*/
-static int bsec_write_shadow(struct udevice *dev, u32 base, u32 val, u32 otp)
+static int bsec_write_shadow(struct udevice *dev, void __iomem *base, u32 val, u32 otp)
{
/* check if programming of otp is locked */
if (bsec_read_SW_lock(base, otp))
@@ -288,7 +289,7 @@
* after the function the otp data is not refreshed in shadow
* Return: 0 if no error
*/
-static int bsec_program_otp(struct udevice *dev, long base, u32 val, u32 otp)
+static int bsec_program_otp(struct udevice *dev, void __iomem *base, u32 val, u32 otp)
{
u32 ret;
bool power_up = false;
@@ -338,7 +339,7 @@
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: 0 if no error
*/
-static int bsec_permanent_lock_otp(struct udevice *dev, long base, uint32_t otp)
+static int bsec_permanent_lock_otp(struct udevice *dev, void __iomem *base, uint32_t otp)
{
int ret;
bool power_up = false;
@@ -392,7 +393,7 @@
/* BSEC MISC driver *******************************************************/
struct stm32mp_bsec_plat {
- u32 base;
+ void __iomem *base;
};
struct stm32mp_bsec_priv {
@@ -724,7 +725,7 @@
{
struct stm32mp_bsec_plat *plat = dev_get_plat(dev);
- plat->base = (u32)dev_read_addr_ptr(dev);
+ plat->base = dev_read_addr_ptr(dev);
return 0;
}
diff --git a/arch/arm/mach-stm32mp/dram_init.c b/arch/arm/mach-stm32mp/dram_init.c
index 7f37b0d..fb1208f 100644
--- a/arch/arm/mach-stm32mp/dram_init.c
+++ b/arch/arm/mach-stm32mp/dram_init.c
@@ -24,8 +24,11 @@
int ret;
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
- if (ret) {
- log_debug("RAM init failed: %d\n", ret);
+ /* in case there is no RAM driver, retrieve DDR size from DT */
+ if (ret == -ENODEV) {
+ return fdtdec_setup_mem_size_base();
+ } else if (ret) {
+ log_err("RAM init failed: %d\n", ret);
return ret;
}
ret = ram_get_info(dev, &ram);
@@ -33,7 +36,7 @@
log_debug("Cannot get RAM size: %d\n", ret);
return ret;
}
- log_debug("RAM init base=%lx, size=%x\n", ram.base, ram.size);
+ log_debug("RAM init base=%p, size=%zx\n", (void *)ram.base, ram.size);
gd->ram_size = ram.size;
@@ -49,9 +52,15 @@
if (!total_size)
return gd->ram_top;
+ /*
+ * make sure U-Boot uses address space below 4GB boundaries even
+ * if the effective available memory is bigger
+ */
+ gd->ram_top = clamp_val(gd->ram_top, 0, SZ_4G - 1);
+
/* found enough not-reserved memory to relocated U-Boot */
lmb_init(&lmb);
- lmb_add(&lmb, gd->ram_base, get_effective_memsize());
+ lmb_add(&lmb, gd->ram_base, gd->ram_top - gd->ram_base);
boot_fdt_add_mem_rsv_regions(&lmb, (void *)gd->fdt_blob);
/* add 8M for reserved memory for display, fdt, gd,... */
size = ALIGN(SZ_8M + CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE),
diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h
index ac0dece..46d4698 100644
--- a/arch/arm/mach-stm32mp/include/mach/stm32.h
+++ b/arch/arm/mach-stm32mp/include/mach/stm32.h
@@ -6,14 +6,72 @@
#ifndef _MACH_STM32_H_
#define _MACH_STM32_H_
+#include <linux/sizes.h>
#ifndef __ASSEMBLY__
#include <linux/bitops.h>
+
+enum boot_device {
+ BOOT_FLASH_SD = 0x10,
+ BOOT_FLASH_SD_1 = 0x11,
+ BOOT_FLASH_SD_2 = 0x12,
+ BOOT_FLASH_SD_3 = 0x13,
+
+ BOOT_FLASH_EMMC = 0x20,
+ BOOT_FLASH_EMMC_1 = 0x21,
+ BOOT_FLASH_EMMC_2 = 0x22,
+ BOOT_FLASH_EMMC_3 = 0x23,
+
+ BOOT_FLASH_NAND = 0x30,
+ BOOT_FLASH_NAND_FMC = 0x31,
+
+ BOOT_FLASH_NOR = 0x40,
+ BOOT_FLASH_NOR_QSPI = 0x41,
+
+ BOOT_SERIAL_UART = 0x50,
+ BOOT_SERIAL_UART_1 = 0x51,
+ BOOT_SERIAL_UART_2 = 0x52,
+ BOOT_SERIAL_UART_3 = 0x53,
+ BOOT_SERIAL_UART_4 = 0x54,
+ BOOT_SERIAL_UART_5 = 0x55,
+ BOOT_SERIAL_UART_6 = 0x56,
+ BOOT_SERIAL_UART_7 = 0x57,
+ BOOT_SERIAL_UART_8 = 0x58,
+
+ BOOT_SERIAL_USB = 0x60,
+ BOOT_SERIAL_USB_OTG = 0x62,
+
+ BOOT_FLASH_SPINAND = 0x70,
+ BOOT_FLASH_SPINAND_1 = 0x71,
+};
+
+#define TAMP_BOOT_MODE_MASK GENMASK(15, 8)
+#define TAMP_BOOT_MODE_SHIFT 8
+#define TAMP_BOOT_AUTH_MASK GENMASK(23, 16)
+#define TAMP_BOOT_AUTH_SHIFT 16
+#define TAMP_BOOT_DEVICE_MASK GENMASK(7, 4)
+#define TAMP_BOOT_INSTANCE_MASK GENMASK(3, 0)
+#define TAMP_BOOT_AUTH_ST_MASK GENMASK(7, 4)
+#define TAMP_BOOT_PARTITION_MASK GENMASK(3, 0)
+#define TAMP_BOOT_FORCED_MASK GENMASK(7, 0)
+
+enum forced_boot_mode {
+ BOOT_NORMAL = 0x00,
+ BOOT_FASTBOOT = 0x01,
+ BOOT_RECOVERY = 0x02,
+ BOOT_STM32PROG = 0x03,
+ BOOT_UMS_MMC0 = 0x10,
+ BOOT_UMS_MMC1 = 0x11,
+ BOOT_UMS_MMC2 = 0x12,
+};
+
#endif
/*
* Peripheral memory map
* only address used before device tree parsing
*/
+
+#if defined(CONFIG_STM32MP15x) || defined(CONFIG_STM32MP13x)
#define STM32_RCC_BASE 0x50000000
#define STM32_PWR_BASE 0x50001000
#define STM32_SYSCFG_BASE 0x50020000
@@ -58,12 +116,6 @@
#define STM32_DDR_SIZE SZ_1G
#ifndef __ASSEMBLY__
-/* enumerated used to identify the SYSCON driver instance */
-enum {
- STM32MP_SYSCON_UNKNOWN,
- STM32MP_SYSCON_SYSCFG,
-};
-
/*
* enumerated for boot interface from Bootrom, used in TAMP_BOOT_CONTEXT
* - boot device = bit 8:4
@@ -74,40 +126,6 @@
#define BOOT_INSTANCE_MASK 0x0F
#define BOOT_INSTANCE_SHIFT 0
-enum boot_device {
- BOOT_FLASH_SD = 0x10,
- BOOT_FLASH_SD_1 = 0x11,
- BOOT_FLASH_SD_2 = 0x12,
- BOOT_FLASH_SD_3 = 0x13,
-
- BOOT_FLASH_EMMC = 0x20,
- BOOT_FLASH_EMMC_1 = 0x21,
- BOOT_FLASH_EMMC_2 = 0x22,
- BOOT_FLASH_EMMC_3 = 0x23,
-
- BOOT_FLASH_NAND = 0x30,
- BOOT_FLASH_NAND_FMC = 0x31,
-
- BOOT_FLASH_NOR = 0x40,
- BOOT_FLASH_NOR_QSPI = 0x41,
-
- BOOT_SERIAL_UART = 0x50,
- BOOT_SERIAL_UART_1 = 0x51,
- BOOT_SERIAL_UART_2 = 0x52,
- BOOT_SERIAL_UART_3 = 0x53,
- BOOT_SERIAL_UART_4 = 0x54,
- BOOT_SERIAL_UART_5 = 0x55,
- BOOT_SERIAL_UART_6 = 0x56,
- BOOT_SERIAL_UART_7 = 0x57,
- BOOT_SERIAL_UART_8 = 0x58,
-
- BOOT_SERIAL_USB = 0x60,
- BOOT_SERIAL_USB_OTG = 0x62,
-
- BOOT_FLASH_SPINAND = 0x70,
- BOOT_FLASH_SPINAND_1 = 0x71,
-};
-
/* TAMP registers */
#define TAMP_BACKUP_REGISTER(x) (STM32_TAMP_BASE + 0x100 + 4 * x)
@@ -123,7 +141,6 @@
#define TAMP_FWU_BOOT_IDX_MASK GENMASK(3, 0)
#define TAMP_FWU_BOOT_IDX_OFFSET 0
-
#define TAMP_COPRO_STATE_OFF 0
#define TAMP_COPRO_STATE_INIT 1
#define TAMP_COPRO_STATE_CRUN 2
@@ -137,25 +154,23 @@
#define TAMP_BOOT_CONTEXT TAMP_BACKUP_REGISTER(30)
#endif
-#define TAMP_BOOT_MODE_MASK GENMASK(15, 8)
-#define TAMP_BOOT_MODE_SHIFT 8
-#define TAMP_BOOT_AUTH_MASK GENMASK(23, 16)
-#define TAMP_BOOT_AUTH_SHIFT 16
-#define TAMP_BOOT_DEVICE_MASK GENMASK(7, 4)
-#define TAMP_BOOT_INSTANCE_MASK GENMASK(3, 0)
-#define TAMP_BOOT_AUTH_ST_MASK GENMASK(7, 4)
-#define TAMP_BOOT_PARTITION_MASK GENMASK(3, 0)
-#define TAMP_BOOT_FORCED_MASK GENMASK(7, 0)
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_STM32MP15X || CONFIG_STM32MP13X */
-enum forced_boot_mode {
- BOOT_NORMAL = 0x00,
- BOOT_FASTBOOT = 0x01,
- BOOT_RECOVERY = 0x02,
- BOOT_STM32PROG = 0x03,
- BOOT_UMS_MMC0 = 0x10,
- BOOT_UMS_MMC1 = 0x11,
- BOOT_UMS_MMC2 = 0x12,
-};
+#if CONFIG_STM32MP25X
+#define STM32_RCC_BASE 0x44200000
+#define STM32_TAMP_BASE 0x46010000
+
+#define STM32_DDR_BASE 0x80000000
+
+#define STM32_DDR_SIZE SZ_4G
+
+/* TAMP registers x = 0 to 127 : hardcoded description, waiting NVMEM node in DT */
+#define TAMP_BACKUP_REGISTER(x) (STM32_TAMP_BASE + 0x100 + 4 * (x))
+
+/* TAMP registers zone 3 RIF 1 (RW) at 96*/
+#define TAMP_BOOT_CONTEXT TAMP_BACKUP_REGISTER(96)
+#endif /* STM32MP25X */
/* offset used for BSEC driver: misc_read and misc_write */
#define STM32_BSEC_SHADOW_OFFSET 0x0
@@ -179,6 +194,20 @@
#define BSEC_OTP_MAC 57
#define BSEC_OTP_BOARD 60
#endif
+#ifdef CONFIG_STM32MP25X
+#define BSEC_OTP_SERIAL 5
+#define BSEC_OTP_RPN 9
+#define BSEC_OTP_PKG 246
+#endif
-#endif /* __ASSEMBLY__ */
+#ifndef __ASSEMBLY__
+#include <asm/types.h>
+
+/* enumerated used to identify the SYSCON driver instance */
+enum {
+ STM32MP_SYSCON_UNKNOWN,
+ STM32MP_SYSCON_SYSCFG,
+};
+#endif /* __ASSEMBLY__*/
+
#endif /* _MACH_STM32_H_ */
diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
index 52aca1e..83388fd 100644
--- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
+++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
@@ -30,11 +30,30 @@
#define CPU_STM32MP131Fxx 0x05010EC8
#define CPU_STM32MP131Dxx 0x05010EC9
+/* ID for STM32MP25x = Device Part Number (RPN) (bit31:0) */
+#define CPU_STM32MP257Cxx 0x00002000
+#define CPU_STM32MP255Cxx 0x00082000
+#define CPU_STM32MP253Cxx 0x000B2004
+#define CPU_STM32MP251Cxx 0x000B3065
+#define CPU_STM32MP257Axx 0x40002E00
+#define CPU_STM32MP255Axx 0x40082E00
+#define CPU_STM32MP253Axx 0x400B2E04
+#define CPU_STM32MP251Axx 0x400B3E65
+#define CPU_STM32MP257Fxx 0x80002000
+#define CPU_STM32MP255Fxx 0x80082000
+#define CPU_STM32MP253Fxx 0x800B2004
+#define CPU_STM32MP251Fxx 0x800B3065
+#define CPU_STM32MP257Dxx 0xC0002E00
+#define CPU_STM32MP255Dxx 0xC0082E00
+#define CPU_STM32MP253Dxx 0xC00B2E04
+#define CPU_STM32MP251Dxx 0xC00B3E65
+
/* return CPU_STMP32MP...Xxx constants */
u32 get_cpu_type(void);
#define CPU_DEV_STM32MP15 0x500
#define CPU_DEV_STM32MP13 0x501
+#define CPU_DEV_STM32MP25 0x505
/* return CPU_DEV constants */
u32 get_cpu_dev(void);
@@ -59,6 +78,13 @@
#define STM32MP15_PKG_AD_TFBGA257 1
#define STM32MP15_PKG_UNKNOWN 0
+/* package used for STM32MP25x */
+#define STM32MP25_PKG_CUSTOM 0
+#define STM32MP25_PKG_AL_TBGA361 3
+#define STM32MP25_PKG_AK_TBGA424 4
+#define STM32MP25_PKG_AI_TBGA436 5
+#define STM32MP25_PKG_UNKNOWN 7
+
/* Get SOC name */
#define SOC_NAME_SIZE 20
void get_soc_name(char name[SOC_NAME_SIZE]);
diff --git a/arch/arm/mach-stm32mp/stm32mp1/Makefile b/arch/arm/mach-stm32mp/stm32mp1/Makefile
new file mode 100644
index 0000000..94c7724
--- /dev/null
+++ b/arch/arm/mach-stm32mp/stm32mp1/Makefile
@@ -0,0 +1,20 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+#
+
+obj-y += cpu.o
+
+obj-$(CONFIG_STM32MP13x) += stm32mp13x.o
+obj-$(CONFIG_STM32MP15x) += stm32mp15x.o
+
+obj-$(CONFIG_STM32_ECDSA_VERIFY) += ecdsa_romapi.o
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+obj-y += tzc400.o
+else
+obj-$(CONFIG_ARMV7_PSCI) += psci.o
+endif
+
+obj-$(CONFIG_$(SPL_)STM32MP15_PWR) += pwr_regulator.o
+obj-$(CONFIG_OF_SYSTEM_SETUP) += fdt.o
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
similarity index 100%
rename from arch/arm/mach-stm32mp/cpu.c
rename to arch/arm/mach-stm32mp/stm32mp1/cpu.c
diff --git a/arch/arm/mach-stm32mp/fdt.c b/arch/arm/mach-stm32mp/stm32mp1/fdt.c
similarity index 100%
rename from arch/arm/mach-stm32mp/fdt.c
rename to arch/arm/mach-stm32mp/stm32mp1/fdt.c
diff --git a/arch/arm/mach-stm32mp/psci.c b/arch/arm/mach-stm32mp/stm32mp1/psci.c
similarity index 100%
rename from arch/arm/mach-stm32mp/psci.c
rename to arch/arm/mach-stm32mp/stm32mp1/psci.c
diff --git a/arch/arm/mach-stm32mp/pwr_regulator.c b/arch/arm/mach-stm32mp/stm32mp1/pwr_regulator.c
similarity index 100%
rename from arch/arm/mach-stm32mp/pwr_regulator.c
rename to arch/arm/mach-stm32mp/stm32mp1/pwr_regulator.c
diff --git a/arch/arm/mach-stm32mp/spl.c b/arch/arm/mach-stm32mp/stm32mp1/spl.c
similarity index 100%
rename from arch/arm/mach-stm32mp/spl.c
rename to arch/arm/mach-stm32mp/stm32mp1/spl.c
diff --git a/arch/arm/mach-stm32mp/stm32mp13x.c b/arch/arm/mach-stm32mp/stm32mp1/stm32mp13x.c
similarity index 100%
rename from arch/arm/mach-stm32mp/stm32mp13x.c
rename to arch/arm/mach-stm32mp/stm32mp1/stm32mp13x.c
diff --git a/arch/arm/mach-stm32mp/stm32mp15x.c b/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c
similarity index 100%
rename from arch/arm/mach-stm32mp/stm32mp15x.c
rename to arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c
diff --git a/arch/arm/mach-stm32mp/tzc400.c b/arch/arm/mach-stm32mp/stm32mp1/tzc400.c
similarity index 100%
rename from arch/arm/mach-stm32mp/tzc400.c
rename to arch/arm/mach-stm32mp/stm32mp1/tzc400.c
diff --git a/arch/arm/mach-stm32mp/stm32mp2/Makefile b/arch/arm/mach-stm32mp/stm32mp2/Makefile
new file mode 100644
index 0000000..b579ce5
--- /dev/null
+++ b/arch/arm/mach-stm32mp/stm32mp2/Makefile
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+#
+# Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+#
+
+obj-y += cpu.o
+obj-y += arm64-mmu.o
+obj-$(CONFIG_OF_SYSTEM_SETUP) += fdt.o
+obj-$(CONFIG_STM32MP25X) += stm32mp25x.o
diff --git a/arch/arm/mach-stm32mp/stm32mp2/arm64-mmu.c b/arch/arm/mach-stm32mp/stm32mp2/arm64-mmu.c
new file mode 100644
index 0000000..36c631e
--- /dev/null
+++ b/arch/arm/mach-stm32mp/stm32mp2/arm64-mmu.c
@@ -0,0 +1,68 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+ */
+
+#include <asm/system.h>
+#include <asm/armv8/mmu.h>
+#include <mach/stm32.h>
+
+#define MP2_MEM_MAP_MAX 10
+
+#if (CONFIG_TEXT_BASE < STM32_DDR_BASE) || \
+ (CONFIG_TEXT_BASE > (STM32_DDR_BASE + STM32_DDR_SIZE))
+#error "invalid CONFIG_TEXT_BASE value"
+#endif
+
+struct mm_region stm32mp2_mem_map[MP2_MEM_MAP_MAX] = {
+ {
+ /* PCIe */
+ .virt = 0x10000000UL,
+ .phys = 0x10000000UL,
+ .size = 0x10000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* LPSRAMs, VDERAM, RETRAM, SRAMs, SYSRAM: alias1 */
+ .virt = 0x20000000UL,
+ .phys = 0x20000000UL,
+ .size = 0x00200000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* Peripherals: alias1 */
+ .virt = 0x40000000UL,
+ .phys = 0x40000000UL,
+ .size = 0x10000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* OSPI and FMC: memory-map area */
+ .virt = 0x60000000UL,
+ .phys = 0x60000000UL,
+ .size = 0x20000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /*
+ * DDR = STM32_DDR_BASE / STM32_DDR_SIZE
+ * the beginning of DDR (before CONFIG_TEXT_BASE) is not
+ * mapped, protected by RIF and reserved for other firmware
+ * (OP-TEE / TF-M / Cube M33)
+ */
+ .virt = CONFIG_TEXT_BASE,
+ .phys = CONFIG_TEXT_BASE,
+ .size = STM32_DDR_SIZE - (CONFIG_TEXT_BASE - STM32_DDR_BASE),
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = stm32mp2_mem_map;
diff --git a/arch/arm/mach-stm32mp/stm32mp2/cpu.c b/arch/arm/mach-stm32mp/stm32mp2/cpu.c
new file mode 100644
index 0000000..f43d1aa
--- /dev/null
+++ b/arch/arm/mach-stm32mp/stm32mp2/cpu.c
@@ -0,0 +1,107 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+ */
+
+#define LOG_CATEGORY LOGC_ARCH
+
+#include <clk.h>
+#include <cpu_func.h>
+#include <debug_uart.h>
+#include <env_internal.h>
+#include <init.h>
+#include <misc.h>
+#include <wdt.h>
+#include <asm/io.h>
+#include <asm/arch/stm32.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/system.h>
+#include <dm/device.h>
+#include <dm/lists.h>
+#include <dm/uclass.h>
+
+/*
+ * early TLB into the .data section so that it not get cleared
+ * with 16kB alignment
+ */
+#define EARLY_TLB_SIZE 0xA000
+u8 early_tlb[EARLY_TLB_SIZE] __section(".data") __aligned(0x4000);
+
+/*
+ * initialize the MMU and activate cache in U-Boot pre-reloc stage
+ * MMU/TLB is updated in enable_caches() for U-Boot after relocation
+ */
+static void early_enable_caches(void)
+{
+ if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
+ return;
+
+ if (!(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))) {
+ gd->arch.tlb_size = EARLY_TLB_SIZE;
+ gd->arch.tlb_addr = (unsigned long)&early_tlb;
+ }
+ /* enable MMU (default configuration) */
+ dcache_enable();
+}
+
+/*
+ * Early system init
+ */
+int arch_cpu_init(void)
+{
+ icache_enable();
+ early_enable_caches();
+
+ return 0;
+}
+
+void enable_caches(void)
+{
+ /* deactivate the data cache, early enabled in arch_cpu_init() */
+ dcache_disable();
+ /*
+ * Force the call of setup_all_pgtables() in mmu_setup() by clearing tlb_fillptr
+ * to update the TLB location udpated in board_f.c::reserve_mmu
+ */
+ gd->arch.tlb_fillptr = 0;
+ dcache_enable();
+}
+
+/* used when CONFIG_DISPLAY_CPUINFO is activated */
+int print_cpuinfo(void)
+{
+ char name[SOC_NAME_SIZE];
+
+ get_soc_name(name);
+ printf("CPU: %s\n", name);
+
+ return 0;
+}
+
+int arch_misc_init(void)
+{
+ return 0;
+}
+
+/*
+ * Force data-section, as .bss will not be valid
+ * when save_boot_params is invoked.
+ */
+static uintptr_t nt_fw_dtb __section(".data");
+
+uintptr_t get_stm32mp_bl2_dtb(void)
+{
+ return nt_fw_dtb;
+}
+
+/*
+ * Save the FDT address provided by TF-A in r2 at boot time
+ * This function is called from start.S
+ */
+void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2,
+ unsigned long r3)
+{
+ nt_fw_dtb = r2;
+
+ save_boot_params_ret();
+}
diff --git a/arch/arm/mach-stm32mp/stm32mp2/fdt.c b/arch/arm/mach-stm32mp/stm32mp2/fdt.c
new file mode 100644
index 0000000..31b127b
--- /dev/null
+++ b/arch/arm/mach-stm32mp/stm32mp2/fdt.c
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+ */
+
+#include <asm/u-boot.h>
+
+/*
+ * This function is called right before the kernel is booted. "blob" is the
+ * device tree that will be passed to the kernel.
+ */
+int ft_system_setup(void *blob, struct bd_info *bd)
+{
+ return 0;
+}
+
diff --git a/arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c b/arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c
new file mode 100644
index 0000000..4b2f70a
--- /dev/null
+++ b/arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c
@@ -0,0 +1,193 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+ */
+
+#define LOG_CATEGORY LOGC_ARCH
+
+#include <log.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/stm32.h>
+#include <asm/arch/sys_proto.h>
+
+/* SYSCFG register */
+#define SYSCFG_DEVICEID_OFFSET 0x6400
+#define SYSCFG_DEVICEID_DEV_ID_MASK GENMASK(11, 0)
+#define SYSCFG_DEVICEID_DEV_ID_SHIFT 0
+#define SYSCFG_DEVICEID_REV_ID_MASK GENMASK(31, 16)
+#define SYSCFG_DEVICEID_REV_ID_SHIFT 16
+
+/* Device Part Number (RPN) = OTP9 */
+#define RPN_SHIFT 0
+#define RPN_MASK GENMASK(31, 0)
+
+/* Package = bit 0:2 of OTP122 => STM32MP25_PKG defines
+ * - 000: Custom package
+ * - 011: TFBGA361 => AL = 10x10, 361 balls pith 0.5mm
+ * - 100: TFBGA424 => AK = 14x14, 424 balls pith 0.5mm
+ * - 101: TFBGA436 => AI = 18x18, 436 balls pith 0.5mm
+ * - others: Reserved
+ */
+#define PKG_SHIFT 0
+#define PKG_MASK GENMASK(2, 0)
+
+static u32 read_deviceid(void)
+{
+ void *syscfg = syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
+
+ return readl(syscfg + SYSCFG_DEVICEID_OFFSET);
+}
+
+u32 get_cpu_dev(void)
+{
+ return (read_deviceid() & SYSCFG_DEVICEID_DEV_ID_MASK) >> SYSCFG_DEVICEID_DEV_ID_SHIFT;
+}
+
+u32 get_cpu_rev(void)
+{
+ return (read_deviceid() & SYSCFG_DEVICEID_REV_ID_MASK) >> SYSCFG_DEVICEID_REV_ID_SHIFT;
+}
+
+/* Get Device Part Number (RPN) from OTP */
+u32 get_cpu_type(void)
+{
+ return get_otp(BSEC_OTP_RPN, RPN_SHIFT, RPN_MASK);
+}
+
+/* Get Package options from OTP */
+u32 get_cpu_package(void)
+{
+ return get_otp(BSEC_OTP_PKG, PKG_SHIFT, PKG_MASK);
+}
+
+int get_eth_nb(void)
+{
+ int nb_eth;
+
+ switch (get_cpu_type()) {
+ case CPU_STM32MP257Fxx:
+ fallthrough;
+ case CPU_STM32MP257Dxx:
+ fallthrough;
+ case CPU_STM32MP257Cxx:
+ fallthrough;
+ case CPU_STM32MP257Axx:
+ nb_eth = 5; /* dual ETH with TSN support */
+ break;
+ case CPU_STM32MP253Fxx:
+ fallthrough;
+ case CPU_STM32MP253Dxx:
+ fallthrough;
+ case CPU_STM32MP253Cxx:
+ fallthrough;
+ case CPU_STM32MP253Axx:
+ nb_eth = 2; /* dual ETH */
+ break;
+ case CPU_STM32MP251Fxx:
+ fallthrough;
+ case CPU_STM32MP251Dxx:
+ fallthrough;
+ case CPU_STM32MP251Cxx:
+ fallthrough;
+ case CPU_STM32MP251Axx:
+ nb_eth = 1; /* single ETH */
+ break;
+ default:
+ nb_eth = 0;
+ break;
+ }
+
+ return nb_eth;
+}
+
+void get_soc_name(char name[SOC_NAME_SIZE])
+{
+ char *cpu_s, *cpu_r, *package;
+
+ cpu_s = "????";
+ cpu_r = "?";
+ package = "??";
+ if (get_cpu_dev() == CPU_DEV_STM32MP25) {
+ switch (get_cpu_type()) {
+ case CPU_STM32MP257Fxx:
+ cpu_s = "257F";
+ break;
+ case CPU_STM32MP257Dxx:
+ cpu_s = "257D";
+ break;
+ case CPU_STM32MP257Cxx:
+ cpu_s = "257C";
+ break;
+ case CPU_STM32MP257Axx:
+ cpu_s = "257A";
+ break;
+ case CPU_STM32MP255Fxx:
+ cpu_s = "255F";
+ break;
+ case CPU_STM32MP255Dxx:
+ cpu_s = "255D";
+ break;
+ case CPU_STM32MP255Cxx:
+ cpu_s = "255C";
+ break;
+ case CPU_STM32MP255Axx:
+ cpu_s = "255A";
+ break;
+ case CPU_STM32MP253Fxx:
+ cpu_s = "253F";
+ break;
+ case CPU_STM32MP253Dxx:
+ cpu_s = "253D";
+ break;
+ case CPU_STM32MP253Cxx:
+ cpu_s = "253C";
+ break;
+ case CPU_STM32MP253Axx:
+ cpu_s = "253A";
+ break;
+ case CPU_STM32MP251Fxx:
+ cpu_s = "251F";
+ break;
+ case CPU_STM32MP251Dxx:
+ cpu_s = "251D";
+ break;
+ case CPU_STM32MP251Cxx:
+ cpu_s = "251C";
+ break;
+ case CPU_STM32MP251Axx:
+ cpu_s = "251A";
+ break;
+ default:
+ cpu_s = "25??";
+ break;
+ }
+ /* REVISION */
+ switch (get_cpu_rev()) {
+ case CPU_REV1:
+ cpu_r = "A";
+ break;
+ default:
+ break;
+ }
+ /* PACKAGE */
+ switch (get_cpu_package()) {
+ case STM32MP25_PKG_CUSTOM:
+ package = "XX";
+ break;
+ case STM32MP25_PKG_AL_TBGA361:
+ package = "AL";
+ break;
+ case STM32MP25_PKG_AK_TBGA424:
+ package = "AK";
+ break;
+ case STM32MP25_PKG_AI_TBGA436:
+ package = "AI";
+ break;
+ default:
+ break;
+ }
+ }
+
+ snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s Rev.%s", cpu_s, package, cpu_r);
+}
diff --git a/arch/arm/mach-stm32mp/syscon.c b/arch/arm/mach-stm32mp/syscon.c
index a0e8e1d..a2e351d 100644
--- a/arch/arm/mach-stm32mp/syscon.c
+++ b/arch/arm/mach-stm32mp/syscon.c
@@ -10,8 +10,8 @@
#include <asm/arch/stm32.h>
static const struct udevice_id stm32mp_syscon_ids[] = {
- { .compatible = "st,stm32mp157-syscfg",
- .data = STM32MP_SYSCON_SYSCFG },
+ { .compatible = "st,stm32mp157-syscfg", .data = STM32MP_SYSCON_SYSCFG },
+ { .compatible = "st,stm32mp25-syscfg", .data = STM32MP_SYSCON_SYSCFG},
{ }
};
diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c
index c2410dd..267cb0b 100644
--- a/arch/arm/mach-sunxi/spl_spi_sunxi.c
+++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c
@@ -354,10 +354,7 @@
struct spl_load_info load;
debug("Found FIT image\n");
- load.dev = NULL;
- load.priv = NULL;
- load.filename = NULL;
- load.bl_len = 1;
+ spl_set_bl_len(&load, 1);
load.read = spi_load_read;
ret = spl_load_simple_fit(spl_image, &load,
load_offset, header);
diff --git a/arch/arm/mach-tegra/xusb-padctl-common.h b/arch/arm/mach-tegra/xusb-padctl-common.h
index e3fd613..a576e6f 100644
--- a/arch/arm/mach-tegra/xusb-padctl-common.h
+++ b/arch/arm/mach-tegra/xusb-padctl-common.h
@@ -6,7 +6,6 @@
#ifndef _TEGRA_XUSB_PADCTL_COMMON_H_
#define _TEGRA_XUSB_PADCTL_COMMON_H_
-#include <common.h>
#include <fdtdec.h>
#include <dm/ofnode.h>
diff --git a/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h b/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h
index 434a7fa..783d7c4 100644
--- a/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h
+++ b/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h
@@ -4,7 +4,6 @@
#define _PSU_INIT_GPL_H_
#include <asm/io.h>
-#include <common.h>
int mask_pollonvalue(unsigned long add, u32 mask, u32 value);
diff --git a/arch/m68k/include/asm/fsl_mcdmafec.h b/arch/m68k/include/asm/fsl_mcdmafec.h
deleted file mode 100644
index de6c548..0000000
--- a/arch/m68k/include/asm/fsl_mcdmafec.h
+++ /dev/null
@@ -1,151 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * fsl_mcdmafec.h -- Multi-channel DMA Fast Ethernet Controller definitions
- *
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- */
-
-#ifndef fsl_mcdmafec_h
-#define fsl_mcdmafec_h
-
-/* Re-use of the definitions */
-#include <asm/fec.h>
-
-typedef struct fecdma {
- u32 rsvd0; /* 0x000 */
- u32 eir; /* 0x004 */
- u32 eimr; /* 0x008 */
- u32 rsvd1[6]; /* 0x00C - 0x023 */
- u32 ecr; /* 0x024 */
- u32 rsvd2[6]; /* 0x028 - 0x03F */
- u32 mmfr; /* 0x040 */
- u32 mscr; /* 0x044 */
- u32 rsvd3[7]; /* 0x048 - 0x063 */
- u32 mibc; /* 0x064 */
- u32 rsvd4[7]; /* 0x068 - 0x083 */
- u32 rcr; /* 0x084 */
- u32 rhr; /* 0x088 */
- u32 rsvd5[14]; /* 0x08C - 0x0C3 */
- u32 tcr; /* 0x0C4 */
- u32 rsvd6[7]; /* 0x0C8 - 0x0E3 */
- u32 palr; /* 0x0E4 */
- u32 paur; /* 0x0E8 */
- u32 opd; /* 0x0EC */
- u32 rsvd7[10]; /* 0x0F0 - 0x117 */
- u32 iaur; /* 0x118 */
- u32 ialr; /* 0x11C */
- u32 gaur; /* 0x120 */
- u32 galr; /* 0x124 */
- u32 rsvd8[7]; /* 0x128 - 0x143 */
- u32 tfwr; /* 0x144 */
- u32 rsvd9[14]; /* 0x148 - 0x17F */
- u32 fmc; /* 0x180 */
- u32 rfdr; /* 0x184 */
- u32 rfsr; /* 0x188 */
- u32 rfcr; /* 0x18C */
- u32 rlrfp; /* 0x190 */
- u32 rlwfp; /* 0x194 */
- u32 rfar; /* 0x198 */
- u32 rfrp; /* 0x19C */
- u32 rfwp; /* 0x1A0 */
- u32 tfdr; /* 0x1A4 */
- u32 tfsr; /* 0x1A8 */
- u32 tfcr; /* 0x1AC */
- u32 tlrfp; /* 0x1B0 */
- u32 tlwfp; /* 0x1B4 */
- u32 tfar; /* 0x1B8 */
- u32 tfrp; /* 0x1BC */
- u32 tfwp; /* 0x1C0 */
- u32 frst; /* 0x1C4 */
- u32 ctcwr; /* 0x1C8 */
-} fecdma_t;
-
-struct fec_info_dma {
- int index;
- u32 iobase;
- u32 pinmux;
- u32 miibase;
- int phy_addr;
- int dup_spd;
- char *phy_name;
- int phyname_init;
- cbd_t *rxbd; /* Rx BD */
- cbd_t *txbd; /* Tx BD */
- uint rx_idx;
- uint tx_idx;
- char *txbuf;
- int initialized;
- struct fec_info_dma *next;
- u16 rx_task; /* DMA receive Task Number */
- u16 tx_task; /* DMA Transmit Task Number */
- u16 rx_pri; /* DMA Receive Priority */
- u16 tx_pri; /* DMA Transmit Priority */
- u16 rx_init; /* DMA Receive Initiator */
- u16 tx_init; /* DMA Transmit Initiator */
- u16 used_tbd_idx; /* next transmit BD to clean */
- u16 clean_tbd_num; /* the number of available transmit BDs */
- int to_loop;
- struct mii_dev *bus;
-};
-
-/* Bit definitions and macros for IEVENT */
-#define FEC_EIR_TXERR (0x00040000)
-#define FEC_EIR_RXERR (0x00020000)
-#undef FEC_EIR_CLEAR_ALL
-#define FEC_EIR_CLEAR_ALL (0xFFFE0000)
-
-/* Bit definitions and macros for R_HASH */
-#define FEC_RHASH_FCE_DC (0x80000000)
-#define FEC_RHASH_MULTCAST (0x40000000)
-#define FEC_RHASH_HASH(x) (((x)&0x0000003F)<<24)
-
-/* Bit definitions and macros for FEC_TFWR */
-#undef FEC_TFWR_X_WMRK
-#undef FEC_TFWR_X_WMRK_64
-#undef FEC_TFWR_X_WMRK_128
-#undef FEC_TFWR_X_WMRK_192
-
-#define FEC_TFWR_X_WMRK(x) ((x)&0x0F)
-#define FEC_TFWR_X_WMRK_64 (0x00)
-#define FEC_TFWR_X_WMRK_128 (0x01)
-#define FEC_TFWR_X_WMRK_192 (0x02)
-#define FEC_TFWR_X_WMRK_256 (0x03)
-#define FEC_TFWR_X_WMRK_320 (0x04)
-#define FEC_TFWR_X_WMRK_384 (0x05)
-#define FEC_TFWR_X_WMRK_448 (0x06)
-#define FEC_TFWR_X_WMRK_512 (0x07)
-#define FEC_TFWR_X_WMRK_576 (0x08)
-#define FEC_TFWR_X_WMRK_640 (0x09)
-#define FEC_TFWR_X_WMRK_704 (0x0A)
-#define FEC_TFWR_X_WMRK_768 (0x0B)
-#define FEC_TFWR_X_WMRK_832 (0x0C)
-#define FEC_TFWR_X_WMRK_896 (0x0D)
-#define FEC_TFWR_X_WMRK_960 (0x0E)
-#define FEC_TFWR_X_WMRK_1024 (0x0F)
-
-/* FIFO definitions */
-/* Bit definitions and macros for FSTAT */
-#define FIFO_STAT_IP (0x80000000)
-#define FIFO_STAT_FRAME(x) (((x)&0x0000000F)<<24)
-#define FIFO_STAT_FAE (0x00800000)
-#define FIFO_STAT_RXW (0x00400000)
-#define FIFO_STAT_UF (0x00200000)
-#define FIFO_STAT_OF (0x00100000)
-#define FIFO_STAT_FR (0x00080000)
-#define FIFO_STAT_FULL (0x00040000)
-#define FIFO_STAT_ALARM (0x00020000)
-#define FIFO_STAT_EMPTY (0x00010000)
-
-/* Bit definitions and macros for FCTRL */
-#define FIFO_CTRL_WCTL (0x40000000)
-#define FIFO_CTRL_WFR (0x20000000)
-#define FIFO_CTRL_FRAME (0x08000000)
-#define FIFO_CTRL_GR(x) (((x)&0x00000007)<<24)
-#define FIFO_CTRL_IPMASK (0x00800000)
-#define FIFO_CTRL_FAEMASK (0x00400000)
-#define FIFO_CTRL_RXWMASK (0x00200000)
-#define FIFO_CTRL_UFMASK (0x00100000)
-#define FIFO_CTRL_OFMASK (0x00080000)
-
-#endif /* fsl_mcdmafec_h */
diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h
index 411b008..b118a91 100644
--- a/arch/m68k/include/asm/immap.h
+++ b/arch/m68k/include/asm/immap.h
@@ -314,21 +314,6 @@
#include <asm/immap_547x_8x.h>
#include <asm/m547x_8x.h>
-#ifdef CONFIG_FSLDMAFEC
-#define FEC0_RX_TASK 0
-#define FEC0_TX_TASK 1
-#define FEC0_RX_PRIORITY 6
-#define FEC0_TX_PRIORITY 7
-#define FEC0_RX_INIT 16
-#define FEC0_TX_INIT 17
-#define FEC1_RX_TASK 2
-#define FEC1_TX_TASK 3
-#define FEC1_RX_PRIORITY 6
-#define FEC1_TX_PRIORITY 7
-#define FEC1_RX_INIT 30
-#define FEC1_TX_INIT 31
-#endif
-
#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x100))
#ifdef CONFIG_SLTTMR
diff --git a/arch/m68k/lib/fec.c b/arch/m68k/lib/fec.c
index d6f238e..ac36aec 100644
--- a/arch/m68k/lib/fec.c
+++ b/arch/m68k/lib/fec.c
@@ -10,7 +10,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_MCFFEC) || defined(CONFIG_FSLDMAFEC)
+#if defined(CONFIG_MCFFEC)
static int fec_get_node(int fec_idx)
{
char fec_alias[5] = {"fec"};
@@ -77,4 +77,4 @@
return fec_get_fdt_prop(fec_idx, "mii-base", mii_base);
}
-#endif //CONFIG_MCFFEC || CONFIG_FSLDMAFEC
+#endif //CONFIG_MCFFEC
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index d3ad669..3774aca 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -336,6 +336,22 @@
BUILDIO_MEM(w, u16)
BUILDIO_MEM(l, u32)
BUILDIO_MEM(q, u64)
+#define __raw_readb __raw_readb
+#define __raw_readw __raw_readw
+#define __raw_readl __raw_readl
+#define __raw_readq __raw_readq
+#define __raw_writeb __raw_writeb
+#define __raw_writew __raw_writew
+#define __raw_writel __raw_writel
+#define __raw_writeq __raw_writeq
+#define readb readb
+#define readw readw
+#define readl readl
+#define readq readq
+#define writeb writeb
+#define writew writew
+#define writel writel
+#define writeq writeq
#define __BUILD_IOPORT_PFX(bus, bwlq, type) \
__BUILD_IOPORT_SINGLE(bus, bwlq, type, ) \
@@ -405,7 +421,8 @@
} \
} \
\
-static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \
+static inline void reads##bwlq(const volatile void __iomem *mem, \
+ void *addr, \
unsigned int count) \
{ \
volatile type *__addr = addr; \
@@ -448,8 +465,24 @@
BUILDSTRING(b, u8)
BUILDSTRING(w, u16)
BUILDSTRING(l, u32)
+#define readsb readsb
+#define readsw readsw
+#define readsl readsl
+#define writesb writesb
+#define writesw writesw
+#define writesl writesl
+#define outsb outsb
+#define outsw outsw
+#define outsl outsl
+#define insb insb
+#define insw insw
+#define insl insl
#ifdef CONFIG_64BIT
BUILDSTRING(q, u64)
+#define readsq readsq
+#define writesq writesq
+#define insq insq
+#define outsq outsq
#endif
diff --git a/arch/nios2/include/asm/io.h b/arch/nios2/include/asm/io.h
index 817cd72..321e4fd 100644
--- a/arch/nios2/include/asm/io.h
+++ b/arch/nios2/include/asm/io.h
@@ -94,6 +94,9 @@
unsigned long *p = dst;
while (count--) *p++ = inl (port);
}
+#define insb insb
+#define insw insw
+#define insl insl
static inline void outsb (unsigned long port, const void *src, unsigned long count)
{
@@ -111,6 +114,9 @@
const unsigned long *p = src;
while (count--) outl (*p++, port);
}
+#define outsb outsb
+#define outsw outsw
+#define outsl outsl
/*
* Clear and set bits in one shot. These macros can be used to clear and
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index f5cb000..340f9a0 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -3,7 +3,6 @@
* Copyright (C) 2004-2009 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <asm-offsets.h>
#include <mpc83xx.h>
#include <system-constants.h>
@@ -19,6 +18,8 @@
#ifdef CONFIG_QE
#include <fsl_qe.h>
#endif
+#include <asm/ppc.h>
+#include <asm/fsl_lbc.h>
#include "lblaw/lblaw.h"
#include "elbc/elbc.h"
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index d72d314..ceb5486 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -20,6 +20,7 @@
#include <asm/cache.h>
#include <asm/mmu.h>
+#include <asm/fsl_lbc.h>
#include <asm/u-boot.h>
#include "hrcw/hrcw.h"
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 96183ac..b770d29 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -9,7 +9,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <display_options.h>
#include <env.h>
#include <init.h>
diff --git a/arch/powerpc/cpu/mpc8xx/cache.c b/arch/powerpc/cpu/mpc8xx/cache.c
index 4155900..525c87f 100644
--- a/arch/powerpc/cpu/mpc8xx/cache.c
+++ b/arch/powerpc/cpu/mpc8xx/cache.c
@@ -4,7 +4,6 @@
* Christophe Leroy, CS Systemes d'Information, christophe.leroy@c-s.fr
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/processor.h>
#include <asm/ppc.h>
diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 56383ce..b9afd31 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -16,7 +16,6 @@
* Wolfgang Denk <wd@denx.de>
*/
-#include <common.h>
#include <cpu_func.h>
#include <display_options.h>
#include <net.h>
diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c b/arch/powerpc/cpu/mpc8xx/cpu_init.c
index feef792..aac4203 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <init.h>
#include <watchdog.h>
diff --git a/arch/powerpc/cpu/mpc8xx/fdt.c b/arch/powerpc/cpu/mpc8xx/fdt.c
index b4a26ef..b204a3d 100644
--- a/arch/powerpc/cpu/mpc8xx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xx/fdt.c
@@ -5,7 +5,6 @@
* Code copied & edited from Freescale mpc85xx stuff.
*/
-#include <common.h>
#include <time.h>
#include <asm/global_data.h>
#include <linux/libfdt.h>
diff --git a/arch/powerpc/cpu/mpc8xx/immap.c b/arch/powerpc/cpu/mpc8xx/immap.c
index 40793c2..8c85fc1 100644
--- a/arch/powerpc/cpu/mpc8xx/immap.c
+++ b/arch/powerpc/cpu/mpc8xx/immap.c
@@ -8,7 +8,6 @@
* MPC8xx Internal Memory Map Functions
*/
-#include <common.h>
#include <command.h>
#include <asm/global_data.h>
@@ -16,6 +15,7 @@
#include <asm/cpm_8xx.h>
#include <asm/iopin_8xx.h>
#include <asm/io.h>
+#include <asm/ppc.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/powerpc/cpu/mpc8xx/interrupts.c b/arch/powerpc/cpu/mpc8xx/interrupts.c
index eef1951..babef07 100644
--- a/arch/powerpc/cpu/mpc8xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc8xx/interrupts.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <stdio.h>
#include <irq_func.h>
#include <mpc8xx.h>
#include <mpc8xx_irq.h>
diff --git a/arch/powerpc/cpu/mpc8xx/speed.c b/arch/powerpc/cpu/mpc8xx/speed.c
index 1a882a3..baf8138 100644
--- a/arch/powerpc/cpu/mpc8xx/speed.c
+++ b/arch/powerpc/cpu/mpc8xx/speed.c
@@ -4,12 +4,12 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <clock_legacy.h>
#include <mpc8xx.h>
#include <asm/global_data.h>
#include <asm/processor.h>
#include <asm/io.h>
+#include <asm/immap_8xx.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/powerpc/cpu/mpc8xx/traps.c b/arch/powerpc/cpu/mpc8xx/traps.c
index 56794b0..5220c56 100644
--- a/arch/powerpc/cpu/mpc8xx/traps.c
+++ b/arch/powerpc/cpu/mpc8xx/traps.c
@@ -15,7 +15,7 @@
* This file handles the architecture-dependent parts of hardware exceptions
*/
-#include <common.h>
+#include <vsprintf.h>
#include <asm/ptrace.h>
#include <command.h>
#include <asm/processor.h>
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index a03f091..95f0f55 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -6,9 +6,6 @@
#ifndef __ASM_PPC_FSL_LBC_H
#define __ASM_PPC_FSL_LBC_H
-#include <config.h>
-#include <common.h>
-
#ifdef CONFIG_MPC85xx
void lbc_sdram_init(void);
#endif
diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h
index 6ed21c7..43d71f5 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -9,7 +9,7 @@
#define __ASM_GBL_DATA_H
#include <config.h>
-#include "asm/types.h"
+#include <linux/types.h>
/* Architecture-specific global data */
struct arch_global_data {
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index f63cae0..2412bb9 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -138,26 +138,37 @@
{
return *(volatile unsigned char *)PCI_FIX_ADDR(addr);
}
+#define __raw_readb __raw_readb
+
static inline unsigned short __raw_readw(const volatile void __iomem *addr)
{
return *(volatile unsigned short *)PCI_FIX_ADDR(addr);
}
+#define __raw_readw __raw_readw
+
static inline unsigned int __raw_readl(const volatile void __iomem *addr)
{
return *(volatile unsigned int *)PCI_FIX_ADDR(addr);
}
+#define __raw_readl __raw_readl
+
static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
{
*(volatile unsigned char *)PCI_FIX_ADDR(addr) = v;
}
+#define __raw_writeb __raw_writeb
+
static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
{
*(volatile unsigned short *)PCI_FIX_ADDR(addr) = v;
}
+#define __raw_writew __raw_writew
+
static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
{
*(volatile unsigned int *)PCI_FIX_ADDR(addr) = v;
}
+#define __raw_writel __raw_writel
/*
* 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h
index 4170877..da16585 100644
--- a/arch/riscv/include/asm/io.h
+++ b/arch/riscv/include/asm/io.h
@@ -218,7 +218,8 @@
#define insw(p, d, l) readsw(__io(p), d, l)
#define insl(p, d, l) readsl(__io(p), d, l)
-static inline void readsb(unsigned int *addr, void *data, int bytelen)
+static inline void readsb(const volatile void __iomem *addr, void *data,
+ unsigned int bytelen)
{
unsigned char *ptr;
unsigned char *ptr2;
@@ -233,7 +234,8 @@
}
}
-static inline void readsw(unsigned int *addr, void *data, int wordlen)
+static inline void readsw(const volatile void __iomem *addr, void *data,
+ unsigned int wordlen)
{
unsigned short *ptr;
unsigned short *ptr2;
@@ -248,7 +250,8 @@
}
}
-static inline void readsl(unsigned int *addr, void *data, int longlen)
+static inline void readsl(const volatile void __iomem *addr, void *data,
+ unsigned int longlen)
{
unsigned int *ptr;
unsigned int *ptr2;
@@ -263,7 +266,8 @@
}
}
-static inline void writesb(unsigned int *addr, const void *data, int bytelen)
+static inline void writesb(volatile void __iomem *addr, const void *data,
+ unsigned int bytelen)
{
unsigned char *ptr;
unsigned char *ptr2;
@@ -278,7 +282,8 @@
}
}
-static inline void writesw(unsigned int *addr, const void *data, int wordlen)
+static inline void writesw(volatile void __iomem *addr, const void *data,
+ unsigned int wordlen)
{
unsigned short *ptr;
unsigned short *ptr2;
@@ -293,7 +298,8 @@
}
}
-static inline void writesl(unsigned int *addr, const void *data, int longlen)
+static inline void writesl(volatile void __iomem *addr, const void *data,
+ unsigned int longlen)
{
unsigned int *ptr;
unsigned int *ptr2;
@@ -307,6 +313,14 @@
longlen--;
}
}
+
+#define readsb readsb
+#define readsw readsw
+#define readsl readsl
+#define writesb writesb
+#define writesw writesw
+#define writesl writesl
+
#endif
#define outb_p(val, port) outb((val), (port))
diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c
index 95c26d8..cbae510 100644
--- a/arch/sandbox/cpu/os.c
+++ b/arch/sandbox/cpu/os.c
@@ -287,6 +287,23 @@
return 0;
}
+int os_mktemp(char *fname, off_t size)
+{
+ int fd;
+
+ fd = mkostemp(fname, O_CLOEXEC);
+ if (fd < 0)
+ return -errno;
+
+ if (unlink(fname) < 0)
+ return -errno;
+
+ if (ftruncate(fd, size))
+ return -errno;
+
+ return fd;
+}
+
/* Restore tty state when we exit */
static struct termios orig_term;
static bool term_setup;
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index c719779..9131eda 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1914,6 +1914,71 @@
compatible = "sandbox,arm-ffa";
};
};
+
+ nand-controller {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "sandbox,nand";
+
+ nand@0 {
+ reg = <0>;
+ nand-ecc-mode = "soft";
+ sandbox,id = [00 e3];
+ sandbox,erasesize = <(8 * 1024)>;
+ sandbox,oobsize = <16>;
+ sandbox,pagesize = <512>;
+ sandbox,pages = <0x2000>;
+ sandbox,err-count = <1>;
+ sandbox,err-step-size = <512>;
+ };
+
+ /* MT29F64G08AKABA */
+ nand@1 {
+ reg = <1>;
+ nand-ecc-mode = "soft_bch";
+ sandbox,id = [2C 48 00 26 89 00 00 00];
+ sandbox,onfi = [
+ 4f 4e 46 49 0e 00 5a 00
+ ff 01 00 00 00 00 03 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 4d 49 43 52 4f 4e 20 20
+ 20 20 20 20 4d 54 32 39
+ 46 36 34 47 30 38 41 4b
+ 41 42 41 43 35 20 20 20
+ 2c 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 10 00 00 e0 00 00 02
+ 00 00 1c 00 80 00 00 00
+ 00 10 00 00 02 23 01 50
+ 00 01 05 01 00 00 04 00
+ 04 01 1e 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 0e 1f 00 1f 00 f4 01 ac
+ 0d 19 00 c8 00 00 00 00
+ 00 00 00 00 00 00 0a 07
+ 19 00 00 00 00 00 00 00
+ 00 00 00 00 01 00 01 00
+ 00 00 04 10 01 81 04 02
+ 02 01 1e 90 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 03 20 7d
+ ];
+ sandbox,erasesize = <(512 * 1024)>;
+ sandbox,oobsize = <224>;
+ sandbox,pagesize = <4096>;
+ sandbox,pages = <0x200000>;
+ sandbox,err-count = <3>;
+ sandbox,err-step-size = <512>;
+ };
+ };
};
#include "sandbox_pmic.dtsi"
diff --git a/arch/sandbox/include/asm/barrier.h b/arch/sandbox/include/asm/barrier.h
new file mode 100644
index 0000000..0928a78
--- /dev/null
+++ b/arch/sandbox/include/asm/barrier.h
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#define nop()
diff --git a/arch/sandbox/include/asm/clk.h b/arch/sandbox/include/asm/clk.h
index df7156f..2b7dbca 100644
--- a/arch/sandbox/include/asm/clk.h
+++ b/arch/sandbox/include/asm/clk.h
@@ -6,7 +6,6 @@
#ifndef __SANDBOX_CLK_H
#define __SANDBOX_CLK_H
-#include <common.h>
#include <clk.h>
#include <dt-structs.h>
#include <linux/clk-provider.h>
diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h
index 31ab728..77a02e5 100644
--- a/arch/sandbox/include/asm/io.h
+++ b/arch/sandbox/include/asm/io.h
@@ -28,20 +28,6 @@
void unmap_physmem(const void *vaddr, unsigned long flags);
#define unmap_physmem unmap_physmem
-#include <asm-generic/io.h>
-
-/* For sandbox, we want addresses to point into our RAM buffer */
-static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
-{
- return map_physmem(paddr, len, MAP_WRBACK);
-}
-
-/* Remove a previous mapping */
-static inline void unmap_sysmem(const void *vaddr)
-{
- unmap_physmem(vaddr, MAP_WRBACK);
-}
-
/* Map from a pointer to our RAM buffer */
phys_addr_t map_to_sysmem(const void *ptr);
@@ -229,5 +215,19 @@
#include <iotrace.h>
#include <asm/types.h>
+#include <asm-generic/io.h>
+
+/* For sandbox, we want addresses to point into our RAM buffer */
+static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
+{
+ return map_physmem(paddr, len, MAP_WRBACK);
+}
+
+/* Remove a previous mapping */
+static inline void unmap_sysmem(const void *vaddr)
+{
+ unmap_physmem(vaddr, MAP_WRBACK);
+}
+
#endif
diff --git a/arch/sandbox/include/asm/mbox.h b/arch/sandbox/include/asm/mbox.h
index 70f36d7..499e9a6 100644
--- a/arch/sandbox/include/asm/mbox.h
+++ b/arch/sandbox/include/asm/mbox.h
@@ -6,8 +6,6 @@
#ifndef __SANDBOX_MBOX_H
#define __SANDBOX_MBOX_H
-#include <common.h>
-
#define SANDBOX_MBOX_PING_XOR 0x12345678
struct udevice;
diff --git a/arch/sandbox/include/asm/power-domain.h b/arch/sandbox/include/asm/power-domain.h
index 1845bc8..4d5e861 100644
--- a/arch/sandbox/include/asm/power-domain.h
+++ b/arch/sandbox/include/asm/power-domain.h
@@ -6,8 +6,6 @@
#ifndef __SANDBOX_POWER_DOMAIN_H
#define __SANDBOX_POWER_DOMAIN_H
-#include <common.h>
-
struct udevice;
int sandbox_power_domain_query(struct udevice *dev, unsigned long id);
diff --git a/arch/sandbox/include/asm/reset.h b/arch/sandbox/include/asm/reset.h
index 40d3e61..f0709b4 100644
--- a/arch/sandbox/include/asm/reset.h
+++ b/arch/sandbox/include/asm/reset.h
@@ -6,8 +6,6 @@
#ifndef __SANDBOX_RESET_H
#define __SANDBOX_RESET_H
-#include <common.h>
-
struct udevice;
int sandbox_reset_query(struct udevice *dev, unsigned long id);
diff --git a/arch/sandbox/include/asm/spl.h b/arch/sandbox/include/asm/spl.h
index f349ea1..4fab24c 100644
--- a/arch/sandbox/include/asm/spl.h
+++ b/arch/sandbox/include/asm/spl.h
@@ -15,6 +15,7 @@
BOOT_DEVICE_CPGMAC,
BOOT_DEVICE_NOR,
BOOT_DEVICE_SPI,
+ BOOT_DEVICE_NAND,
};
/**
diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig
index 178f8ad..085302c 100644
--- a/arch/x86/cpu/coreboot/Kconfig
+++ b/arch/x86/cpu/coreboot/Kconfig
@@ -27,5 +27,7 @@
imply X86_TSC_READ_BASE
imply USE_PREBOOT
select BINMAN if X86_64
+ select SYSINFO
+ imply SYSINFO_EXTRA
endif
diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts
index 0eb31ca..dfce7c2 100644
--- a/arch/x86/dts/coreboot.dts
+++ b/arch/x86/dts/coreboot.dts
@@ -45,4 +45,8 @@
bootph-some-ram;
compatible = "coreboot-fb";
};
+
+ sysinfo {
+ compatible = "coreboot,sysinfo";
+ };
};
diff --git a/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h b/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h
index 05dd1b2..460bfc4 100644
--- a/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h
+++ b/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h
@@ -6,7 +6,6 @@
#ifndef __SLIMBOOTLOADER_ARCH_H__
#define __SLIMBOOTLOADER_ARCH_H__
-#include <common.h>
#include <asm/hob.h>
/**
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h
index 8be1003..c79ec64 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -7,7 +7,6 @@
#ifndef __ASM_X86_DMA_MAPPING_H
#define __ASM_X86_DMA_MAPPING_H
-#include <common.h>
#include <asm/cache.h>
#include <cpu_func.h>
#include <linux/dma-direction.h>
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index 83dc097..5efb2e1 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -202,10 +202,16 @@
__INS(b)
__INS(w)
__INS(l)
+#define insb insb
+#define insw insw
+#define insl insl
__OUTS(b)
__OUTS(w)
__OUTS(l)
+#define outsb outsb
+#define outsw outsw
+#define outsl outsl
/* IO space accessors */
#define clrio(type, addr, clear) \
diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h
index 76a646e..87ad9fa 100644
--- a/arch/xtensa/include/asm/io.h
+++ b/arch/xtensa/include/asm/io.h
@@ -76,6 +76,12 @@
void outsb(unsigned long port, const void *src, unsigned long count);
void outsw(unsigned long port, const void *src, unsigned long count);
void outsl(unsigned long port, const void *src, unsigned long count);
+#define insb insb
+#define insw insw
+#define insl insl
+#define outsb outsb
+#define outsw outsw
+#define outsl outsl
#define IO_SPACE_LIMIT ~0
diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c
index 63b8699..3489bdd 100644
--- a/board/CZ.NIC/turris_mox/turris_mox.c
+++ b/board/CZ.NIC/turris_mox/turris_mox.c
@@ -562,7 +562,7 @@
}
}
-int show_board_info(void)
+int checkboard(void)
{
int i, ret, board_version, ram_size, is_sd;
const char *pub_key, *model;
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c
index 19c5043..adeb69a 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -962,7 +962,7 @@
return 0;
}
-int show_board_info(void)
+int checkboard(void)
{
char serial[17];
int err;
diff --git a/board/ti/beagle/Kconfig b/board/beagle/beagle/Kconfig
similarity index 87%
rename from board/ti/beagle/Kconfig
rename to board/beagle/beagle/Kconfig
index c2eff9e..eade599 100644
--- a/board/ti/beagle/Kconfig
+++ b/board/beagle/beagle/Kconfig
@@ -4,7 +4,7 @@
default "beagle"
config SYS_VENDOR
- default "ti"
+ default "beagle"
config SYS_CONFIG_NAME
default "omap3_beagle"
diff --git a/board/ti/beagle/MAINTAINERS b/board/beagle/beagle/MAINTAINERS
similarity index 84%
rename from board/ti/beagle/MAINTAINERS
rename to board/beagle/beagle/MAINTAINERS
index c1d81d4..c7fa87a 100644
--- a/board/ti/beagle/MAINTAINERS
+++ b/board/beagle/beagle/MAINTAINERS
@@ -1,6 +1,6 @@
BEAGLE BOARD
M: Tom Rini <trini@konsulko.com>
S: Maintained
-F: board/ti/beagle/
+F: board/beagle/beagle/
F: include/configs/omap3_beagle.h
F: configs/omap3_beagle_defconfig
diff --git a/board/ti/beagle/Makefile b/board/beagle/beagle/Makefile
similarity index 100%
rename from board/ti/beagle/Makefile
rename to board/beagle/beagle/Makefile
diff --git a/board/ti/beagle/beagle.c b/board/beagle/beagle/beagle.c
similarity index 100%
rename from board/ti/beagle/beagle.c
rename to board/beagle/beagle/beagle.c
diff --git a/board/ti/beagle/beagle.h b/board/beagle/beagle/beagle.h
similarity index 100%
rename from board/ti/beagle/beagle.h
rename to board/beagle/beagle/beagle.h
diff --git a/board/ti/beagle/led.c b/board/beagle/beagle/led.c
similarity index 100%
rename from board/ti/beagle/led.c
rename to board/beagle/beagle/led.c
diff --git a/board/beagle/beagleboneai64/Kconfig b/board/beagle/beagleboneai64/Kconfig
new file mode 100644
index 0000000..7cfccf9
--- /dev/null
+++ b/board/beagle/beagleboneai64/Kconfig
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+# Copyright (C) 2022-2023 Jason Kridner, BeagleBoard.org Foundation
+# Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation
+#
+
+choice
+ prompt "BeagleBoard.org J721E/TDA4VM based BeagleBone AI-64 board"
+ optional
+
+config TARGET_J721E_A72_BEAGLEBONEAI64
+ bool "BeagleBoard.org J721E BeagleBone AI-64 running on A72"
+ select ARM64
+ select SYS_DISABLE_DCACHE_OPS
+ select BINMAN
+
+config TARGET_J721E_R5_BEAGLEBONEAI64
+ bool "BeagleBoard.org J721E BeagleBone AI-64 running on R5"
+ select CPU_V7R
+ select SYS_THUMB_BUILD
+ select K3_LOAD_SYSFW
+ select RAM
+ select SPL_RAM
+ select K3_DDRSS
+ select BINMAN
+ imply SYS_K3_SPL_ATF
+
+endchoice
+
+if TARGET_J721E_A72_BEAGLEBONEAI64
+
+config SYS_BOARD
+ default "beagleboneai64"
+
+config SYS_VENDOR
+ default "beagle"
+
+config SYS_CONFIG_NAME
+ default "j721e_evm"
+
+source "board/ti/common/Kconfig"
+
+endif
+
+if TARGET_J721E_R5_BEAGLEBONEAI64
+
+config SYS_BOARD
+ default "beagleboneai64"
+
+config SYS_VENDOR
+ default "beagle"
+
+config SYS_CONFIG_NAME
+ default "j721e_evm"
+
+source "board/ti/common/Kconfig"
+
+endif
diff --git a/board/beagle/beagleboneai64/MAINTAINERS b/board/beagle/beagleboneai64/MAINTAINERS
new file mode 100644
index 0000000..5866dcd
--- /dev/null
+++ b/board/beagle/beagleboneai64/MAINTAINERS
@@ -0,0 +1,6 @@
+BEAGLEBONE-AI64 BOARD
+M: Nishanth Menon <nm@ti.com>
+M: Robert Nelson <robertcnelson@gmail.com>
+M: Tom Rini <trini@konsulko.com>
+S: Maintained
+N: beagleboneai64
diff --git a/board/beagle/beagleboneai64/Makefile b/board/beagle/beagleboneai64/Makefile
new file mode 100644
index 0000000..f2a2526
--- /dev/null
+++ b/board/beagle/beagleboneai64/Makefile
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# https://beagleboard.org/ai-64
+#
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+# Copyright (C) 2022-2023 Jason Kridner, BeagleBoard.org Foundation
+# Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation
+#
+
+obj-y += beagleboneai64.o
diff --git a/board/beagle/beagleboneai64/beagleboneai64.c b/board/beagle/beagleboneai64/beagleboneai64.c
new file mode 100644
index 0000000..c8c1c78
--- /dev/null
+++ b/board/beagle/beagleboneai64/beagleboneai64.c
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * https://beagleboard.org/ai-64
+ *
+ * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2022-2023 Jason Kridner, BeagleBoard.org Foundation
+ * Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation
+ */
+
+#include <cpu_func.h>
+#include <env.h>
+#include <fdt_support.h>
+#include <spl.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+ return fdtdec_setup_memory_banksize();
+}
diff --git a/board/ti/am62x/beagleplay.env b/board/beagle/beagleboneai64/beagleboneai64.env
similarity index 100%
copy from board/ti/am62x/beagleplay.env
copy to board/beagle/beagleboneai64/beagleboneai64.env
diff --git a/board/beagle/beagleboneai64/board-cfg.yaml b/board/beagle/beagleboneai64/board-cfg.yaml
new file mode 100644
index 0000000..1375dca
--- /dev/null
+++ b/board/beagle/beagleboneai64/board-cfg.yaml
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for J721E
+#
+
+---
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable: 0x5A
+ main_isolation_hostid: 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor: 0x1
+ scaling_profile: 0x1
+ disable_main_nav_secure_proxy: 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size: 0x0
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables: 0x00
+ trace_src_enables: 0x00
diff --git a/board/beagle/beagleboneai64/pm-cfg.yaml b/board/beagle/beagleboneai64/pm-cfg.yaml
new file mode 100644
index 0000000..7ae52b3
--- /dev/null
+++ b/board/beagle/beagleboneai64/pm-cfg.yaml
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Power management configuration for J721E
+#
+
+---
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
diff --git a/board/beagle/beagleboneai64/rm-cfg.yaml b/board/beagle/beagleboneai64/rm-cfg.yaml
new file mode 100644
index 0000000..9f604cf
--- /dev/null
+++ b/board/beagle/beagleboneai64/rm-cfg.yaml
@@ -0,0 +1,3174 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Resource management configuration for J721E
+#
+
+---
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size: 356
+ host_cfg_entries:
+ - #1
+ host_id: 3
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #2
+ host_id: 5
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #3
+ host_id: 12
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #4
+ host_id: 13
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #5
+ host_id: 21
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #6
+ host_id: 26
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #7
+ host_id: 28
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #8
+ host_id: 35
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #9
+ host_id: 37
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #10
+ host_id: 40
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #11
+ host_id: 42
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #12
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #13
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #14
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #15
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #16
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #17
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #18
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #19
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #20
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #21
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #22
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #23
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #24
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #25
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #26
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #27
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #28
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #29
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #30
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #31
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #32
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size: 8
+ resasg_entries_size: 3344
+ reserved: 0
+ resasg_entries:
+ -
+ start_resource: 4
+ num_resource: 93
+ type: 7744
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 93
+ type: 7808
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 32
+ type: 7872
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 32
+ type: 8192
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 32
+ type: 8192
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 24
+ type: 8320
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 24
+ type: 8320
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 8384
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 8384
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 8384
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 8384
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 4
+ type: 8384
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 8384
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 4
+ type: 8384
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 4
+ type: 8384
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 40
+ num_resource: 12
+ type: 8384
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 52
+ num_resource: 12
+ type: 8384
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 128
+ type: 8576
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 128
+ num_resource: 128
+ type: 8576
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 128
+ type: 8640
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 128
+ num_resource: 128
+ type: 8640
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 48
+ type: 8704
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 8768
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 8768
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 6
+ type: 8768
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 6
+ type: 8768
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 2
+ type: 8768
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 30
+ num_resource: 2
+ type: 8768
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 64
+ type: 13258
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 20480
+ num_resource: 1024
+ type: 13261
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 64
+ type: 13322
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 22528
+ num_resource: 1024
+ type: 13325
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 38
+ num_resource: 86
+ type: 13386
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 124
+ num_resource: 32
+ type: 13386
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 156
+ num_resource: 12
+ type: 13386
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 168
+ num_resource: 12
+ type: 13386
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 180
+ num_resource: 12
+ type: 13386
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 192
+ num_resource: 12
+ type: 13386
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 204
+ num_resource: 12
+ type: 13386
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 216
+ num_resource: 28
+ type: 13386
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 244
+ num_resource: 8
+ type: 13386
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 252
+ num_resource: 4
+ type: 13386
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 38
+ num_resource: 1024
+ type: 13389
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 1062
+ num_resource: 512
+ type: 13389
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 1574
+ num_resource: 32
+ type: 13389
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 1606
+ num_resource: 32
+ type: 13389
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 1638
+ num_resource: 256
+ type: 13389
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 1894
+ num_resource: 256
+ type: 13389
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 2150
+ num_resource: 256
+ type: 13389
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 2406
+ num_resource: 256
+ type: 13389
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 2662
+ num_resource: 256
+ type: 13389
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 2918
+ num_resource: 512
+ type: 13389
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 3430
+ num_resource: 256
+ type: 13389
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 3686
+ num_resource: 922
+ type: 13389
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 13440
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 13440
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 4
+ type: 13440
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 4
+ type: 13440
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 13440
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 13440
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 4
+ type: 13440
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 13440
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 4
+ type: 13440
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 12
+ type: 13440
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 4
+ type: 13440
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 52
+ num_resource: 12
+ type: 13440
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 13504
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 440
+ num_resource: 150
+ type: 13505
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 590
+ num_resource: 40
+ type: 13505
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 630
+ num_resource: 6
+ type: 13505
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 636
+ num_resource: 6
+ type: 13505
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 642
+ num_resource: 10
+ type: 13505
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 652
+ num_resource: 10
+ type: 13505
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 662
+ num_resource: 32
+ type: 13505
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 694
+ num_resource: 38
+ type: 13505
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 732
+ num_resource: 12
+ type: 13505
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 744
+ num_resource: 182
+ type: 13505
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 926
+ num_resource: 40
+ type: 13505
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 966
+ num_resource: 8
+ type: 13505
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 316
+ num_resource: 8
+ type: 13506
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 324
+ num_resource: 2
+ type: 13506
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 324
+ num_resource: 0
+ type: 13506
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 326
+ num_resource: 2
+ type: 13506
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 328
+ num_resource: 2
+ type: 13506
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 330
+ num_resource: 2
+ type: 13506
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 332
+ num_resource: 2
+ type: 13506
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 334
+ num_resource: 8
+ type: 13506
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 342
+ num_resource: 2
+ type: 13506
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 344
+ num_resource: 4
+ type: 13506
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 348
+ num_resource: 1
+ type: 13506
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 349
+ num_resource: 47
+ type: 13506
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 396
+ num_resource: 1
+ type: 13506
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 397
+ num_resource: 4
+ type: 13506
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 401
+ num_resource: 4
+ type: 13506
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 405
+ num_resource: 4
+ type: 13506
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 409
+ num_resource: 8
+ type: 13506
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 417
+ num_resource: 6
+ type: 13506
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 423
+ num_resource: 16
+ type: 13506
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 439
+ num_resource: 1
+ type: 13506
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 13507
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 13507
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 0
+ type: 13507
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 2
+ type: 13507
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 2
+ type: 13507
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 30
+ num_resource: 2
+ type: 13507
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 2
+ type: 13507
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 8
+ type: 13507
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 42
+ num_resource: 2
+ type: 13507
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 4
+ type: 13507
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 1
+ type: 13507
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 49
+ num_resource: 47
+ type: 13507
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 96
+ num_resource: 1
+ type: 13507
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 97
+ num_resource: 4
+ type: 13507
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 101
+ num_resource: 4
+ type: 13507
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 105
+ num_resource: 4
+ type: 13507
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 109
+ num_resource: 8
+ type: 13507
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 117
+ num_resource: 6
+ type: 13507
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 123
+ num_resource: 10
+ type: 13507
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 133
+ num_resource: 6
+ type: 13507
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 139
+ num_resource: 1
+ type: 13507
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 140
+ num_resource: 16
+ type: 13508
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 156
+ num_resource: 6
+ type: 13508
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 162
+ num_resource: 6
+ type: 13508
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 168
+ num_resource: 2
+ type: 13508
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 170
+ num_resource: 2
+ type: 13508
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 172
+ num_resource: 96
+ type: 13508
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 268
+ num_resource: 32
+ type: 13508
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 304
+ num_resource: 0
+ type: 13509
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 304
+ num_resource: 4
+ type: 13509
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 304
+ num_resource: 0
+ type: 13509
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 308
+ num_resource: 6
+ type: 13509
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 314
+ num_resource: 2
+ type: 13509
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 300
+ num_resource: 0
+ type: 13510
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 300
+ num_resource: 2
+ type: 13510
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 300
+ num_resource: 0
+ type: 13510
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 302
+ num_resource: 2
+ type: 13510
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 0
+ type: 13511
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 13511
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 0
+ type: 13511
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 6
+ type: 13511
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 2
+ type: 13511
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 13512
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 13512
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 13512
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 13512
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 5
+ type: 13514
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 1
+ type: 13514
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 3
+ type: 13515
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 2
+ type: 13515
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 1
+ type: 13515
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 1
+ type: 13515
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 3
+ type: 13515
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 13515
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 13515
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 13515
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 3
+ type: 13515
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 6
+ type: 13515
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 3
+ type: 13515
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 31
+ num_resource: 1
+ type: 13515
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 140
+ num_resource: 16
+ type: 13568
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 156
+ num_resource: 16
+ type: 13568
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 172
+ num_resource: 128
+ type: 13568
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 13569
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 49152
+ num_resource: 1024
+ type: 13570
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 13571
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 13578
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 13578
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 0
+ type: 13578
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 2
+ type: 13578
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 2
+ type: 13578
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 30
+ num_resource: 2
+ type: 13578
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 2
+ type: 13578
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 8
+ type: 13578
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 42
+ num_resource: 2
+ type: 13578
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 4
+ type: 13578
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 1
+ type: 13578
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 49
+ num_resource: 47
+ type: 13578
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 96
+ num_resource: 1
+ type: 13578
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 97
+ num_resource: 4
+ type: 13578
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 101
+ num_resource: 4
+ type: 13578
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 105
+ num_resource: 4
+ type: 13578
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 109
+ num_resource: 8
+ type: 13578
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 117
+ num_resource: 6
+ type: 13578
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 123
+ num_resource: 16
+ type: 13578
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 139
+ num_resource: 1
+ type: 13578
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 0
+ type: 13579
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 13579
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 0
+ type: 13579
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 6
+ type: 13579
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 2
+ type: 13579
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 13580
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 13580
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 13580
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 13580
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 13581
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 13581
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 0
+ type: 13581
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 2
+ type: 13581
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 2
+ type: 13581
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 30
+ num_resource: 2
+ type: 13581
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 2
+ type: 13581
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 8
+ type: 13581
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 42
+ num_resource: 2
+ type: 13581
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 4
+ type: 13581
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 1
+ type: 13581
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 49
+ num_resource: 47
+ type: 13581
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 96
+ num_resource: 1
+ type: 13581
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 97
+ num_resource: 4
+ type: 13581
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 101
+ num_resource: 4
+ type: 13581
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 105
+ num_resource: 4
+ type: 13581
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 109
+ num_resource: 8
+ type: 13581
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 117
+ num_resource: 6
+ type: 13581
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 123
+ num_resource: 10
+ type: 13581
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 133
+ num_resource: 6
+ type: 13581
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 139
+ num_resource: 1
+ type: 13581
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 140
+ num_resource: 16
+ type: 13582
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 156
+ num_resource: 6
+ type: 13582
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 162
+ num_resource: 6
+ type: 13582
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 168
+ num_resource: 2
+ type: 13582
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 170
+ num_resource: 2
+ type: 13582
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 172
+ num_resource: 96
+ type: 13582
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 268
+ num_resource: 32
+ type: 13582
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 0
+ type: 13583
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 13583
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 0
+ type: 13583
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 6
+ type: 13583
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 2
+ type: 13583
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 13584
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 13584
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 13584
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 13584
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 100
+ type: 13632
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 110
+ num_resource: 32
+ type: 13632
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 142
+ num_resource: 46
+ type: 13632
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 196
+ num_resource: 28
+ type: 13632
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 228
+ num_resource: 28
+ type: 13632
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 260
+ num_resource: 28
+ type: 13632
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 292
+ num_resource: 28
+ type: 13632
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 320
+ num_resource: 24
+ type: 13632
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 352
+ num_resource: 24
+ type: 13632
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 400
+ num_resource: 4
+ type: 13632
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 404
+ num_resource: 4
+ type: 13632
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 32
+ type: 14922
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 16
+ type: 14922
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 64
+ num_resource: 64
+ type: 14922
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 128
+ num_resource: 4
+ type: 14922
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 132
+ num_resource: 16
+ type: 14922
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 148
+ num_resource: 16
+ type: 14922
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 164
+ num_resource: 8
+ type: 14922
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 172
+ num_resource: 8
+ type: 14922
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 180
+ num_resource: 8
+ type: 14922
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 188
+ num_resource: 24
+ type: 14922
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 212
+ num_resource: 8
+ type: 14922
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 220
+ num_resource: 36
+ type: 14922
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 16400
+ num_resource: 128
+ type: 14925
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 16528
+ num_resource: 128
+ type: 14925
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 16656
+ num_resource: 256
+ type: 14925
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 16912
+ num_resource: 64
+ type: 14925
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 16976
+ num_resource: 128
+ type: 14925
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 17104
+ num_resource: 128
+ type: 14925
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 17232
+ num_resource: 64
+ type: 14925
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 17296
+ num_resource: 64
+ type: 14925
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 17360
+ num_resource: 64
+ type: 14925
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 17424
+ num_resource: 128
+ type: 14925
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 17552
+ num_resource: 128
+ type: 14925
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 17680
+ num_resource: 240
+ type: 14925
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 4
+ type: 14976
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 4
+ type: 14976
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 4
+ type: 14976
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 4
+ type: 14976
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 17
+ num_resource: 4
+ type: 14976
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 21
+ num_resource: 4
+ type: 14976
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 25
+ num_resource: 4
+ type: 14976
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 29
+ num_resource: 4
+ type: 14976
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 33
+ num_resource: 4
+ type: 14976
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 37
+ num_resource: 16
+ type: 14976
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 53
+ num_resource: 4
+ type: 14976
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 57
+ num_resource: 7
+ type: 14976
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15040
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 96
+ num_resource: 20
+ type: 15041
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 116
+ num_resource: 8
+ type: 15041
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 124
+ num_resource: 32
+ type: 15041
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 156
+ num_resource: 12
+ type: 15041
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 168
+ num_resource: 8
+ type: 15041
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 176
+ num_resource: 8
+ type: 15041
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 184
+ num_resource: 8
+ type: 15041
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 192
+ num_resource: 8
+ type: 15041
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 200
+ num_resource: 8
+ type: 15041
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 208
+ num_resource: 16
+ type: 15041
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 224
+ num_resource: 8
+ type: 15041
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 232
+ num_resource: 20
+ type: 15041
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 50
+ num_resource: 4
+ type: 15042
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 54
+ num_resource: 2
+ type: 15042
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 54
+ num_resource: 0
+ type: 15042
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 56
+ num_resource: 0
+ type: 15042
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 56
+ num_resource: 1
+ type: 15042
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 57
+ num_resource: 1
+ type: 15042
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 58
+ num_resource: 1
+ type: 15042
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 59
+ num_resource: 1
+ type: 15042
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 60
+ num_resource: 1
+ type: 15042
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 61
+ num_resource: 1
+ type: 15042
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 62
+ num_resource: 1
+ type: 15042
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 63
+ num_resource: 9
+ type: 15042
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 6
+ type: 15042
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 78
+ num_resource: 3
+ type: 15042
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 81
+ num_resource: 2
+ type: 15042
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 83
+ num_resource: 1
+ type: 15042
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 84
+ num_resource: 1
+ type: 15042
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 85
+ num_resource: 1
+ type: 15042
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 86
+ num_resource: 1
+ type: 15042
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 87
+ num_resource: 1
+ type: 15042
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 88
+ num_resource: 2
+ type: 15042
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 90
+ num_resource: 1
+ type: 15042
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 91
+ num_resource: 2
+ type: 15042
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 4
+ type: 15043
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 2
+ type: 15043
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 0
+ type: 15043
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 0
+ type: 15043
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 1
+ type: 15043
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 1
+ type: 15043
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 1
+ type: 15043
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 1
+ type: 15043
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 1
+ type: 15043
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 1
+ type: 15043
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 1
+ type: 15043
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 15
+ num_resource: 9
+ type: 15043
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 6
+ type: 15043
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 30
+ num_resource: 3
+ type: 15043
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 33
+ num_resource: 2
+ type: 15043
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 35
+ num_resource: 1
+ type: 15043
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 1
+ type: 15043
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 37
+ num_resource: 1
+ type: 15043
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 38
+ num_resource: 1
+ type: 15043
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 39
+ num_resource: 1
+ type: 15043
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 40
+ num_resource: 2
+ type: 15043
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 42
+ num_resource: 1
+ type: 15043
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 43
+ num_resource: 3
+ type: 15043
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 0
+ type: 15045
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 2
+ type: 15045
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15047
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 15047
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 5
+ type: 15050
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 1
+ type: 15050
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 3
+ type: 15051
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 2
+ type: 15051
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 3
+ type: 15051
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 3
+ type: 15051
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 3
+ type: 15051
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 3
+ type: 15051
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 17
+ num_resource: 3
+ type: 15051
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 3
+ type: 15051
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 23
+ num_resource: 3
+ type: 15051
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 3
+ type: 15051
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 29
+ num_resource: 3
+ type: 15051
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 8
+ type: 15104
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 56
+ num_resource: 4
+ type: 15104
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 60
+ num_resource: 8
+ type: 15104
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 68
+ num_resource: 4
+ type: 15104
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 4
+ type: 15104
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 76
+ num_resource: 4
+ type: 15104
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 80
+ num_resource: 8
+ type: 15104
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 88
+ num_resource: 4
+ type: 15104
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 92
+ num_resource: 4
+ type: 15104
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15105
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 56320
+ num_resource: 256
+ type: 15106
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15107
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 4
+ type: 15114
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 2
+ type: 15114
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 0
+ type: 15114
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 0
+ type: 15114
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 1
+ type: 15114
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 1
+ type: 15114
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 1
+ type: 15114
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 1
+ type: 15114
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 1
+ type: 15114
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 1
+ type: 15114
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 1
+ type: 15114
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 15
+ num_resource: 9
+ type: 15114
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 6
+ type: 15114
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 30
+ num_resource: 3
+ type: 15114
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 33
+ num_resource: 2
+ type: 15114
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 35
+ num_resource: 1
+ type: 15114
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 1
+ type: 15114
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 37
+ num_resource: 1
+ type: 15114
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 38
+ num_resource: 1
+ type: 15114
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 39
+ num_resource: 1
+ type: 15114
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 40
+ num_resource: 2
+ type: 15114
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 42
+ num_resource: 1
+ type: 15114
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 43
+ num_resource: 2
+ type: 15114
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15115
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 15115
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 4
+ type: 15117
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 2
+ type: 15117
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 0
+ type: 15117
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 0
+ type: 15117
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 1
+ type: 15117
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 1
+ type: 15117
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 1
+ type: 15117
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 1
+ type: 15117
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 1
+ type: 15117
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 1
+ type: 15117
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 1
+ type: 15117
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 15
+ num_resource: 9
+ type: 15117
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 6
+ type: 15117
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 30
+ num_resource: 3
+ type: 15117
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 33
+ num_resource: 2
+ type: 15117
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 35
+ num_resource: 1
+ type: 15117
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 1
+ type: 15117
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 37
+ num_resource: 1
+ type: 15117
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 38
+ num_resource: 1
+ type: 15117
+ host_id: 26
+ reserved: 0
+
+ -
+ start_resource: 39
+ num_resource: 1
+ type: 15117
+ host_id: 28
+ reserved: 0
+
+ -
+ start_resource: 40
+ num_resource: 2
+ type: 15117
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 42
+ num_resource: 1
+ type: 15117
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 43
+ num_resource: 3
+ type: 15117
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15119
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 15119
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 20
+ type: 15168
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 28
+ type: 15168
+ host_id: 5
+ reserved: 0
diff --git a/board/beagle/beagleboneai64/sec-cfg.yaml b/board/beagle/beagleboneai64/sec-cfg.yaml
new file mode 100644
index 0000000..1eab588
--- /dev/null
+++ b/board/beagle/beagleboneai64/sec-cfg.yaml
@@ -0,0 +1,380 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Security configuration for J721E
+#
+
+---
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ write_host_id: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci: 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size: 0
+ auth_resource_owner: 0
+ enable_saul_psil_global_config_writes: 0
+ rsvd: [0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock: 0x5A
+ allow_wildcard_unlock: 0x5A
+ allowed_debug_level_rsvd: 0
+ rsvd: 0
+ min_cert_rev: 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender: 0
+ handover_to_host_id: 0
+ rsvd: [0, 0, 0, 0]
diff --git a/board/beagle/beagleplay/Kconfig b/board/beagle/beagleplay/Kconfig
new file mode 100644
index 0000000..7dbd833
--- /dev/null
+++ b/board/beagle/beagleplay/Kconfig
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+# Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation
+#
+
+choice
+ prompt "BeagleBoard.org AM625 based BeaglePlay board"
+ optional
+
+config TARGET_AM625_A53_BEAGLEPLAY
+ bool "BeagleBoard.org AM625 BeaglePlay running on A53"
+ select ARM64
+ select BINMAN
+
+config TARGET_AM625_R5_BEAGLEPLAY
+ bool "BeagleBoard.org AM625 BeaglePlay running on R5"
+ select CPU_V7R
+ select SYS_THUMB_BUILD
+ select K3_LOAD_SYSFW
+ select RAM
+ select SPL_RAM
+ select K3_DDRSS
+ select BINMAN
+ imply SYS_K3_SPL_ATF
+
+endchoice
+
+if TARGET_AM625_A53_BEAGLEPLAY
+
+config SYS_BOARD
+ default "beagleplay"
+
+config SYS_VENDOR
+ default "beagle"
+
+config SYS_CONFIG_NAME
+ default "am62x_evm"
+
+source "board/ti/common/Kconfig"
+
+endif
+
+if TARGET_AM625_R5_BEAGLEPLAY
+
+config SYS_BOARD
+ default "beagleplay"
+
+config SYS_VENDOR
+ default "beagle"
+
+config SYS_CONFIG_NAME
+ default "am62x_evm"
+
+config SPL_LDSCRIPT
+ default "arch/arm/mach-omap2/u-boot-spl.lds"
+
+source "board/ti/common/Kconfig"
+
+endif
diff --git a/board/beagle/beagleplay/MAINTAINERS b/board/beagle/beagleplay/MAINTAINERS
new file mode 100644
index 0000000..eed996a
--- /dev/null
+++ b/board/beagle/beagleplay/MAINTAINERS
@@ -0,0 +1,6 @@
+BEAGLEPLAY BOARD
+M: Nishanth Menon <nm@ti.com>
+M: Robert Nelson <robertcnelson@gmail.com>
+M: Tom Rini <trini@konsulko.com>
+S: Maintained
+N: beagleplay
diff --git a/board/beagle/beagleplay/Makefile b/board/beagle/beagleplay/Makefile
new file mode 100644
index 0000000..b7a3cdb
--- /dev/null
+++ b/board/beagle/beagleplay/Makefile
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# https://beagleboard.org/play
+#
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+# Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation
+#
+
+obj-y += beagleplay.o
diff --git a/board/beagle/beagleplay/beagleplay.c b/board/beagle/beagleplay/beagleplay.c
new file mode 100644
index 0000000..1c376de
--- /dev/null
+++ b/board/beagle/beagleplay/beagleplay.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * https://beagleplay.org/
+ *
+ * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation
+ */
+
+#include <cpu_func.h>
+#include <env.h>
+#include <fdt_support.h>
+#include <spl.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+ return fdtdec_setup_memory_banksize();
+}
diff --git a/board/ti/am62x/beagleplay.env b/board/beagle/beagleplay/beagleplay.env
similarity index 100%
rename from board/ti/am62x/beagleplay.env
rename to board/beagle/beagleplay/beagleplay.env
diff --git a/board/beagle/beagleplay/board-cfg.yaml b/board/beagle/beagleplay/board-cfg.yaml
new file mode 100644
index 0000000..36cfb55
--- /dev/null
+++ b/board/beagle/beagleplay/board-cfg.yaml
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for AM62
+#
+
+---
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable : 0x5A
+ main_isolation_hostid : 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor : 0x1
+ scaling_profile : 0x1
+ disable_main_nav_secure_proxy : 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size : 0x0
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables : 0x00
+ trace_src_enables : 0x00
diff --git a/board/beagle/beagleplay/pm-cfg.yaml b/board/beagle/beagleplay/pm-cfg.yaml
new file mode 100644
index 0000000..5d04cf8
--- /dev/null
+++ b/board/beagle/beagleplay/pm-cfg.yaml
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Power management configuration for AM62
+#
+
+---
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
diff --git a/board/beagle/beagleplay/rm-cfg.yaml b/board/beagle/beagleplay/rm-cfg.yaml
new file mode 100644
index 0000000..c28707b
--- /dev/null
+++ b/board/beagle/beagleplay/rm-cfg.yaml
@@ -0,0 +1,1088 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Resource management configuration for AM62
+#
+
+---
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size : 356
+ host_cfg_entries:
+ - #1
+ host_id: 12
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #2
+ host_id: 30
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #3
+ host_id: 36
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #4
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #5
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #6
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #7
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #8
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #9
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #10
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #11
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #12
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #13
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #14
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #15
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #16
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #17
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #18
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #19
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #20
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #21
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #22
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #23
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #24
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #25
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #26
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #27
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #28
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #29
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #30
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #31
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #32
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size : 8
+ resasg_entries_size: 960
+ reserved : 0
+ resasg_entries:
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 64
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 22
+ type: 64
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 192
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 2
+ type: 192
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 320
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 320
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 26
+ type: 384
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 50176
+ num_resource: 164
+ type: 1666
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 1667
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 18
+ type: 1677
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 1677
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 1677
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 1677
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 6
+ type: 1677
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 54
+ num_resource: 18
+ type: 1678
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 6
+ type: 1678
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 6
+ type: 1678
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 78
+ num_resource: 2
+ type: 1678
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 80
+ num_resource: 2
+ type: 1678
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 12
+ type: 1679
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 6
+ type: 1679
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 6
+ type: 1679
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 50
+ num_resource: 2
+ type: 1679
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 52
+ num_resource: 2
+ type: 1679
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 18
+ type: 1696
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 1696
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 1696
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 1696
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 6
+ type: 1696
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 18
+ type: 1697
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 1697
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 1697
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 1697
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 2
+ type: 1697
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 12
+ type: 1698
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 6
+ type: 1698
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 6
+ type: 1698
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 2
+ type: 1698
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 2
+ type: 1698
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 35
+ type: 1802
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 36
+ type: 1802
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 36
+ type: 1802
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 168
+ num_resource: 8
+ type: 1802
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 512
+ type: 1805
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 525
+ num_resource: 256
+ type: 1805
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 525
+ num_resource: 256
+ type: 1805
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 781
+ num_resource: 128
+ type: 1805
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 909
+ num_resource: 627
+ type: 1805
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1024
+ type: 1807
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4096
+ num_resource: 29
+ type: 1808
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4608
+ num_resource: 99
+ type: 1809
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 5120
+ num_resource: 24
+ type: 1810
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 5632
+ num_resource: 51
+ type: 1811
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 6144
+ num_resource: 51
+ type: 1812
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 6656
+ num_resource: 51
+ type: 1813
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 8192
+ num_resource: 32
+ type: 1814
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 8704
+ num_resource: 32
+ type: 1815
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 9216
+ num_resource: 32
+ type: 1816
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 9728
+ num_resource: 22
+ type: 1817
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 10240
+ num_resource: 22
+ type: 1818
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 10752
+ num_resource: 22
+ type: 1819
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 11264
+ num_resource: 28
+ type: 1820
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 11776
+ num_resource: 28
+ type: 1821
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 12288
+ num_resource: 28
+ type: 1822
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 1923
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 1936
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1936
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1936
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 1936
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 1936
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 64
+ type: 1937
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 64
+ type: 1937
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 83
+ num_resource: 8
+ type: 1938
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 91
+ num_resource: 8
+ type: 1939
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 99
+ num_resource: 10
+ type: 1942
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 109
+ num_resource: 3
+ type: 1942
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 109
+ num_resource: 3
+ type: 1942
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 112
+ num_resource: 3
+ type: 1942
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 115
+ num_resource: 3
+ type: 1942
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 118
+ num_resource: 16
+ type: 1943
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 118
+ num_resource: 16
+ type: 1943
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 134
+ num_resource: 8
+ type: 1944
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 134
+ num_resource: 8
+ type: 1945
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 142
+ num_resource: 8
+ type: 1946
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 142
+ num_resource: 8
+ type: 1947
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 1955
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1955
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1955
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 1955
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 1955
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 8
+ type: 1956
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 8
+ type: 1956
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 27
+ num_resource: 1
+ type: 1957
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 1
+ type: 1958
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 1961
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1961
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1961
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 1961
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 1961
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 1962
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1962
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1962
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 1962
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 1962
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 1
+ type: 1963
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 1
+ type: 1963
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 16
+ type: 1964
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 16
+ type: 1964
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 1
+ type: 1965
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 35
+ num_resource: 8
+ type: 1966
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 21
+ num_resource: 1
+ type: 1967
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 35
+ num_resource: 8
+ type: 1968
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 1
+ type: 1969
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 43
+ num_resource: 8
+ type: 1970
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 23
+ num_resource: 1
+ type: 1971
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 43
+ num_resource: 8
+ type: 1972
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 2112
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 2122
+ host_id: 12
+ reserved: 0
diff --git a/board/beagle/beagleplay/sec-cfg.yaml b/board/beagle/beagleplay/sec-cfg.yaml
new file mode 100644
index 0000000..07081ce
--- /dev/null
+++ b/board/beagle/beagleplay/sec-cfg.yaml
@@ -0,0 +1,379 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Security management configuration for AM62
+#
+
+---
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ write_host_id : 0
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci : 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size : 0
+ auth_resource_owner: 0
+ enable_saul_psil_global_config_writes: 0x5A
+ rsvd: [0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock : 0x5A
+ allow_wildcard_unlock : 0x5A
+ allowed_debug_level_rsvd: 0
+ rsvd: 0
+ min_cert_rev : 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender : 0
+ handover_to_host_id : 0
+ rsvd: [0, 0, 0, 0]
diff --git a/board/coreboot/coreboot/Makefile b/board/coreboot/coreboot/Makefile
index d292b70..75bfbd1 100644
--- a/board/coreboot/coreboot/Makefile
+++ b/board/coreboot/coreboot/Makefile
@@ -11,3 +11,4 @@
# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
obj-y += coreboot.o
+obj-$(CONFIG_$(SPL_TPL_)SMBIOS_PARSER) += sysinfo.o
diff --git a/board/coreboot/coreboot/coreboot.c b/board/coreboot/coreboot/coreboot.c
index db855c1..e58dce3 100644
--- a/board/coreboot/coreboot/coreboot.c
+++ b/board/coreboot/coreboot/coreboot.c
@@ -23,50 +23,6 @@
return 0;
}
-#ifdef CONFIG_SMBIOS_PARSER
-int show_board_info(void)
-{
- const struct smbios_entry *smbios = smbios_entry(lib_sysinfo.smbios_start, lib_sysinfo.smbios_size);
-
- if (!smbios)
- goto fallback;
-
- const struct smbios_header *bios = smbios_header(smbios, SMBIOS_BIOS_INFORMATION);
- const struct smbios_header *system = smbios_header(smbios, SMBIOS_SYSTEM_INFORMATION);
- const struct smbios_type0 *t0 = (struct smbios_type0 *)bios;
- const struct smbios_type1 *t1 = (struct smbios_type1 *)system;
-
- if (!t0 || !t1)
- goto fallback;
-
- const char *bios_ver = smbios_string(bios, t0->bios_ver);
- const char *bios_date = smbios_string(bios, t0->bios_release_date);
- const char *model = smbios_string(system, t1->product_name);
- const char *manufacturer = smbios_string(system, t1->manufacturer);
-
- if (!model || !manufacturer || !bios_ver)
- goto fallback;
-
- printf("Vendor: %s\n", manufacturer);
- printf("Model: %s\n", model);
- printf("BIOS Version: %s\n", bios_ver);
- if (bios_date)
- printf("BIOS date: %s\n", bios_date);
-
- return 0;
-
-fallback:
- if (IS_ENABLED(CONFIG_OF_CONTROL)) {
- model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
-
- if (model)
- printf("Model: %s\n", model);
- }
-
- return checkboard();
-}
-#endif
-
static struct splash_location coreboot_splash_locations[] = {
{
.name = "virtio_fs",
diff --git a/board/coreboot/coreboot/sysinfo.c b/board/coreboot/coreboot/sysinfo.c
new file mode 100644
index 0000000..e0bdc7a
--- /dev/null
+++ b/board/coreboot/coreboot/sysinfo.c
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * coreboot sysinfo driver
+ *
+ * Copyright 2023 Google LLC
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#include <dm.h>
+#include <smbios.h>
+#include <sysinfo.h>
+#include <asm/cb_sysinfo.h>
+
+struct cb_sysinfo_priv {
+ const struct smbios_header *bios;
+ const struct smbios_header *system;
+ const struct smbios_type0 *t0;
+ const struct smbios_type1 *t1;
+};
+
+static int cb_get_str(struct udevice *dev, int id, size_t size, char *val)
+{
+ struct cb_sysinfo_priv *priv = dev_get_priv(dev);
+ const char *str = NULL;
+
+ switch (id) {
+ case SYSINFO_ID_BOARD_MODEL:
+ if (priv->t1)
+ str = smbios_string(priv->system,
+ priv->t1->product_name);
+ break;
+ case SYSINFO_ID_BOARD_MANUFACTURER:
+ if (priv->t1)
+ str = smbios_string(priv->system,
+ priv->t1->manufacturer);
+ break;
+ case SYSINFO_ID_PRIOR_STAGE_VERSION:
+ if (priv->t0)
+ str = smbios_string(priv->bios, priv->t0->bios_ver);
+ break;
+ case SYSINFO_ID_PRIOR_STAGE_DATE:
+ if (priv->t0)
+ str = smbios_string(priv->bios,
+ priv->t0->bios_release_date);
+ break;
+ }
+ if (!str)
+ return -ENOTSUPP;
+
+ strlcpy(val, str, size);
+
+ return 0;
+}
+
+static int cb_detect(struct udevice *dev)
+{
+ struct cb_sysinfo_priv *priv = dev_get_priv(dev);
+ const struct smbios_entry *smbios;
+
+ smbios = smbios_entry(lib_sysinfo.smbios_start,
+ lib_sysinfo.smbios_size);
+ if (!smbios)
+ return 0;
+
+ priv->bios = smbios_header(smbios, SMBIOS_BIOS_INFORMATION);
+ priv->system = smbios_header(smbios, SMBIOS_SYSTEM_INFORMATION);
+ priv->t0 = (struct smbios_type0 *)priv->bios;
+ priv->t1 = (struct smbios_type1 *)priv->system;
+
+ return 0;
+}
+
+static const struct udevice_id sysinfo_coreboot_ids[] = {
+ { .compatible = "coreboot,sysinfo" },
+ { /* sentinel */ }
+};
+
+static const struct sysinfo_ops sysinfo_coreboot_ops = {
+ .detect = cb_detect,
+ .get_str = cb_get_str,
+};
+
+U_BOOT_DRIVER(sysinfo_coreboot) = {
+ .name = "sysinfo_coreboot",
+ .id = UCLASS_SYSINFO,
+ .of_match = sysinfo_coreboot_ids,
+ .ops = &sysinfo_coreboot_ops,
+ .priv_auto = sizeof(struct cb_sysinfo_priv),
+};
diff --git a/board/cssi/cmpc885/cmpc885.c b/board/cssi/cmpc885/cmpc885.c
index 5e6aa8b..e11cfaf 100644
--- a/board/cssi/cmpc885/cmpc885.c
+++ b/board/cssi/cmpc885/cmpc885.c
@@ -9,7 +9,6 @@
*/
#include <env.h>
-#include <common.h>
#include <mpc8xx.h>
#include <asm/cpm_8xx.h>
#include <asm/io.h>
diff --git a/board/cssi/cmpc885/nand.c b/board/cssi/cmpc885/nand.c
index 3810004..b8989f2 100644
--- a/board/cssi/cmpc885/nand.c
+++ b/board/cssi/cmpc885/nand.c
@@ -7,7 +7,6 @@
*/
#include <config.h>
-#include <common.h>
#include <nand.h>
#include <linux/bitops.h>
#include <linux/mtd/rawnand.h>
diff --git a/board/cssi/cmpc885/sdram.c b/board/cssi/cmpc885/sdram.c
index 7349b85..11a50c3 100644
--- a/board/cssi/cmpc885/sdram.c
+++ b/board/cssi/cmpc885/sdram.c
@@ -4,13 +4,14 @@
* Charles Frey <charles.frey@c-s.fr>
*/
-#include <common.h>
#include <linux/sizes.h>
#include <linux/delay.h>
#include <init.h>
#include <asm/io.h>
#include <mpc8xx.h>
#include <watchdog.h>
+#include <asm/ppc.h>
+#include <asm/immap_8xx.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/cssi/cmpcpro/cmpcpro.c b/board/cssi/cmpcpro/cmpcpro.c
index 8a30c48..ef30412 100644
--- a/board/cssi/cmpcpro/cmpcpro.c
+++ b/board/cssi/cmpcpro/cmpcpro.c
@@ -4,7 +4,6 @@
*/
#include <command.h>
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <env_internal.h>
diff --git a/board/cssi/mcr3000/mcr3000.c b/board/cssi/mcr3000/mcr3000.c
index 3514f67..8857c9e 100644
--- a/board/cssi/mcr3000/mcr3000.c
+++ b/board/cssi/mcr3000/mcr3000.c
@@ -7,7 +7,6 @@
* Board specific routines for the MCR3000 board
*/
-#include <common.h>
#include <env.h>
#include <hwconfig.h>
#include <init.h>
diff --git a/board/cssi/mcr3000/nand.c b/board/cssi/mcr3000/nand.c
index 11aca4f..5b01d30 100644
--- a/board/cssi/mcr3000/nand.c
+++ b/board/cssi/mcr3000/nand.c
@@ -6,7 +6,6 @@
*/
#include <config.h>
-#include <common.h>
#include <nand.h>
#include <linux/mtd/rawnand.h>
#include <asm/io.h>
diff --git a/board/emulation/qemu-arm/Kconfig b/board/emulation/qemu-arm/Kconfig
index 09c9541..ac2d078 100644
--- a/board/emulation/qemu-arm/Kconfig
+++ b/board/emulation/qemu-arm/Kconfig
@@ -5,8 +5,7 @@
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
- select CMD_QFW
- select QFW_MMIO
+ select QFW_MMIO if CMD_QFW
imply VIRTIO_MMIO
imply VIRTIO_PCI
imply VIRTIO_NET
diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig
index d56b4b5..2709c9c 100644
--- a/board/emulation/qemu-riscv/Kconfig
+++ b/board/emulation/qemu-riscv/Kconfig
@@ -59,7 +59,6 @@
imply PCIE_ECAM_GENERIC
imply DM_RNG
imply SCSI
- imply DM_SCSI
imply SYS_NS16550
imply SIFIVE_SERIAL
imply HTIF_CONSOLE if 64BIT
@@ -82,5 +81,7 @@
imply USB_XHCI_PCI
imply USB_KEYBOARD
imply CMD_USB
+ imply UFS
+ imply UFS_PCI
endif
diff --git a/board/emulation/qemu-x86/Kconfig b/board/emulation/qemu-x86/Kconfig
index 787751a..01dc1d4 100644
--- a/board/emulation/qemu-x86/Kconfig
+++ b/board/emulation/qemu-x86/Kconfig
@@ -20,7 +20,7 @@
def_bool y
select X86_RESET_VECTOR
select QEMU
- select QFW_PIO
+ select QFW_PIO if CMD_QFW
select BOARD_ROMSIZE_KB_1024
imply VIRTIO_PCI
imply VIRTIO_NET
diff --git a/board/freescale/common/arm_sleep.c b/board/freescale/common/arm_sleep.c
index 46ffd81..228f075 100644
--- a/board/freescale/common/arm_sleep.c
+++ b/board/freescale/common/arm_sleep.c
@@ -3,7 +3,6 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <log.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/freescale/common/mpc85xx_sleep.c b/board/freescale/common/mpc85xx_sleep.c
index d3323b9..d4ca278 100644
--- a/board/freescale/common/mpc85xx_sleep.c
+++ b/board/freescale/common/mpc85xx_sleep.c
@@ -3,8 +3,8 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <log.h>
+#include <asm/cache.h>
#include <asm/global_data.h>
#include <asm/immap_85xx.h>
#include "sleep.h"
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index a618ce1..930ef6be 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -4,7 +4,6 @@
* Copyright 2019, 2021 NXP
*/
-#include <common.h>
#include <clock_legacy.h>
#include <fdt_support.h>
#include <i2c.h>
diff --git a/board/freescale/ls1021atsn/ls1021atsn.c b/board/freescale/ls1021atsn/ls1021atsn.c
index d0e4e79..b7e043b 100644
--- a/board/freescale/ls1021atsn/ls1021atsn.c
+++ b/board/freescale/ls1021atsn/ls1021atsn.c
@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/* Copyright 2016-2019, 2021 NXP
*/
-#include <common.h>
#include <clock_legacy.h>
#include <fdt_support.h>
#include <init.h>
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index 27b9d79..78006af 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -4,7 +4,6 @@
* Copyright 2019, 2021-2022 NXP
*/
-#include <common.h>
#include <clock_legacy.h>
#include <command.h>
#include <fdt_support.h>
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index 18869d8..cf84ff9 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -4,7 +4,6 @@
* Copyright 2021-2022 NXP
*/
-#include <common.h>
#include <i2c.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c
index f62f5fd..2fece3a 100644
--- a/board/freescale/ls1088a/eth_ls1088aqds.c
+++ b/board/freescale/ls1088a/eth_ls1088aqds.c
@@ -3,6 +3,8 @@
* Copyright 2017 NXP
*/
+#include <vsprintf.h>
+#include <linux/string.h>
#include <asm/io.h>
#include <asm/arch/fsl_serdes.h>
#include <fsl-mc/fsl_mc.h>
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index 0d0d5de..048ab44 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -3,6 +3,8 @@
* Copyright 2015 Freescale Semiconductor, Inc.
*/
+#include <vsprintf.h>
+#include <linux/string.h>
#include <asm/io.h>
#include <asm/arch/fsl_serdes.h>
#include <fsl-mc/fsl_mc.h>
diff --git a/board/friendlyarm/nanopi2/onewire.c b/board/friendlyarm/nanopi2/onewire.c
index 56f0f2d..4f0b1e3 100644
--- a/board/friendlyarm/nanopi2/onewire.c
+++ b/board/friendlyarm/nanopi2/onewire.c
@@ -11,16 +11,13 @@
#include <asm/arch/clk.h>
#include <asm/arch/pwm.h>
#include <i2c.h>
+#include <linux/time.h>
#include <irq_func.h>
#include <asm/arch/nexell.h>
#include <asm/arch/nx_gpio.h>
-#ifndef NSEC_PER_SEC
-#define NSEC_PER_SEC 1000000000L
-#endif
-
#define SAMPLE_BPS 9600
#define SAMPLE_IN_US 101 /* (1000000 / BPS) */
diff --git a/board/highbank/highbank.c b/board/highbank/highbank.c
index b5fa510..7f67d1e 100644
--- a/board/highbank/highbank.c
+++ b/board/highbank/highbank.c
@@ -52,19 +52,6 @@
return 0;
}
-#ifdef CONFIG_SCSI_AHCI_PLAT
-void scsi_init(void)
-{
- u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
-
- cphy_disable_overrides();
- if (reg & PWRDOM_STAT_SATA) {
- ahci_init((void __iomem *)HB_AHCI_BASE);
- scsi_scan(true);
- }
-}
-#endif
-
#ifdef CONFIG_MISC_INIT_R
int misc_init_r(void)
{
diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
index 21c21aa..cc3611e 100644
--- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
+++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
@@ -3,7 +3,7 @@
* Copyright 2020 Hitachi Power Grids. All rights reserved.
*/
-#include <common.h>
+#include <config.h>
#include <event.h>
#include <i2c.h>
#include <asm/io.h>
diff --git a/board/nuvoton/arbel_evb/Kconfig b/board/nuvoton/arbel_evb/Kconfig
index 33c589f..ed1c1ad 100644
--- a/board/nuvoton/arbel_evb/Kconfig
+++ b/board/nuvoton/arbel_evb/Kconfig
@@ -15,4 +15,5 @@
help
Reserve memory for ECC/GFX/OPTEE/TIP/CP.
+source "board/nuvoton/common/Kconfig"
endif
diff --git a/board/nuvoton/arbel_evb/arbel_evb.c b/board/nuvoton/arbel_evb/arbel_evb.c
index 59e1a42..8fc56c1 100644
--- a/board/nuvoton/arbel_evb/arbel_evb.c
+++ b/board/nuvoton/arbel_evb/arbel_evb.c
@@ -7,6 +7,7 @@
#include <dm.h>
#include <asm/io.h>
#include <asm/arch/gcr.h>
+#include "../common/uart.h"
#define SR_MII_CTRL_SWR_BIT15 15
@@ -90,3 +91,9 @@
return 0;
}
+int last_stage_init(void)
+{
+ board_set_console();
+
+ return 0;
+}
diff --git a/board/nuvoton/common/Kconfig b/board/nuvoton/common/Kconfig
new file mode 100644
index 0000000..61de7bc
--- /dev/null
+++ b/board/nuvoton/common/Kconfig
@@ -0,0 +1,9 @@
+if ARCH_NPCM
+
+config SYS_SKIP_UART_INIT
+ bool "Skip UART initialization"
+ depends on NPCM_SERIAL
+ help
+ Select this if the UART you want to use is already
+ initialized by the time U-Boot starts its execution.
+endif
diff --git a/board/nuvoton/common/Makefile b/board/nuvoton/common/Makefile
new file mode 100644
index 0000000..8fd83b2
--- /dev/null
+++ b/board/nuvoton/common/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_SYS_SKIP_UART_INIT) += uart.o
diff --git a/board/nuvoton/common/uart.c b/board/nuvoton/common/uart.c
new file mode 100644
index 0000000..b35c795
--- /dev/null
+++ b/board/nuvoton/common/uart.c
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023 Nuvoton Technology Corp.
+ */
+
+#include <clk.h>
+#include <dm.h>
+#include <env.h>
+#include <serial.h>
+#include <linux/delay.h>
+
+#define UART_DLL 0x0
+#define UART_DLM 0x4
+#define UART_LCR 0xc
+#define LCR_DLAB BIT(7)
+
+void board_set_console(void)
+{
+ const unsigned long baudrate_table[] = CFG_SYS_BAUDRATE_TABLE;
+ struct udevice *dev = gd->cur_serial_dev;
+ unsigned int baudrate, max_delta;
+ void __iomem *uart_reg;
+ struct clk clk;
+ char string[32];
+ u32 uart_clk;
+ u8 dll, dlm;
+ u16 divisor;
+ int ret, i;
+
+ if (!dev)
+ return;
+
+ uart_reg = dev_read_addr_ptr(dev);
+ ret = clk_get_by_index(dev, 0, &clk);
+ if (ret)
+ return;
+
+ uart_clk = clk_get_rate(&clk);
+ setbits_8(uart_reg + UART_LCR, LCR_DLAB);
+ dll = readb(uart_reg + UART_DLL);
+ dlm = readb(uart_reg + UART_DLM);
+ clrbits_8(uart_reg + UART_LCR, LCR_DLAB);
+ divisor = dll | (dlm << 8);
+ baudrate = uart_clk / ((16 * (divisor + 2)));
+ for (i = 0; i < ARRAY_SIZE(baudrate_table); ++i) {
+ max_delta = baudrate_table[i] / 20;
+ if (abs(baudrate - baudrate_table[i]) < max_delta) {
+ /* The baudrate is supported */
+ gd->baudrate = baudrate_table[i];
+ break;
+ }
+ }
+
+ if (i == ARRAY_SIZE(baudrate_table)) {
+ /* current baudrate is not suitable, set to default */
+ divisor = DIV_ROUND_CLOSEST(uart_clk, 16 * gd->baudrate) - 2;
+ setbits_8(uart_reg + UART_LCR, LCR_DLAB);
+ writeb(divisor & 0xff, uart_reg + UART_DLL);
+ writeb(divisor >> 8, uart_reg + UART_DLM);
+ clrbits_8(uart_reg + UART_LCR, LCR_DLAB);
+ udelay(100);
+ printf("\r\nUART(source %u): change baudrate from %u to %u\n",
+ uart_clk, baudrate, uart_clk / ((16 * (divisor + 2))));
+ }
+
+ debug("Set env baudrate=%u\n", gd->baudrate);
+ snprintf(string, sizeof(string), "ttyS0,%un8", gd->baudrate);
+ env_set("console", string);
+
+}
diff --git a/board/nuvoton/common/uart.h b/board/nuvoton/common/uart.h
new file mode 100644
index 0000000..9cc8952
--- /dev/null
+++ b/board/nuvoton/common/uart.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2023 Nuvoton Technology Corp.
+ */
+
+#ifndef _NUVOTON_UART_H
+#define _NUVOTON_UART_H
+
+void board_set_console(void);
+
+#endif /* _NUVOTON_COMMON_H */
diff --git a/board/nuvoton/poleg_evb/Kconfig b/board/nuvoton/poleg_evb/Kconfig
index d3f4c1d..6f7f1ef 100644
--- a/board/nuvoton/poleg_evb/Kconfig
+++ b/board/nuvoton/poleg_evb/Kconfig
@@ -22,4 +22,5 @@
endchoice
+source "board/nuvoton/common/Kconfig"
endif
diff --git a/board/nuvoton/poleg_evb/poleg_evb.c b/board/nuvoton/poleg_evb/poleg_evb.c
index 2052af6..7421911 100644
--- a/board/nuvoton/poleg_evb/poleg_evb.c
+++ b/board/nuvoton/poleg_evb/poleg_evb.c
@@ -10,6 +10,7 @@
#include <asm/io.h>
#include <asm/arch/gcr.h>
#include <asm/mach-types.h>
+#include "../common/uart.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -53,3 +54,10 @@
return 0;
}
+
+int last_stage_init(void)
+{
+ board_set_console();
+
+ return 0;
+}
diff --git a/board/siemens/draco/Kconfig b/board/siemens/draco/Kconfig
index 1eb8a48..0cdf5bc 100644
--- a/board/siemens/draco/Kconfig
+++ b/board/siemens/draco/Kconfig
@@ -1,19 +1,3 @@
-if TARGET_DRACO
-
-config SYS_BOARD
- default "draco"
-
-config SYS_VENDOR
- default "siemens"
-
-config SYS_SOC
- default "am33xx"
-
-config SYS_CONFIG_NAME
- default "draco"
-
-endif
-
if TARGET_THUBAN
config SYS_BOARD
@@ -26,7 +10,7 @@
default "am33xx"
config SYS_CONFIG_NAME
- default "thuban"
+ default "draco-thuban"
endif
@@ -42,7 +26,7 @@
default "am33xx"
config SYS_CONFIG_NAME
- default "rastaban"
+ default "draco-rastaban"
endif
@@ -58,7 +42,7 @@
default "am33xx"
config SYS_CONFIG_NAME
- default "etamin"
+ default "draco-etamin"
config NAND_CS_INIT
def_bool y
diff --git a/board/siemens/draco/MAINTAINERS b/board/siemens/draco/MAINTAINERS
index c73f18c..82e01eb 100644
--- a/board/siemens/draco/MAINTAINERS
+++ b/board/siemens/draco/MAINTAINERS
@@ -1,11 +1,10 @@
DRACO BOARD
-M: Samuel Egli <samuel.egli@siemens.com>
+M: Enrico Leto <enrico.leto@siemens.com>
S: Maintained
F: board/siemens/draco/
-F: include/configs/draco.h
-F: configs/draco_defconfig
-F: configs/etamin_defconfig
-F: include/configs/thuban.h
-F: configs/thuban_defconfig
-F: include/configs/rastaban.h
-F: configs/rastaban_defconfig
+F: configs/draco-etamin_defconfig
+F: configs/draco-rastaban_defconfig
+F: configs/draco-thuban_defconfig
+F: include/configs/draco-etamin.h
+F: include/configs/draco-rastaban.h
+F: include/configs/draco-thuban.h
diff --git a/board/siemens/iot2050/Kconfig b/board/siemens/iot2050/Kconfig
index a6170aa..96dcfc4 100644
--- a/board/siemens/iot2050/Kconfig
+++ b/board/siemens/iot2050/Kconfig
@@ -6,16 +6,6 @@
# Le Jin <le.jin@siemens.com>
# Jan Kiszka <jan.kiszka@siemens.com>
-config TARGET_IOT2050_A53
- bool "IOT2050 running on A53"
- select ARM64
- select SOC_K3_AM654
- select BOARD_LATE_INIT
- select SYS_DISABLE_DCACHE_OPS
- select BINMAN
- help
- This builds U-Boot for the IOT2050 devices.
-
if TARGET_IOT2050_A53
config SYS_BOARD
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index e119330..8edabf4 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -381,6 +381,7 @@
return (mmc_get_op_cond(mmc, true) < 0) ? 0 : 1;
}
+/* Override the default implementation, DT model is not accurate */
int checkboard(void)
{
request_detect_gpios();
@@ -496,12 +497,6 @@
}
#endif
-/* Override the default implementation, DT model is not accurate */
-int show_board_info(void)
-{
- return checkboard();
-}
-
int board_late_init(void)
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
diff --git a/board/st/stm32mp2/Kconfig b/board/st/stm32mp2/Kconfig
new file mode 100644
index 0000000..89039f0
--- /dev/null
+++ b/board/st/stm32mp2/Kconfig
@@ -0,0 +1,13 @@
+if TARGET_ST_STM32MP25X
+
+config SYS_BOARD
+ default "stm32mp2"
+
+config SYS_VENDOR
+ default "st"
+
+config SYS_CONFIG_NAME
+ default "stm32mp25_common"
+
+source "board/st/common/Kconfig"
+endif
diff --git a/board/st/stm32mp2/MAINTAINERS b/board/st/stm32mp2/MAINTAINERS
new file mode 100644
index 0000000..e6bea91
--- /dev/null
+++ b/board/st/stm32mp2/MAINTAINERS
@@ -0,0 +1,9 @@
+STM32MP2 BOARD
+M: Patrice Chotard <patrice.chotard@st.com>
+M: Patrick Delaunay <patrick.delaunay@st.com>
+L: uboot-stm32@st-md-mailman.stormreply.com (moderated for non-subscribers)
+S: Maintained
+F: arch/arm/dts/stm32mp25*
+F: board/st/stm32mp2/
+F: configs/stm32mp25_defconfig
+F: include/configs/stm32mp25_common.h
diff --git a/board/st/stm32mp2/Makefile b/board/st/stm32mp2/Makefile
new file mode 100644
index 0000000..50352fb
--- /dev/null
+++ b/board/st/stm32mp2/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+#
+# Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+#
+
+obj-y += stm32mp2.o
diff --git a/board/st/stm32mp2/stm32mp2.c b/board/st/stm32mp2/stm32mp2.c
new file mode 100644
index 0000000..c97a7ef
--- /dev/null
+++ b/board/st/stm32mp2/stm32mp2.c
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+ */
+
+#define LOG_CATEGORY LOGC_BOARD
+
+#include <config.h>
+#include <env.h>
+#include <fdt_support.h>
+#include <asm/global_data.h>
+#include <asm/arch/sys_proto.h>
+
+/*
+ * Get a global data pointer
+ */
+DECLARE_GLOBAL_DATA_PTR;
+
+/* board dependent setup after realloc */
+int board_init(void)
+{
+ return 0;
+}
+
+int board_late_init(void)
+{
+ const void *fdt_compat;
+ int fdt_compat_len;
+ char dtb_name[256];
+ int buf_len;
+
+ if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
+ fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
+ &fdt_compat_len);
+ if (fdt_compat && fdt_compat_len) {
+ if (strncmp(fdt_compat, "st,", 3) != 0) {
+ env_set("board_name", fdt_compat);
+ } else {
+ env_set("board_name", fdt_compat + 3);
+
+ buf_len = sizeof(dtb_name);
+ strlcpy(dtb_name, fdt_compat + 3, buf_len);
+ buf_len -= strlen(fdt_compat + 3);
+ strlcat(dtb_name, ".dtb", buf_len);
+ env_set("fdtfile", dtb_name);
+ }
+ }
+ }
+
+ return 0;
+}
diff --git a/board/ti/am62ax/Kconfig b/board/ti/am62ax/Kconfig
index 61f289f..51e7b3e 100644
--- a/board/ti/am62ax/Kconfig
+++ b/board/ti/am62ax/Kconfig
@@ -3,32 +3,6 @@
# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
#
-choice
- prompt "TI K3 AM62Ax based boards"
- optional
-
-config TARGET_AM62A7_A53_EVM
- bool "TI K3 based AM62A7 EVM running on A53"
- select ARM64
- select BINMAN
- imply BOARD
- imply SPL_BOARD
- imply TI_I2C_BOARD_DETECT
-
-config TARGET_AM62A7_R5_EVM
- bool "TI K3 based AM62A7 EVM running on R5"
- select CPU_V7R
- select SYS_THUMB_BUILD
- select K3_LOAD_SYSFW
- select RAM
- select SPL_RAM
- select K3_DDRSS
- select BINMAN
- imply SYS_K3_SPL_ATF
- imply TI_I2C_BOARD_DETECT
-
-endchoice
-
if TARGET_AM62A7_R5_EVM || TARGET_AM62A7_A53_EVM
config SYS_BOARD
diff --git a/board/ti/am62ax/am62ax.env b/board/ti/am62ax/am62ax.env
index bfed7f3..a6d967e 100644
--- a/board/ti/am62ax/am62ax.env
+++ b/board/ti/am62ax/am62ax.env
@@ -1,16 +1,14 @@
#include <env/ti/ti_common.env>
+#include <env/ti/default_findfdt.env>
#include <env/ti/mmc.env>
-default_device_tree=ti/k3-am62a7-sk.dtb
-findfdt=
- setenv name_fdt ${default_device_tree};
- setenv fdtfile ${name_fdt}
name_kern=Image
console=ttyS2,115200n8
args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000
${mtdparts}
run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
+boot_targets=mmc1 mmc0 usb pxe dhcp
boot=mmc
mmcdev=1
bootpart=1:2
diff --git a/board/ti/am62ax/evm.c b/board/ti/am62ax/evm.c
index f2dd3b4..cd3360a 100644
--- a/board/ti/am62ax/evm.c
+++ b/board/ti/am62ax/evm.c
@@ -8,7 +8,6 @@
#include <asm/arch/hardware.h>
#include <asm/io.h>
-#include <common.h>
#include <dm/uclass.h>
#include <env.h>
#include <fdt_support.h>
diff --git a/board/ti/am62x/Kconfig b/board/ti/am62x/Kconfig
index cd17e93..610dacf 100644
--- a/board/ti/am62x/Kconfig
+++ b/board/ti/am62x/Kconfig
@@ -3,28 +3,6 @@
# Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
# Suman Anna <s-anna@ti.com>
-choice
- prompt "TI K3 AM62x based boards"
- optional
-
-config TARGET_AM625_A53_EVM
- bool "TI K3 based AM625 EVM running on A53"
- select ARM64
- select BINMAN
-
-config TARGET_AM625_R5_EVM
- bool "TI K3 based AM625 EVM running on R5"
- select CPU_V7R
- select SYS_THUMB_BUILD
- select K3_LOAD_SYSFW
- select RAM
- select SPL_RAM
- select K3_DDRSS
- select BINMAN
- imply SYS_K3_SPL_ATF
-
-endchoice
-
if TARGET_AM625_A53_EVM
config SYS_BOARD
diff --git a/board/ti/am62x/MAINTAINERS b/board/ti/am62x/MAINTAINERS
index 6ac4e65..105e741 100644
--- a/board/ti/am62x/MAINTAINERS
+++ b/board/ti/am62x/MAINTAINERS
@@ -6,10 +6,3 @@
F: include/configs/am62x_evm.h
F: configs/am62x_evm_r5_defconfig
F: configs/am62x_evm_a53_defconfig
-
-BEAGLEPLAY BOARD
-M: Nishanth Menon <nm@ti.com>
-M: Robert Nelson <robertcnelson@gmail.com>
-M: Tom Rini <trini@konsulko.com>
-S: Maintained
-N: beagleplay
diff --git a/board/ti/am62x/beagleplay_a53.config b/board/ti/am62x/beagleplay_a53.config
deleted file mode 100644
index f038041..0000000
--- a/board/ti/am62x/beagleplay_a53.config
+++ /dev/null
@@ -1,55 +0,0 @@
-# Defconfig fragment to apply on top of am62x_evm_a53_defconfig
-
-CONFIG_DEFAULT_DEVICE_TREE="k3-am625-beagleplay"
-CONFIG_OF_LIST="k3-am625-beagleplay"
-CONFIG_SPL_OF_LIST="k3-am625-beagleplay"
-CONFIG_BOOTCOMMAND="run set_led_state_start_load;run findfdt; run envboot; bootflow scan -lb;run set_led_state_fail_load"
-CONFIG_EXT4_WRITE=y
-CONFIG_LZO=y
-CONFIG_AUTOBOOT_KEYED=y
-CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
-CONFIG_AUTOBOOT_DELAY_STR="d"
-CONFIG_AUTOBOOT_STOP_STR=" "
-# Use the Beagleplay env file
-CONFIG_ENV_SOURCE_FILE="beagleplay"
-# Do not use emmc boot - we will use FS only
-CONFIG_SUPPORT_EMMC_BOOT=n
-CONFIG_MMC_IO_VOLTAGE=y
-# CONFIG_SPL_MMC_IO_VOLTAGE is not set
-CONFIG_MMC_UHS_SUPPORT=y
-# CONFIG_SPL_MMC_UHS_SUPPORT is not set
-CONFIG_MMC_HS200_SUPPORT=y
-# CONFIG_SPL_MMC_HS200_SUPPORT is not set
-# Enable GPIO control
-CONFIG_DM_GPIO=y
-CONFIG_SPL_GPIO=y
-CONFIG_DA8XX_GPIO=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_GPIO_READ=y
-# Enable LEDs
-CONFIG_LED=y
-CONFIG_LED_GPIO=y
-CONFIG_SPL_LED=y
-CONFIG_SPL_LED_GPIO=y
-# Enable I2C bus
-CONFIG_SPL_I2C=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_OMAP24XX=y
-CONFIG_CMD_I2C=y
-# Regulator
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_CMD_REGULATOR=y
-CONFIG_DM_REGULATOR_TPS65219=y
-CONFIG_DM_PMIC=y
-CONFIG_PMIC_TPS65219=y
-CONFIG_CMD_PMIC=y
-# Uses Realtek phy rather than TI phy
-CONFIG_PHY_TI_DP83867=n
-CONFIG_PHY_REALTEK=y
-# No SPI flash on Beagleplay
-CONFIG_SPI=n
-CONFIG_SPI_FLASH=n
-CONFIG_SPL_DM_SPI_FLASH=n
-CONFIG_SPL_SPI_FLASH_SUPPORT=n
diff --git a/board/ti/am62x/beagleplay_r5.config b/board/ti/am62x/beagleplay_r5.config
deleted file mode 100644
index 4ee0375..0000000
--- a/board/ti/am62x/beagleplay_r5.config
+++ /dev/null
@@ -1,15 +0,0 @@
-# Defconfig fragment to apply on top of:
-# am62x_evm_r5_defconfig
-#
-CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-beagleplay"
-CONFIG_OF_LIST="k3-am625-r5-beagleplay"
-CONFIG_SPL_OF_LIST="k3-am625-r5-beagleplay"
-# Do spl board init
-CONFIG_SPL_BOARD_INIT=y
-# Do not use emmc boot - we will use FS only
-CONFIG_SUPPORT_EMMC_BOOT=n
-# No SPI flash on Beagleplay
-CONFIG_SPI=n
-CONFIG_SPI_FLASH=n
-CONFIG_SPL_DM_SPI_FLASH=n
-CONFIG_SPL_SPI_FLASH_SUPPORT=n
diff --git a/board/ti/am64x/Kconfig b/board/ti/am64x/Kconfig
index fb596e4..b873476 100644
--- a/board/ti/am64x/Kconfig
+++ b/board/ti/am64x/Kconfig
@@ -2,32 +2,6 @@
#
# Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
-choice
- prompt "K3 AM64 based boards"
- optional
-
-config TARGET_AM642_A53_EVM
- bool "TI K3 based AM642 EVM running on A53"
- select ARM64
- select BINMAN
- imply BOARD
- imply SPL_BOARD
- imply TI_I2C_BOARD_DETECT
-
-config TARGET_AM642_R5_EVM
- bool "TI K3 based AM642 EVM running on R5"
- select CPU_V7R
- select SYS_THUMB_BUILD
- select K3_LOAD_SYSFW
- select RAM
- select SPL_RAM
- select K3_DDRSS
- select BINMAN
- imply SYS_K3_SPL_ATF
- imply TI_I2C_BOARD_DETECT
-
-endchoice
-
if TARGET_AM642_A53_EVM
config SYS_BOARD
diff --git a/board/ti/am64x/evm.c b/board/ti/am64x/evm.c
index a080b2b..a6dcff2 100644
--- a/board/ti/am64x/evm.c
+++ b/board/ti/am64x/evm.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <asm/io.h>
#include <dm/uclass.h>
#include <k3-ddrss.h>
diff --git a/board/ti/am65x/Kconfig b/board/ti/am65x/Kconfig
index 78c7040..eb47a25 100644
--- a/board/ti/am65x/Kconfig
+++ b/board/ti/am65x/Kconfig
@@ -3,30 +3,6 @@
# Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/
# Lokesh Vutla <lokeshvutla@ti.com>
-choice
- prompt "K3 AM65 based boards"
- optional
-
-config TARGET_AM654_A53_EVM
- bool "TI K3 based AM654 EVM running on A53"
- select ARM64
- select SYS_DISABLE_DCACHE_OPS
- select BOARD_LATE_INIT
- select BINMAN
- imply TI_I2C_BOARD_DETECT
-
-config TARGET_AM654_R5_EVM
- bool "TI K3 based AM654 EVM running on R5"
- select CPU_V7R
- select SYS_THUMB_BUILD
- select K3_LOAD_SYSFW
- select K3_AM654_DDRSS
- select BINMAN
- imply SYS_K3_SPL_ATF
- imply TI_I2C_BOARD_DETECT
-
-endchoice
-
if TARGET_AM654_A53_EVM
config SYS_BOARD
diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c
index 9de3dda..975eb17 100644
--- a/board/ti/am65x/evm.c
+++ b/board/ti/am65x/evm.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <fdt_support.h>
#include <image.h>
diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig
index 9505330..6990f6e 100644
--- a/board/ti/j721e/Kconfig
+++ b/board/ti/j721e/Kconfig
@@ -3,52 +3,6 @@
# Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
# Lokesh Vutla <lokeshvutla@ti.com>
-choice
- prompt "K3 J721E based boards"
- optional
-
-config TARGET_J721E_A72_EVM
- bool "TI K3 based J721E EVM running on A72"
- select ARM64
- select BOARD_LATE_INIT
- imply TI_I2C_BOARD_DETECT
- select SYS_DISABLE_DCACHE_OPS
- select BINMAN
-
-config TARGET_J721E_R5_EVM
- bool "TI K3 based J721E EVM running on R5"
- select CPU_V7R
- select SYS_THUMB_BUILD
- select K3_LOAD_SYSFW
- select RAM
- select SPL_RAM
- select K3_DDRSS
- select BINMAN
- imply SYS_K3_SPL_ATF
- imply TI_I2C_BOARD_DETECT
-
-config TARGET_J7200_A72_EVM
- bool "TI K3 based J7200 EVM running on A72"
- select ARM64
- select BOARD_LATE_INIT
- imply TI_I2C_BOARD_DETECT
- select SYS_DISABLE_DCACHE_OPS
- select BINMAN
-
-config TARGET_J7200_R5_EVM
- bool "TI K3 based J7200 EVM running on R5"
- select CPU_V7R
- select SYS_THUMB_BUILD
- select K3_LOAD_SYSFW
- select RAM
- select SPL_RAM
- select K3_DDRSS
- select BINMAN
- imply SYS_K3_SPL_ATF
- imply TI_I2C_BOARD_DETECT
-
-endchoice
-
if TARGET_J721E_A72_EVM
config SYS_BOARD
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index c13c6b2..0768385 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -7,22 +7,13 @@
*
*/
-#include <common.h>
-#include <env.h>
-#include <fdt_support.h>
#include <generic-phy.h>
#include <image.h>
-#include <init.h>
-#include <log.h>
#include <net.h>
#include <asm/arch/hardware.h>
-#include <asm/global_data.h>
#include <asm/gpio.h>
-#include <asm/io.h>
#include <spl.h>
#include <dm.h>
-#include <dm/uclass-internal.h>
-#include <linux/printk.h>
#include "../common/board_detect.h"
@@ -308,53 +299,54 @@
printf("Detected: %s rev %s\n", ep.name, ep.version);
daughter_card_detect_flags[i] = true;
-#ifndef CONFIG_SPL_BUILD
- int j;
- /*
- * Populate any MAC addresses from daughtercard into the U-Boot
- * environment, starting with a card-specific offset so we can
- * have multiple ext_cards contribute to the MAC pool in a well-
- * defined manner.
- */
- for (j = 0; j < mac_addr_cnt; j++) {
- if (!is_valid_ethaddr((u8 *)mac_addr[j]))
- continue;
+ if (!IS_ENABLED(CONFIG_SPL_BUILD)) {
+ int j;
+ /*
+ * Populate any MAC addresses from daughtercard into the U-Boot
+ * environment, starting with a card-specific offset so we can
+ * have multiple ext_cards contribute to the MAC pool in a well-
+ * defined manner.
+ */
+ for (j = 0; j < mac_addr_cnt; j++) {
+ if (!is_valid_ethaddr((u8 *)mac_addr[j]))
+ continue;
- eth_env_set_enetaddr_by_index("eth",
- ext_cards[i].eth_offset + j,
- (uchar *)mac_addr[j]);
+ eth_env_set_enetaddr_by_index("eth",
+ ext_cards[i].eth_offset + j,
+ (uchar *)mac_addr[j]);
+ }
}
-#endif
}
-#ifndef CONFIG_SPL_BUILD
- char name_overlays[1024] = { 0 };
- for (i = 0; i < ARRAY_SIZE(ext_cards); i++) {
- if (!daughter_card_detect_flags[i])
- continue;
+ if (!IS_ENABLED(CONFIG_SPL_BUILD)) {
+ char name_overlays[1024] = { 0 };
- /* Skip if no overlays are to be added */
- if (!strlen(ext_cards[i].dtbo_name))
- continue;
+ for (i = 0; i < ARRAY_SIZE(ext_cards); i++) {
+ if (!daughter_card_detect_flags[i])
+ continue;
+
+ /* Skip if no overlays are to be added */
+ if (!strlen(ext_cards[i].dtbo_name))
+ continue;
- /*
- * Make sure we are not running out of buffer space by checking
- * if we can fit the new overlay, a trailing space to be used
- * as a separator, plus the terminating zero.
- */
- if (strlen(name_overlays) + strlen(ext_cards[i].dtbo_name) + 2 >
- sizeof(name_overlays))
- return -ENOMEM;
+ /*
+ * Make sure we are not running out of buffer space by checking
+ * if we can fit the new overlay, a trailing space to be used
+ * as a separator, plus the terminating zero.
+ */
+ if (strlen(name_overlays) + strlen(ext_cards[i].dtbo_name) + 2 >
+ sizeof(name_overlays))
+ return -ENOMEM;
- /* Append to our list of overlays */
- strcat(name_overlays, ext_cards[i].dtbo_name);
- strcat(name_overlays, " ");
- }
+ /* Append to our list of overlays */
+ strcat(name_overlays, ext_cards[i].dtbo_name);
+ strcat(name_overlays, " ");
+ }
- /* Apply device tree overlay(s) to the U-Boot environment, if any */
- if (strlen(name_overlays))
- return env_set("name_overlays", name_overlays);
-#endif
+ /* Apply device tree overlay(s) to the U-Boot environment, if any */
+ if (strlen(name_overlays))
+ return env_set("name_overlays", name_overlays);
+ }
return 0;
}
@@ -531,10 +523,8 @@
void spl_board_init(void)
{
-#if defined(CONFIG_ESM_K3) || defined(CONFIG_ESM_PMIC)
struct udevice *dev;
int ret;
-#endif
if ((IS_ENABLED(CONFIG_TARGET_J721E_A72_EVM) ||
IS_ENABLED(CONFIG_TARGET_J7200_A72_EVM)) &&
@@ -543,24 +533,20 @@
probe_daughtercards();
}
-#ifdef CONFIG_ESM_K3
- if (board_ti_k3_is("J721EX-PM2-SOM")) {
+ if (IS_ENABLED(CONFIG_ESM_K3)) {
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(k3_esm), &dev);
if (ret)
printf("ESM init failed: %d\n", ret);
}
-#endif
-#ifdef CONFIG_ESM_PMIC
- if (board_ti_k3_is("J721EX-PM2-SOM")) {
+ if (IS_ENABLED(CONFIG_ESM_PMIC)) {
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(pmic_esm),
&dev);
if (ret)
printf("ESM PMIC init failed: %d\n", ret);
}
-#endif
if ((IS_ENABLED(CONFIG_TARGET_J7200_A72_EVM) || IS_ENABLED(CONFIG_TARGET_J721E_A72_EVM)) &&
IS_ENABLED(CONFIG_HBMC_AM654)) {
struct udevice *dev;
diff --git a/board/ti/j721e/j721e.env b/board/ti/j721e/j721e.env
index 8cc8232..cb27bf5 100644
--- a/board/ti/j721e/j721e.env
+++ b/board/ti/j721e/j721e.env
@@ -31,6 +31,7 @@
name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw
#endif
+boot_targets=mmc1 mmc0 usb pxe dhcp
boot=mmc
mmcdev=1
bootpart=1:2
diff --git a/board/ti/j721s2/Kconfig b/board/ti/j721s2/Kconfig
index f6d1cb5..40853a8 100644
--- a/board/ti/j721s2/Kconfig
+++ b/board/ti/j721s2/Kconfig
@@ -3,32 +3,6 @@
# Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
# David Huang <d-huang@ti.com>
-choice
- prompt "K3 J721S2 board"
- optional
-
-config TARGET_J721S2_A72_EVM
- bool "TI K3 based J721S2 EVM running on A72"
- select ARM64
- select BOARD_LATE_INIT
- imply TI_I2C_BOARD_DETECT
- select SYS_DISABLE_DCACHE_OPS
- select BINMAN
-
-config TARGET_J721S2_R5_EVM
- bool "TI K3 based J721S2 EVM running on R5"
- select CPU_V7R
- select SYS_THUMB_BUILD
- select K3_LOAD_SYSFW
- select RAM
- select SPL_RAM
- select K3_DDRSS
- select BINMAN
- imply SYS_K3_SPL_ATF
- imply TI_I2C_BOARD_DETECT
-
-endchoice
-
if TARGET_J721S2_A72_EVM
config SYS_BOARD
diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c
index 01eb496..db71739 100644
--- a/board/ti/j721s2/evm.c
+++ b/board/ti/j721s2/evm.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <env.h>
#include <fdt_support.h>
#include <generic-phy.h>
diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c
index e2bbaba..b351ce6 100644
--- a/board/toradex/apalis-imx8/apalis-imx8.c
+++ b/board/toradex/apalis-imx8/apalis-imx8.c
@@ -215,7 +215,7 @@
build_info();
print_bootinfo();
- return 0;
+ return tdx_checkboard();
}
static enum pcb_rev_t get_pcb_revision(void)
diff --git a/board/toradex/apalis-tk1/apalis-tk1.c b/board/toradex/apalis-tk1/apalis-tk1.c
index 8513431..79a1c92 100644
--- a/board/toradex/apalis-tk1/apalis-tk1.c
+++ b/board/toradex/apalis-tk1/apalis-tk1.c
@@ -95,7 +95,7 @@
{
puts("Model: Toradex Apalis TK1 2GB\n");
- return 0;
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c
index fa6b722..dc0e099 100644
--- a/board/toradex/apalis_imx6/apalis_imx6.c
+++ b/board/toradex/apalis_imx6/apalis_imx6.c
@@ -730,7 +730,8 @@
is_cpu_type(MXC_CPU_MX6D) ? "Dual" : "Quad",
(gd->ram_size == 0x80000000) ? "2GB" :
(gd->ram_size == 0x40000000) ? "1GB" : "512MB", it);
- return 0;
+
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/apalis_t30/apalis_t30.c b/board/toradex/apalis_t30/apalis_t30.c
index ef71270..b9a2af3 100644
--- a/board/toradex/apalis_t30/apalis_t30.c
+++ b/board/toradex/apalis_t30/apalis_t30.c
@@ -50,7 +50,7 @@
printf("Model: Toradex Apalis T30 %dGB\n",
(gd->ram_size == 0x40000000) ? 1 : 2);
- return 0;
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/colibri-imx6ull/colibri-imx6ull.c b/board/toradex/colibri-imx6ull/colibri-imx6ull.c
index 48fdb1e..6c8eeff 100644
--- a/board/toradex/colibri-imx6ull/colibri-imx6ull.c
+++ b/board/toradex/colibri-imx6ull/colibri-imx6ull.c
@@ -206,7 +206,7 @@
{
printf("Model: Toradex Colibri iMX6ULL\n");
- return 0;
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c b/board/toradex/colibri-imx8x/colibri-imx8x.c
index 6c0b097..d8cc72f 100644
--- a/board/toradex/colibri-imx8x/colibri-imx8x.c
+++ b/board/toradex/colibri-imx8x/colibri-imx8x.c
@@ -121,7 +121,7 @@
build_info();
print_bootinfo();
- return 0;
+ return tdx_checkboard();
}
static void select_dt_from_module_version(void)
diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c
index e6c9b10..7635c58 100644
--- a/board/toradex/colibri_imx6/colibri_imx6.c
+++ b/board/toradex/colibri_imx6/colibri_imx6.c
@@ -649,7 +649,8 @@
printf("Model: Toradex Colibri iMX6 %s %sMB%s\n",
is_cpu_type(MXC_CPU_MX6DL) ? "DualLite" : "Solo",
(gd->ram_size == 0x20000000) ? "512" : "256", it);
- return 0;
+
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c
index f0356af..c3478b1 100644
--- a/board/toradex/colibri_imx7/colibri_imx7.c
+++ b/board/toradex/colibri_imx7/colibri_imx7.c
@@ -279,7 +279,7 @@
printf("Model: Toradex Colibri iMX7%c\n",
is_cpu_type(MXC_CPU_MX7D) ? 'D' : 'S');
- return 0;
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c
index 1df9697..5861cf7 100644
--- a/board/toradex/colibri_t20/colibri_t20.c
+++ b/board/toradex/colibri_t20/colibri_t20.c
@@ -77,7 +77,7 @@
(get_nand_dev_by_index(0)->erasesize >> 10 == 512) ?
((gd->ram_size == 0x10000000) ? "1.1B" : "1.1C") : "1.2A");
- return 0;
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/colibri_t30/colibri_t30.c b/board/toradex/colibri_t30/colibri_t30.c
index b6b0046..8cef098 100644
--- a/board/toradex/colibri_t30/colibri_t30.c
+++ b/board/toradex/colibri_t30/colibri_t30.c
@@ -32,7 +32,7 @@
{
puts("Model: Toradex Colibri T30 1GB\n");
- return 0;
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c
index dcef2db..af9f2d3 100644
--- a/board/toradex/colibri_vf/colibri_vf.c
+++ b/board/toradex/colibri_vf/colibri_vf.c
@@ -373,7 +373,7 @@
else
puts("Model: Toradex Colibri VF50\n");
- return 0;
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c
index d144914..ed8f0a6 100644
--- a/board/toradex/common/tdx-common.c
+++ b/board/toradex/common/tdx-common.c
@@ -96,7 +96,7 @@
return ver_name;
}
-int show_board_info(void)
+int tdx_checkboard(void)
{
unsigned char ethaddr[6];
diff --git a/board/toradex/common/tdx-common.h b/board/toradex/common/tdx-common.h
index d446e9f..44234dc 100644
--- a/board/toradex/common/tdx-common.h
+++ b/board/toradex/common/tdx-common.h
@@ -11,5 +11,6 @@
int ft_common_board_setup(void *blob, struct bd_info *bd);
u32 get_board_revision(void);
+int tdx_checkboard(void);
#endif /* _TDX_COMMON_H */
diff --git a/board/toradex/verdin-am62/Kconfig b/board/toradex/verdin-am62/Kconfig
index e752224..fd65a96 100644
--- a/board/toradex/verdin-am62/Kconfig
+++ b/board/toradex/verdin-am62/Kconfig
@@ -3,28 +3,6 @@
# Copyright 2023 Toradex
#
-choice
- prompt "Toradex Verdin AM62 based boards"
- optional
-
-config TARGET_VERDIN_AM62_A53
- bool "Toradex Verdin AM62 running on A53"
- select ARM64
- select BINMAN
-
-config TARGET_VERDIN_AM62_R5
- bool "Toradex Verdin AM62 running on R5"
- select CPU_V7R
- select SYS_THUMB_BUILD
- select K3_LOAD_SYSFW
- select RAM
- select SPL_RAM
- select K3_DDRSS
- select BINMAN
- imply SYS_K3_SPL_ATF
-
-endchoice
-
if TARGET_VERDIN_AM62_A53
config SYS_BOARD
diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
index 730e266..d99d93b 100644
--- a/board/udoo/neo/neo.c
+++ b/board/udoo/neo/neo.c
@@ -212,7 +212,7 @@
}
/* Override the default implementation, DT model is not accurate */
-int show_board_info(void)
+int checkboard(void)
{
int *board_type = (int *)OCRAM_START;
diff --git a/boot/Kconfig b/boot/Kconfig
index fbc49c5..ef71883 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -346,8 +346,16 @@
help
Utilities for parsing PXE file formats.
-config BOOT_DEFAULTS
- bool # Common defaults for standard boot and distroboot
+config BOOT_DEFAULTS_FEATURES
+ bool
+ select SUPPORT_RAW_INITRD
+ select ENV_VARS_UBOOT_CONFIG
+ imply USB_STORAGE
+ imply EFI_PARTITION
+ imply ISO_PARTITION
+
+config BOOT_DEFAULTS_CMDS
+ bool
imply USE_BOOTCOMMAND
select CMD_ENV_EXISTS
select CMD_EXT2
@@ -358,14 +366,14 @@
select CMD_DHCP if CMD_NET
select CMD_PING if CMD_NET
select CMD_PXE if CMD_NET
- select SUPPORT_RAW_INITRD
- select ENV_VARS_UBOOT_CONFIG
select CMD_BOOTI if ARM64
select CMD_BOOTZ if ARM && !ARM64
imply CMD_MII if NET
- imply USB_STORAGE
- imply EFI_PARTITION
- imply ISO_PARTITION
+
+config BOOT_DEFAULTS
+ bool # Common defaults for standard boot and distroboot
+ select BOOT_DEFAULTS_FEATURES
+ select BOOT_DEFAULTS_CMDS if CMDLINE
help
These are not required but are commonly needed to support a good
selection of booting methods. Enable this to improve the capability
@@ -431,7 +439,6 @@
config BOOTSTD_DEFAULTS
bool "Select some common defaults for standard boot"
depends on BOOTSTD
- imply USE_BOOTCOMMAND
select BOOT_DEFAULTS
select BOOTMETH_DISTRO
help
@@ -504,7 +511,7 @@
config BOOTMETH_EFILOADER
bool "Bootdev support for EFI boot"
- depends on EFI_LOADER
+ depends on CMD_BOOTEFI
default y
help
Enables support for EFI boot using bootdevs. This makes the
@@ -536,10 +543,10 @@
config BOOTMETH_DISTRO
bool # Options needed to boot any distro
- select BOOTMETH_SCRIPT # E.g. Armbian uses scripts
+ select BOOTMETH_SCRIPT if CMDLINE # E.g. Armbian uses scripts
select BOOTMETH_EXTLINUX # E.g. Debian uses these
select BOOTMETH_EXTLINUX_PXE if CMD_PXE && CMD_NET && DM_ETH
- select BOOTMETH_EFILOADER if EFI_LOADER # E.g. Ubuntu uses this
+ select BOOTMETH_EFILOADER if CMD_BOOTEFI # E.g. Ubuntu uses this
config SPL_BOOTMETH_VBE
bool "Bootdev support for Verified Boot for Embedded (SPL)"
@@ -664,6 +671,7 @@
config BOOTMETH_SCRIPT
bool "Bootdev support for U-Boot scripts"
default y if BOOTSTD_FULL
+ depends on CMDLINE
select HUSH_PARSER
help
Enables support for booting a distro via a U-Boot script. This makes
@@ -717,6 +725,17 @@
event log memory region.
endif # MEASURED_BOOT
+config SYS_BOOTM_LEN
+ hex "Maximum size of a decompresed OS image"
+ depends on CMD_BOOTM || CMD_BOOTI || CMD_BOOTZ || \
+ LEGACY_IMAGE_FORMAT || SPL_LEGACY_IMAGE_FORMAT
+ default 0x4000000 if PPC || ARM64
+ default 0x1000000 if X86 || ARCH_MX6 || ARCH_MX7
+ default 0x800000
+ help
+ This is the maximum size of the buffer that is used to decompress the OS
+ image in to if attempting to boot a compressed image.
+
config SUPPORT_RAW_INITRD
bool "Enable raw initrd images"
help
@@ -809,6 +828,7 @@
config DISTRO_DEFAULTS
bool "(deprecated) Script-based booting of Linux distributions"
+ select CMDLINE
select BOOT_DEFAULTS
select AUTO_COMPLETE
select CMDLINE_EDITING
@@ -1194,14 +1214,16 @@
config AUTOBOOT
bool "Autoboot"
+ depends on CMDLINE
default y
help
This enables the autoboot. See doc/README.autoboot for detail.
+if AUTOBOOT
+
config BOOTDELAY
int "delay in seconds before automatically booting"
default 2
- depends on AUTOBOOT
help
Delay before automatically running bootcmd;
set to 0 to autoboot with no delay, but you can stop it by key input.
@@ -1223,9 +1245,11 @@
U-Boot automatic booting process and bring the device
to the U-Boot prompt for user input.
+if AUTOBOOT_KEYED
+
config AUTOBOOT_FLUSH_STDIN
bool "Enable flushing stdin before starting to read the password"
- depends on AUTOBOOT_KEYED && !SANDBOX
+ depends on !SANDBOX
help
When this option is enabled stdin buffer will be flushed before
starting to read the password.
@@ -1234,7 +1258,6 @@
config AUTOBOOT_PROMPT
string "Autoboot stop prompt"
- depends on AUTOBOOT_KEYED
default "Autoboot in %d seconds\\n"
help
This string is displayed before the boot delay selected by
@@ -1250,7 +1273,6 @@
config AUTOBOOT_ENCRYPTION
bool "Enable encryption in autoboot stopping"
- depends on AUTOBOOT_KEYED
help
This option allows a string to be entered into U-Boot to stop the
autoboot.
@@ -1277,7 +1299,7 @@
config AUTOBOOT_DELAY_STR
string "Delay autobooting via specific input key / string"
- depends on AUTOBOOT_KEYED && !AUTOBOOT_ENCRYPTION
+ depends on !AUTOBOOT_ENCRYPTION
help
This option delays the automatic boot feature by issuing
a specific input key or string. If CONFIG_AUTOBOOT_DELAY_STR
@@ -1289,7 +1311,7 @@
config AUTOBOOT_STOP_STR
string "Stop autobooting via specific input key / string"
- depends on AUTOBOOT_KEYED && !AUTOBOOT_ENCRYPTION
+ depends on !AUTOBOOT_ENCRYPTION
help
This option enables stopping (aborting) of the automatic
boot feature only by issuing a specific input key or
@@ -1301,7 +1323,7 @@
config AUTOBOOT_KEYED_CTRLC
bool "Enable Ctrl-C autoboot interruption"
- depends on AUTOBOOT_KEYED && !AUTOBOOT_ENCRYPTION
+ depends on !AUTOBOOT_ENCRYPTION
help
This option allows for the boot sequence to be interrupted
by ctrl-c, in addition to the "bootdelaykey" and "bootstopkey".
@@ -1310,7 +1332,7 @@
config AUTOBOOT_NEVER_TIMEOUT
bool "Make the password entry never time-out"
- depends on AUTOBOOT_KEYED && AUTOBOOT_ENCRYPTION && CRYPT_PW
+ depends on AUTOBOOT_ENCRYPTION && CRYPT_PW
help
This option removes the timeout from the password entry
when the user first presses the <Enter> key before entering
@@ -1318,7 +1340,7 @@
config AUTOBOOT_STOP_STR_ENABLE
bool "Enable fixed string to stop autobooting"
- depends on AUTOBOOT_KEYED && AUTOBOOT_ENCRYPTION
+ depends on AUTOBOOT_ENCRYPTION
help
This option enables the feature to add a fixed stop
string that is defined at compile time.
@@ -1349,9 +1371,12 @@
includes a ":", the portion prior to the ":" will be treated
as a salt value.
+endif # AUTOBOOT_KEYED
+
+if !AUTOBOOT_KEYED
+
config AUTOBOOT_USE_MENUKEY
bool "Allow a specify key to run a menu from the environment"
- depends on !AUTOBOOT_KEYED
help
If a specific key is pressed to stop autoboot, then the commands in
the environment variable 'menucmd' are executed before boot starts.
@@ -1366,6 +1391,10 @@
For example, 33 means "!" in ASCII, so pressing ! at boot would take
this action.
+endif
+
+endif # AUTOBOOT
+
config AUTOBOOT_MENU_SHOW
bool "Show a menu on boot"
depends on CMD_BOOTMENU
@@ -1561,6 +1590,7 @@
config USE_BOOTCOMMAND
bool "Enable a default value for bootcmd"
+ depends on CMDLINE
help
Provide a default value for the bootcmd entry in the environment. If
autoboot is enabled this is what will be run automatically. Enable
@@ -1580,6 +1610,7 @@
config USE_PREBOOT
bool "Enable preboot"
+ depends on CMDLINE
help
When this option is enabled, the existence of the environment
variable "preboot" will be checked immediately before starting the
diff --git a/boot/Makefile b/boot/Makefile
index ad60859..3fd048b 100644
--- a/boot/Makefile
+++ b/boot/Makefile
@@ -28,7 +28,7 @@
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_EXTLINUX) += bootmeth_extlinux.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_EXTLINUX_PXE) += bootmeth_pxe.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_EFILOADER) += bootmeth_efi.o
-obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_CROS) += bootmeth_cros.o
+obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_CROS) += bootm.o bootm_os.o bootmeth_cros.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_SANDBOX) += bootmeth_sandbox.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_SCRIPT) += bootmeth_script.o
ifdef CONFIG_$(SPL_TPL_)BOOTSTD_FULL
diff --git a/boot/bootm_os.c b/boot/bootm_os.c
index 9c035b5..30296eb 100644
--- a/boot/bootm_os.c
+++ b/boot/bootm_os.c
@@ -317,13 +317,6 @@
if (flag != BOOTM_STATE_OS_GO)
return 0;
-#if defined(CONFIG_FIT)
- if (!images->legacy_hdr_valid) {
- fit_unsupported_reset("VxWorks");
- return 1;
- }
-#endif
-
do_bootvx_fdt(images);
return 1;
diff --git a/cmd/Kconfig b/cmd/Kconfig
index df6d71c..bebe816 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1,7 +1,5 @@
-menu "Command line interface"
-
-config CMDLINE
- bool "Support U-Boot commands"
+menuconfig CMDLINE
+ bool "Command line interface"
default y
help
Enable U-Boot's command-line functions. This provides a means
@@ -11,9 +9,10 @@
Depending on the number of commands enabled, this can add
substantially to the size of U-Boot.
+if CMDLINE
+
config HUSH_PARSER
bool "Use hush shell"
- depends on CMDLINE
help
This option enables the "hush" shell (from Busybox) as command line
interpreter, thus enabling powerful command line syntax like
@@ -25,7 +24,6 @@
config CMDLINE_EDITING
bool "Enable command line editing"
- depends on CMDLINE
default y
help
Enable editing and History functions for interactive command line
@@ -40,15 +38,13 @@
config AUTO_COMPLETE
bool "Enable auto complete using TAB"
- depends on CMDLINE
default y
help
Enable auto completion of commands using TAB.
config SYS_LONGHELP
bool "Enable long help messages"
- depends on CMDLINE
- default y if CMDLINE
+ default y
help
Defined when you want long help messages included
Do not set this option when short of memory.
@@ -75,24 +71,9 @@
int "Maximum number arguments accepted by commands"
default 16
-config SYS_CBSIZE
- int "Console input buffer size"
- default 2048 if ARCH_TEGRA || ARCH_VERSAL || ARCH_ZYNQ || ARCH_ZYNQMP || \
- RCAR_GEN3 || TARGET_SOCFPGA_SOC64
- default 512 if ARCH_MX5 || ARCH_MX6 || ARCH_MX7 || FSL_LSCH2 || \
- FSL_LSCH3 || X86
- default 256 if M68K || PPC
- default 1024
-
-config SYS_PBSIZE
- int "Buffer size for console output"
- default 1024 if ARCH_SUNXI
- default 1044
-
config SYS_XTRACE
bool "Command execution tracer"
- depends on CMDLINE
- default y if CMDLINE
+ default y
help
This option enables the possiblity to print all commands before
executing them and after all variables are evaluated (similar
@@ -374,17 +355,6 @@
help
Support booting VxWorks images via the bootm command.
-config SYS_BOOTM_LEN
- hex "Maximum size of a decompresed OS image"
- depends on CMD_BOOTM || CMD_BOOTI || CMD_BOOTZ || \
- LEGACY_IMAGE_FORMAT || SPL_LEGACY_IMAGE_FORMAT
- default 0x4000000 if PPC || ARM64
- default 0x1000000 if X86 || ARCH_MX6 || ARCH_MX7
- default 0x800000
- help
- This is the maximum size of the buffer that is used to decompress the OS
- image in to, if passing a compressed image to bootm/booti/bootz.
-
config CMD_BOOTEFI
bool "bootefi"
depends on EFI_LOADER
@@ -392,6 +362,15 @@
help
Boot an EFI image from memory.
+config CMD_BOOTEFI_BOOTMGR
+ bool "UEFI Boot Manager command"
+ depends on BOOTEFI_BOOTMGR && CMD_BOOTEFI
+ default y
+ help
+ Select this option to enable the 'bootmgr' subcommand of 'bootefi'.
+ This subcommand will allow you to select the UEFI binary to be booted
+ via UEFI variables Boot####, BootOrder, and BootNext.
+
config CMD_BOOTEFI_HELLO_COMPILE
bool "Compile a standard EFI hello world binary for testing"
depends on CMD_BOOTEFI && !CPU_V7M
@@ -981,7 +960,6 @@
config CMD_BCB
bool "bcb"
- depends on MMC
depends on PARTITIONS
help
Read/modify/write the fields of Bootloader Control Block, usually
@@ -999,7 +977,7 @@
config CMD_BIND
bool "bind/unbind - Bind or unbind a device to/from a driver"
depends on DM
- default y if USB_ETHER
+ imply CMD_DM
help
Bind or unbind a device to/from a driver from the command line.
This is useful in situations where a device may be handled by several
@@ -1152,13 +1130,6 @@
Enable the 'gpt' command to ready and write GPT style partition
tables.
-config RANDOM_UUID
- bool "GPT Random UUID generation"
- select LIB_UUID
- help
- Enable the generation of partitions with random UUIDs if none
- are provided.
-
config CMD_GPT_RENAME
bool "GPT partition renaming commands"
depends on CMD_GPT
@@ -1549,7 +1520,7 @@
Turndra tsi148 device. See the command help for full details.
config CMD_UFS
- bool "Enable UFS - Universal Flash Subsystem commands"
+ bool "ufs - Universal Flash Storage commands"
depends on UFS
help
"This provides commands to initialise and configure universal flash
@@ -1710,7 +1681,6 @@
menuconfig CMD_NET
bool "Network commands"
default y
- imply NETDEVICES
if CMD_NET
@@ -2142,7 +2112,7 @@
config CMD_EFICONFIG
bool "eficonfig - provide menu-driven uefi variables maintenance interface"
default y if !HAS_BOARD_SIZE_LIMIT
- depends on CMD_BOOTEFI_BOOTMGR
+ depends on BOOTEFI_BOOTMGR
select MENU
help
Enable the 'eficonfig' command which provides the menu-driven UEFI
@@ -2257,6 +2227,8 @@
config CMD_QFW
bool "qfw"
select QFW
+ default y if TARGET_QEMU_ARM_32BIT || TARGET_QEMU_ARM_64BIT || \
+ TARGET_QEMU_X86 || TARGET_QEMU_X86_64
help
This provides access to the QEMU firmware interface. The main
feature is to allow easy loading of files passed to qemu-system
@@ -2370,6 +2342,7 @@
config CMD_SELECT_FONT
bool "select font size"
depends on VIDEO
+ default y if CONSOLE_TRUETYPE
help
Enabling this will provide 'font' command.
Allows font selection at runtime.
@@ -2559,6 +2532,15 @@
a number of sub-commands for performing EC tasks such as
updating its flash, accessing a small saved context area
and talking to the I2C bus behind the EC (if there is one).
+
+config CMD_SCMI
+ bool "Enable scmi command"
+ depends on SCMI_FIRMWARE
+ default n
+ help
+ This command provides user interfaces to several SCMI (System
+ Control and Management Interface) protocols available on Arm
+ platforms to manage system resources.
endmenu
menu "Filesystem commands"
@@ -2902,4 +2884,5 @@
default y
help
Enable useful commands for the Meson Soc family developed by Amlogic Inc.
-endmenu
+
+endif
diff --git a/cmd/Makefile b/cmd/Makefile
index 9a6790c..5ed0e40 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -128,6 +128,7 @@
obj-$(CONFIG_CMD_MUX) += mux.o
obj-$(CONFIG_CMD_NAND) += nand.o
obj-$(CONFIG_CMD_NET) += net.o
+obj-$(CONFIG_ENV_SUPPORT) += nvedit.o
obj-$(CONFIG_CMD_NVEDIT_EFI) += nvedit_efi.o
obj-$(CONFIG_CMD_ONENAND) += onenand.o
obj-$(CONFIG_CMD_OSD) += osd.o
@@ -159,6 +160,7 @@
obj-$(CONFIG_CMD_NVME) += nvme.o
obj-$(CONFIG_SANDBOX) += sb.o
obj-$(CONFIG_CMD_SF) += sf.o
+obj-$(CONFIG_CMD_SCMI) += scmi.o
obj-$(CONFIG_CMD_SCSI) += scsi.o disk.o
obj-$(CONFIG_CMD_SHA1SUM) += sha1sum.o
obj-$(CONFIG_CMD_SEAMA) += seama.o
@@ -245,9 +247,6 @@
obj-$(CONFIG_$(SPL_)CMD_TLV_EEPROM) += tlv_eeprom.o
-# core command
-obj-y += nvedit.o
-
obj-$(CONFIG_CMD_BCM_EXT_UTILS) += broadcom/
filechk_data_gz = (echo "static const char data_gz[] ="; cat $< | scripts/bin2c; echo ";")
diff --git a/cmd/bcb.c b/cmd/bcb.c
index 02d0c70..f3b9256 100644
--- a/cmd/bcb.c
+++ b/cmd/bcb.c
@@ -25,9 +25,18 @@
BCB_CMD_STORE,
};
-static int bcb_dev = -1;
-static int bcb_part = -1;
+static const char * const fields[] = {
+ "command",
+ "status",
+ "recovery",
+ "stage"
+};
+
static struct bootloader_message bcb __aligned(ARCH_DMA_MINALIGN) = { { 0 } };
+static struct disk_partition partition_data;
+
+static struct blk_desc *block;
+static struct disk_partition *partition = &partition_data;
static int bcb_cmd_get(char *cmd)
{
@@ -53,6 +62,9 @@
switch (cmd) {
case BCB_CMD_LOAD:
+ if (argc != 3 && argc != 4)
+ goto err;
+ break;
case BCB_CMD_FIELD_SET:
if (argc != 3)
goto err;
@@ -78,7 +90,7 @@
return -1;
}
- if (cmd != BCB_CMD_LOAD && (bcb_dev < 0 || bcb_part < 0)) {
+ if (cmd != BCB_CMD_LOAD && !block) {
printf("Error: Please, load BCB first!\n");
return -1;
}
@@ -90,7 +102,7 @@
return -1;
}
-static int bcb_field_get(char *name, char **fieldp, int *sizep)
+static int bcb_field_get(const char *name, char **fieldp, int *sizep)
{
if (!strcmp(name, "command")) {
*fieldp = bcb.command;
@@ -115,25 +127,30 @@
return 0;
}
-static int __bcb_load(int devnum, const char *partp)
+static void __bcb_reset(void)
{
- struct blk_desc *desc;
- struct disk_partition info;
- u64 cnt;
+ block = NULL;
+ partition = &partition_data;
+ memset(&partition_data, 0, sizeof(struct disk_partition));
+ memset(&bcb, 0, sizeof(struct bootloader_message));
+}
+
+static int __bcb_initialize(const char *iface, int devnum, const char *partp)
+{
char *endp;
int part, ret;
- desc = blk_get_devnum_by_uclass_id(UCLASS_MMC, devnum);
- if (!desc) {
+ block = blk_get_dev(iface, devnum);
+ if (!block) {
ret = -ENODEV;
goto err_read_fail;
}
/*
- * always select the USER mmc hwpart in case another
+ * always select the first hwpart in case another
* blk operation selected a different hwpart
*/
- ret = blk_dselect_hwpart(desc, 0);
+ ret = blk_dselect_hwpart(block, 0);
if (IS_ERR_VALUE(ret)) {
ret = -ENODEV;
goto err_read_fail;
@@ -141,59 +158,84 @@
part = simple_strtoul(partp, &endp, 0);
if (*endp == '\0') {
- ret = part_get_info(desc, part, &info);
+ ret = part_get_info(block, part, partition);
if (ret)
goto err_read_fail;
} else {
- part = part_get_info_by_name(desc, partp, &info);
+ part = part_get_info_by_name(block, partp, partition);
if (part < 0) {
ret = part;
goto err_read_fail;
}
}
+ return CMD_RET_SUCCESS;
+
+err_read_fail:
+ printf("Error: %d %d:%s read failed (%d)\n", block->uclass_id,
+ block->devnum, partition->name, ret);
+ __bcb_reset();
+ return CMD_RET_FAILURE;
+}
+
+static int __bcb_load(void)
+{
+ u64 cnt;
+ int ret;
+
- cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), info.blksz);
- if (cnt > info.size)
+ cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), partition->blksz);
+ if (cnt > partition->size)
goto err_too_small;
- if (blk_dread(desc, info.start, cnt, &bcb) != cnt) {
+ if (blk_dread(block, partition->start, cnt, &bcb) != cnt) {
ret = -EIO;
goto err_read_fail;
}
- bcb_dev = desc->devnum;
- bcb_part = part;
- debug("%s: Loaded from mmc %d:%d\n", __func__, bcb_dev, bcb_part);
+ debug("%s: Loaded from %d %d:%s\n", __func__, block->uclass_id,
+ block->devnum, partition->name);
return CMD_RET_SUCCESS;
err_read_fail:
- printf("Error: mmc %d:%s read failed (%d)\n", devnum, partp, ret);
+ printf("Error: %d %d:%s read failed (%d)\n", block->uclass_id,
+ block->devnum, partition->name, ret);
goto err;
err_too_small:
- printf("Error: mmc %d:%s too small!", devnum, partp);
- goto err;
+ printf("Error: %d %d:%s too small!", block->uclass_id,
+ block->devnum, partition->name);
err:
- bcb_dev = -1;
- bcb_part = -1;
-
+ __bcb_reset();
return CMD_RET_FAILURE;
}
static int do_bcb_load(struct cmd_tbl *cmdtp, int flag, int argc,
char * const argv[])
{
+ int ret;
+ int devnum;
char *endp;
- int devnum = simple_strtoul(argv[1], &endp, 0);
+ char *iface = "mmc";
+
+ if (argc == 4) {
+ iface = argv[1];
+ argc--;
+ argv++;
+ }
+ devnum = simple_strtoul(argv[1], &endp, 0);
if (*endp != '\0') {
printf("Error: Device id '%s' not a number\n", argv[1]);
return CMD_RET_FAILURE;
}
- return __bcb_load(devnum, argv[2]);
+ ret = __bcb_initialize(iface, devnum, argv[2]);
+ if (ret != CMD_RET_SUCCESS)
+ return ret;
+
+ return __bcb_load();
}
-static int __bcb_set(char *fieldp, const char *valp)
+static int __bcb_set(const char *fieldp, const char *valp)
{
int size, len;
char *field, *str, *found, *tmp;
@@ -293,31 +335,20 @@
static int __bcb_store(void)
{
- struct blk_desc *desc;
- struct disk_partition info;
u64 cnt;
int ret;
- desc = blk_get_devnum_by_uclass_id(UCLASS_MMC, bcb_dev);
- if (!desc) {
- ret = -ENODEV;
- goto err;
- }
-
- ret = part_get_info(desc, bcb_part, &info);
- if (ret)
- goto err;
+ cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), partition->blksz);
- cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), info.blksz);
-
- if (blk_dwrite(desc, info.start, cnt, &bcb) != cnt) {
+ if (blk_dwrite(block, partition->start, cnt, &bcb) != cnt) {
ret = -EIO;
goto err;
}
return CMD_RET_SUCCESS;
err:
- printf("Error: mmc %d:%d write failed (%d)\n", bcb_dev, bcb_part, ret);
+ printf("Error: %d %d:%s write failed (%d)\n", block->uclass_id,
+ block->devnum, partition->name, ret);
return CMD_RET_FAILURE;
}
@@ -328,23 +359,59 @@
return __bcb_store();
}
-int bcb_write_reboot_reason(int devnum, char *partp, const char *reasonp)
+int bcb_find_partition_and_load(const char *iface, int devnum, char *partp)
{
int ret;
- ret = __bcb_load(devnum, partp);
- if (ret != CMD_RET_SUCCESS)
- return ret;
+ __bcb_reset();
- ret = __bcb_set("command", reasonp);
+ ret = __bcb_initialize(iface, devnum, partp);
if (ret != CMD_RET_SUCCESS)
return ret;
- ret = __bcb_store();
- if (ret != CMD_RET_SUCCESS)
- return ret;
+ return __bcb_load();
+}
- return 0;
+int bcb_load(struct blk_desc *block_description, struct disk_partition *disk_partition)
+{
+ __bcb_reset();
+
+ block = block_description;
+ partition = disk_partition;
+
+ return __bcb_load();
+}
+
+int bcb_set(enum bcb_field field, const char *value)
+{
+ if (field > BCB_FIELD_STAGE)
+ return CMD_RET_FAILURE;
+ return __bcb_set(fields[field], value);
+}
+
+int bcb_get(enum bcb_field field, char *value_out, size_t value_size)
+{
+ int size;
+ char *field_value;
+
+ if (field > BCB_FIELD_STAGE)
+ return CMD_RET_FAILURE;
+ if (bcb_field_get(fields[field], &field_value, &size))
+ return CMD_RET_FAILURE;
+
+ strlcpy(value_out, field_value, value_size);
+
+ return CMD_RET_SUCCESS;
+}
+
+int bcb_store(void)
+{
+ return __bcb_store();
+}
+
+void bcb_reset(void)
+{
+ __bcb_reset();
}
static struct cmd_tbl cmd_bcb_sub[] = {
@@ -385,21 +452,23 @@
U_BOOT_CMD(
bcb, CONFIG_SYS_MAXARGS, 1, do_bcb,
"Load/set/clear/test/dump/store Android BCB fields",
- "load <dev> <part> - load BCB from mmc <dev>:<part>\n"
- "bcb set <field> <val> - set BCB <field> to <val>\n"
- "bcb clear [<field>] - clear BCB <field> or all fields\n"
- "bcb test <field> <op> <val> - test BCB <field> against <val>\n"
- "bcb dump <field> - dump BCB <field>\n"
- "bcb store - store BCB back to mmc\n"
+ "load <interface> <dev> <part> - load BCB from <interface> <dev>:<part>\n"
+ "load <dev> <part> - load BCB from mmc <dev>:<part>\n"
+ "bcb set <field> <val> - set BCB <field> to <val>\n"
+ "bcb clear [<field>] - clear BCB <field> or all fields\n"
+ "bcb test <field> <op> <val> - test BCB <field> against <val>\n"
+ "bcb dump <field> - dump BCB <field>\n"
+ "bcb store - store BCB back to <interface>\n"
"\n"
"Legend:\n"
- "<dev> - MMC device index containing the BCB partition\n"
- "<part> - MMC partition index or name containing the BCB\n"
- "<field> - one of {command,status,recovery,stage,reserved}\n"
- "<op> - the binary operator used in 'bcb test':\n"
- " '=' returns true if <val> matches the string stored in <field>\n"
- " '~' returns true if <val> matches a subset of <field>'s string\n"
- "<val> - string/text provided as input to bcb {set,test}\n"
- " NOTE: any ':' character in <val> will be replaced by line feed\n"
- " during 'bcb set' and used as separator by upper layers\n"
+ "<interface> - storage device interface (virtio, mmc, etc)\n"
+ "<dev> - storage device index containing the BCB partition\n"
+ "<part> - partition index or name containing the BCB\n"
+ "<field> - one of {command,status,recovery,stage,reserved}\n"
+ "<op> - the binary operator used in 'bcb test':\n"
+ " '=' returns true if <val> matches the string stored in <field>\n"
+ " '~' returns true if <val> matches a subset of <field>'s string\n"
+ "<val> - string/text provided as input to bcb {set,test}\n"
+ " NOTE: any ':' character in <val> will be replaced by line feed\n"
+ " during 'bcb set' and used as separator by upper layers\n"
);
diff --git a/cmd/bind.c b/cmd/bind.c
index 4d1b788..be0d4d2 100644
--- a/cmd/bind.c
+++ b/cmd/bind.c
@@ -246,6 +246,8 @@
"Bind a device to a driver",
"<node path> <driver>\n"
"bind <class> <index> <driver>\n"
+ "Use 'dm tree' to list all devices registered in the driver model,\n"
+ "their path, class, index and current driver.\n"
);
U_BOOT_CMD(
@@ -254,4 +256,6 @@
"<node path>\n"
"unbind <class> <index>\n"
"unbind <class> <index> <driver>\n"
+ "Use 'dm tree' to list all devices registered in the driver model,\n"
+ "their path, class, index and current driver.\n"
);
diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 20e5c94..4d74969 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -356,6 +356,7 @@
efi_status_t ret;
efi_uintn_t exit_data_size = 0;
u16 *exit_data = NULL;
+ struct efi_event *evt;
/* On ARM switch from EL3 or secure mode to EL2 or non-secure mode */
switch_to_non_secure_mode();
@@ -394,6 +395,17 @@
log_err("Failed to remove loadfile2 for initrd\n");
}
+ /* Notify EFI_EVENT_GROUP_RETURN_TO_EFIBOOTMGR event group. */
+ list_for_each_entry(evt, &efi_events, link) {
+ if (evt->group &&
+ !guidcmp(evt->group,
+ &efi_guid_event_group_return_to_efibootmgr)) {
+ efi_signal_event(evt);
+ EFI_CALL(systab.boottime->close_event(evt));
+ break;
+ }
+ }
+
/* Control is returned to U-Boot, disable EFI watchdog */
efi_set_watchdog(0);
diff --git a/cmd/efidebug.c b/cmd/efidebug.c
index 201531a..78ef16f 100644
--- a/cmd/efidebug.c
+++ b/cmd/efidebug.c
@@ -19,6 +19,7 @@
#include <log.h>
#include <malloc.h>
#include <mapmem.h>
+#include <net.h>
#include <part.h>
#include <search.h>
#include <linux/ctype.h>
@@ -708,6 +709,65 @@
}
/**
+ * efi_boot_add_uri() - set URI load option
+ *
+ * @argc: Number of arguments
+ * @argv: Argument array
+ * @var_name16: variable name buffer
+ * @var_name16_size: variable name buffer size
+ * @lo: pointer to the load option
+ * @file_path: buffer to set the generated device path pointer
+ * @fp_size: file_path size
+ * Return: CMD_RET_SUCCESS on success,
+ * CMD_RET_USAGE or CMD_RET_RET_FAILURE on failure
+ */
+static int efi_boot_add_uri(int argc, char *const argv[], u16 *var_name16,
+ size_t var_name16_size, struct efi_load_option *lo,
+ struct efi_device_path **file_path,
+ efi_uintn_t *fp_size)
+{
+ int id;
+ char *pos;
+ char *endp;
+ u16 *label;
+ efi_uintn_t uridp_len;
+ struct efi_device_path_uri *uridp;
+
+ if (argc < 3 || lo->label)
+ return CMD_RET_USAGE;
+
+ id = (int)hextoul(argv[1], &endp);
+ if (*endp != '\0' || id > 0xffff)
+ return CMD_RET_USAGE;
+
+ label = efi_convert_string(argv[2]);
+ if (!label)
+ return CMD_RET_FAILURE;
+
+ if (!wget_validate_uri(argv[3])) {
+ printf("ERROR: invalid URI\n");
+ return CMD_RET_FAILURE;
+ }
+
+ efi_create_indexed_name(var_name16, var_name16_size, "Boot", id);
+ lo->label = label;
+
+ uridp_len = sizeof(struct efi_device_path) + strlen(argv[3]) + 1;
+ uridp = efi_alloc(uridp_len + sizeof(END));
+ uridp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE;
+ uridp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_URI;
+ uridp->dp.length = uridp_len;
+ strcpy(uridp->uri, argv[3]);
+ pos = (char *)uridp + uridp_len;
+ memcpy(pos, &END, sizeof(END));
+
+ *file_path = &uridp->dp;
+ *fp_size += uridp_len + sizeof(END);
+
+ return CMD_RET_SUCCESS;
+}
+
+/**
* do_efi_boot_add() - set UEFI load option
*
* @cmdtp: Command table
@@ -829,6 +889,21 @@
argc -= 1;
argv += 1;
break;
+ case 'u':
+ if (IS_ENABLED(CONFIG_EFI_HTTP_BOOT)) {
+ r = efi_boot_add_uri(argc, argv, var_name16,
+ sizeof(var_name16), &lo,
+ &file_path, &fp_size);
+ if (r != CMD_RET_SUCCESS)
+ goto out;
+ fp_free = file_path;
+ argc -= 3;
+ argv += 3;
+ } else{
+ r = CMD_RET_USAGE;
+ goto out;
+ }
+ break;
default:
r = CMD_RET_USAGE;
goto out;
@@ -1491,6 +1566,9 @@
" -b|-B <bootid> <label> <interface> <devnum>[:<part>] <file path>\n"
" -i|-I <interface> <devnum>[:<part>] <initrd file path>\n"
" (-b, -i for short form device path)\n"
+#if (IS_ENABLED(CONFIG_EFI_HTTP_BOOT))
+ " -u <bootid> <label> <uri>\n"
+#endif
" -s '<optional data>'\n"
"efidebug boot rm <bootid#1> [<bootid#2> [<bootid#3> [...]]]\n"
" - delete UEFI BootXXXX variables\n"
diff --git a/cmd/nand.c b/cmd/nand.c
index 71b8f96..fe834c4 100644
--- a/cmd/nand.c
+++ b/cmd/nand.c
@@ -34,6 +34,7 @@
#include <env.h>
#include <watchdog.h>
#include <malloc.h>
+#include <mapmem.h>
#include <asm/byteorder.h>
#include <jffs2/jffs2.h>
#include <nand.h>
@@ -432,7 +433,7 @@
env_set_hex("nand_erasesize", mtd->erasesize);
}
-static int raw_access(struct mtd_info *mtd, ulong addr, loff_t off,
+static int raw_access(struct mtd_info *mtd, void *buf, loff_t off,
ulong count, int read, int no_verify)
{
int ret = 0;
@@ -440,8 +441,8 @@
while (count--) {
/* Raw access */
mtd_oob_ops_t ops = {
- .datbuf = (u8 *)addr,
- .oobbuf = ((u8 *)addr) + mtd->writesize,
+ .datbuf = buf,
+ .oobbuf = buf + mtd->writesize,
.len = mtd->writesize,
.ooblen = mtd->oobsize,
.mode = MTD_OPS_RAW
@@ -461,7 +462,7 @@
break;
}
- addr += mtd->writesize + mtd->oobsize;
+ buf += mtd->writesize + mtd->oobsize;
off += mtd->writesize;
}
@@ -675,6 +676,7 @@
int read;
int raw = 0;
int no_verify = 0;
+ void *buf;
if (argc < 4)
goto usage;
@@ -730,32 +732,32 @@
}
mtd = get_nand_dev_by_index(dev);
+ buf = map_sysmem(addr, maxsize);
if (!s || !strcmp(s, ".jffs2") ||
!strcmp(s, ".e") || !strcmp(s, ".i")) {
if (read)
ret = nand_read_skip_bad(mtd, off, &rwsize,
- NULL, maxsize,
- (u_char *)addr);
+ NULL, maxsize, buf);
else
ret = nand_write_skip_bad(mtd, off, &rwsize,
- NULL, maxsize,
- (u_char *)addr,
+ NULL, maxsize, buf,
WITH_WR_VERIFY);
#ifdef CONFIG_CMD_NAND_TRIMFFS
} else if (!strcmp(s, ".trimffs")) {
if (read) {
printf("Unknown nand command suffix '%s'\n", s);
+ unmap_sysmem(buf);
return 1;
}
ret = nand_write_skip_bad(mtd, off, &rwsize, NULL,
- maxsize, (u_char *)addr,
+ maxsize, buf,
WITH_DROP_FFS | WITH_WR_VERIFY);
#endif
} else if (!strcmp(s, ".oob")) {
/* out-of-band data */
mtd_oob_ops_t ops = {
- .oobbuf = (u8 *)addr,
+ .oobbuf = buf,
.ooblen = rwsize,
.mode = MTD_OPS_RAW
};
@@ -765,13 +767,15 @@
else
ret = mtd_write_oob(mtd, off, &ops);
} else if (raw) {
- ret = raw_access(mtd, addr, off, pagecount, read,
+ ret = raw_access(mtd, buf, off, pagecount, read,
no_verify);
} else {
printf("Unknown nand command suffix '%s'.\n", s);
+ unmap_sysmem(buf);
return 1;
}
+ unmap_sysmem(buf);
printf(" %zu bytes %s: %s\n", rwsize,
read ? "read" : "written", ret ? "ERROR" : "OK");
diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index daf1ad3..e77338f 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -49,20 +49,6 @@
*/
#define MAX_ENV_SIZE (1 << 20) /* 1 MiB */
-/*
- * This variable is incremented on each do_env_set(), so it can
- * be used via env_get_id() as an indication, if the environment
- * has changed or not. So it is possible to reread an environment
- * variable only if the environment was changed ... done so for
- * example in NetInitLoop()
- */
-static int env_id = 1;
-
-int env_get_id(void)
-{
- return env_id;
-}
-
#ifndef CONFIG_SPL_BUILD
/*
* Command interface: print one or all environment variables
@@ -198,104 +184,6 @@
#endif
#endif /* CONFIG_SPL_BUILD */
-/*
- * Set a new environment variable,
- * or replace or delete an existing one.
- */
-static int _do_env_set(int flag, int argc, char *const argv[], int env_flag)
-{
- int i, len;
- char *name, *value, *s;
- struct env_entry e, *ep;
-
- debug("Initial value for argc=%d\n", argc);
-
-#if !IS_ENABLED(CONFIG_SPL_BUILD) && IS_ENABLED(CONFIG_CMD_NVEDIT_EFI)
- if (argc > 1 && argv[1][0] == '-' && argv[1][1] == 'e')
- return do_env_set_efi(NULL, flag, --argc, ++argv);
-#endif
-
- while (argc > 1 && **(argv + 1) == '-') {
- char *arg = *++argv;
-
- --argc;
- while (*++arg) {
- switch (*arg) {
- case 'f': /* force */
- env_flag |= H_FORCE;
- break;
- default:
- return CMD_RET_USAGE;
- }
- }
- }
- debug("Final value for argc=%d\n", argc);
- name = argv[1];
-
- if (strchr(name, '=')) {
- printf("## Error: illegal character '='"
- "in variable name \"%s\"\n", name);
- return 1;
- }
-
- env_id++;
-
- /* Delete only ? */
- if (argc < 3 || argv[2] == NULL) {
- int rc = hdelete_r(name, &env_htab, env_flag);
-
- /* If the variable didn't exist, don't report an error */
- return rc && rc != -ENOENT ? 1 : 0;
- }
-
- /*
- * Insert / replace new value
- */
- for (i = 2, len = 0; i < argc; ++i)
- len += strlen(argv[i]) + 1;
-
- value = malloc(len);
- if (value == NULL) {
- printf("## Can't malloc %d bytes\n", len);
- return 1;
- }
- for (i = 2, s = value; i < argc; ++i) {
- char *v = argv[i];
-
- while ((*s++ = *v++) != '\0')
- ;
- *(s - 1) = ' ';
- }
- if (s != value)
- *--s = '\0';
-
- e.key = name;
- e.data = value;
- hsearch_r(e, ENV_ENTER, &ep, &env_htab, env_flag);
- free(value);
- if (!ep) {
- printf("## Error inserting \"%s\" variable, errno=%d\n",
- name, errno);
- return 1;
- }
-
- return 0;
-}
-
-int env_set(const char *varname, const char *varvalue)
-{
- const char * const argv[4] = { "setenv", varname, varvalue, NULL };
-
- /* before import into hashtable */
- if (!(gd->flags & GD_FLG_ENV_READY))
- return 1;
-
- if (varvalue == NULL || varvalue[0] == '\0')
- return _do_env_set(0, 2, (char * const *)argv, H_PROGRAMMATIC);
- else
- return _do_env_set(0, 3, (char * const *)argv, H_PROGRAMMATIC);
-}
-
#ifndef CONFIG_SPL_BUILD
static int do_env_set(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
@@ -303,7 +191,7 @@
if (argc < 2)
return CMD_RET_USAGE;
- return _do_env_set(flag, argc, argv, H_INTERACTIVE);
+ return env_do_env_set(flag, argc, argv, H_INTERACTIVE);
}
/*
@@ -381,7 +269,7 @@
}
/* Continue calling setenv code */
- return _do_env_set(flag, len, local_args, H_INTERACTIVE);
+ return env_do_env_set(flag, len, local_args, H_INTERACTIVE);
}
#endif
@@ -561,12 +449,12 @@
if (buffer[0] == '\0') {
const char * const _argv[3] = { "setenv", argv[1], NULL };
- return _do_env_set(0, 2, (char * const *)_argv, H_INTERACTIVE);
+ return env_do_env_set(0, 2, (char * const *)_argv, H_INTERACTIVE);
} else {
const char * const _argv[4] = { "setenv", argv[1], buffer,
NULL };
- return _do_env_set(0, 3, (char * const *)_argv, H_INTERACTIVE);
+ return env_do_env_set(0, 3, (char * const *)_argv, H_INTERACTIVE);
}
}
#endif /* CONFIG_CMD_EDITENV */
@@ -679,7 +567,7 @@
}
debug("Final value for argc=%d\n", argc);
- env_id++;
+ env_inc_id();
while (--argc > 0) {
char *name = *++argv;
diff --git a/cmd/scmi.c b/cmd/scmi.c
new file mode 100644
index 0000000..664062c
--- /dev/null
+++ b/cmd/scmi.c
@@ -0,0 +1,384 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * SCMI (System Control and Management Interface) utility command
+ *
+ * Copyright (c) 2023 Linaro Limited
+ * Author: AKASHI Takahiro
+ */
+
+#include <command.h>
+#include <exports.h>
+#include <scmi_agent.h>
+#include <scmi_agent-uclass.h>
+#include <stdlib.h>
+#include <asm/types.h>
+#include <dm/device.h>
+#include <dm/uclass.h> /* uclass_get_device */
+#include <linux/bitfield.h>
+#include <linux/bitops.h>
+
+struct {
+ enum scmi_std_protocol id;
+ const char *name;
+} protocol_name[] = {
+ {SCMI_PROTOCOL_ID_BASE, "Base"},
+ {SCMI_PROTOCOL_ID_POWER_DOMAIN, "Power domain management"},
+ {SCMI_PROTOCOL_ID_SYSTEM, "System power management"},
+ {SCMI_PROTOCOL_ID_PERF, "Performance domain management"},
+ {SCMI_PROTOCOL_ID_CLOCK, "Clock management"},
+ {SCMI_PROTOCOL_ID_SENSOR, "Sensor management"},
+ {SCMI_PROTOCOL_ID_RESET_DOMAIN, "Reset domain management"},
+ {SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN, "Voltage domain management"},
+};
+
+/**
+ * get_agent() - get SCMI agent device
+ *
+ * Return: Pointer to SCMI agent device on success, NULL on failure
+ */
+static struct udevice *get_agent(void)
+{
+ struct udevice *agent;
+
+ if (uclass_get_device(UCLASS_SCMI_AGENT, 0, &agent)) {
+ printf("Cannot find any SCMI agent\n");
+ return NULL;
+ }
+
+ return agent;
+}
+
+/**
+ * get_base_proto() - get SCMI base protocol device
+ * @agent: SCMI agent device
+ *
+ * Return: Pointer to SCMI base protocol device on success,
+ * NULL on failure
+ */
+static struct udevice *get_base_proto(struct udevice *agent)
+{
+ struct udevice *base_proto;
+
+ if (!agent) {
+ agent = get_agent();
+ if (!agent)
+ return NULL;
+ }
+
+ base_proto = scmi_get_protocol(agent, SCMI_PROTOCOL_ID_BASE);
+ if (!base_proto) {
+ printf("SCMI base protocol not found\n");
+ return NULL;
+ }
+
+ return base_proto;
+}
+
+/**
+ * get_proto_name() - get the name of SCMI protocol
+ *
+ * @id: SCMI Protocol ID
+ *
+ * Get the printable name of the protocol, @id
+ *
+ * Return: Name string on success, NULL on failure
+ */
+static const char *get_proto_name(enum scmi_std_protocol id)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(protocol_name); i++)
+ if (id == protocol_name[i].id)
+ return protocol_name[i].name;
+
+ return NULL;
+}
+
+/**
+ * do_scmi_info() - get the information of SCMI services
+ *
+ * @cmdtp: Command table
+ * @flag: Command flag
+ * @argc: Number of arguments
+ * @argv: Argument array
+ *
+ * Get the information of SCMI services using various interfaces
+ * provided by the Base protocol.
+ *
+ * Return: CMD_RET_SUCCESS on success, CMD_RET_RET_FAILURE on failure
+ */
+static int do_scmi_info(struct cmd_tbl *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ struct udevice *agent, *base_proto;
+ u32 agent_id, num_protocols;
+ u8 *agent_name, *protocols;
+ int i, ret;
+
+ if (argc != 1)
+ return CMD_RET_USAGE;
+
+ agent = get_agent();
+ if (!agent)
+ return CMD_RET_FAILURE;
+ base_proto = get_base_proto(agent);
+ if (!base_proto)
+ return CMD_RET_FAILURE;
+
+ printf("SCMI device: %s\n", agent->name);
+ printf(" protocol version: 0x%x\n", scmi_version(agent));
+ printf(" # of agents: %d\n", scmi_num_agents(agent));
+ for (i = 0; i < scmi_num_agents(agent); i++) {
+ ret = scmi_base_discover_agent(base_proto, i, &agent_id,
+ &agent_name);
+ if (ret) {
+ if (ret != -EOPNOTSUPP)
+ printf("base_discover_agent() failed for id: %d (%d)\n",
+ i, ret);
+ break;
+ }
+ printf(" %c%2d: %s\n", i == scmi_agent_id(agent) ? '>' : ' ',
+ i, agent_name);
+ free(agent_name);
+ }
+ printf(" # of protocols: %d\n", scmi_num_protocols(agent));
+ num_protocols = scmi_num_protocols(agent);
+ protocols = scmi_protocols(agent);
+ if (protocols)
+ for (i = 0; i < num_protocols; i++)
+ printf(" %s\n", get_proto_name(protocols[i]));
+ printf(" vendor: %s\n", scmi_vendor(agent));
+ printf(" sub vendor: %s\n", scmi_sub_vendor(agent));
+ printf(" impl version: 0x%x\n", scmi_impl_version(agent));
+
+ return CMD_RET_SUCCESS;
+}
+
+/**
+ * do_scmi_set_dev() - set access permission to device
+ *
+ * @cmdtp: Command table
+ * @flag: Command flag
+ * @argc: Number of arguments
+ * @argv: Argument array
+ *
+ * Set access permission to device with SCMI_BASE_SET_DEVICE_PERMISSIONS
+ *
+ * Return: CMD_RET_SUCCESS on success, CMD_RET_RET_FAILURE on failure
+ */
+static int do_scmi_set_dev(struct cmd_tbl *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ u32 agent_id, device_id, flags, attributes;
+ char *end;
+ struct udevice *base_proto;
+ int ret;
+
+ if (argc != 4)
+ return CMD_RET_USAGE;
+
+ agent_id = simple_strtoul(argv[1], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ device_id = simple_strtoul(argv[2], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ flags = simple_strtoul(argv[3], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ base_proto = get_base_proto(NULL);
+ if (!base_proto)
+ return CMD_RET_FAILURE;
+
+ ret = scmi_base_protocol_message_attrs(base_proto,
+ SCMI_BASE_SET_DEVICE_PERMISSIONS,
+ &attributes);
+ if (ret) {
+ printf("This operation is not supported\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = scmi_base_set_device_permissions(base_proto, agent_id,
+ device_id, flags);
+ if (ret) {
+ printf("%s access to device:%u failed (%d)\n",
+ flags ? "Allowing" : "Denying", device_id, ret);
+ return CMD_RET_FAILURE;
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
+/**
+ * do_scmi_set_proto() - set protocol permission to device
+ *
+ * @cmdtp: Command table
+ * @flag: Command flag
+ * @argc: Number of arguments
+ * @argv: Argument array
+ *
+ * Set protocol permission to device with SCMI_BASE_SET_PROTOCOL_PERMISSIONS
+ *
+ * Return: CMD_RET_SUCCESS on success, CMD_RET_RET_FAILURE on failure
+ */
+static int do_scmi_set_proto(struct cmd_tbl *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ u32 agent_id, device_id, protocol_id, flags, attributes;
+ char *end;
+ struct udevice *base_proto;
+ int ret;
+
+ if (argc != 5)
+ return CMD_RET_USAGE;
+
+ agent_id = simple_strtoul(argv[1], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ device_id = simple_strtoul(argv[2], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ protocol_id = simple_strtoul(argv[3], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ flags = simple_strtoul(argv[4], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ base_proto = get_base_proto(NULL);
+ if (!base_proto)
+ return CMD_RET_FAILURE;
+
+ ret = scmi_base_protocol_message_attrs(base_proto,
+ SCMI_BASE_SET_PROTOCOL_PERMISSIONS,
+ &attributes);
+ if (ret) {
+ printf("This operation is not supported\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = scmi_base_set_protocol_permissions(base_proto, agent_id,
+ device_id, protocol_id,
+ flags);
+ if (ret) {
+ printf("%s access to protocol:0x%x on device:%u failed (%d)\n",
+ flags ? "Allowing" : "Denying", protocol_id, device_id,
+ ret);
+ return CMD_RET_FAILURE;
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
+/**
+ * do_scmi_reset() - reset platform resource settings
+ *
+ * @cmdtp: Command table
+ * @flag: Command flag
+ * @argc: Number of arguments
+ * @argv: Argument array
+ *
+ * Reset platform resource settings with BASE_RESET_AGENT_CONFIGURATION
+ *
+ * Return: CMD_RET_SUCCESS on success, CMD_RET_RET_FAILURE on failure
+ */
+static int do_scmi_reset(struct cmd_tbl *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ u32 agent_id, flags, attributes;
+ char *end;
+ struct udevice *base_proto;
+ int ret;
+
+ if (argc != 3)
+ return CMD_RET_USAGE;
+
+ agent_id = simple_strtoul(argv[1], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ flags = simple_strtoul(argv[2], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ base_proto = get_base_proto(NULL);
+ if (!base_proto)
+ return CMD_RET_FAILURE;
+
+ ret = scmi_base_protocol_message_attrs(base_proto,
+ SCMI_BASE_RESET_AGENT_CONFIGURATION,
+ &attributes);
+ if (ret) {
+ printf("Reset is not supported\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = scmi_base_reset_agent_configuration(base_proto, agent_id, flags);
+ if (ret) {
+ printf("Reset failed (%d)\n", ret);
+ return CMD_RET_FAILURE;
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
+static struct cmd_tbl cmd_scmi_sub[] = {
+ U_BOOT_CMD_MKENT(info, CONFIG_SYS_MAXARGS, 1,
+ do_scmi_info, "", ""),
+ U_BOOT_CMD_MKENT(perm_dev, CONFIG_SYS_MAXARGS, 1,
+ do_scmi_set_dev, "", ""),
+ U_BOOT_CMD_MKENT(perm_proto, CONFIG_SYS_MAXARGS, 1,
+ do_scmi_set_proto, "", ""),
+ U_BOOT_CMD_MKENT(reset, CONFIG_SYS_MAXARGS, 1,
+ do_scmi_reset, "", ""),
+};
+
+/**
+ * do_scmi() - SCMI utility
+ *
+ * @cmdtp: Command table
+ * @flag: Command flag
+ * @argc: Number of arguments
+ * @argv: Argument array
+ *
+ * Provide user interfaces to SCMI protocols.
+ *
+ * Return: CMD_RET_SUCCESS on success,
+ * CMD_RET_USAGE or CMD_RET_RET_FAILURE on failure
+ */
+static int do_scmi(struct cmd_tbl *cmdtp, int flag,
+ int argc, char *const argv[])
+{
+ struct cmd_tbl *cp;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
+ argc--; argv++;
+
+ cp = find_cmd_tbl(argv[0], cmd_scmi_sub, ARRAY_SIZE(cmd_scmi_sub));
+ if (!cp)
+ return CMD_RET_USAGE;
+
+ return cp->cmd(cmdtp, flag, argc, argv);
+}
+
+static char scmi_help_text[] =
+ " - SCMI utility\n"
+ " info - get the info of SCMI services\n"
+ " perm_dev <agent-id in hex> <device-id in hex> <flags in hex>\n"
+ " - set access permission to device\n"
+ " perm_proto <agent-id in hex> <device-id in hex> <protocol-id in hex> <flags in hex>\n"
+ " - set protocol permission to device\n"
+ " reset <agent-id in hex> <flags in hex>\n"
+ " - reset platform resource settings\n"
+ "";
+
+U_BOOT_CMD(scmi, CONFIG_SYS_MAXARGS, 0, do_scmi, "SCMI utility",
+ scmi_help_text);
diff --git a/cmd/scsi.c b/cmd/scsi.c
index 4549995..c501d7f 100644
--- a/cmd/scsi.c
+++ b/cmd/scsi.c
@@ -34,9 +34,6 @@
if (argc == 2) {
if (strncmp(argv[1], "res", 3) == 0) {
printf("\nReset SCSI\n");
-#ifndef CONFIG_DM_SCSI
- scsi_bus_reset(NULL);
-#endif
ret = scsi_scan(true);
if (ret)
return CMD_RET_FAILURE;
diff --git a/cmd/ufs.c b/cmd/ufs.c
index 282b414..536bd85 100644
--- a/cmd/ufs.c
+++ b/cmd/ufs.c
@@ -32,6 +32,6 @@
}
U_BOOT_CMD(ufs, 3, 1, do_ufs,
- "UFS sub system",
+ "UFS sub-system",
"init [dev] - init UFS subsystem\n"
);
diff --git a/cmd/version.c b/cmd/version.c
index 87e1fa4..d99a44f 100644
--- a/cmd/version.c
+++ b/cmd/version.c
@@ -7,21 +7,12 @@
#include <common.h>
#include <command.h>
#include <display_options.h>
-#include <timestamp.h>
-#include <version.h>
#include <version_string.h>
#include <linux/compiler.h>
#ifdef CONFIG_SYS_COREBOOT
#include <asm/cb_sysinfo.h>
#endif
-#define U_BOOT_VERSION_STRING U_BOOT_VERSION " (" U_BOOT_DATE " - " \
- U_BOOT_TIME " " U_BOOT_TZ ")" CONFIG_IDENT_STRING
-
-const char version_string[] = U_BOOT_VERSION_STRING;
-const unsigned short version_num = U_BOOT_VERSION_NUM;
-const unsigned char version_num_patch = U_BOOT_VERSION_NUM_PATCH;
-
static int do_version(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
diff --git a/common/Kconfig b/common/Kconfig
index 0f54819..0283701 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -52,6 +52,29 @@
The buffer is allocated immediately after the malloc() region is
ready.
+config SYS_CBSIZE
+ int "Console input buffer size"
+ default 2048 if ARCH_TEGRA || ARCH_VERSAL || ARCH_ZYNQ || ARCH_ZYNQMP || \
+ RCAR_GEN3 || TARGET_SOCFPGA_SOC64
+ default 512 if ARCH_MX5 || ARCH_MX6 || ARCH_MX7 || FSL_LSCH2 || \
+ FSL_LSCH3 || X86
+ default 256 if M68K || PPC
+ default 1024
+ help
+ Set the size of the console input buffer. This is used both in the
+ case of reading input literally from the user in some manner as well
+ as when we need to construct or modify that type of input, for
+ example when constructing "bootargs" for the OS.
+
+config SYS_PBSIZE
+ int "Console output buffer size"
+ default 1024 if ARCH_SUNXI
+ default 1044
+ help
+ Set the size of the console output buffer. This is used when we need
+ to work with some form of a buffer while providing output in some
+ form to the user.
+
config DISABLE_CONSOLE
bool "Add functionality to disable console completely"
help
diff --git a/common/Makefile b/common/Makefile
index cdeadf7..1495436 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -8,8 +8,10 @@
obj-y += init/
obj-y += main.o
obj-y += exports.o
+obj-y += cli_getch.o cli_simple.o cli_readline.o
obj-$(CONFIG_HUSH_PARSER) += cli_hush.o
obj-$(CONFIG_AUTOBOOT) += autoboot.o
+obj-y += version.o
# # boards
obj-y += board_f.o
@@ -37,7 +39,6 @@
obj-$(CONFIG_MENU) += menu.o
obj-$(CONFIG_UPDATE_COMMON) += update.o
obj-$(CONFIG_USB_KEYBOARD) += usb_kbd.o
-obj-$(CONFIG_CMDLINE) += cli_getch.o cli_readline.o cli_simple.o
endif # !CONFIG_SPL_BUILD
diff --git a/common/board_info.c b/common/board_info.c
index e0f2d93..f4c385a 100644
--- a/common/board_info.c
+++ b/common/board_info.c
@@ -15,41 +15,65 @@
return 0;
}
-/*
- * Check sysinfo for board information. Failing that if the root node of the DTB
- * has a "model" property, show it.
- *
- * Then call checkboard().
- */
-int __weak show_board_info(void)
+static const struct to_show {
+ const char *name;
+ enum sysinfo_id id;
+} to_show[] = {
+ { "Manufacturer", SYSINFO_ID_BOARD_MANUFACTURER},
+ { "Prior-stage version", SYSINFO_ID_PRIOR_STAGE_VERSION },
+ { "Prior-stage date", SYSINFO_ID_PRIOR_STAGE_DATE },
+ { /* sentinel */ }
+};
+
+static int try_sysinfo(void)
+{
+ struct udevice *dev;
+ char str[80];
+ int ret;
+
+ /* This might provide more detail */
+ ret = sysinfo_get(&dev);
+ if (ret)
+ return ret;
+
+ ret = sysinfo_detect(dev);
+ if (ret)
+ return ret;
+
+ ret = sysinfo_get_str(dev, SYSINFO_ID_BOARD_MODEL, sizeof(str), str);
+ if (ret)
+ return ret;
+ printf("Model: %s\n", str);
+
+ if (IS_ENABLED(CONFIG_SYSINFO_EXTRA)) {
+ const struct to_show *item;
+
+ for (item = to_show; item->id; item++) {
+ ret = sysinfo_get_str(dev, item->id, sizeof(str), str);
+ if (!ret)
+ printf("%s: %s\n", item->name, str);
+ }
+ }
+
+ return 0;
+}
+
+int show_board_info(void)
{
if (IS_ENABLED(CONFIG_OF_CONTROL)) {
- struct udevice *dev;
- const char *model;
- char str[80];
int ret = -ENOSYS;
- if (IS_ENABLED(CONFIG_SYSINFO)) {
- /* This might provide more detail */
- ret = sysinfo_get(&dev);
- if (!ret) {
- ret = sysinfo_detect(dev);
- if (!ret) {
- ret = sysinfo_get_str(dev,
- SYSINFO_ID_BOARD_MODEL,
- sizeof(str), str);
- }
- }
- }
+ if (IS_ENABLED(CONFIG_SYSINFO))
+ ret = try_sysinfo();
/* Fail back to the main 'model' if available */
- if (ret)
- model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
- else
- model = str;
+ if (ret) {
+ const char *model;
- if (model)
- printf("Model: %s\n", model);
+ model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
+ if (model)
+ printf("Model: %s\n", model);
+ }
}
return checkboard();
diff --git a/common/board_r.c b/common/board_r.c
index a796784..da0b80f 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -472,17 +472,6 @@
}
#endif
-#if defined(CONFIG_SCSI) && !defined(CONFIG_DM_SCSI)
-static int initr_scsi(void)
-{
- puts("SCSI: ");
- scsi_init();
- puts("\n");
-
- return 0;
-}
-#endif
-
#ifdef CONFIG_CMD_NET
static int initr_net(void)
{
@@ -732,10 +721,6 @@
#ifdef CONFIG_BOARD_LATE_INIT
board_late_init,
#endif
-#if defined(CONFIG_SCSI) && !defined(CONFIG_DM_SCSI)
- INIT_FUNC_WATCHDOG_RESET
- initr_scsi,
-#endif
#ifdef CONFIG_BITBANGMII
bb_miiphy_init,
#endif
diff --git a/common/cli_simple.c b/common/cli_simple.c
index e80ba48..f89ba92 100644
--- a/common/cli_simple.c
+++ b/common/cli_simple.c
@@ -22,44 +22,6 @@
#define debug_parser(fmt, args...) \
debug_cond(DEBUG_PARSER, fmt, ##args)
-
-int cli_simple_parse_line(char *line, char *argv[])
-{
- int nargs = 0;
-
- debug_parser("%s: \"%s\"\n", __func__, line);
- while (nargs < CONFIG_SYS_MAXARGS) {
- /* skip any white space */
- while (isblank(*line))
- ++line;
-
- if (*line == '\0') { /* end of line, no more args */
- argv[nargs] = NULL;
- debug_parser("%s: nargs=%d\n", __func__, nargs);
- return nargs;
- }
-
- argv[nargs++] = line; /* begin of argument string */
-
- /* find end of string */
- while (*line && !isblank(*line))
- ++line;
-
- if (*line == '\0') { /* end of line, no more args */
- argv[nargs] = NULL;
- debug_parser("parse_line: nargs=%d\n", nargs);
- return nargs;
- }
-
- *line++ = '\0'; /* terminate current arg */
- }
-
- printf("** Too many args (max. %d) **\n", CONFIG_SYS_MAXARGS);
-
- debug_parser("%s: nargs=%d\n", __func__, nargs);
- return nargs;
-}
-
int cli_simple_process_macros(const char *input, char *output, int max_size)
{
char c, prev;
@@ -172,6 +134,44 @@
return ret;
}
+#ifdef CONFIG_CMDLINE
+int cli_simple_parse_line(char *line, char *argv[])
+{
+ int nargs = 0;
+
+ debug_parser("%s: \"%s\"\n", __func__, line);
+ while (nargs < CONFIG_SYS_MAXARGS) {
+ /* skip any white space */
+ while (isblank(*line))
+ ++line;
+
+ if (*line == '\0') { /* end of line, no more args */
+ argv[nargs] = NULL;
+ debug_parser("%s: nargs=%d\n", __func__, nargs);
+ return nargs;
+ }
+
+ argv[nargs++] = line; /* begin of argument string */
+
+ /* find end of string */
+ while (*line && !isblank(*line))
+ ++line;
+
+ if (*line == '\0') { /* end of line, no more args */
+ argv[nargs] = NULL;
+ debug_parser("parse_line: nargs=%d\n", nargs);
+ return nargs;
+ }
+
+ *line++ = '\0'; /* terminate current arg */
+ }
+
+ printf("** Too many args (max. %d) **\n", CONFIG_SYS_MAXARGS);
+
+ debug_parser("%s: nargs=%d\n", __func__, nargs);
+ return nargs;
+}
+
/*
* WARNING:
*
@@ -346,3 +346,4 @@
return rcode;
}
+#endif
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 25cd18a..fc284a5 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -183,6 +183,7 @@
config SPL_SHOW_ERRORS
bool "Show more information when something goes wrong"
+ depends on SPL_LIBCOMMON_SUPPORT
help
This enabled more verbose error messages and checking when something
goes wrong in SPL. For example, it shows the error code when U-Boot
@@ -279,8 +280,15 @@
spl_board_init() from board_init_r(). This function should be
provided by the board.
+config SPL_LOAD_BLOCK
+ bool
+ help
+ Support loading images from block devices. This adds a bl_len member
+ to struct spl_load_info.
+
config SPL_BOOTROM_SUPPORT
bool "Support returning to the BOOTROM"
+ select SPL_LOAD_BLOCK if MACH_IMX
help
Some platforms (e.g. the Rockchip RK3368) provide support in their
ROM for loading the next boot-stage after performing basic setup
@@ -473,6 +481,11 @@
banner ("U-Boot SPL ..."). This function should be provided by
the board.
+config SPL_SYS_MMCSD_RAW_MODE
+ bool
+ help
+ Support booting from an MMC without a filesystem.
+
config SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
bool "MMC raw mode: by sector"
default y if ARCH_SUNXI || ARCH_DAVINCI || ARCH_UNIPHIER || \
@@ -481,6 +494,8 @@
ARCH_AT91 || ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || \
OMAP44XX || OMAP54XX || AM33XX || AM43XX || \
TARGET_SIFIVE_UNLEASHED || TARGET_SIFIVE_UNMATCHED
+ select SPL_LOAD_BLOCK if SPL_MMC
+ select SPL_SYS_MMCSD_RAW_MODE if SPL_MMC
help
Use sector number for specifying U-Boot location on MMC/SD in
raw mode.
@@ -517,6 +532,8 @@
config SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
bool "MMC Raw mode: by partition"
+ select SPL_LOAD_BLOCK if SPL_MMC
+ select SPL_SYS_MMCSD_RAW_MODE if SPL_MMC
help
Use a partition for loading U-Boot when using MMC/SD in raw mode.
@@ -683,6 +700,22 @@
filesystem from within SPL. Support for the underlying block
device (e.g. MMC or USB) must be enabled separately.
+config SPL_FS_FAT_DMA_ALIGN
+ bool "Use DMA-aligned buffers with FAT"
+ depends on SPL_FS_FAT
+ select SPL_LOAD_BLOCK
+ default y if SPL_LOAD_FIT
+ help
+ The FAT filesystem driver tries to ensure that the reads it issues to
+ the block subsystem use DMA-aligned buffers. If the supplied buffer is
+ not DMA-aligned, the FAT driver will use a bounce-buffer and read
+ block-by-block. This is separate from the bounce-buffer used by the
+ block subsystem (CONFIG_BOUNCE_BUFFER).
+
+ Enable this config to align buffers passed to the FAT filesystem
+ driver. This will speed up reads, but will increase the size of U-Boot
+ by around 60 bytes.
+
config SPL_FS_LOAD_PAYLOAD_NAME
string "File to load for U-Boot from the filesystem"
depends on SPL_FS_EXT4 || SPL_FS_FAT || SPL_FS_SQUASHFS || SPL_SEMIHOSTING
@@ -857,7 +890,7 @@
allows DRAM to be set up before loading U-Boot into that DRAM,
where it can run.
-config SPL_MTD_SUPPORT
+config SPL_MTD
bool "Support MTD drivers"
help
Enable support for MTD (Memory Technology Device) within SPL. MTD
@@ -876,6 +909,7 @@
config SPL_NAND_SUPPORT
bool "Support NAND flash"
+ select SPL_LOAD_BLOCK
help
Enable support for NAND (Negative AND) flash in SPL. NAND flash
can be used to allow SPL to load U-Boot from supported devices.
@@ -1101,6 +1135,8 @@
config SPL_FALCON_BOOT_MMCSD
bool "Enable Falcon boot from MMC or SD media"
depends on SPL_OS_BOOT && SPL_MMC
+ select SPL_LOAD_BLOCK
+ select SPL_SYS_MMCSD_RAW_MODE
help
Select this if the Falcon mode OS image mode is on MMC or SD media.
@@ -1259,7 +1295,6 @@
config SPL_NVME
bool "NVM Express device support"
depends on BLK
- select HAVE_BLOCK_DEVICE
select FS_LOADER
select SPL_BLK_FS
help
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 732d90d..3ce5bfe 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -19,6 +19,7 @@
#include <mapmem.h>
#include <serial.h>
#include <spl.h>
+#include <spl_load.h>
#include <system-constants.h>
#include <asm/global_data.h>
#include <asm-generic/gpio.h>
@@ -352,6 +353,15 @@
return 0;
}
+#if SPL_LOAD_USERS > 1
+int spl_load(struct spl_image_info *spl_image,
+ const struct spl_boot_device *bootdev, struct spl_load_info *info,
+ size_t size, size_t offset)
+{
+ return _spl_load(spl_image, bootdev, info, size, offset);
+}
+#endif
+
__weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
{
typedef void __noreturn (*image_entry_noargs_t)(void);
@@ -718,8 +728,7 @@
ret = boot_from_devices(&spl_image, spl_boot_list,
ARRAY_SIZE(spl_boot_list));
if (ret) {
- if (CONFIG_IS_ENABLED(SHOW_ERRORS) &&
- CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT))
+ if (CONFIG_IS_ENABLED(SHOW_ERRORS))
printf(SPL_TPL_PROMPT "failed to boot from all boot devices (err=%d)\n",
ret);
else
diff --git a/common/spl/spl_blk_fs.c b/common/spl/spl_blk_fs.c
index 63825d6..04eac6f 100644
--- a/common/spl/spl_blk_fs.c
+++ b/common/spl/spl_blk_fs.c
@@ -7,12 +7,15 @@
#include <common.h>
#include <spl.h>
+#include <spl_load.h>
#include <image.h>
#include <fs.h>
+#include <asm/cache.h>
#include <asm/io.h>
struct blk_dev {
const char *ifname;
+ const char *filename;
char dev_part_str[8];
};
@@ -30,11 +33,11 @@
return ret;
}
- ret = fs_read(load->filename, virt_to_phys(buf), file_offset, size,
+ ret = fs_read(dev->filename, virt_to_phys(buf), file_offset, size,
&actlen);
if (ret < 0) {
printf("spl: error reading image %s. Err - %d\n",
- load->filename, ret);
+ dev->filename, ret);
return ret;
}
@@ -46,10 +49,10 @@
enum uclass_id uclass_id, int devnum, int partnum)
{
const char *filename = CONFIG_SPL_FS_LOAD_PAYLOAD_NAME;
- struct legacy_img_hdr *header;
struct blk_desc *blk_desc;
- loff_t actlen, filesize;
+ loff_t filesize;
struct blk_dev dev;
+ struct spl_load_info load;
int ret;
blk_desc = blk_get_devnum_by_uclass_id(uclass_id, devnum);
@@ -59,8 +62,8 @@
}
blk_show_device(uclass_id, devnum);
- header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
+ dev.filename = filename;
dev.ifname = blk_get_uclass_name(uclass_id);
snprintf(dev.dev_part_str, sizeof(dev.dev_part_str) - 1, "%x:%x",
devnum, partnum);
@@ -68,63 +71,21 @@
if (ret) {
printf("spl: unable to set blk_dev %s %s. Err - %d\n",
dev.ifname, dev.dev_part_str, ret);
- goto out;
- }
-
- ret = fs_read(filename, virt_to_phys(header), 0,
- sizeof(struct legacy_img_hdr), &actlen);
- if (ret) {
- printf("spl: unable to read file %s. Err - %d\n", filename,
- ret);
- goto out;
- }
-
- if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
- image_get_magic(header) == FDT_MAGIC) {
- struct spl_load_info load;
-
- debug("Found FIT\n");
- load.read = spl_fit_read;
- load.bl_len = 1;
- load.filename = (void *)filename;
- load.priv = &dev;
-
- return spl_load_simple_fit(spl_image, &load, 0, header);
- }
-
- ret = spl_parse_image_header(spl_image, bootdev, header);
- if (ret) {
- printf("spl: unable to parse image header. Err - %d\n",
- ret);
- goto out;
- }
-
- ret = fs_set_blk_dev(dev.ifname, dev.dev_part_str, FS_TYPE_ANY);
- if (ret) {
- printf("spl: unable to set blk_dev %s %s. Err - %d\n",
- dev.ifname, dev.dev_part_str, ret);
- goto out;
+ return ret;
}
ret = fs_size(filename, &filesize);
if (ret) {
printf("spl: unable to get file size: %s. Err - %d\n",
filename, ret);
- goto out;
- }
-
- ret = fs_set_blk_dev(dev.ifname, dev.dev_part_str, FS_TYPE_ANY);
- if (ret) {
- printf("spl: unable to set blk_dev %s %s. Err - %d\n",
- dev.ifname, dev.dev_part_str, ret);
- goto out;
+ return ret;
}
- ret = fs_read(filename, (ulong)spl_image->load_addr, 0, filesize,
- &actlen);
- if (ret)
- printf("spl: unable to read file %s. Err - %d\n",
- filename, ret);
-out:
- return ret;
+ load.read = spl_fit_read;
+ if (IS_ENABLED(CONFIG_SPL_FS_FAT_DMA_ALIGN))
+ spl_set_bl_len(&load, ARCH_DMA_MINALIGN);
+ else
+ spl_set_bl_len(&load, 1);
+ load.priv = &dev;
+ return spl_load(spl_image, bootdev, &load, filesize, 0);
}
diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c
index af836ca..2be6f04 100644
--- a/common/spl/spl_ext.c
+++ b/common/spl/spl_ext.c
@@ -2,25 +2,35 @@
#include <common.h>
#include <env.h>
-#include <mapmem.h>
#include <part.h>
#include <spl.h>
+#include <spl_load.h>
#include <asm/u-boot.h>
#include <ext4fs.h>
#include <errno.h>
#include <image.h>
+static ulong spl_fit_read(struct spl_load_info *load, ulong file_offset,
+ ulong size, void *buf)
+{
+ int ret;
+ loff_t actlen;
+
+ ret = ext4fs_read(buf, file_offset, size, &actlen);
+ if (ret)
+ return ret;
+ return actlen;
+}
+
int spl_load_image_ext(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct blk_desc *block_dev, int partition,
const char *filename)
{
s32 err;
- struct legacy_img_hdr *header;
- loff_t filelen, actlen;
+ loff_t filelen;
struct disk_partition part_info = {};
-
- header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
+ struct spl_load_info load;
if (part_get_info(block_dev, partition, &part_info)) {
printf("spl: no partition table found\n");
@@ -29,7 +39,7 @@
ext4fs_set_blk_dev(block_dev, &part_info);
- err = ext4fs_mount(part_info.size);
+ err = ext4fs_mount();
if (!err) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
printf("%s: ext4fs mount err - %d\n", __func__, err);
@@ -42,20 +52,10 @@
puts("spl: ext4fs_open failed\n");
goto end;
}
- err = ext4fs_read((char *)header, 0, sizeof(struct legacy_img_hdr), &actlen);
- if (err < 0) {
- puts("spl: ext4fs_read failed\n");
- goto end;
- }
-
- err = spl_parse_image_header(spl_image, bootdev, header);
- if (err < 0) {
- puts("spl: ext: failed to parse image header\n");
- goto end;
- }
- err = ext4fs_read(map_sysmem(spl_image->load_addr, filelen), 0, filelen,
- &actlen);
+ spl_set_bl_len(&load, 1);
+ load.read = spl_fit_read;
+ err = spl_load(spl_image, bootdev, &load, filelen, 0);
end:
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
@@ -84,7 +84,7 @@
ext4fs_set_blk_dev(block_dev, &part_info);
- err = ext4fs_mount(part_info.size);
+ err = ext4fs_mount();
if (!err) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
printf("%s: ext4fs mount err - %d\n", __func__, err);
diff --git a/common/spl/spl_fat.c b/common/spl/spl_fat.c
index 014074f..a52f9e1 100644
--- a/common/spl/spl_fat.c
+++ b/common/spl/spl_fat.c
@@ -11,8 +11,8 @@
#include <common.h>
#include <env.h>
#include <log.h>
-#include <mapmem.h>
#include <spl.h>
+#include <spl_load.h>
#include <asm/u-boot.h>
#include <fat.h>
#include <errno.h>
@@ -51,7 +51,7 @@
{
loff_t actread;
int ret;
- char *filename = (char *)load->filename;
+ char *filename = load->priv;
ret = fat_read_file(filename, buf, file_offset, size, &actread);
if (ret)
@@ -66,59 +66,41 @@
const char *filename)
{
int err;
- struct legacy_img_hdr *header;
+ loff_t size;
+ struct spl_load_info load;
err = spl_register_fat_device(block_dev, partition);
if (err)
goto end;
- header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
-
- err = file_fat_read(filename, header, sizeof(struct legacy_img_hdr));
- if (err <= 0)
- goto end;
-
- if (IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL) &&
- image_get_magic(header) == FDT_MAGIC) {
- err = file_fat_read(filename,
- map_sysmem(CONFIG_SYS_LOAD_ADDR, 0), 0);
- if (err <= 0)
- goto end;
- err = spl_parse_image_header(spl_image, bootdev,
- map_sysmem(CONFIG_SYS_LOAD_ADDR,
- err));
- if (err == -EAGAIN)
- return err;
- if (err == 0)
- err = 1;
- } else if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
- image_get_magic(header) == FDT_MAGIC) {
- struct spl_load_info load;
-
- debug("Found FIT\n");
- load.read = spl_fit_read;
- load.bl_len = 1;
- load.filename = (void *)filename;
- load.priv = NULL;
-
- return spl_load_simple_fit(spl_image, &load, 0, header);
- } else {
- err = spl_parse_image_header(spl_image, bootdev, header);
+ /*
+ * Avoid pulling in this function for other image types since we are
+ * very short on space on some boards.
+ */
+ if (IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL)) {
+ err = fat_size(filename, &size);
if (err)
goto end;
-
- err = file_fat_read(filename, map_sysmem(spl_image->load_addr,
- spl_image->size), 0);
+ } else {
+ size = 0;
}
+ load.read = spl_fit_read;
+ if (IS_ENABLED(CONFIG_SPL_FS_FAT_DMA_ALIGN))
+ spl_set_bl_len(&load, ARCH_DMA_MINALIGN);
+ else
+ spl_set_bl_len(&load, 1);
+ load.priv = (void *)filename;
+ err = spl_load(spl_image, bootdev, &load, size, 0);
+
end:
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
- if (err <= 0)
+ if (err < 0)
printf("%s: error reading image %s, err - %d\n",
__func__, filename, err);
#endif
- return (err <= 0);
+ return err;
}
#if CONFIG_IS_ENABLED(OS_BOOT)
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 70d8d59..872df0c 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -14,7 +14,6 @@
#include <mapmem.h>
#include <spl.h>
#include <sysinfo.h>
-#include <asm/cache.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <linux/libfdt.h>
@@ -172,29 +171,12 @@
static int get_aligned_image_offset(struct spl_load_info *info, int offset)
{
- /*
- * If it is a FS read, get the first address before offset which is
- * aligned to ARCH_DMA_MINALIGN. If it is raw read return the
- * block number to which offset belongs.
- */
- if (info->filename)
- return offset & ~(ARCH_DMA_MINALIGN - 1);
-
- return offset / info->bl_len;
+ return ALIGN_DOWN(offset, spl_get_bl_len(info));
}
static int get_aligned_image_overhead(struct spl_load_info *info, int offset)
{
- /*
- * If it is a FS read, get the difference between the offset and
- * the first address before offset which is aligned to
- * ARCH_DMA_MINALIGN. If it is raw read return the offset within the
- * block.
- */
- if (info->filename)
- return offset & (ARCH_DMA_MINALIGN - 1);
-
- return offset % info->bl_len;
+ return offset & (spl_get_bl_len(info) - 1);
}
static int get_aligned_image_size(struct spl_load_info *info, int data_size,
@@ -202,10 +184,7 @@
{
data_size = data_size + get_aligned_image_overhead(info, offset);
- if (info->filename)
- return data_size;
-
- return (data_size + info->bl_len - 1) / info->bl_len;
+ return ALIGN(data_size, spl_get_bl_len(info));
}
/**
@@ -222,7 +201,7 @@
*
* Return: 0 on success or a negative error number.
*/
-static int load_simple_fit(struct spl_load_info *info, ulong sector,
+static int load_simple_fit(struct spl_load_info *info, ulong fit_offset,
const struct spl_fit_info *ctx, int node,
struct spl_image_info *image_info)
{
@@ -234,7 +213,6 @@
void *load_ptr;
void *src;
ulong overhead;
- int nr_sectors;
uint8_t image_comp = -1, type = -1;
const void *data;
const void *fit = ctx->fit;
@@ -291,11 +269,12 @@
length = len;
overhead = get_aligned_image_overhead(info, offset);
- nr_sectors = get_aligned_image_size(info, length, offset);
+ size = get_aligned_image_size(info, length, offset);
if (info->read(info,
- sector + get_aligned_image_offset(info, offset),
- nr_sectors, src_ptr) != nr_sectors)
+ fit_offset +
+ get_aligned_image_offset(info, offset), size,
+ src_ptr) < length)
return -EIO;
debug("External data: dst=%p, offset=%x, size=%lx\n",
@@ -380,7 +359,7 @@
}
static int spl_fit_append_fdt(struct spl_image_info *spl_image,
- struct spl_load_info *info, ulong sector,
+ struct spl_load_info *info, ulong offset,
const struct spl_fit_info *ctx)
{
struct spl_image_info image_info;
@@ -414,7 +393,7 @@
spl_image->fdt_addr = map_sysmem(image_info.load_addr, size);
memcpy(spl_image->fdt_addr, gd->fdt_blob, size);
} else {
- ret = load_simple_fit(info, sector, ctx, node, &image_info);
+ ret = load_simple_fit(info, offset, ctx, node, &image_info);
if (ret < 0)
return ret;
@@ -465,7 +444,7 @@
__func__);
}
image_info.load_addr = (ulong)tmpbuffer;
- ret = load_simple_fit(info, sector, ctx, node,
+ ret = load_simple_fit(info, offset, ctx, node,
&image_info);
if (ret < 0)
break;
@@ -642,7 +621,7 @@
}
static int spl_fit_load_fpga(struct spl_fit_info *ctx,
- struct spl_load_info *info, ulong sector)
+ struct spl_load_info *info, ulong offset)
{
int node, ret;
@@ -657,7 +636,7 @@
warn_deprecated("'fpga' property in config node. Use 'loadables'");
/* Load the image and set up the fpga_image structure */
- ret = load_simple_fit(info, sector, ctx, node, &fpga_image);
+ ret = load_simple_fit(info, offset, ctx, node, &fpga_image);
if (ret) {
printf("%s: Cannot load the FPGA: %i\n", __func__, ret);
return ret;
@@ -667,11 +646,10 @@
}
static int spl_simple_fit_read(struct spl_fit_info *ctx,
- struct spl_load_info *info, ulong sector,
+ struct spl_load_info *info, ulong offset,
const void *fit_header)
{
unsigned long count, size;
- int sectors;
void *buf;
/*
@@ -690,13 +668,13 @@
* For FIT with data embedded, data is loaded as part of FIT image.
* For FIT with external data, data is not loaded in this step.
*/
- sectors = get_aligned_image_size(info, size, 0);
- buf = board_spl_fit_buffer_addr(size, sectors, info->bl_len);
+ size = get_aligned_image_size(info, size, 0);
+ buf = board_spl_fit_buffer_addr(size, size, 1);
- count = info->read(info, sector, sectors, buf);
+ count = info->read(info, offset, size, buf);
ctx->fit = buf;
- debug("fit read sector %lx, sectors=%d, dst=%p, count=%lu, size=0x%lx\n",
- sector, sectors, buf, count, size);
+ debug("fit read offset %lx, size=%lu, dst=%p, count=%lu\n",
+ offset, size, buf, count);
return (count == 0) ? -EIO : 0;
}
@@ -728,7 +706,7 @@
}
int spl_load_simple_fit(struct spl_image_info *spl_image,
- struct spl_load_info *info, ulong sector, void *fit)
+ struct spl_load_info *info, ulong offset, void *fit)
{
struct spl_image_info image_info;
struct spl_fit_info ctx;
@@ -737,7 +715,7 @@
int index = 0;
int firmware_node;
- ret = spl_simple_fit_read(&ctx, info, sector, fit);
+ ret = spl_simple_fit_read(&ctx, info, offset, fit);
if (ret < 0)
return ret;
@@ -752,7 +730,7 @@
return ret;
if (IS_ENABLED(CONFIG_SPL_FPGA))
- spl_fit_load_fpga(&ctx, info, sector);
+ spl_fit_load_fpga(&ctx, info, offset);
/*
* Find the U-Boot image using the following search order:
@@ -782,7 +760,7 @@
}
/* Load the image and set up the spl_image structure */
- ret = load_simple_fit(info, sector, &ctx, node, spl_image);
+ ret = load_simple_fit(info, offset, &ctx, node, spl_image);
if (ret)
return ret;
@@ -800,7 +778,7 @@
* We allow this to fail, as the U-Boot image might embed its FDT.
*/
if (os_takes_devicetree(spl_image->os)) {
- ret = spl_fit_append_fdt(spl_image, info, sector, &ctx);
+ ret = spl_fit_append_fdt(spl_image, info, offset, &ctx);
if (ret < 0 && spl_image->os != IH_OS_U_BOOT)
return ret;
}
@@ -823,7 +801,7 @@
continue;
image_info.load_addr = 0;
- ret = load_simple_fit(info, sector, &ctx, node, &image_info);
+ ret = load_simple_fit(info, offset, &ctx, node, &image_info);
if (ret < 0) {
printf("%s: can't load image loadables index %d (ret = %d)\n",
__func__, index, ret);
@@ -837,7 +815,7 @@
debug("Loadable is %s\n", genimg_get_os_name(os_type));
if (os_takes_devicetree(os_type)) {
- spl_fit_append_fdt(&image_info, info, sector, &ctx);
+ spl_fit_append_fdt(&image_info, info, offset, &ctx);
spl_image->fdt_addr = image_info.fdt_addr;
}
diff --git a/common/spl/spl_imx_container.c b/common/spl/spl_imx_container.c
index 127802f..b4ea924 100644
--- a/common/spl/spl_imx_container.c
+++ b/common/spl/spl_imx_container.c
@@ -19,11 +19,10 @@
struct spl_load_info *info,
struct container_hdr *container,
int image_index,
- u32 container_sector)
+ ulong container_offset)
{
struct boot_img_t *images;
- ulong sector;
- u32 sectors;
+ ulong offset, overhead, size;
if (image_index > container->num_images) {
debug("Invalid image number\n");
@@ -33,22 +32,21 @@
images = (struct boot_img_t *)((u8 *)container +
sizeof(struct container_hdr));
- if (images[image_index].offset % info->bl_len) {
+ if (!IS_ALIGNED(images[image_index].offset, spl_get_bl_len(info))) {
printf("%s: image%d offset not aligned to %u\n",
- __func__, image_index, info->bl_len);
+ __func__, image_index, spl_get_bl_len(info));
return NULL;
}
- sectors = roundup(images[image_index].size, info->bl_len) /
- info->bl_len;
- sector = images[image_index].offset / info->bl_len +
- container_sector;
+ size = ALIGN(images[image_index].size, spl_get_bl_len(info));
+ offset = images[image_index].offset + container_offset;
- debug("%s: container: %p sector: %lu sectors: %u\n", __func__,
- container, sector, sectors);
- if (info->read(info, sector, sectors,
- map_sysmem(images[image_index].dst,
- images[image_index].size)) != sectors) {
+ debug("%s: container: %p offset: %lu size: %lu\n", __func__,
+ container, offset, size);
+ if (info->read(info, offset, size,
+ map_sysmem(images[image_index].dst - overhead,
+ images[image_index].size)) <
+ images[image_index].size) {
printf("%s wrong\n", __func__);
return NULL;
}
@@ -62,15 +60,13 @@
}
static int read_auth_container(struct spl_image_info *spl_image,
- struct spl_load_info *info, ulong sector)
+ struct spl_load_info *info, ulong offset)
{
struct container_hdr *container = NULL;
u16 length;
- u32 sectors;
int i, size, ret = 0;
- size = roundup(CONTAINER_HDR_ALIGNMENT, info->bl_len);
- sectors = size / info->bl_len;
+ size = ALIGN(CONTAINER_HDR_ALIGNMENT, spl_get_bl_len(info));
/*
* It will not override the ATF code, so safe to use it here,
@@ -80,9 +76,10 @@
if (!container)
return -ENOMEM;
- debug("%s: container: %p sector: %lu sectors: %u\n", __func__,
- container, sector, sectors);
- if (info->read(info, sector, sectors, container) != sectors) {
+ debug("%s: container: %p offset: %lu size: %u\n", __func__,
+ container, offset, size);
+ if (info->read(info, offset, size, container) <
+ CONTAINER_HDR_ALIGNMENT) {
ret = -EIO;
goto end;
}
@@ -103,18 +100,16 @@
debug("Container length %u\n", length);
if (length > CONTAINER_HDR_ALIGNMENT) {
- size = roundup(length, info->bl_len);
- sectors = size / info->bl_len;
+ size = ALIGN(length, spl_get_bl_len(info));
free(container);
container = malloc(size);
if (!container)
return -ENOMEM;
- debug("%s: container: %p sector: %lu sectors: %u\n",
- __func__, container, sector, sectors);
- if (info->read(info, sector, sectors, container) !=
- sectors) {
+ debug("%s: container: %p offset: %lu size: %u\n",
+ __func__, container, offset, size);
+ if (info->read(info, offset, size, container) < length) {
ret = -EIO;
goto end;
}
@@ -129,7 +124,7 @@
for (i = 0; i < container->num_images; i++) {
struct boot_img_t *image = read_auth_image(spl_image, info,
container, i,
- sector);
+ offset);
if (!image) {
ret = -EINVAL;
@@ -154,7 +149,7 @@
}
int spl_load_imx_container(struct spl_image_info *spl_image,
- struct spl_load_info *info, ulong sector)
+ struct spl_load_info *info, ulong offset)
{
- return read_auth_container(spl_image, info, sector);
+ return read_auth_container(spl_image, info, offset);
}
diff --git a/common/spl/spl_legacy.c b/common/spl/spl_legacy.c
index 51656fb..08687ca 100644
--- a/common/spl/spl_legacy.c
+++ b/common/spl/spl_legacy.c
@@ -82,89 +82,39 @@
return 0;
}
-/*
- * This function is added explicitly to avoid code size increase, when
- * no compression method is enabled. The compiler will optimize the
- * following switch/case statement in spl_load_legacy_img() away due to
- * Dead Code Elimination.
- */
-static inline int spl_image_get_comp(const struct legacy_img_hdr *hdr)
+int spl_load_legacy_lzma(struct spl_image_info *spl_image,
+ struct spl_load_info *load, ulong offset)
{
- if (IS_ENABLED(CONFIG_SPL_LZMA))
- return image_get_comp(hdr);
-
- return IH_COMP_NONE;
-}
-
-int spl_load_legacy_img(struct spl_image_info *spl_image,
- struct spl_boot_device *bootdev,
- struct spl_load_info *load, ulong offset,
- struct legacy_img_hdr *hdr)
-{
- __maybe_unused SizeT lzma_len;
- __maybe_unused void *src;
- ulong dataptr;
+ SizeT lzma_len = LZMA_LEN;
+ void *src;
+ ulong dataptr, overhead, size;
int ret;
- /*
- * If the payload is compressed, the decompressed data should be
- * directly write to its load address.
- */
- if (spl_image_get_comp(hdr) != IH_COMP_NONE)
- spl_image->flags |= SPL_COPY_PAYLOAD_ONLY;
-
- ret = spl_parse_image_header(spl_image, bootdev, hdr);
- if (ret)
- return ret;
-
- /* Read image */
- switch (spl_image_get_comp(hdr)) {
- case IH_COMP_NONE:
- dataptr = offset;
-
- /*
- * Image header will be skipped only if SPL_COPY_PAYLOAD_ONLY
- * is set
- */
- if (spl_image->flags & SPL_COPY_PAYLOAD_ONLY)
- dataptr += sizeof(*hdr);
+ /* dataptr points to compressed payload */
+ dataptr = ALIGN_DOWN(sizeof(struct legacy_img_hdr),
+ spl_get_bl_len(load));
+ overhead = sizeof(struct legacy_img_hdr) - dataptr;
+ size = ALIGN(spl_image->size + overhead, spl_get_bl_len(load));
+ dataptr += offset;
- load->read(load, dataptr, spl_image->size,
- map_sysmem(spl_image->load_addr, spl_image->size));
- break;
-
- case IH_COMP_LZMA:
- lzma_len = LZMA_LEN;
-
- /* dataptr points to compressed payload */
- dataptr = offset + sizeof(*hdr);
-
- debug("LZMA: Decompressing %08lx to %08lx\n",
- dataptr, spl_image->load_addr);
- src = malloc(spl_image->size);
- if (!src) {
- printf("Unable to allocate %d bytes for LZMA\n",
- spl_image->size);
- return -ENOMEM;
- }
-
- load->read(load, dataptr, spl_image->size, src);
- ret = lzmaBuffToBuffDecompress(map_sysmem(spl_image->load_addr,
- spl_image->size),
- &lzma_len, src, spl_image->size);
- if (ret) {
- printf("LZMA decompression error: %d\n", ret);
- return ret;
- }
-
- spl_image->size = lzma_len;
- break;
+ debug("LZMA: Decompressing %08lx to %08lx\n",
+ dataptr, spl_image->load_addr);
+ src = malloc(size);
+ if (!src) {
+ printf("Unable to allocate %d bytes for LZMA\n",
+ spl_image->size);
+ return -ENOMEM;
+ }
- default:
- debug("Compression method %s is not supported\n",
- genimg_get_comp_short_name(image_get_comp(hdr)));
- return -EINVAL;
+ load->read(load, dataptr, size, src);
+ ret = lzmaBuffToBuffDecompress(map_sysmem(spl_image->load_addr,
+ spl_image->size), &lzma_len,
+ src + overhead, spl_image->size);
+ if (ret) {
+ printf("LZMA decompression error: %d\n", ret);
+ return ret;
}
+ spl_image->size = lzma_len;
return 0;
}
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 82689da..3d032bb 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -8,9 +8,9 @@
#include <common.h>
#include <dm.h>
#include <log.h>
-#include <mapmem.h>
#include <part.h>
#include <spl.h>
+#include <spl_load.h>
#include <linux/compiler.h>
#include <errno.h>
#include <asm/u-boot.h>
@@ -19,55 +19,14 @@
#include <image.h>
#include <imx_container.h>
-static int mmc_load_legacy(struct spl_image_info *spl_image,
- struct spl_boot_device *bootdev,
- struct mmc *mmc,
- ulong sector, struct legacy_img_hdr *header)
+static ulong h_spl_load_read(struct spl_load_info *load, ulong off,
+ ulong size, void *buf)
{
- u32 image_offset_sectors;
- u32 image_size_sectors;
- unsigned long count;
- u32 image_offset;
- int ret;
-
- ret = spl_parse_image_header(spl_image, bootdev, header);
- if (ret)
- return ret;
-
- /* convert offset to sectors - round down */
- image_offset_sectors = spl_image->offset / mmc->read_bl_len;
- /* calculate remaining offset */
- image_offset = spl_image->offset % mmc->read_bl_len;
-
- /* convert size to sectors - round up */
- image_size_sectors = (spl_image->size + mmc->read_bl_len - 1) /
- mmc->read_bl_len;
-
- /* Read the header too to avoid extra memcpy */
- count = blk_dread(mmc_get_blk_desc(mmc),
- sector + image_offset_sectors,
- image_size_sectors,
- map_sysmem(spl_image->load_addr,
- image_size_sectors * mmc->read_bl_len));
- debug("read %x sectors to %lx\n", image_size_sectors,
- spl_image->load_addr);
- if (count != image_size_sectors)
- return -EIO;
-
- if (image_offset)
- memmove((void *)(ulong)spl_image->load_addr,
- (void *)(ulong)spl_image->load_addr + image_offset,
- spl_image->size);
-
- return 0;
-}
+ struct blk_desc *bd = load->priv;
+ lbaint_t sector = off >> bd->log2blksz;
+ lbaint_t count = size >> bd->log2blksz;
-static ulong h_spl_load_read(struct spl_load_info *load, ulong sector,
- ulong count, void *buf)
-{
- struct mmc *mmc = load->dev;
-
- return blk_dread(mmc_get_blk_desc(mmc), sector, count, buf);
+ return blk_dread(bd, sector, count, buf) << bd->log2blksz;
}
static __maybe_unused unsigned long spl_mmc_raw_uboot_offset(int part)
@@ -85,48 +44,14 @@
struct spl_boot_device *bootdev,
struct mmc *mmc, unsigned long sector)
{
- unsigned long count;
- struct legacy_img_hdr *header;
+ int ret;
struct blk_desc *bd = mmc_get_blk_desc(mmc);
- int ret = 0;
-
- header = spl_get_load_buffer(-sizeof(*header), bd->blksz);
-
- /* read image header to find the image size & load address */
- count = blk_dread(bd, sector, 1, header);
- debug("hdr read sector %lx, count=%lu\n", sector, count);
- if (count == 0) {
- ret = -EIO;
- goto end;
- }
-
- if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
- image_get_magic(header) == FDT_MAGIC) {
- struct spl_load_info load;
-
- debug("Found FIT\n");
- load.dev = mmc;
- load.priv = NULL;
- load.filename = NULL;
- load.bl_len = mmc->read_bl_len;
- load.read = h_spl_load_read;
- ret = spl_load_simple_fit(spl_image, &load, sector, header);
- } else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER) &&
- valid_container_hdr((void *)header)) {
- struct spl_load_info load;
-
- load.dev = mmc;
- load.priv = NULL;
- load.filename = NULL;
- load.bl_len = mmc->read_bl_len;
- load.read = h_spl_load_read;
-
- ret = spl_load_imx_container(spl_image, &load, sector);
- } else {
- ret = mmc_load_legacy(spl_image, bootdev, mmc, sector, header);
- }
+ struct spl_load_info load;
-end:
+ load.priv = bd;
+ spl_set_bl_len(&load, bd->blksz);
+ load.read = h_spl_load_read;
+ ret = spl_load(spl_image, bootdev, &load, 0, sector << bd->log2blksz);
if (ret) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
puts("mmc_load_image_raw_sector: mmc block read error\n");
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index 07916be..3b0a152 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -10,7 +10,9 @@
#include <imx_container.h>
#include <log.h>
#include <spl.h>
+#include <spl_load.h>
#include <asm/io.h>
+#include <mapmem.h>
#include <nand.h>
#include <linux/libfdt_env.h>
#include <fdt.h>
@@ -32,7 +34,8 @@
nand_spl_load_image(spl_nand_get_uboot_raw_page(),
CFG_SYS_NAND_U_BOOT_SIZE,
- (void *)CFG_SYS_NAND_U_BOOT_DST);
+ map_sysmem(CFG_SYS_NAND_U_BOOT_DST,
+ CFG_SYS_NAND_U_BOOT_SIZE));
spl_set_header_raw_uboot(spl_image);
nand_deselect();
@@ -40,104 +43,45 @@
}
#else
-static ulong spl_nand_fit_read(struct spl_load_info *load, ulong offs,
- ulong size, void *dst)
+__weak u32 nand_spl_adjust_offset(u32 sector, u32 offs)
{
- int err;
- ulong sector;
-
- sector = *(int *)load->priv;
- offs *= load->bl_len;
- size *= load->bl_len;
- offs = sector + nand_spl_adjust_offset(sector, offs - sector);
- err = nand_spl_load_image(offs, size, dst);
- if (err)
- return 0;
-
- return size / load->bl_len;
+ return offs;
}
-static ulong spl_nand_legacy_read(struct spl_load_info *load, ulong offs,
- ulong size, void *dst)
+static ulong spl_nand_read(struct spl_load_info *load, ulong offs, ulong size,
+ void *dst)
{
int err;
+ ulong sector;
debug("%s: offs %lx, size %lx, dst %p\n",
__func__, offs, size, dst);
+ sector = *(int *)load->priv;
+ offs = sector + nand_spl_adjust_offset(sector, offs - sector);
err = nand_spl_load_image(offs, size, dst);
+ spl_set_bl_len(load, nand_page_size());
if (err)
return 0;
return size;
}
-struct mtd_info * __weak nand_get_mtd(void)
-{
- return NULL;
-}
-
static int spl_nand_load_element(struct spl_image_info *spl_image,
- struct spl_boot_device *bootdev,
- int offset, struct legacy_img_hdr *header)
+ struct spl_boot_device *bootdev, int offset)
{
- struct mtd_info *mtd = nand_get_mtd();
- int bl_len = mtd ? mtd->writesize : 1;
- int err;
-
- err = nand_spl_load_image(offset, sizeof(*header), (void *)header);
- if (err)
- return err;
-
- if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
- image_get_magic(header) == FDT_MAGIC) {
- struct spl_load_info load;
-
- debug("Found FIT\n");
- load.dev = NULL;
- load.priv = &offset;
- load.filename = NULL;
- load.bl_len = bl_len;
- load.read = spl_nand_fit_read;
- return spl_load_simple_fit(spl_image, &load, offset / bl_len, header);
- } else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER) &&
- valid_container_hdr((void *)header)) {
- struct spl_load_info load;
-
- load.dev = NULL;
- load.priv = NULL;
- load.filename = NULL;
- load.bl_len = bl_len;
- load.read = spl_nand_fit_read;
- return spl_load_imx_container(spl_image, &load, offset / bl_len);
- } else if (IS_ENABLED(CONFIG_SPL_LEGACY_IMAGE_FORMAT) &&
- image_get_magic(header) == IH_MAGIC) {
- struct spl_load_info load;
+ struct spl_load_info load;
- debug("Found legacy image\n");
- load.dev = NULL;
- load.priv = NULL;
- load.filename = NULL;
- load.bl_len = 1;
- load.read = spl_nand_legacy_read;
-
- return spl_load_legacy_img(spl_image, bootdev, &load, offset, header);
- } else {
- err = spl_parse_image_header(spl_image, bootdev, header);
- if (err)
- return err;
- return nand_spl_load_image(offset, spl_image->size,
- (void *)(ulong)spl_image->load_addr);
- }
+ load.priv = &offset;
+ spl_set_bl_len(&load, 1);
+ load.read = spl_nand_read;
+ return spl_load(spl_image, bootdev, &load, 0, offset);
}
static int spl_nand_load_image(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{
int err;
- struct legacy_img_hdr *header;
- int *src __attribute__((unused));
- int *dst __attribute__((unused));
#ifdef CONFIG_SPL_NAND_SOFTECC
debug("spl: nand - using sw ecc\n");
@@ -146,10 +90,12 @@
#endif
nand_init();
- header = spl_get_load_buffer(0, sizeof(*header));
-
#if CONFIG_IS_ENABLED(OS_BOOT)
if (!spl_start_uboot()) {
+ int *src, *dst;
+ struct legacy_img_hdr *header =
+ spl_get_load_buffer(0, sizeof(*header));
+
/*
* load parameter image
* load to temp position since nand_spl_load_image reads
@@ -192,20 +138,18 @@
}
#endif
#ifdef CONFIG_NAND_ENV_DST
- spl_nand_load_element(spl_image, bootdev, CONFIG_ENV_OFFSET, header);
+ spl_nand_load_element(spl_image, bootdev, CONFIG_ENV_OFFSET);
#ifdef CONFIG_ENV_OFFSET_REDUND
- spl_nand_load_element(spl_image, bootdev, CONFIG_ENV_OFFSET_REDUND, header);
+ spl_nand_load_element(spl_image, bootdev, CONFIG_ENV_OFFSET_REDUND);
#endif
#endif
/* Load u-boot */
- err = spl_nand_load_element(spl_image, bootdev, spl_nand_get_uboot_raw_page(),
- header);
+ err = spl_nand_load_element(spl_image, bootdev, spl_nand_get_uboot_raw_page());
#ifdef CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND
#if CONFIG_SYS_NAND_U_BOOT_OFFS != CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND
if (err)
err = spl_nand_load_element(spl_image, bootdev,
- CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND,
- header);
+ CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND);
#endif
#endif
nand_deselect();
diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c
index f01d4df..898f9df 100644
--- a/common/spl/spl_net.c
+++ b/common/spl/spl_net.c
@@ -11,8 +11,8 @@
#include <errno.h>
#include <image.h>
#include <log.h>
-#include <mapmem.h>
#include <spl.h>
+#include <spl_load.h>
#include <net.h>
#include <linux/libfdt.h>
@@ -29,8 +29,7 @@
static int spl_net_load_image(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{
- struct legacy_img_hdr *header = map_sysmem(image_load_addr,
- sizeof(*header));
+ struct spl_load_info load;
int rv;
env_init();
@@ -49,27 +48,9 @@
return rv;
}
- if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
- image_get_magic(header) == FDT_MAGIC) {
- struct spl_load_info load;
-
- debug("Found FIT\n");
- load.bl_len = 1;
- load.read = spl_net_load_read;
- rv = spl_load_simple_fit(spl_image, &load, 0, header);
- } else {
- debug("Legacy image\n");
-
- rv = spl_parse_image_header(spl_image, bootdev, header);
- if (rv)
- return rv;
-
- memcpy(map_sysmem(spl_image->load_addr, spl_image->size),
- map_sysmem(image_load_addr, spl_image->size),
- spl_image->size);
- }
-
- return rv;
+ spl_set_bl_len(&load, 1);
+ load.read = spl_net_load_read;
+ return spl_load(spl_image, bootdev, &load, 0, 0);
}
#endif
diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c
index 236b071..7074511 100644
--- a/common/spl/spl_nor.c
+++ b/common/spl/spl_nor.c
@@ -7,8 +7,8 @@
#include <image.h>
#include <imx_container.h>
#include <log.h>
-#include <mapmem.h>
#include <spl.h>
+#include <spl_load.h>
static ulong spl_nor_load_read(struct spl_load_info *load, ulong sector,
ulong count, void *buf)
@@ -28,8 +28,7 @@
static int spl_nor_load_image(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{
- struct legacy_img_hdr *header;
- __maybe_unused struct spl_load_info load;
+ struct spl_load_info load;
/*
* Loading of the payload to SDRAM is done with skipping of
@@ -43,13 +42,14 @@
* Load Linux from its location in NOR flash to its defined
* location in SDRAM
*/
- header = (void *)CONFIG_SYS_OS_BASE;
+ const struct legacy_img_hdr *header =
+ (const struct legacy_img_hdr *)CONFIG_SYS_OS_BASE;
#ifdef CONFIG_SPL_LOAD_FIT
if (image_get_magic(header) == FDT_MAGIC) {
int ret;
debug("Found FIT\n");
- load.bl_len = 1;
+ spl_set_bl_len(&load, 1);
load.read = spl_nor_load_read;
ret = spl_load_simple_fit(spl_image, &load,
@@ -93,34 +93,8 @@
* Load real U-Boot from its location in NOR flash to its
* defined location in SDRAM
*/
- header = map_sysmem(spl_nor_get_uboot_base(), sizeof(*header));
-#ifdef CONFIG_SPL_LOAD_FIT
- if (image_get_magic(header) == FDT_MAGIC) {
- debug("Found FIT format U-Boot\n");
- load.bl_len = 1;
- load.read = spl_nor_load_read;
- return spl_load_simple_fit(spl_image, &load,
- spl_nor_get_uboot_base(),
- (void *)header);
- }
-#endif
- if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER) &&
- valid_container_hdr((void *)header)) {
- load.bl_len = 1;
- load.read = spl_nor_load_read;
- return spl_load_imx_container(spl_image, &load,
- spl_nor_get_uboot_base());
- }
-
- /* Legacy image handling */
- if (IS_ENABLED(CONFIG_SPL_LEGACY_IMAGE_FORMAT)) {
- load.bl_len = 1;
- load.read = spl_nor_load_read;
- return spl_load_legacy_img(spl_image, bootdev, &load,
- spl_nor_get_uboot_base(),
- header);
- }
-
- return -EINVAL;
+ spl_set_bl_len(&load, 1);
+ load.read = spl_nor_load_read;
+ return spl_load(spl_image, bootdev, &load, 0, spl_nor_get_uboot_base());
}
SPL_LOAD_IMAGE_METHOD("NOR", 0, BOOT_DEVICE_NOR, spl_nor_load_image);
diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c
index 4158ed1..8aeda23 100644
--- a/common/spl/spl_ram.c
+++ b/common/spl/spl_ram.c
@@ -70,7 +70,7 @@
struct spl_load_info load;
debug("Found FIT\n");
- load.bl_len = 1;
+ spl_set_bl_len(&load, 1);
load.read = spl_ram_load_read;
ret = spl_load_simple_fit(spl_image, &load, 0, header);
} else {
diff --git a/common/spl/spl_semihosting.c b/common/spl/spl_semihosting.c
index f7dd289..941fa91 100644
--- a/common/spl/spl_semihosting.c
+++ b/common/spl/spl_semihosting.c
@@ -8,34 +8,19 @@
#include <log.h>
#include <semihosting.h>
#include <spl.h>
-
-static int smh_read_full(long fd, void *memp, size_t len)
-{
- long read;
-
- read = smh_read(fd, memp, len);
- if (read < 0)
- return read;
- if (read != len)
- return -EIO;
- return 0;
-}
+#include <spl_load.h>
static ulong smh_fit_read(struct spl_load_info *load, ulong file_offset,
ulong size, void *buf)
{
- long fd;
+ long fd = *(long *)load->priv;
ulong ret;
- fd = smh_open(load->filename, MODE_READ | MODE_BINARY);
- if (fd < 0) {
- log_debug("could not open %s: %ld\n", load->filename, fd);
+ if (smh_seek(fd, file_offset))
return 0;
- }
- ret = smh_read(fd, buf, size);
- smh_close(fd);
- return ret;
+ ret = smh_read(fd, buf, size);
+ return ret < 0 ? 0 : ret;
}
static int spl_smh_load_image(struct spl_image_info *spl_image,
@@ -44,8 +29,7 @@
const char *filename = CONFIG_SPL_FS_LOAD_PAYLOAD_NAME;
int ret;
long fd, len;
- struct legacy_img_hdr *header =
- spl_get_load_buffer(-sizeof(*header), sizeof(*header));
+ struct spl_load_info load;
fd = smh_open(filename, MODE_READ | MODE_BINARY);
if (fd < 0) {
@@ -60,39 +44,10 @@
}
len = ret;
- ret = smh_read_full(fd, header, sizeof(struct legacy_img_hdr));
- if (ret) {
- log_debug("could not read image header: %d\n", ret);
- goto out;
- }
-
- if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
- image_get_magic(header) == FDT_MAGIC) {
- struct spl_load_info load;
-
- debug("Found FIT\n");
- load.read = smh_fit_read;
- load.bl_len = 1;
- load.filename = filename;
- load.priv = NULL;
- smh_close(fd);
-
- return spl_load_simple_fit(spl_image, &load, 0, header);
- }
-
- ret = spl_parse_image_header(spl_image, bootdev, header);
- if (ret) {
- log_debug("failed to parse image header: %d\n", ret);
- goto out;
- }
-
- ret = smh_seek(fd, 0);
- if (ret) {
- log_debug("could not seek to start of image: %d\n", ret);
- goto out;
- }
-
- ret = smh_read_full(fd, (void *)spl_image->load_addr, len);
+ load.read = smh_fit_read;
+ spl_set_bl_len(&load, 1);
+ load.priv = &fd;
+ ret = spl_load(spl_image, bootdev, &load, len, 0);
if (ret)
log_debug("could not read %s: %d\n", filename, ret);
out:
diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c
index 3ac4b1b..89de73c 100644
--- a/common/spl/spl_spi.c
+++ b/common/spl/spl_spi.c
@@ -12,54 +12,19 @@
#include <image.h>
#include <imx_container.h>
#include <log.h>
-#include <mapmem.h>
#include <spi.h>
#include <spi_flash.h>
#include <errno.h>
#include <spl.h>
+#include <spl_load.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <dm/ofnode.h>
-#if CONFIG_IS_ENABLED(OS_BOOT)
-/*
- * Load the kernel, check for a valid header we can parse, and if found load
- * the kernel and then device tree.
- */
-static int spi_load_image_os(struct spl_image_info *spl_image,
- struct spl_boot_device *bootdev,
- struct spi_flash *flash,
- struct legacy_img_hdr *header)
-{
- int err;
-
- /* Read for a header, parse or error out. */
- spi_flash_read(flash, CFG_SYS_SPI_KERNEL_OFFS, sizeof(*header),
- (void *)header);
-
- if (image_get_magic(header) != IH_MAGIC)
- return -1;
-
- err = spl_parse_image_header(spl_image, bootdev, header);
- if (err)
- return err;
-
- spi_flash_read(flash, CFG_SYS_SPI_KERNEL_OFFS,
- spl_image->size, (void *)spl_image->load_addr);
-
- /* Read device tree. */
- spi_flash_read(flash, CFG_SYS_SPI_ARGS_OFFS,
- CFG_SYS_SPI_ARGS_SIZE,
- (void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR);
-
- return 0;
-}
-#endif
-
static ulong spl_spi_fit_read(struct spl_load_info *load, ulong sector,
ulong count, void *buf)
{
- struct spi_flash *flash = load->dev;
+ struct spi_flash *flash = load->priv;
ulong ret;
ret = spi_flash_read(flash, sector, count, buf);
@@ -95,9 +60,9 @@
int err = 0;
unsigned int payload_offs;
struct spi_flash *flash;
- struct legacy_img_hdr *header;
unsigned int sf_bus = spl_spi_boot_bus();
unsigned int sf_cs = spl_spi_boot_cs();
+ struct spl_load_info load;
/*
* Load U-Boot image from SPI flash into RAM
@@ -112,81 +77,32 @@
return -ENODEV;
}
- payload_offs = spl_spi_get_uboot_offs(flash);
+ load.priv = flash;
+ spl_set_bl_len(&load, 1);
+ load.read = spl_spi_fit_read;
- header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
+#if CONFIG_IS_ENABLED(OS_BOOT)
+ if (spl_start_uboot()) {
+ int err = spl_load(spl_image, bootdev, &load, 0,
+ CFG_SYS_SPI_KERNEL_OFFS);
- if (CONFIG_IS_ENABLED(OF_REAL)) {
- payload_offs = ofnode_conf_read_int("u-boot,spl-payload-offset",
- payload_offs);
+ if (!err)
+ /* Read device tree. */
+ return spi_flash_read(flash, CFG_SYS_SPI_ARGS_OFFS,
+ CFG_SYS_SPI_ARGS_SIZE,
+ (void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR);
}
-
-#if CONFIG_IS_ENABLED(OS_BOOT)
- if (spl_start_uboot() || spi_load_image_os(spl_image, bootdev, flash, header))
#endif
- {
- /* Load u-boot, mkimage header is 64 bytes. */
- err = spi_flash_read(flash, payload_offs, sizeof(*header),
- (void *)header);
- if (err) {
- debug("%s: Failed to read from SPI flash (err=%d)\n",
- __func__, err);
- return err;
- }
-
- if (IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL) &&
- image_get_magic(header) == FDT_MAGIC) {
- u32 size = roundup(fdt_totalsize(header), 4);
- err = spi_flash_read(flash, payload_offs,
- size,
- map_sysmem(CONFIG_SYS_LOAD_ADDR,
- size));
- if (err)
- return err;
- err = spl_parse_image_header(spl_image, bootdev,
- phys_to_virt(CONFIG_SYS_LOAD_ADDR));
- } else if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
- image_get_magic(header) == FDT_MAGIC) {
- struct spl_load_info load;
-
- debug("Found FIT\n");
- load.dev = flash;
- load.priv = NULL;
- load.filename = NULL;
- load.bl_len = 1;
- load.read = spl_spi_fit_read;
- err = spl_load_simple_fit(spl_image, &load,
- payload_offs,
- header);
- } else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER) &&
- valid_container_hdr((void *)header)) {
- struct spl_load_info load;
-
- load.dev = flash;
- load.priv = NULL;
- load.filename = NULL;
- load.bl_len = 1;
- load.read = spl_spi_fit_read;
-
- err = spl_load_imx_container(spl_image, &load,
- payload_offs);
- } else {
- err = spl_parse_image_header(spl_image, bootdev, header);
- if (err)
- return err;
- err = spi_flash_read(flash, payload_offs + spl_image->offset,
- spl_image->size,
- map_sysmem(spl_image->load_addr,
- spl_image->size));
- }
- if (IS_ENABLED(CONFIG_SPI_FLASH_SOFT_RESET)) {
- err = spi_nor_remove(flash);
- if (err)
- return err;
- }
+ payload_offs = spl_spi_get_uboot_offs(flash);
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ payload_offs = ofnode_conf_read_int("u-boot,spl-payload-offset",
+ payload_offs);
}
+ err = spl_load(spl_image, bootdev, &load, 0, payload_offs);
+ if (IS_ENABLED(CONFIG_SPI_FLASH_SOFT_RESET))
+ err = spi_nor_remove(flash);
return err;
}
/* Use priorty 1 so that boards can override this */
diff --git a/common/spl/spl_ymodem.c b/common/spl/spl_ymodem.c
index 038b443..1faaa2c 100644
--- a/common/spl/spl_ymodem.c
+++ b/common/spl/spl_ymodem.c
@@ -134,10 +134,8 @@
struct ymodem_fit_info info;
debug("Found FIT\n");
- load.dev = NULL;
load.priv = (void *)&info;
- load.filename = NULL;
- load.bl_len = 1;
+ spl_set_bl_len(&load, 1);
info.buf = buf;
info.image_read = BUF_SIZE;
load.read = ymodem_read_fit;
diff --git a/common/stackprot.c b/common/stackprot.c
index d5b7061..6495951 100644
--- a/common/stackprot.c
+++ b/common/stackprot.c
@@ -18,3 +18,8 @@
panic("Stack smashing detected in function:\n%p relocated from %p",
ra, ra - gd->reloc_off);
}
+
+void __stack_chk_fail_local(void)
+{
+ __stack_chk_fail();
+}
diff --git a/common/version.c b/common/version.c
new file mode 100644
index 0000000..6e27bb8
--- /dev/null
+++ b/common/version.c
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2000-2009
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ */
+
+#include <timestamp.h>
+#include <version.h>
+#include <version_string.h>
+
+#define U_BOOT_VERSION_STRING U_BOOT_VERSION " (" U_BOOT_DATE " - " \
+ U_BOOT_TIME " " U_BOOT_TZ ")" CONFIG_IDENT_STRING
+
+const char version_string[] = U_BOOT_VERSION_STRING;
+const unsigned short version_num = U_BOOT_VERSION_NUM;
+const unsigned char version_num_patch = U_BOOT_VERSION_NUM_PATCH;
diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig
index 16993ef..0599ae2 100644
--- a/configs/am335x_baltos_defconfig
+++ b/configs/am335x_baltos_defconfig
@@ -22,7 +22,7 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
@@ -67,7 +67,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index f048e60..5d38dad 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -26,7 +26,7 @@
CONFIG_SPL_ETH=y
# CONFIG_SPL_FS_EXT4 is not set
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_MUSB_NEW=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
@@ -84,7 +84,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig
index 9866246..fff5265 100644
--- a/configs/am335x_evm_spiboot_defconfig
+++ b/configs/am335x_evm_spiboot_defconfig
@@ -13,6 +13,7 @@
# CONFIG_OF_LIBFDT_OVERLAY is not set
# CONFIG_SPL_MMC is not set
CONFIG_SPL=y
+# CONFIG_SPL_FS_FAT is not set
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_TIMESTAMP=y
@@ -27,8 +28,7 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_FIT_IMAGE_TINY=y
# CONFIG_SPL_FS_EXT4 is not set
-CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_SPI_LOAD=y
diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig
index 01d848c..5369e46 100644
--- a/configs/am335x_guardian_defconfig
+++ b/configs/am335x_guardian_defconfig
@@ -99,7 +99,6 @@
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0x100
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig
index b961b6c..ea46e58 100644
--- a/configs/am335x_hs_evm_defconfig
+++ b/configs/am335x_hs_evm_defconfig
@@ -27,7 +27,7 @@
# CONFIG_SPL_ENV_SUPPORT is not set
# CONFIG_SPL_FS_EXT4 is not set
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig
index b5d8eac..7886557 100644
--- a/configs/am335x_hs_evm_uart_defconfig
+++ b/configs/am335x_hs_evm_uart_defconfig
@@ -29,7 +29,7 @@
CONFIG_SPL_FIT_IMAGE_TINY=y
# CONFIG_SPL_ENV_SUPPORT is not set
# CONFIG_SPL_FS_EXT4 is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig
index 4dd6366..e2c5b70 100644
--- a/configs/am335x_igep003x_defconfig
+++ b/configs/am335x_igep003x_defconfig
@@ -24,7 +24,7 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
@@ -85,7 +85,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_MTD_UBI_FASTMAP=y
diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig
index 9ba376f..fb61dd7 100644
--- a/configs/am335x_sl50_defconfig
+++ b/configs/am335x_sl50_defconfig
@@ -28,7 +28,7 @@
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
index 0a83ac9..a96936c 100644
--- a/configs/am3517_evm_defconfig
+++ b/configs/am3517_evm_defconfig
@@ -26,7 +26,7 @@
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_FS_EXT4 is not set
# CONFIG_SPL_I2C is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
@@ -75,7 +75,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index 6571afd..d5ce299 100644
--- a/configs/am43xx_evm_defconfig
+++ b/configs/am43xx_evm_defconfig
@@ -22,7 +22,7 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_ETH=y
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
@@ -72,7 +72,6 @@
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig
index e84aed4..a0a9e8a 100644
--- a/configs/am43xx_evm_rtconly_defconfig
+++ b/configs/am43xx_evm_rtconly_defconfig
@@ -21,7 +21,7 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
@@ -62,7 +62,6 @@
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig
index 0cae324..cd47806 100644
--- a/configs/am43xx_evm_usbhost_boot_defconfig
+++ b/configs/am43xx_evm_usbhost_boot_defconfig
@@ -20,7 +20,7 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
@@ -75,7 +75,6 @@
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 370ee96..d721664 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -28,7 +28,7 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_ETH=y
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
@@ -68,7 +68,6 @@
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig
index d0a34c7..3808358 100644
--- a/configs/am62ax_evm_a53_defconfig
+++ b/configs/am62ax_evm_a53_defconfig
@@ -21,8 +21,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_BOOTCOMMAND="run envboot; run distro_bootcmd;"
+CONFIG_BOOTSTD_FULL=y
+CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
CONFIG_SPL_MAX_SIZE=0x58000
CONFIG_SPL_PAD_TO=0x0
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -42,7 +43,6 @@
CONFIG_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
-# CONFIG_NET is not set
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
@@ -51,6 +51,8 @@
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_CLK_TI_SCI=y
+CONFIG_DMA_CHANNELS=y
+CONFIG_TI_K3_NAVSS_UDMA=y
CONFIG_TI_SCI_PROTOCOL=y
# CONFIG_GPIO is not set
# CONFIG_I2C is not set
@@ -60,6 +62,10 @@
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_SPL_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_AM654=y
+CONFIG_PHY_TI_DP83867=y
+CONFIG_PHY_FIXED=y
+CONFIG_TI_AM65_CPSW_NUSS=y
+CONFIG_PHY=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_SINGLE=y
diff --git a/configs/am62ax_evm_r5_defconfig b/configs/am62ax_evm_r5_defconfig
index d52de8b..4070415 100644
--- a/configs/am62ax_evm_r5_defconfig
+++ b/configs/am62ax_evm_r5_defconfig
@@ -43,7 +43,7 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
CONFIG_SPL_DMA=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_POWER_DOMAIN=y
diff --git a/configs/am62x_beagleplay_a53_defconfig b/configs/am62x_beagleplay_a53_defconfig
new file mode 100644
index 0000000..03ca3ac
--- /dev/null
+++ b/configs/am62x_beagleplay_a53_defconfig
@@ -0,0 +1,118 @@
+CONFIG_ARM=y
+CONFIG_ARCH_K3=y
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_SOC_K3_AM625=y
+CONFIG_K3_ATF_LOAD_ADDR=0x9e780000
+CONFIG_TARGET_AM625_A53_BEAGLEPLAY=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80b80000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="k3-am625-beagleplay"
+CONFIG_SPL_TEXT_BASE=0x80080000
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_SIZE_LIMIT=0x40000
+CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x800
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_PSCI_RESET is not set
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
+CONFIG_BOOTSTD_FULL=y
+CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
+CONFIG_AUTOBOOT_DELAY_STR="d"
+CONFIG_AUTOBOOT_STOP_STR=" "
+CONFIG_BOOTCOMMAND="run set_led_state_start_load;run findfdt; run envboot; bootflow scan -lb;run set_led_state_fail_load"
+CONFIG_SPL_MAX_SIZE=0x58000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80c80000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
+CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
+CONFIG_SPL_I2C=y
+CONFIG_SPL_DM_MAILBOX=y
+CONFIG_SPL_POWER_DOMAIN=y
+CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_SYS_BOOTM_LEN=0x800000
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPIO_READ=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_MULTI_DTB_FIT=y
+CONFIG_SPL_MULTI_DTB_FIT=y
+CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_TI_SCI=y
+CONFIG_DMA_CHANNELS=y
+CONFIG_TI_K3_NAVSS_UDMA=y
+CONFIG_TI_SCI_PROTOCOL=y
+CONFIG_DA8XX_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_OMAP24XX=y
+CONFIG_LED=y
+CONFIG_SPL_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_SPL_LED_GPIO=y
+CONFIG_DM_MAILBOX=y
+CONFIG_K3_SEC_PROXY=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ADMA=y
+CONFIG_SPL_MMC_SDHCI_ADMA=y
+CONFIG_MMC_SDHCI_AM654=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TI=y
+CONFIG_PHY_FIXED=y
+CONFIG_TI_AM65_CPSW_NUSS=y
+CONFIG_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_TI_SCI_POWER_DOMAIN=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_TPS65219=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_REGULATOR_TPS65219=y
+CONFIG_K3_SYSTEM_CONTROLLER=y
+CONFIG_REMOTEPROC_TI_K3_ARM64=y
+CONFIG_RESET_TI_SCI=y
+CONFIG_DM_SERIAL=y
+CONFIG_SOC_DEVICE=y
+CONFIG_SOC_DEVICE_TI_K3=y
+CONFIG_SOC_TI=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_TI_SCI=y
+CONFIG_EXT4_WRITE=y
+CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
+CONFIG_LZO=y
diff --git a/configs/am62x_beagleplay_r5_defconfig b/configs/am62x_beagleplay_r5_defconfig
new file mode 100644
index 0000000..2f3264b
--- /dev/null
+++ b/configs/am62x_beagleplay_r5_defconfig
@@ -0,0 +1,110 @@
+CONFIG_ARM=y
+CONFIG_ARCH_K3=y
+CONFIG_SYS_MALLOC_LEN=0x08000000
+CONFIG_SYS_MALLOC_F_LEN=0x9000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_SOC_K3_AM625=y
+CONFIG_TARGET_AM625_R5_BEAGLEPLAY=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43c3a7f0
+CONFIG_ENV_SIZE=0x20000
+CONFIG_DM_GPIO=y
+CONFIG_SPL_DM_SPI=y
+CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-beagleplay"
+CONFIG_SPL_TEXT_BASE=0x43c00000
+CONFIG_DM_RESET=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000
+CONFIG_SPL_SIZE_LIMIT=0x3A7F0
+CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
+CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
+CONFIG_SPL_MAX_SIZE=0x3B000
+CONFIG_SPL_PAD_TO=0x0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x43c3b000
+CONFIG_SPL_BSS_MAX_SIZE=0x3000
+CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
+CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x84000000
+CONFIG_SPL_SYS_MALLOC_SIZE=0x1000000
+CONFIG_SPL_EARLY_BSS=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
+CONFIG_SPL_DM_MAILBOX=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_POWER_DOMAIN=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_REMOTEPROC=y
+CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_REMOTEPROC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_MULTI_DTB_FIT=y
+CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET is not set
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_SPL_CLK_CCF=y
+CONFIG_SPL_CLK_K3_PLL=y
+CONFIG_SPL_CLK_K3=y
+CONFIG_TI_SCI_PROTOCOL=y
+CONFIG_DA8XX_GPIO=y
+CONFIG_DM_MAILBOX=y
+CONFIG_K3_SEC_PROXY=y
+CONFIG_SPL_MISC=y
+CONFIG_ESM_K3=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ADMA=y
+CONFIG_SPL_MMC_SDHCI_ADMA=y
+CONFIG_MMC_SDHCI_AM654=y
+CONFIG_PINCTRL=y
+# CONFIG_PINCTRL_GENERIC is not set
+CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_GENERIC is not set
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_TI_POWER_DOMAIN=y
+CONFIG_K3_SYSTEM_CONTROLLER=y
+CONFIG_REMOTEPROC_TI_K3_ARM64=y
+CONFIG_RESET_TI_SCI=y
+CONFIG_SPECIFY_CONSOLE_INDEX=y
+CONFIG_DM_SERIAL=y
+CONFIG_SOC_DEVICE=y
+CONFIG_SOC_DEVICE_TI_K3=y
+CONFIG_SOC_TI=y
+CONFIG_TIMER=y
+CONFIG_SPL_TIMER=y
+CONFIG_OMAP_TIMER=y
+CONFIG_LIB_RATIONAL=y
+CONFIG_SPL_LIB_RATIONAL=y
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index f436986..55289b9 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -52,7 +52,7 @@
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_POWER_DOMAIN=y
diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig
index f610b2d..6b0bb12 100644
--- a/configs/am65x_evm_r5_usbdfu_defconfig
+++ b/configs/am65x_evm_r5_usbdfu_defconfig
@@ -21,7 +21,6 @@
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SIZE_LIMIT=0x7ec00
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x2000
-CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index aa9cf77..cf2af57 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -59,6 +59,7 @@
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_USB=y
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
@@ -105,7 +106,7 @@
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_SCSI=y
+CONFIG_SCSI=y
CONFIG_MXC_UART=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
diff --git a/configs/arbel_evb_defconfig b/configs/arbel_evb_defconfig
index 6cfb5a7..e2714d1 100644
--- a/configs/arbel_evb_defconfig
+++ b/configs/arbel_evb_defconfig
@@ -4,6 +4,8 @@
CONFIG_SYS_MALLOC_LEN=0x240000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x06208000
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x3C0000
CONFIG_ENV_SECT_SIZE=0x1000
@@ -19,10 +21,12 @@
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run common_bootargs; run romboot"
+CONFIG_LAST_STAGE_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot>"
CONFIG_SYS_MAXARGS=32
CONFIG_SYS_BOOTM_LEN=0x1400000
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -31,6 +35,7 @@
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -39,6 +44,7 @@
CONFIG_CMD_UUID=y
CONFIG_CMD_HASH=y
CONFIG_CMD_TPM=y
+CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
@@ -49,6 +55,7 @@
CONFIG_NPCM_SHA=y
CONFIG_NPCM_GPIO=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_NPCM=y
# CONFIG_INPUT is not set
CONFIG_MISC=y
CONFIG_NPCM_HOST=y
@@ -87,12 +94,17 @@
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_NPCM=y
-CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_OHCI_NPCM=y
CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Nuvoton"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0416
+CONFIG_USB_GADGET_PRODUCT_NUM=0xffff
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_LIB_HW_RAND=y
CONFIG_TPM=y
CONFIG_SHA_HW_ACCEL=y
# CONFIG_EFI_LOADER is not set
+CONFIG_SYS_SKIP_UART_INIT=y
diff --git a/configs/axm_defconfig b/configs/axm_defconfig
index f9c0214..e1a01b2 100644
--- a/configs/axm_defconfig
+++ b/configs/axm_defconfig
@@ -86,7 +86,6 @@
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig
index 06642d2..0cd649d 100644
--- a/configs/chiliboard_defconfig
+++ b/configs/chiliboard_defconfig
@@ -63,7 +63,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig
index 73ccefd..1a558b0 100644
--- a/configs/cm_t43_defconfig
+++ b/configs/cm_t43_defconfig
@@ -37,7 +37,7 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x480
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index ecf61f0..5eaa6db 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -81,7 +81,6 @@
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig
index 5f6f5d7..62b8edd 100644
--- a/configs/da850evm_nand_defconfig
+++ b/configs/da850evm_nand_defconfig
@@ -88,7 +88,6 @@
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
index ec4031d..569b156 100644
--- a/configs/devkit3250_defconfig
+++ b/configs/devkit3250_defconfig
@@ -73,7 +73,6 @@
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_LPC32XX_SLC=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
# CONFIG_SYS_NAND_5_ADDR_CYCLE is not set
diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig
index ef16da1..a7f8244 100644
--- a/configs/devkit8000_defconfig
+++ b/configs/devkit8000_defconfig
@@ -77,7 +77,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_HAM1_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig
index 5a83b6a..154131e 100644
--- a/configs/dh_imx6_defconfig
+++ b/configs/dh_imx6_defconfig
@@ -52,6 +52,7 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SATA=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_WDT=y
@@ -99,7 +100,7 @@
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_SCSI=y
+CONFIG_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_SPI=y
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index 19ca89f..c3a3ec2 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -104,7 +104,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
diff --git a/configs/etamin_defconfig b/configs/draco-etamin_defconfig
similarity index 91%
rename from configs/etamin_defconfig
rename to configs/draco-etamin_defconfig
index c0ce7a3..ef7c7c1 100644
--- a/configs/etamin_defconfig
+++ b/configs/draco-etamin_defconfig
@@ -2,7 +2,6 @@
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_LEN=0x1000000
-CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -10,7 +9,6 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x980000
-CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=300
@@ -22,8 +20,6 @@
CONFIG_ENV_OFFSET_REDUND=0xB80000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
@@ -36,7 +32,6 @@
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
@@ -45,9 +40,6 @@
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
@@ -76,7 +68,6 @@
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand_concat:512k(spl),512k(spl.backup1),512k(spl.backup2),512k(spl.backup3),7680k(u-boot),2048k(u-boot.env0),2048k(u-boot.env1),2048k(mtdoops),-(rootfs)"
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
@@ -91,6 +82,8 @@
# CONFIG_SPL_BLK is not set
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
+CONFIG_CLK=y
+CONFIG_CLK_TI_CTRL=y
CONFIG_DFU_NAND=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
CONFIG_SYS_I2C_LEGACY=y
@@ -104,13 +97,10 @@
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x80
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x200000
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_PHY_SMSC=y
diff --git a/configs/rastaban_defconfig b/configs/draco-rastaban_defconfig
similarity index 89%
rename from configs/rastaban_defconfig
rename to configs/draco-rastaban_defconfig
index 9f538a2..b293ed5 100644
--- a/configs/rastaban_defconfig
+++ b/configs/draco-rastaban_defconfig
@@ -2,27 +2,22 @@
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_LEN=0x1000000
-CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_ENV_SIZE=0x2000
-CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=300
CONFIG_TARGET_RASTABAN=y
-CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x2E0000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
@@ -35,18 +30,15 @@
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
@@ -59,7 +51,6 @@
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
@@ -75,7 +66,6 @@
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:128k(spl),128k(spl.backup1),128k(spl.backup2),128k(spl.backup3),1920k(u-boot),512k(u-boot.env0),512k(u-boot.env1),300m(rootfs),512k(mtdoops),-(configuration)"
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
@@ -90,23 +80,21 @@
# CONFIG_SPL_BLK is not set
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
+CONFIG_CLK=y
+CONFIG_CLK_TI_CTRL=y
CONFIG_DFU_NAND=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SPL_SYS_I2C_LEGACY=y
-# CONFIG_SPL_DM_MMC is not set
-CONFIG_MMC_OMAP_HS=y
+# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_PHY_SMSC=y
diff --git a/configs/thuban_defconfig b/configs/draco-thuban_defconfig
similarity index 88%
rename from configs/thuban_defconfig
rename to configs/draco-thuban_defconfig
index 116700e..6c03732 100644
--- a/configs/thuban_defconfig
+++ b/configs/draco-thuban_defconfig
@@ -2,27 +2,22 @@
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_LEN=0x1000000
-CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_ENV_SIZE=0x2000
-CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=300
CONFIG_TARGET_THUBAN=y
-CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x2E0000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
@@ -35,18 +30,15 @@
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
@@ -59,7 +51,6 @@
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
@@ -75,7 +66,6 @@
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:128k(spl),128k(spl.backup1),128k(spl.backup2),128k(spl.backup3),1920k(u-boot),512k(u-boot.env0),512k(u-boot.env1),512k(mtdoops),-(rootfs)"
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
@@ -90,23 +80,21 @@
# CONFIG_SPL_BLK is not set
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
+CONFIG_CLK=y
+CONFIG_CLK_TI_CTRL=y
CONFIG_DFU_NAND=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SPL_SYS_I2C_LEGACY=y
-# CONFIG_SPL_DM_MMC is not set
-CONFIG_MMC_OMAP_HS=y
+# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_PHY_SMSC=y
diff --git a/configs/draco_defconfig b/configs/draco_defconfig
deleted file mode 100644
index ee19920..0000000
--- a/configs/draco_defconfig
+++ /dev/null
@@ -1,127 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_TEXT_BASE=0x80100000
-CONFIG_SYS_MALLOC_LEN=0x1000000
-CONFIG_SPL_GPIO=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
-CONFIG_ENV_SIZE=0x2000
-CONFIG_SPL_DM_SPI=y
-CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
-CONFIG_AM33XX=y
-CONFIG_SYS_MPUCLK=300
-CONFIG_TARGET_DRACO=y
-CONFIG_SPL_MMC=y
-CONFIG_SPL_SERIAL=y
-CONFIG_BOOTCOUNT_BOOTLIMIT=3
-CONFIG_SPL=y
-CONFIG_ENV_OFFSET_REDUND=0x2E0000
-CONFIG_SPL_FS_FAT=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI=y
-CONFIG_SYS_LOAD_ADDR=0x81000000
-CONFIG_ENV_VARS_UBOOT_CONFIG=y
-CONFIG_BOOTDELAY=3
-CONFIG_AUTOBOOT_KEYED=y
-CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
-CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
-CONFIG_BOOT_RETRY=y
-CONFIG_BOOT_RETRY_TIME=60
-CONFIG_RESET_TO_RETRY=y
-CONFIG_USE_PREBOOT=y
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_BSS_START_ADDR=0x80000000
-CONFIG_SPL_SYS_MALLOC=y
-CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
-CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000
-CONFIG_SPL_I2C=y
-CONFIG_SPL_NAND_DRIVERS=y
-CONFIG_SPL_NAND_ECC=y
-CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
-CONFIG_SPL_WATCHDOG=y
-CONFIG_SPL_YMODEM_SUPPORT=y
-# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="U-Boot# "
-CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1049
-CONFIG_CMD_ASKENV=y
-CONFIG_CMD_DFU=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_BOOTP_DNS2=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:128k(spl),128k(spl.backup1),128k(spl.backup2),128k(spl.backup3),1920k(u-boot),512k(u-boot.env0),512k(u-boot.env1),512k(mtdoops),-(rootfs)"
-CONFIG_CMD_UBI=y
-CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_NAND=y
-CONFIG_ENV_RANGE=0x80000
-CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RETRY_COUNT=10
-CONFIG_BOOTP_SEND_HOSTNAME=y
-CONFIG_USE_ROOTPATH=y
-CONFIG_ROOTPATH="/opt/eldk"
-CONFIG_SPL_DM=y
-# CONFIG_SPL_BLK is not set
-CONFIG_BOOTCOUNT_LIMIT=y
-CONFIG_BOOTCOUNT_ENV=y
-CONFIG_DFU_NAND=y
-CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
-CONFIG_SYS_I2C_LEGACY=y
-CONFIG_SPL_SYS_I2C_LEGACY=y
-# CONFIG_SPL_DM_MMC is not set
-CONFIG_MMC_OMAP_HS=y
-CONFIG_MTD=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
-CONFIG_SYS_NAND_PAGE_SIZE=0x800
-CONFIG_SYS_NAND_OOBSIZE=0x40
-CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
-CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_MTD_UBI_FASTMAP=y
-CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
-CONFIG_PHY_SMSC=y
-CONFIG_DRIVER_TI_CPSW=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_OMAP3_SPI=y
-CONFIG_USB=y
-# CONFIG_SPL_DM_USB is not set
-CONFIG_USB_MUSB_HOST=y
-CONFIG_USB_MUSB_GADGET=y
-CONFIG_USB_MUSB_DSPS=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Siemens AG"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0908
-CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_USB_ETHER=y
diff --git a/configs/edison_defconfig b/configs/edison_defconfig
index f134680..db2e35f 100644
--- a/configs/edison_defconfig
+++ b/configs/edison_defconfig
@@ -27,6 +27,7 @@
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_TIMER=y
CONFIG_CMD_HASH=y
CONFIG_CMD_EXT4=y
diff --git a/configs/efi-x86_app32_defconfig b/configs/efi-x86_app32_defconfig
index dfc3157..e2e6f42 100644
--- a/configs/efi-x86_app32_defconfig
+++ b/configs/efi-x86_app32_defconfig
@@ -20,7 +20,7 @@
CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_PART=y
-# CONFIG_CMD_NET is not set
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
@@ -35,7 +35,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="bzImage"
-CONFIG_USE_ROOTPATH=y
+# CONFIG_NET is not set
CONFIG_REGMAP=y
CONFIG_SYSCON=y
# CONFIG_REGEX is not set
diff --git a/configs/efi-x86_app64_defconfig b/configs/efi-x86_app64_defconfig
index e0cfe3e..14b5cd0 100644
--- a/configs/efi-x86_app64_defconfig
+++ b/configs/efi-x86_app64_defconfig
@@ -21,7 +21,7 @@
CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_PART=y
-# CONFIG_CMD_NET is not set
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
@@ -37,7 +37,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="bzImage"
-CONFIG_USE_ROOTPATH=y
+# CONFIG_NET is not set
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CONSOLE_SCROLL_LINES=5
diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig
index 3eb1917..35f7fb7 100644
--- a/configs/galileo_defconfig
+++ b/configs/galileo_defconfig
@@ -23,6 +23,7 @@
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig
index 439fcc0..0fb92ff 100644
--- a/configs/gardena-smart-gateway-at91sam_defconfig
+++ b/configs/gardena-smart-gateway-at91sam_defconfig
@@ -99,7 +99,6 @@
CONFIG_NAND_ATMEL=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig
index 993bbe2..34439cf 100644
--- a/configs/igep00x0_defconfig
+++ b/configs/igep00x0_defconfig
@@ -24,7 +24,7 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
# CONFIG_SPL_FS_EXT4 is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
@@ -78,7 +78,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
diff --git a/configs/imx6q_bosch_acc_defconfig b/configs/imx6q_bosch_acc_defconfig
index 05bab03..6abb795 100644
--- a/configs/imx6q_bosch_acc_defconfig
+++ b/configs/imx6q_bosch_acc_defconfig
@@ -63,7 +63,6 @@
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
# CONFIG_CMD_BLOCK_CACHE is not set
# CONFIG_CMD_SLEEP is not set
# CONFIG_CMD_MP is not set
@@ -82,7 +81,7 @@
CONFIG_ENV_WRITEABLE_LIST=y
CONFIG_ENV_ACCESS_IGNORE_FORCE=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_TFTP_BLOCKSIZE=512
+# CONFIG_NET is not set
CONFIG_SPL_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_BOOTCOUNT=y
diff --git a/configs/imx6ulz_smm_m2_defconfig b/configs/imx6ulz_smm_m2_defconfig
index d6edc71..c471e04 100644
--- a/configs/imx6ulz_smm_m2_defconfig
+++ b/configs/imx6ulz_smm_m2_defconfig
@@ -25,7 +25,7 @@
CONFIG_SPL_BSS_START_ADDR=0x84100000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_DMA=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_DM=y
diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig
index 657eb35..a9c0297 100644
--- a/configs/imx8mn_bsh_smm_s2_defconfig
+++ b/configs/imx8mn_bsh_smm_s2_defconfig
@@ -43,7 +43,7 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
CONFIG_SPL_DMA=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_NAND_IDENT=y
diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig
index cb4a141..c0f31f5 100644
--- a/configs/j7200_evm_a72_defconfig
+++ b/configs/j7200_evm_a72_defconfig
@@ -29,10 +29,11 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_BOOTCOMMAND="run envboot; run distro_bootcmd;"
+CONFIG_BOOTSTD_FULL=y
+CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
CONFIG_LOGLEVEL=7
CONFIG_SPL_MAX_SIZE=0xc0000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -50,7 +51,7 @@
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
@@ -138,7 +139,6 @@
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_HBMC_AM654=y
CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig
index d25dd81..069b2ac 100644
--- a/configs/j7200_evm_r5_defconfig
+++ b/configs/j7200_evm_r5_defconfig
@@ -48,7 +48,7 @@
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
@@ -114,7 +114,6 @@
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_HBMC_AM654=y
CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
diff --git a/configs/j721e_beagleboneai64_a72_defconfig b/configs/j721e_beagleboneai64_a72_defconfig
new file mode 100644
index 0000000..9e16c98
--- /dev/null
+++ b/configs/j721e_beagleboneai64_a72_defconfig
@@ -0,0 +1,171 @@
+CONFIG_ARM=y
+CONFIG_ARCH_K3=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_SOC_K3_J721E=y
+CONFIG_TARGET_J721E_A72_BEAGLEBONEAI64=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
+CONFIG_ENV_SIZE=0x20000
+CONFIG_DM_GPIO=y
+CONFIG_SPL_DM_SPI=y
+CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-beagleboneai64"
+CONFIG_SPL_TEXT_BASE=0x80080000
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_PSCI_RESET is not set
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
+CONFIG_BOOTSTD_FULL=y
+CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
+CONFIG_AUTOBOOT_DELAY_STR="d"
+CONFIG_AUTOBOOT_STOP_STR=" "
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_BOOTCOMMAND="run set_led_state_start_load;run findfdt; run envboot; bootflow scan -lb;run set_led_state_fail_load"
+CONFIG_LOGLEVEL=7
+CONFIG_SPL_MAX_SIZE=0xc0000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80a00000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
+CONFIG_SPL_DMA=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
+CONFIG_SPL_I2C=y
+CONFIG_SPL_DM_MAILBOX=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_NOR_SUPPORT=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_POWER_DOMAIN=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
+CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPIO_READ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_REMOTEPROC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_MMC_SPEED_MODE_SET=y
+# CONFIG_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_MULTI_DTB_FIT=y
+CONFIG_SPL_MULTI_DTB_FIT=y
+CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_TI_SCI=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_RAM=y
+CONFIG_SYS_DFU_DATA_BUF_SIZE=0x20000
+CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000
+CONFIG_DMA_CHANNELS=y
+CONFIG_TI_K3_NAVSS_UDMA=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x82000000
+CONFIG_FASTBOOT_BUF_SIZE=0x2F000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_TI_SCI_PROTOCOL=y
+CONFIG_DA8XX_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_I2C_GPIO=y
+CONFIG_SYS_I2C_OMAP24XX=y
+CONFIG_LED=y
+CONFIG_SPL_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_SPL_LED_GPIO=y
+CONFIG_DM_MAILBOX=y
+CONFIG_K3_SEC_PROXY=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ADMA=y
+CONFIG_SPL_MMC_SDHCI_ADMA=y
+CONFIG_MMC_SDHCI_AM654=y
+CONFIG_MTD_UBI=y
+CONFIG_MULTIPLEXER=y
+CONFIG_MUX_MMIO=y
+CONFIG_PHY_TI_DP83867=y
+CONFIG_PHY_FIXED=y
+CONFIG_TI_AM65_CPSW_NUSS=y
+CONFIG_PHY=y
+CONFIG_SPL_PHY=y
+CONFIG_PINCTRL=y
+# CONFIG_PINCTRL_GENERIC is not set
+CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_GENERIC is not set
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_TI_SCI_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_REMOTEPROC_TI_K3_DSP=y
+CONFIG_REMOTEPROC_TI_K3_R5F=y
+CONFIG_RESET_TI_SCI=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_DM_SERIAL=y
+CONFIG_SOC_DEVICE=y
+CONFIG_SOC_DEVICE_TI_K3=y
+CONFIG_SOC_TI=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_TI_SCI=y
+CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
+CONFIG_SPL_DM_USB_GADGET=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_CDNS3=y
+CONFIG_USB_CDNS3_GADGET=y
+CONFIG_USB_CDNS3_HOST=y
+CONFIG_SPL_USB_CDNS3_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0x6163
+CONFIG_SPL_DFU=y
+CONFIG_LZO=y
diff --git a/configs/j721e_beagleboneai64_r5_defconfig b/configs/j721e_beagleboneai64_r5_defconfig
new file mode 100644
index 0000000..5e6ad7b
--- /dev/null
+++ b/configs/j721e_beagleboneai64_r5_defconfig
@@ -0,0 +1,131 @@
+CONFIG_ARM=y
+CONFIG_ARCH_K3=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x70000
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SOC_K3_J721E=y
+CONFIG_K3_EARLY_CONS=y
+CONFIG_TARGET_J721E_R5_BEAGLEBONEAI64=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf59f0
+CONFIG_ENV_SIZE=0x20000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-beagleboneai64"
+CONFIG_SPL_TEXT_BASE=0x41c00000
+CONFIG_DM_RESET=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_SIZE_LIMIT=0xf59f0
+CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
+CONFIG_USE_BOOTCOMMAND=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
+CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
+CONFIG_SPL_MAX_SIZE=0xf59f0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x41cf59f0
+CONFIG_SPL_BSS_MAX_SIZE=0xa000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
+CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x84000000
+CONFIG_SPL_SYS_MALLOC_SIZE=0x1000000
+CONFIG_SPL_EARLY_BSS=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
+CONFIG_SPL_DMA=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_FS_EXT4=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_DM_MAILBOX=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_POWER_DOMAIN=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_REMOTEPROC=y
+CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_REMOTEPROC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIST="k3-j721e-r5-common-proc-board"
+CONFIG_SPL_MULTI_DTB_FIT=y
+CONFIG_SPL_OF_LIST="k3-j721e-r5-beagleboneai64"
+CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_SPL_CLK_CCF=y
+CONFIG_SPL_CLK_K3_PLL=y
+CONFIG_SPL_CLK_K3=y
+CONFIG_SYS_DFU_DATA_BUF_SIZE=0x5000
+CONFIG_DMA_CHANNELS=y
+CONFIG_TI_K3_NAVSS_UDMA=y
+CONFIG_TI_SCI_PROTOCOL=y
+CONFIG_DA8XX_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_OMAP24XX=y
+CONFIG_DM_MAILBOX=y
+CONFIG_K3_SEC_PROXY=y
+CONFIG_FS_LOADER=y
+CONFIG_SPL_FS_LOADER=y
+CONFIG_SPL_MMC_HS200_SUPPORT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_SPL_MMC_SDHCI_ADMA=y
+CONFIG_MMC_SDHCI_AM654=y
+CONFIG_PINCTRL=y
+# CONFIG_PINCTRL_GENERIC is not set
+CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_GENERIC is not set
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_TI_POWER_DOMAIN=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_TPS65941=y
+CONFIG_DM_REGULATOR=y
+CONFIG_SPL_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_TPS65941=y
+CONFIG_K3_SYSTEM_CONTROLLER=y
+CONFIG_REMOTEPROC_TI_K3_ARM64=y
+CONFIG_RESET_TI_SCI=y
+CONFIG_DM_SERIAL=y
+CONFIG_SOC_DEVICE=y
+CONFIG_SOC_DEVICE_TI_K3=y
+CONFIG_SOC_TI=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_TI_SCI=y
+CONFIG_TIMER=y
+CONFIG_SPL_TIMER=y
+CONFIG_OMAP_TIMER=y
+CONFIG_FS_EXT4=y
+CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
+CONFIG_LIB_RATIONAL=y
+CONFIG_SPL_LIB_RATIONAL=y
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
index 99e0e16..82fa1b1 100644
--- a/configs/j721e_evm_a72_defconfig
+++ b/configs/j721e_evm_a72_defconfig
@@ -29,10 +29,11 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_BOOTCOMMAND="run envboot; run distro_bootcmd;"
+CONFIG_BOOTSTD_FULL=y
+CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
CONFIG_LOGLEVEL=7
CONFIG_SPL_MAX_SIZE=0xc0000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -50,7 +51,7 @@
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig
index e76ab59..55169bb 100644
--- a/configs/j721e_evm_r5_defconfig
+++ b/configs/j721e_evm_r5_defconfig
@@ -53,7 +53,7 @@
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig
index 876f078..a7adb92 100644
--- a/configs/j721s2_evm_a72_defconfig
+++ b/configs/j721s2_evm_a72_defconfig
@@ -49,7 +49,7 @@
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig
index 4990e27..c0fdd86 100644
--- a/configs/j721s2_evm_r5_defconfig
+++ b/configs/j721s2_evm_r5_defconfig
@@ -55,7 +55,7 @@
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig
index ef9e15d..e1ddc0a 100644
--- a/configs/m53menlo_defconfig
+++ b/configs/m53menlo_defconfig
@@ -90,7 +90,6 @@
CONFIG_NAND_MXC=y
CONFIG_MXC_NAND_HWECC=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/mvebu_ac5_rd_defconfig b/configs/mvebu_ac5_rd_defconfig
index e8fa22b..0a9adcc 100644
--- a/configs/mvebu_ac5_rd_defconfig
+++ b/configs/mvebu_ac5_rd_defconfig
@@ -28,6 +28,7 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
@@ -72,7 +73,7 @@
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_RTC=y
-CONFIG_DM_SCSI=y
+CONFIG_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_MVEBU_A3700_SPI=y
CONFIG_DM_THERMAL=y
diff --git a/configs/novena_defconfig b/configs/novena_defconfig
index 278e3fd..2389991 100644
--- a/configs/novena_defconfig
+++ b/configs/novena_defconfig
@@ -48,6 +48,7 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SATA=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_USB=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig
index 539b0cf..5040af0 100644
--- a/configs/omap35_logic_defconfig
+++ b/configs/omap35_logic_defconfig
@@ -30,7 +30,7 @@
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_FS_EXT4 is not set
# CONFIG_SPL_I2C is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
@@ -74,7 +74,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig
index f14ce3d..1ea35c7 100644
--- a/configs/omap35_logic_somlv_defconfig
+++ b/configs/omap35_logic_somlv_defconfig
@@ -31,7 +31,7 @@
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_FS_EXT4 is not set
# CONFIG_SPL_I2C is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
@@ -83,7 +83,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig
index cabd365..c8c9ae0 100644
--- a/configs/omap3_beagle_defconfig
+++ b/configs/omap3_beagle_defconfig
@@ -22,7 +22,7 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
# CONFIG_SPL_FS_EXT4 is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
@@ -83,7 +83,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_HAM1_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index 33ff39f..93427f3 100644
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -22,7 +22,7 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
# CONFIG_SPL_FS_EXT4 is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
@@ -74,7 +74,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
index 7d3d602..729586b 100644
--- a/configs/omap3_logic_defconfig
+++ b/configs/omap3_logic_defconfig
@@ -29,7 +29,7 @@
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_FS_EXT4 is not set
# CONFIG_SPL_I2C is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
@@ -73,7 +73,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig
index 0141a42..f0f326d 100644
--- a/configs/omap3_logic_somlv_defconfig
+++ b/configs/omap3_logic_somlv_defconfig
@@ -31,7 +31,7 @@
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_FS_EXT4 is not set
# CONFIG_SPL_I2C is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
@@ -84,7 +84,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index 47feff2..63554d5 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -84,7 +84,6 @@
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
diff --git a/configs/origen_defconfig b/configs/origen_defconfig
index 3a71d6e..5e55b71 100644
--- a/configs/origen_defconfig
+++ b/configs/origen_defconfig
@@ -35,13 +35,13 @@
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_NET is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_SLEEP is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET is not set
CONFIG_DFU_MMC=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x2000000
CONFIG_MMC_DW=y
diff --git a/configs/phycore-am335x-r2-regor_defconfig b/configs/phycore-am335x-r2-regor_defconfig
index 4bdf882..cbfe1cf 100644
--- a/configs/phycore-am335x-r2-regor_defconfig
+++ b/configs/phycore-am335x-r2-regor_defconfig
@@ -28,7 +28,7 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
@@ -76,7 +76,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig
index 7644fbe..b91b966 100644
--- a/configs/phycore-am335x-r2-wega_defconfig
+++ b/configs/phycore-am335x-r2-wega_defconfig
@@ -28,7 +28,7 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
@@ -76,7 +76,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/poplar_defconfig b/configs/poplar_defconfig
index f0ab231..b6e0c31 100644
--- a/configs/poplar_defconfig
+++ b/configs/poplar_defconfig
@@ -22,6 +22,7 @@
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x20000000
CONFIG_FASTBOOT_BUF_SIZE=0x10000000
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index 2ea007d..e1d1066 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -99,7 +99,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index ccf2566..248073b 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -99,7 +99,6 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig
index f585c51..ac236c8 100644
--- a/configs/s5pc210_universal_defconfig
+++ b/configs/s5pc210_universal_defconfig
@@ -33,7 +33,6 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_NET is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_SLEEP is not set
CONFIG_CMD_EXT4_WRITE=y
@@ -42,6 +41,7 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+# CONFIG_NET is not set
CONFIG_DFU_MMC=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x2000000
CONFIG_SYS_I2C_S3C24X0=y
diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig
index a1b6122..a0802f9 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -86,7 +86,6 @@
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index 6278a6c..d96bb91 100644
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -90,7 +90,6 @@
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig
index d12f749..68101a1 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -84,7 +84,6 @@
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig
index 27bfcdf..b8062db 100644
--- a/configs/sama5d4ek_nandflash_defconfig
+++ b/configs/sama5d4ek_nandflash_defconfig
@@ -81,7 +81,6 @@
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index 6c488ba..e3f7f11 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -1,4 +1,5 @@
CONFIG_TEXT_BASE=0
+CONFIG_SYS_MALLOC_LEN=0x6000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sandbox64"
@@ -14,7 +15,6 @@
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_BOOTSTAGE_FDT=y
@@ -50,6 +50,7 @@
CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
CONFIG_CMD_LOADM=y
+CONFIG_CMD_MTD=y
CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_READ=y
@@ -167,6 +168,13 @@
CONFIG_I2C_EEPROM=y
CONFIG_MMC_SANDBOX=y
CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_MAX_NAND_DEVICE=8
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
+CONFIG_NAND_SANDBOX=y
+CONFIG_SYS_NAND_ONFI_DETECTION=y
+CONFIG_SYS_NAND_PAGE_SIZE=0x200
CONFIG_SPI_FLASH_SANDBOX=y
CONFIG_BOOTDEV_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index bc5bcb2..45034e7 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -1,4 +1,5 @@
CONFIG_TEXT_BASE=0
+CONFIG_SYS_MALLOC_LEN=0x6000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
@@ -15,7 +16,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_MEASURED_BOOT=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_BOOTSTAGE_FDT=y
@@ -74,6 +74,7 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_LOADM=y
CONFIG_CMD_LSBLK=y
+CONFIG_CMD_MTD=y
CONFIG_CMD_MUX=y
CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
@@ -121,6 +122,7 @@
CONFIG_CMD_AES=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_TEST=y
+CONFIG_CMD_SCMI=y
CONFIG_CMD_BTRFS=y
CONFIG_CMD_CBFS=y
CONFIG_CMD_CRAMFS=y
@@ -216,6 +218,13 @@
CONFIG_MMC_SANDBOX=y
CONFIG_MMC_SDHCI=y
CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_MAX_NAND_DEVICE=8
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
+CONFIG_NAND_SANDBOX=y
+CONFIG_SYS_NAND_ONFI_DETECTION=y
+CONFIG_SYS_NAND_PAGE_SIZE=0x200
CONFIG_SPI_FLASH_SANDBOX=y
CONFIG_BOOTDEV_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig
index 0b63772..9c774bb 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -12,7 +12,6 @@
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_BOOTSTAGE_FDT=y
diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig
index cd412ee..8cfe30b 100644
--- a/configs/sandbox_noinst_defconfig
+++ b/configs/sandbox_noinst_defconfig
@@ -25,7 +25,6 @@
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_BOOTSTAGE_FDT=y
@@ -51,6 +50,13 @@
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MMC_WRITE=y
+CONFIG_SPL_MTD=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_NAND_DRIVERS=y
+CONFIG_SPL_NAND_ECC=y
+CONFIG_SPL_NAND_SOFTECC=y
+CONFIG_SPL_NAND_BASE=y
+CONFIG_SPL_NAND_IDENT=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NET=y
CONFIG_SPL_NOR_SUPPORT=y
@@ -80,6 +86,7 @@
CONFIG_CMD_GPT=y
CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MTD=y
CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_REMOTEPROC=y
@@ -180,6 +187,18 @@
CONFIG_SPL_PWRSEQ=y
CONFIG_FS_LOADER=y
CONFIG_MMC_SANDBOX=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_MAX_NAND_DEVICE=8
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
+CONFIG_NAND_SANDBOX=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x2000
+CONFIG_SYS_NAND_ONFI_DETECTION=y
+CONFIG_SYS_NAND_PAGE_SIZE=0x200
+CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
+CONFIG_SYS_NAND_U_BOOT_OFFS=0x0
CONFIG_SPI_FLASH_SANDBOX=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index eeccee6..f1cca13 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -20,7 +20,6 @@
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_BOOTSTAGE_FDT=y
diff --git a/configs/sandbox_vpl_defconfig b/configs/sandbox_vpl_defconfig
index 293e294..62df03e 100644
--- a/configs/sandbox_vpl_defconfig
+++ b/configs/sandbox_vpl_defconfig
@@ -27,7 +27,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_BOOTSTAGE_FDT=y
diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig
index 10cbccb..80d2c0f 100644
--- a/configs/smartweb_defconfig
+++ b/configs/smartweb_defconfig
@@ -84,7 +84,6 @@
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig
index b8052f1..6a4106a 100644
--- a/configs/socfpga_secu1_defconfig
+++ b/configs/socfpga_secu1_defconfig
@@ -43,7 +43,7 @@
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SYS_MAXARGS=32
CONFIG_SYS_BOOTM_LEN=0x4000000
diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig
index 3864e21..f9711be 100644
--- a/configs/stm32746g-eval_spl_defconfig
+++ b/configs/stm32746g-eval_spl_defconfig
@@ -34,7 +34,7 @@
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_XIP_SUPPORT=y
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x80c0000
CONFIG_SPL_DM_RESET=y
diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig
index b2a7861..a2b740c 100644
--- a/configs/stm32f746-disco_spl_defconfig
+++ b/configs/stm32f746-disco_spl_defconfig
@@ -34,7 +34,7 @@
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_XIP_SUPPORT=y
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x80c0000
CONFIG_SPL_DM_RESET=y
diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig
index 3462203..37d22f8 100644
--- a/configs/stm32f769-disco_spl_defconfig
+++ b/configs/stm32f769-disco_spl_defconfig
@@ -33,7 +33,7 @@
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_XIP_SUPPORT=y
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x81c0000
CONFIG_SPL_DM_RESET=y
diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig
index 6df0935..be553ad 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -40,7 +40,7 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_FLASH_MTD=y
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig
index 1d24152..f4dbbf3 100644
--- a/configs/stm32mp15_dhcom_basic_defconfig
+++ b/configs/stm32mp15_dhcom_basic_defconfig
@@ -49,7 +49,7 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_POWER=y
CONFIG_SPL_RAM_SUPPORT=y
diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig
index 6e0c4a8..d4ead98 100644
--- a/configs/stm32mp15_dhcor_basic_defconfig
+++ b/configs/stm32mp15_dhcor_basic_defconfig
@@ -47,7 +47,7 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_POWER=y
CONFIG_SPL_RAM_SUPPORT=y
diff --git a/configs/stm32mp25_defconfig b/configs/stm32mp25_defconfig
new file mode 100644
index 0000000..75f27c9
--- /dev/null
+++ b/configs/stm32mp25_defconfig
@@ -0,0 +1,52 @@
+CONFIG_ARM=y
+CONFIG_ARCH_STM32MP=y
+CONFIG_SYS_MALLOC_F_LEN=0x400000
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x90000000
+CONFIG_DEFAULT_DEVICE_TREE="stm32mp257f-ev1"
+CONFIG_STM32MP25X=y
+CONFIG_DDR_CACHEABLE_SIZE=0x10000000
+CONFIG_TARGET_ST_STM32MP25X=y
+CONFIG_SYS_LOAD_ADDR=0x84000000
+CONFIG_SYS_MEMTEST_START=0x84000000
+CONFIG_SYS_MEMTEST_END=0x88000000
+CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
+CONFIG_BOOTDELAY=1
+CONFIG_LAST_STAGE_INIT=y
+CONFIG_SYS_PROMPT="STM32MP> "
+# CONFIG_CMD_BDI is not set
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_ADTIMG=y
+# CONFIG_CMD_ELF is not set
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADB is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_RNG=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_LOG=y
+CONFIG_OF_LIVE=y
+# CONFIG_NET is not set
+CONFIG_GPIO_HOG=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_STM32F7=y
+# CONFIG_MMC is not set
+CONFIG_PINCONF=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_RAM=y
+# CONFIG_STM32MP1_DDR is not set
+CONFIG_DM_RNG=y
+CONFIG_SERIAL_RX_BUFFER=y
+# CONFIG_OPTEE_TA_AVB is not set
+CONFIG_WDT=y
+CONFIG_WDT_STM32MP=y
+CONFIG_WDT_ARM_SMC=y
+CONFIG_ERRNO_STR=y
+# CONFIG_LMB_USE_MAX_REGIONS is not set
+CONFIG_LMB_MEMORY_REGIONS=2
+CONFIG_LMB_RESERVED_REGIONS=32
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index cc57551..9be30c8 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -94,7 +94,6 @@
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig
index 5c24b38..0c71b29 100644
--- a/configs/thunderx_88xx_defconfig
+++ b/configs/thunderx_88xx_defconfig
@@ -32,8 +32,8 @@
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_SAVEENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_NET is not set
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET is not set
# CONFIG_MMC is not set
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_SKIP_INIT=y
diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig
index 6c4909f..045c74f 100644
--- a/configs/trats2_defconfig
+++ b/configs/trats2_defconfig
@@ -36,7 +36,6 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_NET is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_SLEEP is not set
CONFIG_CMD_EXT4_WRITE=y
@@ -44,6 +43,7 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+# CONFIG_NET is not set
CONFIG_DFU_MMC=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x2000000
CONFIG_DM_I2C_GPIO=y
diff --git a/configs/trats_defconfig b/configs/trats_defconfig
index 78484c0..b1adaef 100644
--- a/configs/trats_defconfig
+++ b/configs/trats_defconfig
@@ -35,7 +35,6 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_NET is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_SLEEP is not set
CONFIG_CMD_EXT4_WRITE=y
@@ -43,6 +42,7 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+# CONFIG_NET is not set
CONFIG_DFU_MMC=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x2000000
CONFIG_DM_I2C_GPIO=y
diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig
index e128a62..f89b163 100644
--- a/configs/udoo_defconfig
+++ b/configs/udoo_defconfig
@@ -34,6 +34,7 @@
CONFIG_CMD_MMC=y
# CONFIG_CMD_PINMUX is not set
CONFIG_CMD_SATA=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_OF_CONTROL=y
@@ -54,7 +55,7 @@
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
-CONFIG_DM_SCSI=y
+CONFIG_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig
index 7c1727f..c9ec962 100644
--- a/configs/wandboard_defconfig
+++ b/configs/wandboard_defconfig
@@ -45,6 +45,7 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SATA=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_USB=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
@@ -71,7 +72,7 @@
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_PFUZE100=y
-CONFIG_DM_SCSI=y
+CONFIG_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
diff --git a/configs/x240_defconfig b/configs/x240_defconfig
index 4b1a761..152413d 100644
--- a/configs/x240_defconfig
+++ b/configs/x240_defconfig
@@ -24,6 +24,7 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_MTD=y
CONFIG_CMD_PCI=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
@@ -68,7 +69,7 @@
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_RTC=y
CONFIG_RTC_MAX313XX=y
-CONFIG_DM_SCSI=y
+CONFIG_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_MVEBU_A3700_SPI=y
CONFIG_DM_THERMAL=y
diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig
index a6f36fe..afbf6f6 100644
--- a/configs/xilinx_zynqmp_mini_qspi_defconfig
+++ b/configs/xilinx_zynqmp_mini_qspi_defconfig
@@ -11,6 +11,8 @@
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi"
CONFIG_SPL_STACK=0xfffffffc
CONFIG_SPL=y
+# CONFIG_SPL_FS_FAT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
CONFIG_ZYNQMP_NO_DDR=y
# CONFIG_PSCI_RESET is not set
@@ -89,7 +91,6 @@
CONFIG_ARM_DCC=y
CONFIG_SPI=y
CONFIG_ZYNQMP_GQSPI=y
-# CONFIG_FAT_WRITE is not set
CONFIG_PANIC_HANG=y
# CONFIG_GZIP is not set
# CONFIG_LMB is not set
diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig
index 1d8e5f6..f7b7581 100644
--- a/configs/zynq_cse_nand_defconfig
+++ b/configs/zynq_cse_nand_defconfig
@@ -13,6 +13,8 @@
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL_STACK=0xfffffe00
CONFIG_SPL=y
+# CONFIG_SPL_FS_FAT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_REMAKE_ELF=y
CONFIG_SYS_CUSTOM_LDSCRIPT=y
diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig
index db7cb63..2a50f38 100644
--- a/configs/zynq_cse_nor_defconfig
+++ b/configs/zynq_cse_nor_defconfig
@@ -13,6 +13,8 @@
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL_STACK=0xfffffe00
CONFIG_SPL=y
+# CONFIG_SPL_FS_FAT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_REMAKE_ELF=y
CONFIG_SYS_CUSTOM_LDSCRIPT=y
diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig
index dcb22ed..db1fc53 100644
--- a/configs/zynq_cse_qspi_defconfig
+++ b/configs/zynq_cse_qspi_defconfig
@@ -16,6 +16,8 @@
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0x0
CONFIG_DEBUG_UART_CLOCK=0
+# CONFIG_SPL_FS_FAT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
# CONFIG_ZYNQ_DDRC_INIT is not set
# CONFIG_CMD_ZYNQ is not set
CONFIG_SYS_LOAD_ADDR=0x0
diff --git a/doc/android/bcb.rst b/doc/android/bcb.rst
index 8861608..2226517 100644
--- a/doc/android/bcb.rst
+++ b/doc/android/bcb.rst
@@ -41,23 +41,25 @@
bcb - Load/set/clear/test/dump/store Android BCB fields
Usage:
- bcb load <dev> <part> - load BCB from mmc <dev>:<part>
- bcb set <field> <val> - set BCB <field> to <val>
- bcb clear [<field>] - clear BCB <field> or all fields
- bcb test <field> <op> <val> - test BCB <field> against <val>
- bcb dump <field> - dump BCB <field>
- bcb store - store BCB back to mmc
+ bcb load <interface> <dev> <part> - load BCB from <interface> <dev>:<part>
+ load <dev> <part> - load BCB from mmc <dev>:<part>
+ bcb set <field> <val> - set BCB <field> to <val>
+ bcb clear [<field>] - clear BCB <field> or all fields
+ bcb test <field> <op> <val> - test BCB <field> against <val>
+ bcb dump <field> - dump BCB <field>
+ bcb store - store BCB back to <interface>
Legend:
- <dev> - MMC device index containing the BCB partition
- <part> - MMC partition index or name containing the BCB
- <field> - one of {command,status,recovery,stage,reserved}
- <op> - the binary operator used in 'bcb test':
- '=' returns true if <val> matches the string stored in <field>
- '~' returns true if <val> matches a subset of <field>'s string
- <val> - string/text provided as input to bcb {set,test}
- NOTE: any ':' character in <val> will be replaced by line feed
- during 'bcb set' and used as separator by upper layers
+ <interface> - storage device interface (virtio, mmc, etc)
+ <dev> - storage device index containing the BCB partition
+ <part> - partition index or name containing the BCB
+ <field> - one of {command,status,recovery,stage,reserved}
+ <op> - the binary operator used in 'bcb test':
+ '=' returns true if <val> matches the string stored in <field>
+ '~' returns true if <val> matches a subset of <field>'s string
+ <val> - string/text provided as input to bcb {set,test}
+ NOTE: any ':' character in <val> will be replaced by line feed
+ during 'bcb set' and used as separator by upper layers
'bcb'. Example of getting reboot reason
@@ -91,7 +93,7 @@
CONFIG_PARTITIONS=y
CONFIG_MMC=y
- CONFIG_BCB=y
+ CONFIG_CMD_BCB=y
.. [1] https://android.googlesource.com/platform/bootable/recovery
.. [2] https://source.android.com/devices/bootloader
diff --git a/doc/board/ti/am62x_beagleplay.rst b/doc/board/beagle/am62x_beagleplay.rst
similarity index 95%
rename from doc/board/ti/am62x_beagleplay.rst
rename to doc/board/beagle/am62x_beagleplay.rst
index 44e728d..7784e62 100644
--- a/doc/board/ti/am62x_beagleplay.rst
+++ b/doc/board/beagle/am62x_beagleplay.rst
@@ -23,7 +23,7 @@
----------
Below is the pictorial representation of boot flow:
-.. image:: img/boot_diagram_k3_current.svg
+.. image:: ../ti/img/boot_diagram_k3_current.svg
:alt: Boot flow diagram
- On this platform, 'TI Foundational Security' (TIFS) functions as the
@@ -34,7 +34,7 @@
Sources:
--------
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_boot_sources
:end-before: .. k3_rst_include_end_boot_sources
@@ -42,30 +42,30 @@
----------------
0. Setup the environment variables:
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_common_env_vars_desc
:end-before: .. k3_rst_include_end_common_env_vars_desc
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_board_env_vars_desc
:end-before: .. k3_rst_include_end_board_env_vars_desc
Set the variables corresponding to this platform:
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_common_env_vars_defn
:end-before: .. k3_rst_include_end_common_env_vars_defn
.. prompt:: bash $
- export UBOOT_CFG_CORTEXR="am62x_evm_r5_defconfig beagleplay_r5.config"
- export UBOOT_CFG_CORTEXA="am62x_evm_a53_defconfig beagleplay_a53.config"
+ export UBOOT_CFG_CORTEXR=am62x_beagleplay_r5_defconfig
+ export UBOOT_CFG_CORTEXA=am62x_beagleplay_a53_defconfig
export TFA_BOARD=lite
# we dont use any extra TFA parameters
unset TFA_EXTRA_ARGS
export OPTEE_PLATFORM=k3-am62x
export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y"
-.. include:: am62x_sk.rst
+.. include:: ../ti/am62x_sk.rst
:start-after: .. am62x_evm_rst_include_start_build_steps
:end-before: .. am62x_evm_rst_include_end_build_steps
@@ -82,12 +82,12 @@
- tiboot3.bin
-.. image:: img/multi_cert_tiboot3.bin.svg
+.. image:: ../ti/img/multi_cert_tiboot3.bin.svg
:alt: tiboot3.bin image format
- tispl.bin
-.. image:: img/dm_tispl.bin.svg
+.. image:: ../ti/img/dm_tispl.bin.svg
:alt: tispl.bin image format
Additional hardware for U-Boot development
@@ -240,7 +240,7 @@
A53 SPL DDR Memory Layout
-------------------------
-.. include:: am62x_sk.rst
+.. include:: ../ti/am62x_sk.rst
:start-after: .. am62x_evm_rst_include_start_ddr_mem_layout
:end-before: .. am62x_evm_rst_include_end_ddr_mem_layout
@@ -284,11 +284,11 @@
environment's distribution needs to be updated, it might be necessary to
build OpenOCD from the source.
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_openocd_connect_tag_connect
:end-before: .. k3_rst_include_end_openocd_connect_tag_connect
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_openocd_cfg_external_intro
:end-before: .. k3_rst_include_end_openocd_cfg_external_intro
diff --git a/doc/board/ti/img/beagleplay_emmc.svg b/doc/board/beagle/img/beagleplay_emmc.svg
similarity index 100%
rename from doc/board/ti/img/beagleplay_emmc.svg
rename to doc/board/beagle/img/beagleplay_emmc.svg
diff --git a/doc/board/beagle/index.rst b/doc/board/beagle/index.rst
new file mode 100644
index 0000000..9124546
--- /dev/null
+++ b/doc/board/beagle/index.rst
@@ -0,0 +1,14 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+BeagleBoard.org
+###############
+
+
+ARM based boards
+----------------
+
+.. toctree::
+ :maxdepth: 2
+
+ am62x_beagleplay
+ j721e_beagleboneai64
diff --git a/doc/board/ti/am62x_beagleplay.rst b/doc/board/beagle/j721e_beagleboneai64.rst
similarity index 67%
copy from doc/board/ti/am62x_beagleplay.rst
copy to doc/board/beagle/j721e_beagleboneai64.rst
index 44e728d..d6b9c8c 100644
--- a/doc/board/ti/am62x_beagleplay.rst
+++ b/doc/board/beagle/j721e_beagleboneai64.rst
@@ -1,40 +1,44 @@
.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
.. sectionauthor:: Nishanth Menon <nm@ti.com>
-AM62x Beagleboard.org Beagleplay
-================================
+J721E/TDA4VM Beagleboard.org BeagleBone AI-64
+=============================================
Introduction:
-------------
-BeagleBoard.org BeaglePlay is an easy to use, affordable open source
-hardware single board computer based on the Texas Instruments AM625
-SoC that allows you to create connected devices that work even at long
-distances using IEEE 802.15.4g LR-WPAN and IEEE 802.3cg 10Base-T1L.
-Expansion is provided over open standards based mikroBUS, Grove and
-QWIIC headers among other interfaces.
+BeagleBoard.org BeagleBone AI-64 is an open source hardware single
+board computer based on the Texas Instruments TDA4VM SoC featuring
+dual-core 2.0GHz Arm Cortex-A72 processor, C7x+MMA and 2 C66x
+floating-point VLIW DSPs, 3x dual ARM Cortex-R5 co-processors,
+2x 6-core Programmable Real-Time Unit and Industrial Communication
+SubSystem, PowerVR Rogue 8XE GE8430 3D GPU. The board features 4GB
+DDR4, USB3.0 Type-C, 2x USB SS Type-A, miniDisplayPort, 2x 4-lane
+CSI, DSI, 16GB eMMC flash, 1G Ethernet, M.2 E-key for WiFi/BT, and
+BeagleBone expansion headers.
Further information can be found at:
-* Product Page: https://beagleplay.org/
-* Hardware documentation: https://git.beagleboard.org/beagleplay/beagleplay
+* Product Page: https://beagleboard.org/ai-64
+* Hardware documentation: https://git.beagleboard.org/beagleboard/beaglebone-ai-64
Boot Flow:
----------
Below is the pictorial representation of boot flow:
-.. image:: img/boot_diagram_k3_current.svg
+.. image:: ../ti/img/boot_diagram_j721e.svg
:alt: Boot flow diagram
-- On this platform, 'TI Foundational Security' (TIFS) functions as the
- security enclave master while 'Device Manager' (DM), also known as the
- 'TISCI server' in "TI terminology", offers all the essential services.
- The A53 or M4F (Aux core) sends requests to TIFS/DM to accomplish these
- services, as illustrated in the diagram above.
+- On this platform, DMSC runs 'TI Foundational Security' (TIFS) which
+ functions as the security enclave master. The 'Device Manager' (DM),
+ also known as the 'TISCI server' in "TI terminology", running on boot
+ R5F, offers all the essential services required for device management.
+ The A72, C7x, C6x or R5F (Aux cores) sends requests to TIFS/DM to
+ accomplish the needed services, as illustrated in the diagram above.
Sources:
--------
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_boot_sources
:end-before: .. k3_rst_include_end_boot_sources
@@ -42,38 +46,39 @@
----------------
0. Setup the environment variables:
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_common_env_vars_desc
:end-before: .. k3_rst_include_end_common_env_vars_desc
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_board_env_vars_desc
:end-before: .. k3_rst_include_end_board_env_vars_desc
Set the variables corresponding to this platform:
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_common_env_vars_defn
:end-before: .. k3_rst_include_end_common_env_vars_defn
.. prompt:: bash $
- export UBOOT_CFG_CORTEXR="am62x_evm_r5_defconfig beagleplay_r5.config"
- export UBOOT_CFG_CORTEXA="am62x_evm_a53_defconfig beagleplay_a53.config"
- export TFA_BOARD=lite
+ export UBOOT_CFG_CORTEXR=j721e_beagleboneai64_r5_defconfig
+ export UBOOT_CFG_CORTEXA=j721e_beagleboneai64_a72_defconfig
+ export TFA_BOARD=generic
# we dont use any extra TFA parameters
unset TFA_EXTRA_ARGS
- export OPTEE_PLATFORM=k3-am62x
- export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y"
+ export OPTEE_PLATFORM=k3-j721e
+ # we dont use any extra OP-TEE parameters
+ unset OPTEE_EXTRA_ARGS
-.. include:: am62x_sk.rst
- :start-after: .. am62x_evm_rst_include_start_build_steps
- :end-before: .. am62x_evm_rst_include_end_build_steps
+.. include:: ../ti/j721e_evm.rst
+ :start-after: .. j721e_evm_rst_include_start_build_steps
+ :end-before: .. j721e_evm_rst_include_end_build_steps
Target Images
--------------
+--------------
Copy the below images to an SD card and boot:
-* tiboot3-am62x-gp-evm.bin from R5 build as tiboot3.bin
+* tiboot3-j721e-gp-evm.bin from R5 build as tiboot3.bin
* tispl.bin_unsigned from Cortex-A build as tispl.bin
* u-boot.img_unsigned from Cortex-A build as u-boot.img
@@ -82,34 +87,39 @@
- tiboot3.bin
-.. image:: img/multi_cert_tiboot3.bin.svg
+.. image:: ../ti/img/no_multi_cert_tiboot3.bin.svg
:alt: tiboot3.bin image format
- tispl.bin
-.. image:: img/dm_tispl.bin.svg
+.. image:: ../ti/img/dm_tispl.bin.svg
:alt: tispl.bin image format
+- sysfw.itb
+
+.. image:: ../ti/img/sysfw.itb.svg
+ :alt: sysfw.itb image format
+
Additional hardware for U-Boot development
------------------------------------------
-* Serial Console is critical for U-Boot development on BeaglePlay. See
- `BeaglePlay serial console documentation
- <https://docs.beagleboard.org/latest/boards/beagleplay/demos-and-tutorials/using-serial-console.html>`_.
+* Serial Console is critical for U-Boot development on BeagleBone AI-64. See
+ `BeagleBone AI-64 connector documentation
+ <https://docs.beagleboard.org/latest/boards/beaglebone/ai-64/ch07.html>`_.
* uSD is preferred option over eMMC, and a SD/MMC reader will be needed.
* (optionally) JTAG is useful when working with very early stages of boot.
Default storage options
-----------------------
-There are multiple storage media options on BeaglePlay, but primarily:
+There are multiple storage media options on BeagleBone AI-64, but primarily:
* Onboard eMMC (default) - reliable, fast and meant for deployment use.
-* SD/MMC card interface (hold 'USR' switch and power on) - Entirely
+* SD/MMC card interface (hold 'BOOT' switch and power on) - Entirely
depends on the SD card quality.
Flash to uSD card or how to deal with "bricked" Board
------------------------------------------------------
+--------------------------------------------------------
When deploying or working on Linux, it's common to use the onboard
eMMC. However, avoiding the eMMC and using the uSD card is safer when
@@ -127,7 +137,7 @@
The simplest option is to start with a standard distribution
image like those in `BeagleBoard.org Distros Page
<https://www.beagleboard.org/distros>`_ and download a disk image for
-BeaglePlay. Pick a 16GB+ uSD card to be on the safer side.
+BeagleBone AI-64. Pick a 16GB+ uSD card to be on the safer side.
With an SD/MMC Card reader and `Balena Etcher
<https://etcher.balena.io/>`_, having a functional setup in minutes is
@@ -170,7 +180,7 @@
boot1 partition depends on A/B update requirements.
.. image:: img/beagleplay_emmc.svg
- :alt: eMMC partitions and boot file organization for BeaglePlay
+ :alt: eMMC partitions and boot file organization for BeagleBone AI-64
The following are the steps from Linux shell to program eMMC:
@@ -233,41 +243,36 @@
.. warning ::
- If the "red" power LED is not glowing, the system power supply is not
- functional. Please refer to `BeaglePlay documentation
- <https://beagleplay.org/>`_ for further information.
-
-A53 SPL DDR Memory Layout
--------------------------
-
-.. include:: am62x_sk.rst
- :start-after: .. am62x_evm_rst_include_start_ddr_mem_layout
- :end-before: .. am62x_evm_rst_include_end_ddr_mem_layout
+ The green LED very next to the serial connector labelled "WKUP UART0"
+ is the power LED (LED6). This is the same color as the rest of the USR
+ LEDs. If the "green" LED6 power LED is not glowing, the system power
+ supply is not functional. Please refer to `BeagleBone AI-64 documentation
+ <https://beagleboard.org/ai-64/>`_ for further information.
Switch Setting for Boot Mode
----------------------------
-The boot time option is configured via "USR" button on the board.
-See `Beagleplay Schematics <https://git.beagleboard.org/beagleplay/beagleplay/-/blob/main/BeaglePlay_sch.pdf>`_
+The boot time option is configured via "BOOT" button on the board.
+See `BeagleBone AI-64 Schematics <https://git.beagleboard.org/beagleboard/beaglebone-ai-64/-/blob/main/BeagleBone_AI-64_SCH.pdf>`_
for details.
.. list-table:: Boot Modes
:widths: 16 16 16
:header-rows: 1
- * - USR Switch Position
+ * - BOOT Switch Position
- Primary Boot
- Secondary Boot
* - Not Pressed
- eMMC
- - UART
+ - SD Card
* - Pressed
- - SD/MMC File System (FS) mode
- - USB Device Firmware Upgrade (DFU) mode
+ - SD Card
+ - SD Card
-To switch to SD card boot mode, hold the USR button while powering on
+To switch to SD card boot mode, hold the BOOT button while powering on
with Type-C power supply, then release when power LED lights up.
Debugging U-Boot
@@ -284,15 +289,15 @@
environment's distribution needs to be updated, it might be necessary to
build OpenOCD from the source.
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_openocd_connect_tag_connect
:end-before: .. k3_rst_include_end_openocd_connect_tag_connect
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_openocd_cfg_external_intro
:end-before: .. k3_rst_include_end_openocd_cfg_external_intro
-For example, with BeaglePlay (AM62X platform), the openocd_connect.cfg:
+For example, with BeagleBone AI-64 (J721e platform), the openocd_connect.cfg:
.. code-block:: tcl
@@ -310,7 +315,7 @@
if { ![info exists SOC] } {
# Set the SoC of interest
- set SOC am625
+ set SOC j721e
}
source [find target/ti_k3.cfg]
diff --git a/doc/board/emulation/qemu-riscv.rst b/doc/board/emulation/qemu-riscv.rst
index 61137bc..8a5eb1e 100644
--- a/doc/board/emulation/qemu-riscv.rst
+++ b/doc/board/emulation/qemu-riscv.rst
@@ -131,7 +131,13 @@
-drive if=none,file=riscv64.img,format=raw,id=mydisk \
-device ide-hd,drive=mydisk,bus=ahci.0
-You will have to run 'scsi scan' to use it.
+or alternatively attach an emulated UFS::
+
+ -device ufs,id=ufs0 \
+ -drive if=none,file=test.img,format=raw,id=lun0 \
+ -device ufs-lu,drive=lun0,bus=ufs0
+
+You will have to run 'scsi scan' to use them.
A video console can be emulated in RISC-V virt machine by removing "-nographic"
and adding::
diff --git a/doc/board/index.rst b/doc/board/index.rst
index 531e547..c96e5fd 100644
--- a/doc/board/index.rst
+++ b/doc/board/index.rst
@@ -17,6 +17,7 @@
asus/index
atmel/index
beacon/index
+ beagle/index
broadcom/index
bsh/index
cloos/index
diff --git a/doc/board/ti/am62ax_sk.rst b/doc/board/ti/am62ax_sk.rst
new file mode 100644
index 0000000..60726b6
--- /dev/null
+++ b/doc/board/ti/am62ax_sk.rst
@@ -0,0 +1,213 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Jai Luthra <j-luthra@ti.com>
+
+AM62A Platforms
+===============
+
+Introduction:
+-------------
+The AM62A SoC family is built on the K3 Multicore SoC architecture platform,
+providing a deep learning accelerator, multi-camera support with ISP, video
+transcoder and other BOM-saving integrations.
+The AM62A SoC enables cost-sensitive automotive applications including driver
+and in-cabin monitoring systems, next generation of eMirror system, as well as
+a broad set of industrial applications in Factory Automation, Building
+Automation, Robotics and more.
+
+Some highlights of this SoC are:
+
+* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
+* Cortex-R5F for general-purpose or safety usage.
+* Deep Learning Accelerator with Single-core C7x Vector DSP with MMA (up to
+ 1.0GHz).
+* Vision Processing Accelerator (VPAC) with a 315MPixel/s ISP (up to 5MP @
+ 60fps) supporting 16-bit RAW input with RGB-IR separation.
+* 4K Video encoder and decoder for HEVC (Level 5.1 High-tier) and H.264 (Level
+ 5.2) supporting upto 240MPixels/s and MJPEG encoder at 416MPixels/s
+* Single display with 24-bit RGB parallel (DPI) interface supporting upto
+ 165Mhz pixel clock for 2K resolution.
+* Integrated Giga-bit Ethernet switch supporting up to a total of two
+ external ports (TSN capable).
+* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for
+ NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
+ 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.
+* Dedicated Centralized System Controller for Security, Power, and
+ Resource Management.
+* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only,
+ enabling battery powered system design.
+
+More details can be found in the Technical Reference Manual:
+https://www.ti.com/lit/pdf/spruj16
+
+Platform information:
+
+* https://www.ti.com/tool/SK-AM62A-LP
+
+Boot Flow:
+----------
+Below is the pictorial representation of boot flow:
+
+.. image:: img/boot_diagram_k3_current.svg
+ :alt: Boot flow diagram
+
+- Here TIFS acts as master and provides all the critical services. R5/A53
+ requests TIFS to get these services done as shown in the above diagram.
+
+Sources:
+--------
+
+.. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_boot_sources
+ :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure:
+----------------
+0. Setup the environment variables:
+
+.. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_common_env_vars_desc
+ :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_board_env_vars_desc
+ :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_common_env_vars_defn
+ :end-before: .. k3_rst_include_end_common_env_vars_defn
+.. code-block:: bash
+
+ $ export UBOOT_CFG_CORTEXR=am62ax_evm_r5_defconfig
+ $ export UBOOT_CFG_CORTEXA=am62ax_evm_a53_defconfig
+ $ export TFA_BOARD=lite
+ $ # we dont use any extra TFA parameters
+ $ unset TFA_EXTRA_ARGS
+ $ export OPTEE_PLATFORM=k3-am62ax
+ $ # we dont use any extra OPTEE parameters
+ $ unset OPTEE_EXTRA_ARGS
+
+1. Trusted Firmware-A:
+
+.. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_build_steps_tfa
+ :end-before: .. k3_rst_include_end_build_steps_tfa
+
+2. OP-TEE:
+
+.. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_build_steps_optee
+ :end-before: .. k3_rst_include_end_build_steps_optee
+
+3. U-Boot:
+
+* 3.1 R5:
+
+.. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_build_steps_spl_r5
+ :end-before: .. k3_rst_include_end_build_steps_spl_r5
+
+* 3.2 A53:
+
+.. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_build_steps_uboot
+ :end-before: .. k3_rst_include_end_build_steps_uboot
+
+Target Images
+--------------
+In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC
+variant (GP, HS-FS, HS-SE) requires a different source for these files.
+
+ - GP
+
+ * tiboot3-am62ax-gp-evm.bin from step 3.1
+ * tispl.bin_unsigned, u-boot.img_unsigned from step 3.2
+
+ - HS-FS
+
+ * tiboot3-am62ax-hs-fs-evm.bin from step 3.1
+ * tispl.bin, u-boot.img from step 3.2
+
+ - HS-SE
+
+ * tiboot3-am62ax-hs-evm.bin from step 3.1
+ * tispl.bin, u-boot.img from step 3.2
+
+Image formats:
+--------------
+
+- tiboot3.bin
+
+.. image:: img/multi_cert_tiboot3.bin.svg
+ :alt: tiboot3.bin image format
+
+- tispl.bin
+
+.. image:: img/dm_tispl.bin.svg
+ :alt: tispl.bin image format
+
+Switch Setting for Boot Mode
+----------------------------
+
+Boot Mode pins provide means to select the boot mode and options before the
+device is powered up. After every POR, they are the main source to populate
+the Boot Parameter Tables.
+
+The following table shows some common boot modes used on AM62 platform. More
+details can be found in the Technical Reference Manual:
+https://www.ti.com/lit/pdf/spruj16 under the `Boot Mode Pins` section.
+
+.. list-table:: Boot Modes
+ :widths: 16 16 16
+ :header-rows: 1
+
+ * - Switch Label
+ - SW2: 12345678
+ - SW3: 12345678
+
+ * - SD
+ - 01000000
+ - 11000010
+
+ * - OSPI
+ - 00000000
+ - 11001110
+
+ * - EMMC
+ - 00000000
+ - 11010010
+
+ * - UART
+ - 00000000
+ - 11011100
+
+ * - USB DFU
+ - 00000000
+ - 11001010
+
+For SW2 and SW1, the switch state in the "ON" position = 1.
+
+Debugging U-Boot
+----------------
+
+See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for
+detailed setup information.
+
+.. warning::
+
+ **OpenOCD support since**: August 2023 (git master)
+
+ Until the next stable release of OpenOCD is available in your development
+ environment's distribution, it might be necessary to build OpenOCD `from the
+ source <https://github.com/openocd-org/openocd>`_.
+
+.. include:: k3.rst
+ :start-after: .. k3_rst_include_start_openocd_connect_XDS110
+ :end-before: .. k3_rst_include_end_openocd_connect_XDS110
+
+To start OpenOCD and connect to the board
+
+.. code-block:: bash
+
+ openocd -f board/ti_am62a7evm.cfg
diff --git a/doc/board/ti/j721e_evm.rst b/doc/board/ti/j721e_evm.rst
index 113475d..a422a9b 100644
--- a/doc/board/ti/j721e_evm.rst
+++ b/doc/board/ti/j721e_evm.rst
@@ -48,7 +48,7 @@
Sources:
--------
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_boot_sources
:end-before: .. k3_rst_include_end_boot_sources
@@ -56,17 +56,17 @@
----------------
0. Setup the environment variables:
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_common_env_vars_desc
:end-before: .. k3_rst_include_end_common_env_vars_desc
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_board_env_vars_desc
:end-before: .. k3_rst_include_end_board_env_vars_desc
Set the variables corresponding to this platform:
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_common_env_vars_defn
:end-before: .. k3_rst_include_end_common_env_vars_defn
.. prompt:: bash $
@@ -84,14 +84,14 @@
1. Trusted Firmware-A:
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_build_steps_tfa
:end-before: .. k3_rst_include_end_build_steps_tfa
2. OP-TEE:
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_build_steps_optee
:end-before: .. k3_rst_include_end_build_steps_optee
@@ -99,13 +99,13 @@
* 3.1 R5:
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_build_steps_spl_r5
:end-before: .. k3_rst_include_end_build_steps_spl_r5
* 3.2 A72:
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_build_steps_uboot
:end-before: .. k3_rst_include_end_build_steps_uboot
.. j721e_evm_rst_include_end_build_steps
@@ -249,7 +249,7 @@
environment's distribution needs to be updated, it might be necessary to
build OpenOCD from the source.
-.. include:: k3.rst
+.. include:: ../ti/k3.rst
:start-after: .. k3_rst_include_start_openocd_connect_XDS110
:end-before: .. k3_rst_include_end_openocd_connect_XDS110
diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst
index 5167925..a127215 100644
--- a/doc/board/ti/k3.rst
+++ b/doc/board/ti/k3.rst
@@ -30,12 +30,14 @@
.. toctree::
:maxdepth: 1
- am62x_beagleplay
+ am62ax_sk
am62x_sk
+ ../beagle/am62x_beagleplay
../toradex/verdin-am62
am64x_evm
am65x_evm
j7200_evm
+ ../beagle/j721e_beagleboneai64
j721e_evm
j721s2_evm
diff --git a/doc/develop/uefi/uefi.rst b/doc/develop/uefi/uefi.rst
index fb16ac7..6bc9d92 100644
--- a/doc/develop/uefi/uefi.rst
+++ b/doc/develop/uefi/uefi.rst
@@ -642,6 +642,40 @@
As of U-Boot v2020.10 UEFI variables cannot be set at runtime. The U-Boot
command 'efidebug' can be used to set the variables.
+UEFI HTTP Boot
+~~~~~~~~~~~~~~
+
+HTTP Boot provides the capability for system deployment and configuration
+over the network. HTTP Boot can be activated by specifying::
+
+ CONFIG_EFI_HTTP_BOOT
+
+Enabling that will automatically select::
+
+ CONFIG_CMD_DNS
+ CONFIG_CMD_WGET
+ CONFIG_BLKMAP
+
+Set up the load option specifying the target URI::
+
+ efidebug boot add -u 1 netinst http://foo/bar
+
+When this load option is selected as boot selection, resolve the
+host ip address by dns, then download the file with wget.
+If the downloaded file extension is .iso or .img file, efibootmgr tries to
+mount the image and boot with the default file(e.g. EFI/BOOT/BOOTAA64.EFI).
+If the downloaded file is PE-COFF image, load the downloaded file and
+start it.
+
+The current implementation tries to resolve the IP address as a host name.
+If the uri is like "http://192.168.1.1/foobar",
+the dns process tries to resolve the host "192.168.1.1" and it will
+end up with "host not found".
+
+We need to preset the "httpserverip" environment variable to proceed the wget::
+
+ setenv httpserverip 192.168.1.1
+
Executing the built in hello world application
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
diff --git a/doc/device-tree-bindings/misc/esm-k3.txt b/doc/device-tree-bindings/misc/esm-k3.txt
deleted file mode 100644
index 01c8b6b..0000000
--- a/doc/device-tree-bindings/misc/esm-k3.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-Texas Instruments K3 ESM Binding
-======================
-
-ESM (Error Signaling Module) is an IP block on TI K3 devices that allows
-handling of safety events somewhat similar to what interrupt controller
-would do. The safety signals have their separate paths within the SoC,
-and they are handled by the ESM, which routes them to the proper
-destination, which can be system reset, interrupt controller, etc. In
-the simplest configuration the signals are just routed to reset the
-SoC.
-
-Required properties :
-- compatible : "ti,j721e-esm"
-- ti,esm-pins : integer array of esm events IDs to route to external event
- pin which can be used to reset the SoC. The array can
- have arbitrary amount of event IDs listed on it.
-
-Example
-=======
-
- main_esm: esm@700000 {
- compatible = "ti,j721e-esm";
- reg = <0x0 0x700000 0x0 0x1000>;
- ti,esm-pins = <344>, <345>;
- };
diff --git a/doc/device-tree-bindings/misc/ti,j721e-esm.yaml b/doc/device-tree-bindings/misc/ti,j721e-esm.yaml
new file mode 100644
index 0000000..0c9a844
--- /dev/null
+++ b/doc/device-tree-bindings/misc/ti,j721e-esm.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2022 Texas Instruments Incorporated
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/misc/ti,j721e-esm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments K3 ESM
+
+maintainers:
+ - Neha Malcom Francis <n-francis@ti.com>
+
+description:
+ The ESM (Error Signaling Module) is an IP block on TI K3 devices
+ that allows handling of safety events somewhat similar to what interrupt
+ controller would do. The safety signals have their separate paths within
+ the SoC, and they are handled by the ESM, which routes them to the proper
+ destination, which can be system reset, interrupt controller, etc. In the
+ simplest configuration the signals are just routed to reset the SoC.
+
+properties:
+ compatible:
+ const: ti,j721e-esm
+
+ reg:
+ maxItems: 1
+
+ ti,esm-pins:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ integer array of ESM interrupt pins to route to external event pin
+ which can be used to reset the SoC.
+ minItems: 1
+ maxItems: 255
+
+required:
+ - compatible
+ - reg
+ - ti,esm-pins
+
+additionalProperties: false
+
+examples:
+ - |
+ bus {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ esm@700000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x0 0x700000 0x0 0x1000>;
+ ti,esm-pins = <344>, <345>;
+ };
+ };
diff --git a/doc/device-tree-bindings/nand/sandbox,nand.txt b/doc/device-tree-bindings/nand/sandbox,nand.txt
new file mode 100644
index 0000000..0a723d7
--- /dev/null
+++ b/doc/device-tree-bindings/nand/sandbox,nand.txt
@@ -0,0 +1,57 @@
+Sandbox NAND
+============
+
+The sandbox NAND controller emulates a NAND controller and attached devices.
+
+Required properties:
+- compatible: "sandbox,nand"
+- #address-cells: Must be 1
+- #size-cells: Must be 0
+
+Any number of child nodes may be present, each representing a NAND device:
+
+Required Properties:
+- reg: The chip-select(s) to use. Only single-die devices are supported for now.
+- sandbox,id: An array of bytes to be reported by the READID (0x90) command
+- sandbox,erasesize: The block size (erase size) of the device, in bytes. Must
+ be a power-of-two multiple of the page size.
+- sandbox,oobsize: The size of the OOB area per page, in bytes.
+- sandbox,pagesize: The page size (write size) of the device, in bytes. Must be
+ a power of two.
+- sandbox,pages: The total number of pages in the device.
+- sandbox,err-count: Number of bit errors to inject per step.
+- sandbox,err-step-size: Size of the step to use when injecting errors, in
+ bytes. Must evenly divide the page size.
+
+Optional properties:
+- sandbox,onfi: The complete ONFI parameter page, including the CRC. Should be
+ exactly 256 bytes.
+- Any common NAND chip properties as documented by Linux's
+ Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml
+
+To match U-Boot's error correction capabilities, errors are only injected into
+the data area and the ECC codes. Other data in the OOB area is never corrupted.
+Generally, sandbox,err-step-size should be the same as the ECC step size, and
+sandbox,err-count should be less than the number of correctable bit errors (the
+ECC strength).
+
+Example
+-------
+
+nand-controller {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "sandbox,nand";
+
+ nand@0 {
+ reg = <0>;
+ nand-ecc-mode = "soft";
+ sandbox,id = [00 e3];
+ sandbox,erasesize = <(8 * 1024)>;
+ sandbox,oobsize = <16>;
+ sandbox,pagesize = <512>;
+ sandbox,pages = <0x2000>;
+ sandbox,err-count = <1>;
+ sandbox,err-step-size = <512>;
+ };
+};
diff --git a/doc/usage/cmd/scmi.rst b/doc/usage/cmd/scmi.rst
new file mode 100644
index 0000000..9ea7e0e
--- /dev/null
+++ b/doc/usage/cmd/scmi.rst
@@ -0,0 +1,126 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+scmi command
+============
+
+Synopsis
+--------
+
+::
+
+ scmi info
+ scmi perm_dev <agent id> <device id> <flags>
+ scmi perm_proto <agent id> <device id> <protocol id> <flags>
+ scmi reset <agent id> <flags>
+
+Description
+-----------
+
+Arm System Control and Management Interface (SCMI hereafter) is a set of
+standardised interfaces to manage system resources, like clocks, power
+domains, pin controls, reset and so on, in a system-wide manner.
+
+An entity which provides those services is called a SCMI firmware (or
+SCMI server if you like) may be placed/implemented by EL3 software or
+by a dedicated system control processor (SCP) or else.
+
+A user of SCMI interfaces, including U-Boot, is called a SCMI agent and
+may issues commands, which are defined in each protocol for specific system
+resources, to SCMI server via a communication channel, called a transport.
+Those interfaces are independent from the server's implementation thanks to
+a transport layer.
+
+For more details, see the `SCMI specification`_.
+
+While most of system resources managed under SCMI protocols are implemented
+and handled as standard U-Boot devices, for example clk_scmi, scmi command
+provides additional management functionality against SCMI server.
+
+scmi info
+~~~~~~~~~
+ Show base information about SCMI server and supported protocols
+
+scmi perm_dev
+~~~~~~~~~~~~~
+ Allow or deny access permission to the device
+
+scmi perm_proto
+~~~~~~~~~~~~~~~
+ Allow or deny access to the protocol on the device
+
+scmi reset
+~~~~~~~~~~
+ Reset the already-configured permissions against the device
+
+Parameters are used as follows:
+
+<agent id>
+ SCMI Agent ID, hex value
+
+<device id>
+ SCMI Device ID, hex value
+
+ Please note that what a device means is not defined
+ in the specification.
+
+<protocol id>
+ SCMI Protocol ID, hex value
+
+ It must not be 0x10 (base protocol)
+
+<flags>
+ Flags to control the action, hex value
+
+ 0 to deny, 1 to allow. The other values are reserved and allowed
+ values may depend on the implemented version of SCMI server in
+ the future. See SCMI specification for more details.
+
+Example
+-------
+
+Obtain basic information about SCMI server:
+
+::
+
+ => scmi info
+ SCMI device: scmi
+ protocol version: 0x20000
+ # of agents: 3
+ 0: platform
+ > 1: OSPM
+ 2: PSCI
+ # of protocols: 4
+ Power domain management
+ Performance domain management
+ Clock management
+ Sensor management
+ vendor: Linaro
+ sub vendor: PMWG
+ impl version: 0x20b0000
+
+Ask for access permission to device#0:
+
+::
+
+ => scmi perm_dev 1 0 1
+
+Reset configurations with all access permission settings retained:
+
+::
+
+ => scmi reset 1 0
+
+Configuration
+-------------
+
+The scmi command is only available if CONFIG_CMD_SCMI=y.
+Default n because this command is mainly for debug purpose.
+
+Return value
+------------
+
+The return value ($?) is set to 0 if the operation succeeded,
+1 if the operation failed or -1 if the operation failed due to
+a syntax error.
+
+.. _`SCMI specification`: https://developer.arm.com/documentation/den0056/e/?lang=en
diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index d8e23fc..1a626c0 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -94,6 +94,7 @@
cmd/rng
cmd/saves
cmd/sbi
+ cmd/scmi
cmd/scp03
cmd/seama
cmd/setexpr
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 049f7ef..9bc5283 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -20,14 +20,6 @@
See also CMD_SATA which provides command-line support.
-config SYS_SATA_MAX_PORTS
- int "Maximum supported SATA ports"
- depends on SCSI_AHCI && !DM_SCSI
- default 1
- help
- Sets the maximum number of ports to scan when looking for devices.
- Ports from 0 to (this value - 1) are scanned.
-
config LIBATA
bool
help
@@ -44,7 +36,7 @@
config AHCI_PCI
bool "Support for PCI-based AHCI controller"
depends on PCI
- depends on DM_SCSI
+ depends on SCSI
depends on SCSI_AHCI
help
Enables support for the PCI-based AHCI controller.
@@ -55,13 +47,13 @@
bool "Support for PCI-based AHCI controller for SPL"
depends on SPL
depends on SPL_PCI
- depends on SPL_SATA && DM_SCSI
+ depends on SPL_SATA && SCSI
config DWC_AHCI
bool "Enable Synopsys DWC AHCI driver support"
select SCSI_AHCI
select PHY
- depends on DM_SCSI
+ depends on SCSI
help
Enable this driver to support Sata devices through
Synopsys DWC AHCI module.
@@ -91,7 +83,7 @@
bool "Marvell EBU AHCI SATA support"
depends on ARCH_MVEBU || ARCH_OCTEON
select SCSI_AHCI
- select DM_SCSI
+ select SCSI
help
This option enables support for the Marvell EBU SoC's
onboard AHCI SATA.
@@ -112,7 +104,7 @@
config SATA_CEVA
bool "Ceva Sata controller"
depends on AHCI
- depends on DM_SCSI
+ depends on SCSI
help
This option enables Ceva Sata controller hard IP available on Xilinx
ZynqMP. Support up to 2 external devices. Compliant with SATA 3.1 and
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index 0b6f910..af6f0bf 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -14,7 +14,6 @@
obj-$(CONFIG_SATA_CEVA) += sata_ceva.o
obj-$(CONFIG_SATA_MV) += sata_mv.o
obj-$(CONFIG_SATA_SIL) += sata_sil.o
-obj-$(CONFIG_SANDBOX) += sata_sandbox.o
obj-$(CONFIG_AHCI_MVEBU) += ahci_mvebu.o
obj-$(CONFIG_SUNXI_AHCI) += ahci_sunxi.o
obj-$(CONFIG_MTK_AHCI) += mtk_ahci.o
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index cb2c648..04ddc33 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -33,10 +33,6 @@
static int ata_io_flush(struct ahci_uc_priv *uc_priv, u8 port);
-#ifndef CONFIG_DM_SCSI
-struct ahci_uc_priv *probe_ent = NULL;
-#endif
-
#define writel_with_flush(a,b) do { writel(a,b); readl(b); } while (0)
/*
@@ -169,11 +165,6 @@
static int ahci_host_init(struct ahci_uc_priv *uc_priv)
{
-#if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI)
- struct udevice *dev = uc_priv->dev;
- struct pci_child_plat *pplat = dev_get_parent_plat(dev);
- u16 tmp16;
-#endif
void __iomem *mmio = uc_priv->mmio_base;
u32 tmp, cap_save, cmd;
int i, j, ret;
@@ -194,14 +185,6 @@
writel(cap_save, mmio + HOST_CAP);
writel_with_flush(0xf, mmio + HOST_PORTS_IMPL);
-#if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI)
- if (pplat->vendor == PCI_VENDOR_ID_INTEL) {
- u16 tmp16;
-
- dm_pci_read_config16(dev, 0x92, &tmp16);
- dm_pci_write_config16(dev, 0x92, tmp16 | 0xf);
- }
-#endif
uc_priv->cap = readl(mmio + HOST_CAP);
uc_priv->port_map = readl(mmio + HOST_PORTS_IMPL);
port_map = uc_priv->port_map;
@@ -210,11 +193,6 @@
debug("cap 0x%x port_map 0x%x n_ports %d\n",
uc_priv->cap, uc_priv->port_map, uc_priv->n_ports);
-#if !defined(CONFIG_DM_SCSI)
- if (uc_priv->n_ports > CONFIG_SYS_SATA_MAX_PORTS)
- uc_priv->n_ports = CONFIG_SYS_SATA_MAX_PORTS;
-#endif
-
for (i = 0; i < uc_priv->n_ports; i++) {
if (!(port_map & (1 << i)))
continue;
@@ -313,23 +291,12 @@
writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
tmp = readl(mmio + HOST_CTL);
debug("HOST_CTL 0x%x\n", tmp);
-#if !defined(CONFIG_DM_SCSI)
-#ifndef CONFIG_SCSI_AHCI_PLAT
- dm_pci_read_config16(dev, PCI_COMMAND, &tmp16);
- tmp |= PCI_COMMAND_MASTER;
- dm_pci_write_config16(dev, PCI_COMMAND, tmp16);
-#endif
-#endif
return 0;
}
static void ahci_print_info(struct ahci_uc_priv *uc_priv)
{
-#if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI)
- struct udevice *dev = uc_priv->dev;
- u16 cc;
-#endif
void __iomem *mmio = uc_priv->mmio_base;
u32 vers, cap, cap2, impl, speed;
const char *speed_s;
@@ -350,19 +317,7 @@
else
speed_s = "?";
-#if defined(CONFIG_SCSI_AHCI_PLAT) || defined(CONFIG_DM_SCSI)
scc_s = "SATA";
-#else
- dm_pci_read_config16(dev, 0x0a, &cc);
- if (cc == 0x0101)
- scc_s = "IDE";
- else if (cc == 0x0106)
- scc_s = "SATA";
- else if (cc == 0x0104)
- scc_s = "RAID";
- else
- scc_s = "unknown";
-#endif
printf("AHCI %02x%02x.%02x%02x "
"%u slots %u ports %s Gbps 0x%x impl %s mode\n",
(vers >> 24) & 0xff,
@@ -397,12 +352,8 @@
cap2 & (1 << 0) ? "boh " : "");
}
-#if defined(CONFIG_DM_SCSI) || !defined(CONFIG_SCSI_AHCI_PLAT)
static int ahci_init_one(struct ahci_uc_priv *uc_priv, struct udevice *dev)
{
-#if !defined(CONFIG_DM_SCSI)
- u16 vendor;
-#endif
int rc;
uc_priv->dev = dev;
@@ -415,21 +366,8 @@
uc_priv->pio_mask = 0x1f;
uc_priv->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
-#if !defined(CONFIG_DM_SCSI)
- uc_priv->mmio_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_5, 0, 0,
- PCI_REGION_TYPE, PCI_REGION_MEM);
-
- /* Take from kernel:
- * JMicron-specific fixup:
- * make sure we're in AHCI mode
- */
- dm_pci_read_config16(dev, PCI_VENDOR_ID, &vendor);
- if (vendor == 0x197b)
- dm_pci_write_config8(dev, 0x41, 0xa1);
-#else
struct scsi_plat *plat = dev_get_uclass_plat(dev);
uc_priv->mmio_base = (void *)plat->base;
-#endif
debug("ahci mmio_base=0x%p\n", uc_priv->mmio_base);
/* initialize adapter */
@@ -444,7 +382,6 @@
err_out:
return rc;
}
-#endif
#define MAX_DATA_BYTE_COUNT (4*1024*1024)
@@ -893,12 +830,7 @@
static int ahci_scsi_exec(struct udevice *dev, struct scsi_cmd *pccb)
{
- struct ahci_uc_priv *uc_priv;
-#ifdef CONFIG_DM_SCSI
- uc_priv = dev_get_uclass_priv(dev->parent);
-#else
- uc_priv = probe_ent;
-#endif
+ struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev->parent);
int ret;
switch (pccb->cmd[0]) {
@@ -952,42 +884,13 @@
return 0;
}
-
-#ifndef CONFIG_DM_SCSI
-void scsi_low_level_init(int busdevfunc)
-{
- struct ahci_uc_priv *uc_priv;
-
-#ifndef CONFIG_SCSI_AHCI_PLAT
- probe_ent = calloc(1, sizeof(struct ahci_uc_priv));
- if (!probe_ent) {
- printf("%s: No memory for uc_priv\n", __func__);
- return;
- }
- uc_priv = probe_ent;
- struct udevice *dev;
- int ret;
-
- ret = dm_pci_bus_find_bdf(busdevfunc, &dev);
- if (ret)
- return;
- ahci_init_one(uc_priv, dev);
-#else
- uc_priv = probe_ent;
-#endif
-
- ahci_start_ports(uc_priv);
-}
-#endif
-#ifndef CONFIG_SCSI_AHCI_PLAT
int ahci_init_one_dm(struct udevice *dev)
{
struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev);
return ahci_init_one(uc_priv, dev);
}
-#endif
int ahci_start_ports_dm(struct udevice *dev)
{
@@ -995,65 +898,6 @@
return ahci_start_ports(uc_priv);
}
-
-#ifdef CONFIG_SCSI_AHCI_PLAT
-static int ahci_init_common(struct ahci_uc_priv *uc_priv, void __iomem *base)
-{
- int rc;
-
- uc_priv->host_flags = ATA_FLAG_SATA
- | ATA_FLAG_NO_LEGACY
- | ATA_FLAG_MMIO
- | ATA_FLAG_PIO_DMA
- | ATA_FLAG_NO_ATAPI;
- uc_priv->pio_mask = 0x1f;
- uc_priv->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
-
- uc_priv->mmio_base = base;
-
- /* initialize adapter */
- rc = ahci_host_init(uc_priv);
- if (rc)
- goto err_out;
-
- ahci_print_info(uc_priv);
-
- rc = ahci_start_ports(uc_priv);
-
-err_out:
- return rc;
-}
-
-#ifndef CONFIG_DM_SCSI
-int ahci_init(void __iomem *base)
-{
- struct ahci_uc_priv *uc_priv;
-
- probe_ent = malloc(sizeof(struct ahci_uc_priv));
- if (!probe_ent) {
- printf("%s: No memory for uc_priv\n", __func__);
- return -ENOMEM;
- }
-
- uc_priv = probe_ent;
- memset(uc_priv, 0, sizeof(struct ahci_uc_priv));
-
- return ahci_init_common(uc_priv, base);
-}
-#endif
-
-int ahci_init_dm(struct udevice *dev, void __iomem *base)
-{
- struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev);
-
- return ahci_init_common(uc_priv, base);
-}
-
-void __weak scsi_init(void)
-{
-}
-
-#endif /* CONFIG_SCSI_AHCI_PLAT */
/*
* In the general case of generic rotating media it makes sense to have a
@@ -1098,7 +942,6 @@
return 0;
}
-#ifdef CONFIG_DM_SCSI
int ahci_bind_scsi(struct udevice *ahci_dev, struct udevice **devp)
{
struct udevice *dev;
@@ -1190,16 +1033,3 @@
.id = UCLASS_SCSI,
.ops = &scsi_ops,
};
-#else
-int scsi_exec(struct udevice *dev, struct scsi_cmd *pccb)
-{
- return ahci_scsi_exec(dev, pccb);
-}
-
-__weak int scsi_bus_reset(struct udevice *dev)
-{
- return ahci_scsi_bus_reset(dev);
-
- return 0;
-}
-#endif
diff --git a/drivers/ata/sata.c b/drivers/ata/sata.c
index 64fc078..784d9bbe 100644
--- a/drivers/ata/sata.c
+++ b/drivers/ata/sata.c
@@ -18,10 +18,6 @@
#include <dm/device-internal.h>
#include <dm/uclass-internal.h>
-#ifndef CONFIG_AHCI
-struct blk_desc sata_dev_desc[CONFIG_SYS_SATA_MAX_DEVICE];
-#endif
-
int sata_reset(struct udevice *dev)
{
struct ahci_ops *ops = ahci_get_ops(dev);
@@ -88,15 +84,6 @@
return ret;
}
-#ifndef CONFIG_AHCI
-#ifdef CONFIG_PARTITIONS
-struct blk_desc *sata_get_dev(int dev)
-{
- return (dev < CONFIG_SYS_SATA_MAX_DEVICE) ? &sata_dev_desc[dev] : NULL;
-}
-#endif
-#endif
-
static unsigned long sata_bread(struct udevice *dev, lbaint_t start,
lbaint_t blkcnt, void *dst)
{
@@ -108,51 +95,6 @@
{
return -ENOSYS;
}
-
-#ifndef CONFIG_AHCI
-int __sata_initialize(void)
-{
- int rc, ret = -1;
- int i;
-
- for (i = 0; i < CONFIG_SYS_SATA_MAX_DEVICE; i++) {
- memset(&sata_dev_desc[i], 0, sizeof(struct blk_desc));
- sata_dev_desc[i].uclass_id = UCLASS_AHCI;
- sata_dev_desc[i].devnum = i;
- sata_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
- sata_dev_desc[i].type = DEV_TYPE_HARDDISK;
- sata_dev_desc[i].lba = 0;
- sata_dev_desc[i].blksz = 512;
- sata_dev_desc[i].log2blksz = LOG2(sata_dev_desc[i].blksz);
- rc = init_sata(i);
- if (!rc) {
- rc = scan_sata(i);
- if (!rc && sata_dev_desc[i].lba > 0 &&
- sata_dev_desc[i].blksz > 0) {
- part_init(&sata_dev_desc[i]);
- ret = i;
- }
- }
- }
-
- return ret;
-}
-int sata_initialize(void) __attribute__((weak, alias("__sata_initialize")));
-
-__weak int __sata_stop(void)
-{
- int i, err = 0;
-
- for (i = 0; i < CONFIG_SYS_SATA_MAX_DEVICE; i++)
- err |= reset_sata(i);
-
- if (err)
- printf("Could not reset some SATA devices\n");
-
- return err;
-}
-int sata_stop(void) __attribute__((weak, alias("__sata_stop")));
-#endif
static const struct blk_ops sata_blk_ops = {
.read = sata_bread,
diff --git a/drivers/ata/sata_sandbox.c b/drivers/ata/sata_sandbox.c
deleted file mode 100644
index e64cc4a..0000000
--- a/drivers/ata/sata_sandbox.c
+++ /dev/null
@@ -1,33 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2015 Google, Inc
- * Written by Simon Glass <sjg@chromium.org>
- */
-
-#include <common.h>
-#include <blk.h>
-
-int init_sata(int dev)
-{
- return 0;
-}
-
-int reset_sata(int dev)
-{
- return 0;
-}
-
-int scan_sata(int dev)
-{
- return 0;
-}
-
-ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)
-{
- return 0;
-}
-
-ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)
-{
- return 0;
-}
diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index 048a6ca..6ad1888 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig
@@ -13,7 +13,7 @@
config SPL_LEGACY_BLOCK
bool # "Enable Legacy Block Device"
- depends on SPL && !DM_SPL
+ depends on SPL
default y if SPL_MMC || SPL_USB_STORAGE || SCSI || NVME || IDE
default y if SPL_AHCI_PCI
help
@@ -265,6 +265,7 @@
config RKMTD
bool "Rockchip rkmtd virtual block device"
+ select RANDOM_UUID
help
Enable "rkmtd" class and driver to create a virtual block device
to transfer Rockchip boot block data to and from NAND with block
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index fdcba5c..fe6a1fc 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -15,7 +15,8 @@
endif
obj-$(CONFIG_SANDBOX) += sandbox.o host-uclass.o host_dev.o
obj-$(CONFIG_$(SPL_TPL_)BLOCK_CACHE) += blkcache.o
-obj-$(CONFIG_BLKMAP) += blkmap.o
+obj-$(CONFIG_$(SPL_TPL_)BLKMAP) += blkmap.o
+obj-$(CONFIG_$(SPL_TPL_)BLKMAP) += blkmap_helper.o
obj-$(CONFIG_EFI_MEDIA) += efi-media-uclass.o
obj-$(CONFIG_EFI_MEDIA_SANDBOX) += sb_efi_media.o
diff --git a/drivers/block/blkmap.c b/drivers/block/blkmap.c
index 149a4ca..2120140 100644
--- a/drivers/block/blkmap.c
+++ b/drivers/block/blkmap.c
@@ -66,21 +66,6 @@
void (*destroy)(struct blkmap *bm, struct blkmap_slice *bms);
};
-/**
- * struct blkmap - Block map
- *
- * Data associated with a blkmap.
- *
- * @label: Human readable name of this blkmap
- * @blk: Underlying block device
- * @slices: List of slices associated with this blkmap
- */
-struct blkmap {
- char *label;
- struct udevice *blk;
- struct list_head slices;
-};
-
static bool blkmap_slice_contains(struct blkmap_slice *bms, lbaint_t blknr)
{
return (blknr >= bms->blknr) && (blknr < (bms->blknr + bms->blkcnt));
diff --git a/drivers/block/blkmap_helper.c b/drivers/block/blkmap_helper.c
new file mode 100644
index 0000000..bfba141
--- /dev/null
+++ b/drivers/block/blkmap_helper.c
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * blkmap helper function
+ *
+ * Copyright (c) 2023, Linaro Limited
+ */
+
+#include <blk.h>
+#include <blkmap.h>
+#include <dm/device.h>
+#include <dm/device-internal.h>
+
+int blkmap_create_ramdisk(const char *label, ulong image_addr, ulong image_size,
+ struct udevice **devp)
+{
+ int ret;
+ lbaint_t blknum;
+ struct blkmap *bm;
+ struct blk_desc *desc;
+ struct udevice *bm_dev;
+
+ ret = blkmap_create(label, &bm_dev);
+ if (ret) {
+ log_err("failed to create blkmap\n");
+ return ret;
+ }
+
+ bm = dev_get_plat(bm_dev);
+ desc = dev_get_uclass_plat(bm->blk);
+ blknum = image_size >> desc->log2blksz;
+ ret = blkmap_map_pmem(bm_dev, 0, blknum, image_addr);
+ if (ret) {
+ log_err("Unable to map %#llx at block %d : %d\n",
+ (unsigned long long)image_addr, 0, ret);
+ goto err;
+ }
+ log_info("Block %d+0x" LBAF " mapped to %#llx\n", 0, blknum,
+ (unsigned long long)image_addr);
+
+ ret = device_probe(bm->blk);
+ if (ret)
+ goto err;
+
+ if (devp)
+ *devp = bm_dev;
+
+ return 0;
+
+err:
+ blkmap_destroy(bm_dev);
+
+ return ret;
+}
diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
index b52d926..025c7a7 100644
--- a/drivers/clk/at91/clk-main.c
+++ b/drivers/clk/at91/clk-main.c
@@ -17,6 +17,7 @@
#include <linux/clk/at91_pmc.h>
#include <linux/delay.h>
#include <linux/io.h>
+#include <linux/time.h>
#include "pmc.h"
#define UBOOT_DM_CLK_AT91_MAIN_RC "at91-main-rc-clk"
@@ -25,7 +26,6 @@
#define UBOOT_DM_CLK_AT91_SAM9X5_MAIN "at91-sam9x5-main-clk"
#define MOR_KEY_MASK GENMASK(23, 16)
-#define USEC_PER_SEC 1000000UL
#define SLOW_CLOCK_FREQ 32768
#define clk_main_parent_select(s) (((s) & \
diff --git a/drivers/clk/clk_k210.c b/drivers/clk/clk_k210.c
index c534cc0..b9469b9 100644
--- a/drivers/clk/clk_k210.c
+++ b/drivers/clk/clk_k210.c
@@ -16,6 +16,7 @@
#include <dt-bindings/mfd/k210-sysctl.h>
#include <k210/pll.h>
#include <linux/bitfield.h>
+#include <asm/barrier.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig
index 737d459..1081d61 100644
--- a/drivers/core/Kconfig
+++ b/drivers/core/Kconfig
@@ -87,7 +87,7 @@
config SPL_DM_STATS
bool "Collect and show driver model stats in SPL"
- depends on DM_SPL
+ depends on SPL_DM
help
Enable this to collect and display memory statistics about driver
model. This can help to figure out where all the memory is going and
diff --git a/drivers/dfu/Kconfig b/drivers/dfu/Kconfig
index 4e80e85..0360d9d 100644
--- a/drivers/dfu/Kconfig
+++ b/drivers/dfu/Kconfig
@@ -19,6 +19,7 @@
config DFU_TFTP
bool "DFU via TFTP"
+ depends on NETDEVICES
select UPDATE_COMMON
select DFU_OVER_TFTP
help
@@ -111,5 +112,14 @@
the buffer once we've been given the whole file. Define
this to the maximum filesize (in bytes) for the buffer.
If undefined it defaults to the CONFIG_SYS_DFU_DATA_BUF_SIZE.
+
+config DFU_NAME_MAX_SIZE
+ int "Size of the name to be added in dfu entity"
+ default 32
+ depends on DFU
+ help
+ This value is used to maximum size. If name is longer than default size,
+ we need to change the proper maximum size.
+
endif
endmenu
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 0af5460..3c64e89 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -87,7 +87,6 @@
config DMA_LEGACY
bool "Legacy DMA support"
- default y if FSLDMAFEC
help
Enable legacy DMA support. This does not use driver model and should
be migrated to the new API.
diff --git a/drivers/dma/MCD_dmaApi.c b/drivers/dma/MCD_dmaApi.c
deleted file mode 100644
index af0e134..0000000
--- a/drivers/dma/MCD_dmaApi.c
+++ /dev/null
@@ -1,1010 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- */
-
-/*Main C file for multi-channel DMA API. */
-
-#include <common.h>
-
-#include <MCD_dma.h>
-#include <MCD_tasksInit.h>
-#include <MCD_progCheck.h>
-
-/********************************************************************/
-/* This is an API-internal pointer to the DMA's registers */
-dmaRegs *MCD_dmaBar;
-
-/*
- * These are the real and model task tables as generated by the
- * build process
- */
-extern TaskTableEntry MCD_realTaskTableSrc[NCHANNELS];
-extern TaskTableEntry MCD_modelTaskTableSrc[NUMOFVARIANTS];
-
-/*
- * However, this (usually) gets relocated to on-chip SRAM, at which
- * point we access them as these tables
- */
-volatile TaskTableEntry *MCD_taskTable;
-TaskTableEntry *MCD_modelTaskTable;
-
-/*
- * MCD_chStatus[] is an array of status indicators for remembering
- * whether a DMA has ever been attempted on each channel, pausing
- * status, etc.
- */
-static int MCD_chStatus[NCHANNELS] = {
- MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA,
- MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA,
- MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA,
- MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA
-};
-
-/* Prototypes for local functions */
-static void MCD_memcpy(int *dest, int *src, u32 size);
-static void MCD_resmActions(int channel);
-
-/*
- * Buffer descriptors used for storage of progress info for single Dmas
- * Also used as storage for the DMA for CRCs for single DMAs
- * Otherwise, the DMA does not parse these buffer descriptors
- */
-#ifdef MCD_INCLUDE_EU
-extern MCD_bufDesc MCD_singleBufDescs[NCHANNELS];
-#else
-MCD_bufDesc MCD_singleBufDescs[NCHANNELS];
-#endif
-MCD_bufDesc *MCD_relocBuffDesc;
-
-/* Defines for the debug control register's functions */
-#define DBG_CTL_COMP1_TASK (0x00002000)
-#define DBG_CTL_ENABLE (DBG_CTL_AUTO_ARM | \
- DBG_CTL_BREAK | \
- DBG_CTL_INT_BREAK | \
- DBG_CTL_COMP1_TASK)
-#define DBG_CTL_DISABLE (DBG_CTL_AUTO_ARM | \
- DBG_CTL_INT_BREAK | \
- DBG_CTL_COMP1_TASK)
-#define DBG_KILL_ALL_STAT (0xFFFFFFFF)
-
-/* Offset to context save area where progress info is stored */
-#define CSAVE_OFFSET 10
-
-/* Defines for Byte Swapping */
-#define MCD_BYTE_SWAP_KILLER 0xFFF8888F
-#define MCD_NO_BYTE_SWAP_ATALL 0x00040000
-
-/* Execution Unit Identifiers */
-#define MAC 0 /* legacy - not used */
-#define LUAC 1 /* legacy - not used */
-#define CRC 2 /* legacy - not used */
-#define LURC 3 /* Logic Unit with CRC */
-
-/* Task Identifiers */
-#define TASK_CHAINNOEU 0
-#define TASK_SINGLENOEU 1
-#ifdef MCD_INCLUDE_EU
-#define TASK_CHAINEU 2
-#define TASK_SINGLEEU 3
-#define TASK_FECRX 4
-#define TASK_FECTX 5
-#else
-#define TASK_CHAINEU 0
-#define TASK_SINGLEEU 1
-#define TASK_FECRX 2
-#define TASK_FECTX 3
-#endif
-
-/*
- * Structure to remember which variant is on which channel
- * TBD- need this?
- */
-typedef struct MCD_remVariants_struct MCD_remVariant;
-struct MCD_remVariants_struct {
- int remDestRsdIncr[NCHANNELS]; /* -1,0,1 */
- int remSrcRsdIncr[NCHANNELS]; /* -1,0,1 */
- s16 remDestIncr[NCHANNELS]; /* DestIncr */
- s16 remSrcIncr[NCHANNELS]; /* srcIncr */
- u32 remXferSize[NCHANNELS]; /* xferSize */
-};
-
-/* Structure to remember the startDma parameters for each channel */
-MCD_remVariant MCD_remVariants;
-/********************************************************************/
-/* Function: MCD_initDma
- * Purpose: Initializes the DMA API by setting up a pointer to the DMA
- * registers, relocating and creating the appropriate task
- * structures, and setting up some global settings
- * Arguments:
- * dmaBarAddr - pointer to the multichannel DMA registers
- * taskTableDest - location to move DMA task code and structs to
- * flags - operational parameters
- * Return Value:
- * MCD_TABLE_UNALIGNED if taskTableDest is not 512-byte aligned
- * MCD_OK otherwise
- */
-extern u32 MCD_funcDescTab0[];
-
-int MCD_initDma(dmaRegs * dmaBarAddr, void *taskTableDest, u32 flags)
-{
- int i;
- TaskTableEntry *entryPtr;
-
- /* setup the local pointer to register set */
- MCD_dmaBar = dmaBarAddr;
-
- /* do we need to move/create a task table */
- if ((flags & MCD_RELOC_TASKS) != 0) {
- int fixedSize;
- u32 *fixedPtr;
- /*int *tablePtr = taskTableDest;TBD */
- int varTabsOffset, funcDescTabsOffset, contextSavesOffset;
- int taskDescTabsOffset;
- int taskTableSize, varTabsSize, funcDescTabsSize,
- contextSavesSize;
- int taskDescTabSize;
-
- int i;
-
- /* check if physical address is aligned on 512 byte boundary */
- if (((u32) taskTableDest & 0x000001ff) != 0)
- return (MCD_TABLE_UNALIGNED);
-
- /* set up local pointer to task Table */
- MCD_taskTable = taskTableDest;
-
- /*
- * Create a task table:
- * - compute aligned base offsets for variable tables and
- * function descriptor tables, then
- * - loop through the task table and setup the pointers
- * - copy over model task table with the the actual task
- * descriptor tables
- */
-
- taskTableSize = NCHANNELS * sizeof(TaskTableEntry);
- /* align variable tables to size */
- varTabsOffset = taskTableSize + (u32) taskTableDest;
- if ((varTabsOffset & (VAR_TAB_SIZE - 1)) != 0)
- varTabsOffset =
- (varTabsOffset + VAR_TAB_SIZE) & (~VAR_TAB_SIZE);
- /* align function descriptor tables */
- varTabsSize = NCHANNELS * VAR_TAB_SIZE;
- funcDescTabsOffset = varTabsOffset + varTabsSize;
-
- if ((funcDescTabsOffset & (FUNCDESC_TAB_SIZE - 1)) != 0)
- funcDescTabsOffset =
- (funcDescTabsOffset +
- FUNCDESC_TAB_SIZE) & (~FUNCDESC_TAB_SIZE);
-
- funcDescTabsSize = FUNCDESC_TAB_NUM * FUNCDESC_TAB_SIZE;
- contextSavesOffset = funcDescTabsOffset + funcDescTabsSize;
- contextSavesSize = (NCHANNELS * CONTEXT_SAVE_SIZE);
- fixedSize =
- taskTableSize + varTabsSize + funcDescTabsSize +
- contextSavesSize;
-
- /* zero the thing out */
- fixedPtr = (u32 *) taskTableDest;
- for (i = 0; i < (fixedSize / 4); i++)
- fixedPtr[i] = 0;
-
- entryPtr = (TaskTableEntry *) MCD_taskTable;
- /* set up fixed pointers */
- for (i = 0; i < NCHANNELS; i++) {
- /* update ptr to local value */
- entryPtr[i].varTab = (u32) varTabsOffset;
- entryPtr[i].FDTandFlags =
- (u32) funcDescTabsOffset | MCD_TT_FLAGS_DEF;
- entryPtr[i].contextSaveSpace = (u32) contextSavesOffset;
- varTabsOffset += VAR_TAB_SIZE;
-#ifdef MCD_INCLUDE_EU
- /* if not there is only one, just point to the
- same one */
- funcDescTabsOffset += FUNCDESC_TAB_SIZE;
-#endif
- contextSavesOffset += CONTEXT_SAVE_SIZE;
- }
- /* copy over the function descriptor table */
- for (i = 0; i < FUNCDESC_TAB_NUM; i++) {
- MCD_memcpy((void *)(entryPtr[i].
- FDTandFlags & ~MCD_TT_FLAGS_MASK),
- (void *)MCD_funcDescTab0, FUNCDESC_TAB_SIZE);
- }
-
- /* copy model task table to where the context saves stuff
- leaves off */
- MCD_modelTaskTable = (TaskTableEntry *) contextSavesOffset;
-
- MCD_memcpy((void *)MCD_modelTaskTable,
- (void *)MCD_modelTaskTableSrc,
- NUMOFVARIANTS * sizeof(TaskTableEntry));
-
- /* point to local version of model task table */
- entryPtr = MCD_modelTaskTable;
- taskDescTabsOffset = (u32) MCD_modelTaskTable +
- (NUMOFVARIANTS * sizeof(TaskTableEntry));
-
- /* copy actual task code and update TDT ptrs in local
- model task table */
- for (i = 0; i < NUMOFVARIANTS; i++) {
- taskDescTabSize =
- entryPtr[i].TDTend - entryPtr[i].TDTstart + 4;
- MCD_memcpy((void *)taskDescTabsOffset,
- (void *)entryPtr[i].TDTstart,
- taskDescTabSize);
- entryPtr[i].TDTstart = (u32) taskDescTabsOffset;
- taskDescTabsOffset += taskDescTabSize;
- entryPtr[i].TDTend = (u32) taskDescTabsOffset - 4;
- }
-#ifdef MCD_INCLUDE_EU
- /* Tack single DMA BDs onto end of code so API controls
- where they are since DMA might write to them */
- MCD_relocBuffDesc =
- (MCD_bufDesc *) (entryPtr[NUMOFVARIANTS - 1].TDTend + 4);
-#else
- /* DMA does not touch them so they can be wherever and we
- don't need to waste SRAM on them */
- MCD_relocBuffDesc = MCD_singleBufDescs;
-#endif
- } else {
- /* point the would-be relocated task tables and the
- buffer descriptors to the ones the linker generated */
-
- if (((u32) MCD_realTaskTableSrc & 0x000001ff) != 0)
- return (MCD_TABLE_UNALIGNED);
-
- /* need to add code to make sure that every thing else is
- aligned properly TBD. this is problematic if we init
- more than once or after running tasks, need to add
- variable to see if we have aleady init'd */
- entryPtr = MCD_realTaskTableSrc;
- for (i = 0; i < NCHANNELS; i++) {
- if (((entryPtr[i].varTab & (VAR_TAB_SIZE - 1)) != 0) ||
- ((entryPtr[i].
- FDTandFlags & (FUNCDESC_TAB_SIZE - 1)) != 0))
- return (MCD_TABLE_UNALIGNED);
- }
-
- MCD_taskTable = MCD_realTaskTableSrc;
- MCD_modelTaskTable = MCD_modelTaskTableSrc;
- MCD_relocBuffDesc = MCD_singleBufDescs;
- }
-
- /* Make all channels as totally inactive, and remember them as such: */
-
- MCD_dmaBar->taskbar = (u32) MCD_taskTable;
- for (i = 0; i < NCHANNELS; i++) {
- MCD_dmaBar->taskControl[i] = 0x0;
- MCD_chStatus[i] = MCD_NO_DMA;
- }
-
- /* Set up pausing mechanism to inactive state: */
- /* no particular values yet for either comparator registers */
- MCD_dmaBar->debugComp1 = 0;
- MCD_dmaBar->debugComp2 = 0;
- MCD_dmaBar->debugControl = DBG_CTL_DISABLE;
- MCD_dmaBar->debugStatus = DBG_KILL_ALL_STAT;
-
- /* enable or disable commbus prefetch, really need an ifdef or
- something to keep from trying to set this in the 8220 */
- if ((flags & MCD_COMM_PREFETCH_EN) != 0)
- MCD_dmaBar->ptdControl &= ~PTD_CTL_COMM_PREFETCH;
- else
- MCD_dmaBar->ptdControl |= PTD_CTL_COMM_PREFETCH;
-
- return (MCD_OK);
-}
-
-/*********************** End of MCD_initDma() ***********************/
-
-/********************************************************************/
-/* Function: MCD_dmaStatus
- * Purpose: Returns the status of the DMA on the requested channel
- * Arguments: channel - channel number
- * Returns: Predefined status indicators
- */
-int MCD_dmaStatus(int channel)
-{
- u16 tcrValue;
-
- if ((channel < 0) || (channel >= NCHANNELS))
- return (MCD_CHANNEL_INVALID);
-
- tcrValue = MCD_dmaBar->taskControl[channel];
- if ((tcrValue & TASK_CTL_EN) == 0) { /* nothing running */
- /* if last reported with task enabled */
- if (MCD_chStatus[channel] == MCD_RUNNING
- || MCD_chStatus[channel] == MCD_IDLE)
- MCD_chStatus[channel] = MCD_DONE;
- } else { /* something is running */
-
- /* There are three possibilities: paused, running or idle. */
- if (MCD_chStatus[channel] == MCD_RUNNING
- || MCD_chStatus[channel] == MCD_IDLE) {
- MCD_dmaBar->ptdDebug = PTD_DBG_TSK_VLD_INIT;
- /* This register is selected to know which initiator is
- actually asserted. */
- if ((MCD_dmaBar->ptdDebug >> channel) & 0x1)
- MCD_chStatus[channel] = MCD_RUNNING;
- else
- MCD_chStatus[channel] = MCD_IDLE;
- /* do not change the status if it is already paused. */
- }
- }
- return MCD_chStatus[channel];
-}
-
-/******************** End of MCD_dmaStatus() ************************/
-
-/********************************************************************/
-/* Function: MCD_startDma
- * Ppurpose: Starts a particular kind of DMA
- * Arguments:
- * srcAddr - the channel on which to run the DMA
- * srcIncr - the address to move data from, or buffer-descriptor address
- * destAddr - the amount to increment the source address per transfer
- * destIncr - the address to move data to
- * dmaSize - the amount to increment the destination address per transfer
- * xferSize - the number bytes in of each data movement (1, 2, or 4)
- * initiator - what device initiates the DMA
- * priority - priority of the DMA
- * flags - flags describing the DMA
- * funcDesc - description of byte swapping, bit swapping, and CRC actions
- * srcAddrVirt - virtual buffer descriptor address TBD
- * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
- */
-
-int MCD_startDma(int channel, s8 * srcAddr, s16 srcIncr, s8 * destAddr,
- s16 destIncr, u32 dmaSize, u32 xferSize, u32 initiator,
- int priority, u32 flags, u32 funcDesc
-#ifdef MCD_NEED_ADDR_TRANS
- s8 * srcAddrVirt
-#endif
- )
-{
- int srcRsdIncr, destRsdIncr;
- int *cSave;
- short xferSizeIncr;
- int tcrCount = 0;
-#ifdef MCD_INCLUDE_EU
- u32 *realFuncArray;
-#endif
-
- if ((channel < 0) || (channel >= NCHANNELS))
- return (MCD_CHANNEL_INVALID);
-
- /* tbd - need to determine the proper response to a bad funcDesc when
- not including EU functions, for now, assign a benign funcDesc, but
- maybe should return an error */
-#ifndef MCD_INCLUDE_EU
- funcDesc = MCD_FUNC_NOEU1;
-#endif
-
-#ifdef MCD_DEBUG
- printf("startDma:Setting up params\n");
-#endif
- /* Set us up for task-wise priority. We don't technically need to do
- this on every start, but since the register involved is in the same
- longword as other registers that users are in control of, setting
- it more than once is probably preferable. That since the
- documentation doesn't seem to be completely consistent about the
- nature of the PTD control register. */
- MCD_dmaBar->ptdControl |= (u16) 0x8000;
-
- /* Not sure what we need to keep here rtm TBD */
-#if 1
- /* Calculate additional parameters to the regular DMA calls. */
- srcRsdIncr = srcIncr < 0 ? -1 : (srcIncr > 0 ? 1 : 0);
- destRsdIncr = destIncr < 0 ? -1 : (destIncr > 0 ? 1 : 0);
-
- xferSizeIncr = (xferSize & 0xffff) | 0x20000000;
-
- /* Remember for each channel which variant is running. */
- MCD_remVariants.remSrcRsdIncr[channel] = srcRsdIncr;
- MCD_remVariants.remDestRsdIncr[channel] = destRsdIncr;
- MCD_remVariants.remDestIncr[channel] = destIncr;
- MCD_remVariants.remSrcIncr[channel] = srcIncr;
- MCD_remVariants.remXferSize[channel] = xferSize;
-#endif
-
- cSave =
- (int *)(MCD_taskTable[channel].contextSaveSpace) + CSAVE_OFFSET +
- CURRBD;
-
-#ifdef MCD_INCLUDE_EU
- /* may move this to EU specific calls */
- realFuncArray =
- (u32 *) (MCD_taskTable[channel].FDTandFlags & 0xffffff00);
- /* Modify the LURC's normal and byte-residue-loop functions according
- to parameter. */
- realFuncArray[(LURC * 16)] = xferSize == 4 ?
- funcDesc : xferSize == 2 ?
- funcDesc & 0xfffff00f : funcDesc & 0xffff000f;
- realFuncArray[(LURC * 16 + 1)] =
- (funcDesc & MCD_BYTE_SWAP_KILLER) | MCD_NO_BYTE_SWAP_ATALL;
-#endif
- /* Write the initiator field in the TCR, and also set the
- initiator-hold bit. Note that,due to a hardware quirk, this could
- collide with an MDE access to the initiator-register file, so we
- have to verify that the write reads back correctly. */
-
- MCD_dmaBar->taskControl[channel] =
- (initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM;
-
- while (((MCD_dmaBar->taskControl[channel] & 0x1fff) !=
- ((initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM))
- && (tcrCount < 1000)) {
- tcrCount++;
- /*MCD_dmaBar->ptd_tcr[channel] = (initiator << 8) | 0x0020; */
- MCD_dmaBar->taskControl[channel] =
- (initiator << 8) | TASK_CTL_HIPRITSKEN |
- TASK_CTL_HLDINITNUM;
- }
-
- MCD_dmaBar->priority[channel] = (u8) priority & PRIORITY_PRI_MASK;
- /* should be albe to handle this stuff with only one write to ts reg
- - tbd */
- if (channel < 8 && channel >= 0) {
- MCD_dmaBar->taskSize0 &= ~(0xf << (7 - channel) * 4);
- MCD_dmaBar->taskSize0 |=
- (xferSize & 3) << (((7 - channel) * 4) + 2);
- MCD_dmaBar->taskSize0 |= (xferSize & 3) << ((7 - channel) * 4);
- } else {
- MCD_dmaBar->taskSize1 &= ~(0xf << (15 - channel) * 4);
- MCD_dmaBar->taskSize1 |=
- (xferSize & 3) << (((15 - channel) * 4) + 2);
- MCD_dmaBar->taskSize1 |= (xferSize & 3) << ((15 - channel) * 4);
- }
-
- /* setup task table flags/options which mostly control the line
- buffers */
- MCD_taskTable[channel].FDTandFlags &= ~MCD_TT_FLAGS_MASK;
- MCD_taskTable[channel].FDTandFlags |= (MCD_TT_FLAGS_MASK & flags);
-
- if (flags & MCD_FECTX_DMA) {
- /* TDTStart and TDTEnd */
- MCD_taskTable[channel].TDTstart =
- MCD_modelTaskTable[TASK_FECTX].TDTstart;
- MCD_taskTable[channel].TDTend =
- MCD_modelTaskTable[TASK_FECTX].TDTend;
- MCD_startDmaENetXmit((char *)srcAddr, (char *)srcAddr,
- (char *)destAddr, MCD_taskTable,
- channel);
- } else if (flags & MCD_FECRX_DMA) {
- /* TDTStart and TDTEnd */
- MCD_taskTable[channel].TDTstart =
- MCD_modelTaskTable[TASK_FECRX].TDTstart;
- MCD_taskTable[channel].TDTend =
- MCD_modelTaskTable[TASK_FECRX].TDTend;
- MCD_startDmaENetRcv((char *)srcAddr, (char *)srcAddr,
- (char *)destAddr, MCD_taskTable,
- channel);
- } else if (flags & MCD_SINGLE_DMA) {
- /* this buffer descriptor is used for storing off initial
- parameters for later progress query calculation and for the
- DMA to write the resulting checksum. The DMA does not use
- this to determine how to operate, that info is passed with
- the init routine */
- MCD_relocBuffDesc[channel].srcAddr = srcAddr;
- MCD_relocBuffDesc[channel].destAddr = destAddr;
-
- /* definitely not its final value */
- MCD_relocBuffDesc[channel].lastDestAddr = destAddr;
-
- MCD_relocBuffDesc[channel].dmaSize = dmaSize;
- MCD_relocBuffDesc[channel].flags = 0; /* not used */
- MCD_relocBuffDesc[channel].csumResult = 0; /* not used */
- MCD_relocBuffDesc[channel].next = 0; /* not used */
-
- /* Initialize the progress-querying stuff to show no
- progress: */
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[SRCPTR + CSAVE_OFFSET] = (int)srcAddr;
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[DESTPTR + CSAVE_OFFSET] = (int)destAddr;
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[DCOUNT + CSAVE_OFFSET] = 0;
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[CURRBD + CSAVE_OFFSET] =
-(u32) & (MCD_relocBuffDesc[channel]);
- /* tbd - need to keep the user from trying to call the EU
- routine when MCD_INCLUDE_EU is not defined */
- if (funcDesc == MCD_FUNC_NOEU1 || funcDesc == MCD_FUNC_NOEU2) {
- /* TDTStart and TDTEnd */
- MCD_taskTable[channel].TDTstart =
- MCD_modelTaskTable[TASK_SINGLENOEU].TDTstart;
- MCD_taskTable[channel].TDTend =
- MCD_modelTaskTable[TASK_SINGLENOEU].TDTend;
- MCD_startDmaSingleNoEu((char *)srcAddr, srcIncr,
- (char *)destAddr, destIncr,
- (int)dmaSize, xferSizeIncr,
- flags, (int *)
- &(MCD_relocBuffDesc[channel]),
- cSave, MCD_taskTable, channel);
- } else {
- /* TDTStart and TDTEnd */
- MCD_taskTable[channel].TDTstart =
- MCD_modelTaskTable[TASK_SINGLEEU].TDTstart;
- MCD_taskTable[channel].TDTend =
- MCD_modelTaskTable[TASK_SINGLEEU].TDTend;
- MCD_startDmaSingleEu((char *)srcAddr, srcIncr,
- (char *)destAddr, destIncr,
- (int)dmaSize, xferSizeIncr,
- flags, (int *)
- &(MCD_relocBuffDesc[channel]),
- cSave, MCD_taskTable, channel);
- }
- } else { /* chained DMAS */
- /* Initialize the progress-querying stuff to show no
- progress: */
-#if 1
- /* (!defined(MCD_NEED_ADDR_TRANS)) */
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[SRCPTR + CSAVE_OFFSET]
- = (int)((MCD_bufDesc *) srcAddr)->srcAddr;
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[DESTPTR + CSAVE_OFFSET]
- = (int)((MCD_bufDesc *) srcAddr)->destAddr;
-#else
- /* if using address translation, need the virtual addr of the
- first buffdesc */
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[SRCPTR + CSAVE_OFFSET]
- = (int)((MCD_bufDesc *) srcAddrVirt)->srcAddr;
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[DESTPTR + CSAVE_OFFSET]
- = (int)((MCD_bufDesc *) srcAddrVirt)->destAddr;
-#endif
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[DCOUNT + CSAVE_OFFSET] = 0;
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[CURRBD + CSAVE_OFFSET] = (u32) srcAddr;
-
- if (funcDesc == MCD_FUNC_NOEU1 || funcDesc == MCD_FUNC_NOEU2) {
- /*TDTStart and TDTEnd */
- MCD_taskTable[channel].TDTstart =
- MCD_modelTaskTable[TASK_CHAINNOEU].TDTstart;
- MCD_taskTable[channel].TDTend =
- MCD_modelTaskTable[TASK_CHAINNOEU].TDTend;
- MCD_startDmaChainNoEu((int *)srcAddr, srcIncr,
- destIncr, xferSize,
- xferSizeIncr, cSave,
- MCD_taskTable, channel);
- } else {
- /*TDTStart and TDTEnd */
- MCD_taskTable[channel].TDTstart =
- MCD_modelTaskTable[TASK_CHAINEU].TDTstart;
- MCD_taskTable[channel].TDTend =
- MCD_modelTaskTable[TASK_CHAINEU].TDTend;
- MCD_startDmaChainEu((int *)srcAddr, srcIncr, destIncr,
- xferSize, xferSizeIncr, cSave,
- MCD_taskTable, channel);
- }
- }
- MCD_chStatus[channel] = MCD_IDLE;
- return (MCD_OK);
-}
-
-/************************ End of MCD_startDma() *********************/
-
-/********************************************************************/
-/* Function: MCD_XferProgrQuery
- * Purpose: Returns progress of DMA on requested channel
- * Arguments: channel - channel to retrieve progress for
- * progRep - pointer to user supplied MCD_XferProg struct
- * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
- *
- * Notes:
- * MCD_XferProgrQuery() upon completing or after aborting a DMA, or
- * while the DMA is in progress, this function returns the first
- * DMA-destination address not (or not yet) used in the DMA. When
- * encountering a non-ready buffer descriptor, the information for
- * the last completed descriptor is returned.
- *
- * MCD_XferProgQuery() has to avoid the possibility of getting
- * partially-updated information in the event that we should happen
- * to query DMA progress just as the DMA is updating it. It does that
- * by taking advantage of the fact context is not saved frequently for
- * the most part. We therefore read it at least twice until we get the
- * same information twice in a row.
- *
- * Because a small, but not insignificant, amount of time is required
- * to write out the progress-query information, especially upon
- * completion of the DMA, it would be wise to guarantee some time lag
- * between successive readings of the progress-query information.
- */
-
-/* How many iterations of the loop below to execute to stabilize values */
-#define STABTIME 0
-
-int MCD_XferProgrQuery(int channel, MCD_XferProg * progRep)
-{
- MCD_XferProg prevRep;
- int again; /* true if we are to try again to ge
- consistent results */
- int i; /* used as a time-waste counter */
- int destDiffBytes; /* Total no of bytes that we think actually
- got xfered. */
- int numIterations; /* number of iterations */
- int bytesNotXfered; /* bytes that did not get xfered. */
- s8 *LWAlignedInitDestAddr, *LWAlignedCurrDestAddr;
- int subModVal, addModVal; /* Mode values to added and subtracted
- from the final destAddr */
-
- if ((channel < 0) || (channel >= NCHANNELS))
- return (MCD_CHANNEL_INVALID);
-
- /* Read a trial value for the progress-reporting values */
- prevRep.lastSrcAddr =
- (s8 *) ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[SRCPTR + CSAVE_OFFSET];
- prevRep.lastDestAddr =
- (s8 *) ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[DESTPTR + CSAVE_OFFSET];
- prevRep.dmaSize =
- ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DCOUNT +
- CSAVE_OFFSET];
- prevRep.currBufDesc =
- (MCD_bufDesc *) ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[CURRBD + CSAVE_OFFSET];
- /* Repeatedly reread those values until they match previous values: */
- do {
- /* Waste a little bit of time to ensure stability: */
- for (i = 0; i < STABTIME; i++) {
- /* make sure this loop does something so that it
- doesn't get optimized out */
- i += i >> 2;
- }
- /* Check them again: */
- progRep->lastSrcAddr =
- (s8 *) ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[SRCPTR + CSAVE_OFFSET];
- progRep->lastDestAddr =
- (s8 *) ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[DESTPTR + CSAVE_OFFSET];
- progRep->dmaSize =
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[DCOUNT + CSAVE_OFFSET];
- progRep->currBufDesc =
- (MCD_bufDesc *) ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[CURRBD + CSAVE_OFFSET];
- /* See if they match: */
- if (prevRep.lastSrcAddr != progRep->lastSrcAddr
- || prevRep.lastDestAddr != progRep->lastDestAddr
- || prevRep.dmaSize != progRep->dmaSize
- || prevRep.currBufDesc != progRep->currBufDesc) {
- /* If they don't match, remember previous values and
- try again: */
- prevRep.lastSrcAddr = progRep->lastSrcAddr;
- prevRep.lastDestAddr = progRep->lastDestAddr;
- prevRep.dmaSize = progRep->dmaSize;
- prevRep.currBufDesc = progRep->currBufDesc;
- again = MCD_TRUE;
- } else
- again = MCD_FALSE;
- } while (again == MCD_TRUE);
-
- /* Update the dCount, srcAddr and destAddr */
- /* To calculate dmaCount, we consider destination address. C
- overs M1,P1,Z for destination */
- switch (MCD_remVariants.remDestRsdIncr[channel]) {
- case MINUS1:
- subModVal =
- ((int)progRep->
- lastDestAddr) & ((MCD_remVariants.remXferSize[channel]) -
- 1);
- addModVal =
- ((int)progRep->currBufDesc->
- destAddr) & ((MCD_remVariants.remXferSize[channel]) - 1);
- LWAlignedInitDestAddr =
- (progRep->currBufDesc->destAddr) - addModVal;
- LWAlignedCurrDestAddr = (progRep->lastDestAddr) - subModVal;
- destDiffBytes = LWAlignedInitDestAddr - LWAlignedCurrDestAddr;
- bytesNotXfered =
- (destDiffBytes / MCD_remVariants.remDestIncr[channel]) *
- (MCD_remVariants.remDestIncr[channel]
- + MCD_remVariants.remXferSize[channel]);
- progRep->dmaSize =
- destDiffBytes - bytesNotXfered + addModVal - subModVal;
- break;
- case ZERO:
- progRep->lastDestAddr = progRep->currBufDesc->destAddr;
- break;
- case PLUS1:
- /* This value has to be subtracted from the final
- calculated dCount. */
- subModVal =
- ((int)progRep->currBufDesc->
- destAddr) & ((MCD_remVariants.remXferSize[channel]) - 1);
- /* These bytes are already in lastDestAddr. */
- addModVal =
- ((int)progRep->
- lastDestAddr) & ((MCD_remVariants.remXferSize[channel]) -
- 1);
- LWAlignedInitDestAddr =
- (progRep->currBufDesc->destAddr) - subModVal;
- LWAlignedCurrDestAddr = (progRep->lastDestAddr) - addModVal;
- destDiffBytes = (progRep->lastDestAddr - LWAlignedInitDestAddr);
- numIterations =
- (LWAlignedCurrDestAddr -
- LWAlignedInitDestAddr) /
- MCD_remVariants.remDestIncr[channel];
- bytesNotXfered =
- numIterations * (MCD_remVariants.remDestIncr[channel]
- - MCD_remVariants.remXferSize[channel]);
- progRep->dmaSize = destDiffBytes - bytesNotXfered - subModVal;
- break;
- default:
- break;
- }
-
- /* This covers M1,P1,Z for source */
- switch (MCD_remVariants.remSrcRsdIncr[channel]) {
- case MINUS1:
- progRep->lastSrcAddr =
- progRep->currBufDesc->srcAddr +
- (MCD_remVariants.remSrcIncr[channel] *
- (progRep->dmaSize / MCD_remVariants.remXferSize[channel]));
- break;
- case ZERO:
- progRep->lastSrcAddr = progRep->currBufDesc->srcAddr;
- break;
- case PLUS1:
- progRep->lastSrcAddr =
- progRep->currBufDesc->srcAddr +
- (MCD_remVariants.remSrcIncr[channel] *
- (progRep->dmaSize / MCD_remVariants.remXferSize[channel]));
- break;
- default:
- break;
- }
-
- return (MCD_OK);
-}
-
-/******************* End of MCD_XferProgrQuery() ********************/
-
-/********************************************************************/
-/* MCD_resmActions() does the majority of the actions of a DMA resume.
- * It is called from MCD_killDma() and MCD_resumeDma(). It has to be
- * a separate function because the kill function has to negate the task
- * enable before resuming it, but the resume function has to do nothing
- * if there is no DMA on that channel (i.e., if the enable bit is 0).
- */
-static void MCD_resmActions(int channel)
-{
- MCD_dmaBar->debugControl = DBG_CTL_DISABLE;
- MCD_dmaBar->debugStatus = MCD_dmaBar->debugStatus;
- /* This register is selected to know which initiator is
- actually asserted. */
- MCD_dmaBar->ptdDebug = PTD_DBG_TSK_VLD_INIT;
-
- if ((MCD_dmaBar->ptdDebug >> channel) & 0x1)
- MCD_chStatus[channel] = MCD_RUNNING;
- else
- MCD_chStatus[channel] = MCD_IDLE;
-}
-
-/********************* End of MCD_resmActions() *********************/
-
-/********************************************************************/
-/* Function: MCD_killDma
- * Purpose: Halt the DMA on the requested channel, without any
- * intention of resuming the DMA.
- * Arguments: channel - requested channel
- * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
- *
- * Notes:
- * A DMA may be killed from any state, including paused state, and it
- * always goes to the MCD_HALTED state even if it is killed while in
- * the MCD_NO_DMA or MCD_IDLE states.
- */
-int MCD_killDma(int channel)
-{
- /* MCD_XferProg progRep; */
-
- if ((channel < 0) || (channel >= NCHANNELS))
- return (MCD_CHANNEL_INVALID);
-
- MCD_dmaBar->taskControl[channel] = 0x0;
- MCD_resumeDma(channel);
- /*
- * This must be after the write to the TCR so that the task doesn't
- * start up again momentarily, and before the status assignment so
- * as to override whatever MCD_resumeDma() may do to the channel
- * status.
- */
- MCD_chStatus[channel] = MCD_HALTED;
-
- /*
- * Update the current buffer descriptor's lastDestAddr field
- *
- * MCD_XferProgrQuery (channel, &progRep);
- * progRep.currBufDesc->lastDestAddr = progRep.lastDestAddr;
- */
- return (MCD_OK);
-}
-
-/************************ End of MCD_killDma() **********************/
-
-/********************************************************************/
-/* Function: MCD_continDma
- * Purpose: Continue a DMA which as stopped due to encountering an
- * unready buffer descriptor.
- * Arguments: channel - channel to continue the DMA on
- * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
- *
- * Notes:
- * This routine does not check to see if there is a task which can
- * be continued. Also this routine should not be used with single DMAs.
- */
-int MCD_continDma(int channel)
-{
- if ((channel < 0) || (channel >= NCHANNELS))
- return (MCD_CHANNEL_INVALID);
-
- MCD_dmaBar->taskControl[channel] |= TASK_CTL_EN;
- MCD_chStatus[channel] = MCD_RUNNING;
-
- return (MCD_OK);
-}
-
-/********************** End of MCD_continDma() **********************/
-
-/*********************************************************************
- * MCD_pauseDma() and MCD_resumeDma() below use the DMA's debug unit
- * to freeze a task and resume it. We freeze a task by breakpointing
- * on the stated task. That is, not any specific place in the task,
- * but any time that task executes. In particular, when that task
- * executes, we want to freeze that task and only that task.
- *
- * The bits of the debug control register influence interrupts vs.
- * breakpoints as follows:
- * - Bits 14 and 0 enable or disable debug functions. If enabled, you
- * will get the interrupt but you may or may not get a breakpoint.
- * - Bits 2 and 1 decide whether you also get a breakpoint in addition
- * to an interrupt.
- *
- * The debug unit can do these actions in response to either internally
- * detected breakpoint conditions from the comparators, or in response
- * to the external breakpoint pin, or both.
- * - Bits 14 and 1 perform the above-described functions for
- * internally-generated conditions, i.e., the debug comparators.
- * - Bits 0 and 2 perform the above-described functions for external
- * conditions, i.e., the breakpoint external pin.
- *
- * Note that, although you "always" get the interrupt when you turn
- * the debug functions, the interrupt can nevertheless, if desired, be
- * masked by the corresponding bit in the PTD's IMR. Note also that
- * this means that bits 14 and 0 must enable debug functions before
- * bits 1 and 2, respectively, have any effect.
- *
- * NOTE: It's extremely important to not pause more than one DMA channel
- * at a time.
- ********************************************************************/
-
-/********************************************************************/
-/* Function: MCD_pauseDma
- * Purpose: Pauses the DMA on a given channel (if any DMA is running
- * on that channel).
- * Arguments: channel
- * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
- */
-int MCD_pauseDma(int channel)
-{
- /* MCD_XferProg progRep; */
-
- if ((channel < 0) || (channel >= NCHANNELS))
- return (MCD_CHANNEL_INVALID);
-
- if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN) {
- MCD_dmaBar->debugComp1 = channel;
- MCD_dmaBar->debugControl =
- DBG_CTL_ENABLE | (1 << (channel + 16));
- MCD_chStatus[channel] = MCD_PAUSED;
-
- /*
- * Update the current buffer descriptor's lastDestAddr field
- *
- * MCD_XferProgrQuery (channel, &progRep);
- * progRep.currBufDesc->lastDestAddr = progRep.lastDestAddr;
- */
- }
- return (MCD_OK);
-}
-
-/************************* End of MCD_pauseDma() ********************/
-
-/********************************************************************/
-/* Function: MCD_resumeDma
- * Purpose: Resumes the DMA on a given channel (if any DMA is
- * running on that channel).
- * Arguments: channel - channel on which to resume DMA
- * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
- */
-int MCD_resumeDma(int channel)
-{
- if ((channel < 0) || (channel >= NCHANNELS))
- return (MCD_CHANNEL_INVALID);
-
- if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN)
- MCD_resmActions(channel);
-
- return (MCD_OK);
-}
-
-/************************ End of MCD_resumeDma() ********************/
-
-/********************************************************************/
-/* Function: MCD_csumQuery
- * Purpose: Provide the checksum after performing a non-chained DMA
- * Arguments: channel - channel to report on
- * csum - pointer to where to write the checksum/CRC
- * Returns: MCD_ERROR if the channel is invalid, else MCD_OK
- *
- * Notes:
- *
- */
-int MCD_csumQuery(int channel, u32 * csum)
-{
-#ifdef MCD_INCLUDE_EU
- if ((channel < 0) || (channel >= NCHANNELS))
- return (MCD_CHANNEL_INVALID);
-
- *csum = MCD_relocBuffDesc[channel].csumResult;
- return (MCD_OK);
-#else
- return (MCD_ERROR);
-#endif
-}
-
-/*********************** End of MCD_resumeDma() *********************/
-
-/********************************************************************/
-/* Function: MCD_getCodeSize
- * Purpose: Provide the size requirements of the microcoded tasks
- * Returns: Size in bytes
- */
-int MCD_getCodeSize(void)
-{
-#ifdef MCD_INCLUDE_EU
- return (0x2b5c);
-#else
- return (0x173c);
-#endif
-}
-
-/********************** End of MCD_getCodeSize() ********************/
-
-/********************************************************************/
-/* Function: MCD_getVersion
- * Purpose: Provide the version string and number
- * Arguments: longVersion - user supplied pointer to a pointer to a char
- * which points to the version string
- * Returns: Version number and version string (by reference)
- */
-char MCD_versionString[] = "Multi-channel DMA API Alpha v0.3 (2004-04-26)";
-#define MCD_REV_MAJOR 0x00
-#define MCD_REV_MINOR 0x03
-
-int MCD_getVersion(char **longVersion)
-{
- *longVersion = MCD_versionString;
- return ((MCD_REV_MAJOR << 8) | MCD_REV_MINOR);
-}
-
-/********************** End of MCD_getVersion() *********************/
-
-/********************************************************************/
-/* Private version of memcpy()
- * Note that everything this is used for is longword-aligned.
- */
-static void MCD_memcpy(int *dest, int *src, u32 size)
-{
- u32 i;
-
- for (i = 0; i < size; i += sizeof(int), dest++, src++)
- *dest = *src;
-}
diff --git a/drivers/dma/MCD_tasks.c b/drivers/dma/MCD_tasks.c
deleted file mode 100644
index 453d954..0000000
--- a/drivers/dma/MCD_tasks.c
+++ /dev/null
@@ -1,2413 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- */
-
-/* Contains task code and structures for Multi-channel DMA */
-
-#include <common.h>
-
-#include <MCD_dma.h>
-
-u32 MCD_varTab0[];
-u32 MCD_varTab1[];
-u32 MCD_varTab2[];
-u32 MCD_varTab3[];
-u32 MCD_varTab4[];
-u32 MCD_varTab5[];
-u32 MCD_varTab6[];
-u32 MCD_varTab7[];
-u32 MCD_varTab8[];
-u32 MCD_varTab9[];
-u32 MCD_varTab10[];
-u32 MCD_varTab11[];
-u32 MCD_varTab12[];
-u32 MCD_varTab13[];
-u32 MCD_varTab14[];
-u32 MCD_varTab15[];
-
-u32 MCD_funcDescTab0[];
-#ifdef MCD_INCLUDE_EU
-u32 MCD_funcDescTab1[];
-u32 MCD_funcDescTab2[];
-u32 MCD_funcDescTab3[];
-u32 MCD_funcDescTab4[];
-u32 MCD_funcDescTab5[];
-u32 MCD_funcDescTab6[];
-u32 MCD_funcDescTab7[];
-u32 MCD_funcDescTab8[];
-u32 MCD_funcDescTab9[];
-u32 MCD_funcDescTab10[];
-u32 MCD_funcDescTab11[];
-u32 MCD_funcDescTab12[];
-u32 MCD_funcDescTab13[];
-u32 MCD_funcDescTab14[];
-u32 MCD_funcDescTab15[];
-#endif
-
-u32 MCD_contextSave0[];
-u32 MCD_contextSave1[];
-u32 MCD_contextSave2[];
-u32 MCD_contextSave3[];
-u32 MCD_contextSave4[];
-u32 MCD_contextSave5[];
-u32 MCD_contextSave6[];
-u32 MCD_contextSave7[];
-u32 MCD_contextSave8[];
-u32 MCD_contextSave9[];
-u32 MCD_contextSave10[];
-u32 MCD_contextSave11[];
-u32 MCD_contextSave12[];
-u32 MCD_contextSave13[];
-u32 MCD_contextSave14[];
-u32 MCD_contextSave15[];
-
-u32 MCD_realTaskTableSrc[] = {
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab0, /* Task 0 Variable Table */
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave0, /* Task 0 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab1, /* Task 1 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab1, /* Task 1 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave1, /* Task 1 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab2, /* Task 2 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab2, /* Task 2 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave2, /* Task 2 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab3, /* Task 3 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab3, /* Task 3 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave3, /* Task 3 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab4, /* Task 4 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab4, /* Task 4 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave4, /* Task 4 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab5, /* Task 5 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab5, /* Task 5 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave5, /* Task 5 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab6, /* Task 6 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab6, /* Task 6 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave6, /* Task 6 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab7, /* Task 7 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab7, /* Task 7 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave7, /* Task 7 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab8, /* Task 8 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab8, /* Task 8 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave8, /* Task 8 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab9, /* Task 9 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab9, /* Task 9 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave9, /* Task 9 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab10, /* Task 10 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab10, /* Task 10 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave10, /* Task 10 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab11, /* Task 11 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab11, /* Task 11 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave11, /* Task 11 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab12, /* Task 12 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab12, /* Task 12 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave12, /* Task 12 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab13, /* Task 13 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab13, /* Task 13 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave13, /* Task 13 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab14, /* Task 14 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab14, /* Task 14 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave14, /* Task 14 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab15, /* Task 15 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab15, /* Task 15 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave15, /* Task 15 context save space */
- 0x00000000,
-};
-
-u32 MCD_varTab0[] = { /* Task 0 Variable Table */
- 0x00000000, /* var[0] */
- 0x00000000, /* var[1] */
- 0x00000000, /* var[2] */
- 0x00000000, /* var[3] */
- 0x00000000, /* var[4] */
- 0x00000000, /* var[5] */
- 0x00000000, /* var[6] */
- 0x00000000, /* var[7] */
- 0x00000000, /* var[8] */
- 0x00000000, /* var[9] */
- 0x00000000, /* var[10] */
- 0x00000000, /* var[11] */
- 0x00000000, /* var[12] */
- 0x00000000, /* var[13] */
- 0x00000000, /* var[14] */
- 0x00000000, /* var[15] */
- 0x00000000, /* var[16] */
- 0x00000000, /* var[17] */
- 0x00000000, /* var[18] */
- 0x00000000, /* var[19] */
- 0x00000000, /* var[20] */
- 0x00000000, /* var[21] */
- 0x00000000, /* var[22] */
- 0x00000000, /* var[23] */
- 0xe0000000, /* inc[0] */
- 0x20000000, /* inc[1] */
- 0x2000ffff, /* inc[2] */
- 0x00000000, /* inc[3] */
- 0x00000000, /* inc[4] */
- 0x00000000, /* inc[5] */
- 0x00000000, /* inc[6] */
- 0x00000000, /* inc[7] */
-};
-
-u32 MCD_varTab1[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab2[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab3[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab4[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab5[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab6[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab7[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab8[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab9[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab10[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab11[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab12[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab13[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab14[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab15[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_funcDescTab0[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-#ifdef MCD_INCLUDE_EU
-u32 MCD_funcDescTab1[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab2[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab3[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab4[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab5[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab6[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab7[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab8[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab9[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab10[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab11[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab12[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab13[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab14[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab15[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-#endif /*MCD_INCLUDE_EU */
-
-u32 MCD_contextSave0[128]; /* Task 0 context save space */
-u32 MCD_contextSave1[128]; /* Task 1 context save space */
-u32 MCD_contextSave2[128]; /* Task 2 context save space */
-u32 MCD_contextSave3[128]; /* Task 3 context save space */
-u32 MCD_contextSave4[128]; /* Task 4 context save space */
-u32 MCD_contextSave5[128]; /* Task 5 context save space */
-u32 MCD_contextSave6[128]; /* Task 6 context save space */
-u32 MCD_contextSave7[128]; /* Task 7 context save space */
-u32 MCD_contextSave8[128]; /* Task 8 context save space */
-u32 MCD_contextSave9[128]; /* Task 9 context save space */
-u32 MCD_contextSave10[128]; /* Task 10 context save space */
-u32 MCD_contextSave11[128]; /* Task 11 context save space */
-u32 MCD_contextSave12[128]; /* Task 12 context save space */
-u32 MCD_contextSave13[128]; /* Task 13 context save space */
-u32 MCD_contextSave14[128]; /* Task 14 context save space */
-u32 MCD_contextSave15[128]; /* Task 15 context save space */
-
-u32 MCD_ChainNoEu_TDT[];
-u32 MCD_SingleNoEu_TDT[];
-#ifdef MCD_INCLUDE_EU
-u32 MCD_ChainEu_TDT[];
-u32 MCD_SingleEu_TDT[];
-#endif
-u32 MCD_ENetRcv_TDT[];
-u32 MCD_ENetXmit_TDT[];
-
-u32 MCD_modelTaskTableSrc[] = {
- (u32) MCD_ChainNoEu_TDT,
- (u32) & ((u8 *) MCD_ChainNoEu_TDT)[0x0000016c],
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_SingleNoEu_TDT,
- (u32) & ((u8 *) MCD_SingleNoEu_TDT)[0x000000d4],
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_ChainEu_TDT,
- (u32) & ((u8 *) MCD_ChainEu_TDT)[0x000001b4],
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_SingleEu_TDT,
- (u32) & ((u8 *) MCD_SingleEu_TDT)[0x00000124],
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-#endif
- (u32) MCD_ENetRcv_TDT,
- (u32) & ((u8 *) MCD_ENetRcv_TDT)[0x0000009c],
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_ENetXmit_TDT,
- (u32) & ((u8 *) MCD_ENetXmit_TDT)[0x000000d0],
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_ChainNoEu_TDT[] = {
- 0x80004000,
- 0x8118801b,
- 0xb8c60018,
- 0x10002b10,
- 0x7000000d,
- 0x018cf89f,
- 0x6000000a,
- 0x080cf89f,
- 0x000001f8,
- 0x98180364,
- 0x8118801b,
- 0xf8c6001a,
- 0xb8c6601b,
- 0x10002710,
- 0x00000f18,
- 0xb8c6001d,
- 0x10001310,
- 0x60000007,
- 0x014cf88b,
- 0x98c6001c,
- 0x00000710,
- 0x98c70018,
- 0x10001f10,
- 0x0000c818,
- 0x000001f8,
- 0xc1476018,
- 0xc003231d,
- 0x811a601b,
- 0xc1862102,
- 0x849be009,
- 0x03fed7b8,
- 0xda9b001b,
- 0x9b9be01b,
- 0x1000cb20,
- 0x70000006,
- 0x088cf88f,
- 0x1000cb28,
- 0x70000006,
- 0x088cf88f,
- 0x1000cb30,
- 0x70000006,
- 0x088cf88f,
- 0x1000cb38,
- 0x0000c728,
- 0x000001f8,
- 0xc1476018,
- 0xc003241d,
- 0x811a601b,
- 0xda9b001b,
- 0x9b9be01b,
- 0x0000d3a0,
- 0xc1862102,
- 0x849be009,
- 0x0bfed7b8,
- 0xda9b001b,
- 0x9b9be01b,
- 0x1000cb20,
- 0x70000006,
- 0x088cf88f,
- 0x1000cb28,
- 0x70000006,
- 0x088cf88f,
- 0x1000cb30,
- 0x70000006,
- 0x088cf88f,
- 0x1000cb38,
- 0x0000c728,
- 0x000001f8,
- 0x8118801b,
- 0xd8c60018,
- 0x98c6601c,
- 0x6000000b,
- 0x0c8cfc9f,
- 0x000001f8,
- 0xa146001e,
- 0x10000b08,
- 0x10002050,
- 0xb8c60018,
- 0x10002b10,
- 0x7000000a,
- 0x080cf89f,
- 0x6000000d,
- 0x018cf89f,
- 0x000001f8,
- 0x8618801b,
- 0x7000000e,
- 0x084cf21f,
- 0xd8990336,
- 0x8019801b,
- 0x040001f8,
- 0x000001f8,
- 0x000001f8,
-};
-
-u32 MCD_SingleNoEu_TDT[] = {
- 0x8198001b,
- 0x7000000d,
- 0x080cf81f,
- 0x8198801b,
- 0x6000000e,
- 0x084cf85f,
- 0x000001f8,
- 0x8298001b,
- 0x7000000d,
- 0x010cf81f,
- 0x6000000e,
- 0x018cf81f,
- 0xc202601b,
- 0xc002221c,
- 0x809a601b,
- 0xc10420c2,
- 0x839be009,
- 0x03fed7b8,
- 0xda9b001b,
- 0x9b9be01b,
- 0x70000006,
- 0x088cf889,
- 0x1000cb28,
- 0x70000006,
- 0x088cf889,
- 0x1000cb30,
- 0x70000006,
- 0x088cf889,
- 0x0000cb38,
- 0x000001f8,
- 0xc202601b,
- 0xc002229c,
- 0x809a601b,
- 0xda9b001b,
- 0x9b9be01b,
- 0x0000d3a0,
- 0xc10420c2,
- 0x839be009,
- 0x0bfed7b8,
- 0xda9b001b,
- 0x9b9be01b,
- 0x70000006,
- 0x088cf889,
- 0x1000cb28,
- 0x70000006,
- 0x088cf889,
- 0x1000cb30,
- 0x70000006,
- 0x088cf889,
- 0x0000cb38,
- 0x000001f8,
- 0xc318022d,
- 0x8018801b,
- 0x040001f8,
-};
-
-#ifdef MCD_INCLUDE_EU
-u32 MCD_ChainEu_TDT[] = {
- 0x80004000,
- 0x8198801b,
- 0xb8c68018,
- 0x10002f10,
- 0x7000000d,
- 0x01ccf89f,
- 0x6000000a,
- 0x080cf89f,
- 0x000001f8,
- 0x981803a4,
- 0x8198801b,
- 0xf8c6801a,
- 0xb8c6e01b,
- 0x10002b10,
- 0x00001318,
- 0xb8c6801d,
- 0x10001710,
- 0x60000007,
- 0x018cf88c,
- 0x98c6801c,
- 0x00000b10,
- 0x98c78018,
- 0x10002310,
- 0x0000c820,
- 0x000001f8,
- 0x8698801b,
- 0x7000000f,
- 0x084cf2df,
- 0xd899042d,
- 0x8019801b,
- 0x60000003,
- 0x2cd7c7df,
- 0xd8990364,
- 0x8019801b,
- 0x60000003,
- 0x2c17c7df,
- 0x000001f8,
- 0xc1c7e018,
- 0xc003a35e,
- 0x819a601b,
- 0xc206a142,
- 0x851be009,
- 0x63fe0000,
- 0x0d4cfddf,
- 0xda9b001b,
- 0x9b9be01b,
- 0x70000002,
- 0x004cf81f,
- 0x1000cb20,
- 0x70000006,
- 0x088cf891,
- 0x1000cb28,
- 0x70000006,
- 0x088cf891,
- 0x1000cb30,
- 0x70000006,
- 0x088cf891,
- 0x1000cb38,
- 0x0000c728,
- 0x000001f8,
- 0xc1c7e018,
- 0xc003a49e,
- 0x819a601b,
- 0xda9b001b,
- 0x9b9be01b,
- 0x0000d3a0,
- 0xc206a142,
- 0x851be009,
- 0x6bfe0000,
- 0x0d4cfddf,
- 0xda9b001b,
- 0x9b9be01b,
- 0x70000002,
- 0x004cf81f,
- 0x1000cb20,
- 0x70000006,
- 0x088cf891,
- 0x1000cb28,
- 0x70000006,
- 0x088cf891,
- 0x1000cb30,
- 0x70000006,
- 0x088cf891,
- 0x1000cb38,
- 0x0000c728,
- 0x000001f8,
- 0x8198801b,
- 0xd8c68018,
- 0x98c6e01c,
- 0x6000000b,
- 0x0c8cfc9f,
- 0x0000cc08,
- 0xa1c6801e,
- 0x10000f08,
- 0x10002458,
- 0xb8c68018,
- 0x10002f10,
- 0x7000000a,
- 0x080cf89f,
- 0x6000000d,
- 0x01ccf89f,
- 0x000001f8,
- 0x8698801b,
- 0x7000000e,
- 0x084cf25f,
- 0xd899037f,
- 0x8019801b,
- 0x040001f8,
- 0x000001f8,
- 0x000001f8,
-};
-
-u32 MCD_SingleEu_TDT[] = {
- 0x8218001b,
- 0x7000000d,
- 0x080cf81f,
- 0x8218801b,
- 0x6000000e,
- 0x084cf85f,
- 0x000001f8,
- 0x8318001b,
- 0x7000000d,
- 0x014cf81f,
- 0x6000000e,
- 0x01ccf81f,
- 0x8498001b,
- 0x7000000f,
- 0x080cf19f,
- 0xd81882a4,
- 0x8019001b,
- 0x60000003,
- 0x2c97c7df,
- 0xd818826d,
- 0x8019001b,
- 0x60000003,
- 0x2c17c7df,
- 0x000001f8,
- 0xc282e01b,
- 0xc002a25e,
- 0x811a601b,
- 0xc184a102,
- 0x841be009,
- 0x63fe0000,
- 0x0d4cfddf,
- 0xda9b001b,
- 0x9b9be01b,
- 0x70000002,
- 0x004cf99f,
- 0x70000006,
- 0x088cf88b,
- 0x1000cb28,
- 0x70000006,
- 0x088cf88b,
- 0x1000cb30,
- 0x70000006,
- 0x088cf88b,
- 0x0000cb38,
- 0x000001f8,
- 0xc282e01b,
- 0xc002a31e,
- 0x811a601b,
- 0xda9b001b,
- 0x9b9be01b,
- 0x0000d3a0,
- 0xc184a102,
- 0x841be009,
- 0x6bfe0000,
- 0x0d4cfddf,
- 0xda9b001b,
- 0x9b9be01b,
- 0x70000002,
- 0x004cf99f,
- 0x70000006,
- 0x088cf88b,
- 0x1000cb28,
- 0x70000006,
- 0x088cf88b,
- 0x1000cb30,
- 0x70000006,
- 0x088cf88b,
- 0x0000cb38,
- 0x000001f8,
- 0x8144801c,
- 0x0000c008,
- 0xc398027f,
- 0x8018801b,
- 0x040001f8,
-};
-#endif
-u32 MCD_ENetRcv_TDT[] = {
- 0x80004000,
- 0x81988000,
- 0x10000788,
- 0x6000000a,
- 0x080cf05f,
- 0x98180209,
- 0x81c40004,
- 0x7000000e,
- 0x010cf05f,
- 0x7000000c,
- 0x01ccf05f,
- 0x70000004,
- 0x014cf049,
- 0x70000004,
- 0x004cf04a,
- 0x00000b88,
- 0xc4030150,
- 0x8119e012,
- 0x03e0cf90,
- 0x81188000,
- 0x000ac788,
- 0xc4030000,
- 0x8199e000,
- 0x70000004,
- 0x084cfc8b,
- 0x60000005,
- 0x0cccf841,
- 0x81c60000,
- 0xc399021b,
- 0x80198000,
- 0x00008400,
- 0x00000f08,
- 0x81988000,
- 0x10000788,
- 0x6000000a,
- 0x080cf05f,
- 0xc2188209,
- 0x80190000,
- 0x040001f8,
- 0x000001f8,
-};
-
-u32 MCD_ENetXmit_TDT[] = {
- 0x80004000,
- 0x81988000,
- 0x10000788,
- 0x6000000a,
- 0x080cf05f,
- 0x98180309,
- 0x80004003,
- 0x81c60004,
- 0x7000000e,
- 0x014cf05f,
- 0x7000000c,
- 0x028cf05f,
- 0x7000000d,
- 0x018cf05f,
- 0x70000004,
- 0x01ccf04d,
- 0x10000b90,
- 0x60000004,
- 0x020cf0a1,
- 0xc3188312,
- 0x83c70000,
- 0x00001f10,
- 0xc583a3c3,
- 0x81042325,
- 0x03e0c798,
- 0xd8990000,
- 0x9999e000,
- 0x000acf98,
- 0xd8992306,
- 0x9999e03f,
- 0x03eac798,
- 0xd8990000,
- 0x9999e000,
- 0x000acf98,
- 0xd8990000,
- 0x99832302,
- 0x0beac798,
- 0x81988000,
- 0x6000000b,
- 0x0c4cfc5f,
- 0x81c80000,
- 0xc5190312,
- 0x80198000,
- 0x00008400,
- 0x00000f08,
- 0x81988000,
- 0x10000788,
- 0x6000000a,
- 0x080cf05f,
- 0xc2988309,
- 0x80190000,
- 0x040001f8,
- 0x000001f8,
-};
-
-#ifdef MCD_INCLUDE_EU
-MCD_bufDesc MCD_singleBufDescs[NCHANNELS];
-#endif
diff --git a/drivers/dma/MCD_tasksInit.c b/drivers/dma/MCD_tasksInit.c
deleted file mode 100644
index 079cd0a..0000000
--- a/drivers/dma/MCD_tasksInit.c
+++ /dev/null
@@ -1,225 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- */
-
-#include <common.h>
-
-/* Functions for initializing variable tables of different types of tasks. */
-
-/*
- * Do not edit!
- */
-
-#include <MCD_dma.h>
-
-extern dmaRegs *MCD_dmaBar;
-
-/* Task 0 */
-
-void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr,
- int xferSize, short xferSizeIncr, int *cSave,
- volatile TaskTableEntry * taskTable, int channel)
-{
- volatile TaskTableEntry *taskChan = taskTable + channel;
-
- MCD_SET_VAR(taskChan, 2, (u32) currBD); /* var[2] */
- MCD_SET_VAR(taskChan, 25, (u32) (0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
- MCD_SET_VAR(taskChan, 24, (u32) (0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
- MCD_SET_VAR(taskChan, 11, (u32) xferSize); /* var[11] */
- MCD_SET_VAR(taskChan, 26, (u32) (0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
- MCD_SET_VAR(taskChan, 0, (u32) cSave); /* var[0] */
- MCD_SET_VAR(taskChan, 1, (u32) 0x00000000); /* var[1] */
- MCD_SET_VAR(taskChan, 3, (u32) 0x00000000); /* var[3] */
- MCD_SET_VAR(taskChan, 4, (u32) 0x00000000); /* var[4] */
- MCD_SET_VAR(taskChan, 5, (u32) 0x00000000); /* var[5] */
- MCD_SET_VAR(taskChan, 6, (u32) 0x00000000); /* var[6] */
- MCD_SET_VAR(taskChan, 7, (u32) 0x00000000); /* var[7] */
- MCD_SET_VAR(taskChan, 8, (u32) 0x00000000); /* var[8] */
- MCD_SET_VAR(taskChan, 9, (u32) 0x00000000); /* var[9] */
- MCD_SET_VAR(taskChan, 10, (u32) 0x00000000); /* var[10] */
- MCD_SET_VAR(taskChan, 12, (u32) 0x00000000); /* var[12] */
- MCD_SET_VAR(taskChan, 13, (u32) 0x80000000); /* var[13] */
- MCD_SET_VAR(taskChan, 14, (u32) 0x00000010); /* var[14] */
- MCD_SET_VAR(taskChan, 15, (u32) 0x00000004); /* var[15] */
- MCD_SET_VAR(taskChan, 16, (u32) 0x08000000); /* var[16] */
- MCD_SET_VAR(taskChan, 27, (u32) 0x00000000); /* inc[3] */
- MCD_SET_VAR(taskChan, 28, (u32) 0x80000000); /* inc[4] */
- MCD_SET_VAR(taskChan, 29, (u32) 0x80000001); /* inc[5] */
- MCD_SET_VAR(taskChan, 30, (u32) 0x40000000); /* inc[6] */
-
- /* Set the task's Enable bit in its Task Control Register */
- MCD_dmaBar->taskControl[channel] |= (u16) 0x8000;
-}
-
-/* Task 1 */
-
-void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr,
- short destIncr, int dmaSize, short xferSizeIncr,
- int flags, int *currBD, int *cSave,
- volatile TaskTableEntry * taskTable, int channel)
-{
- volatile TaskTableEntry *taskChan = taskTable + channel;
-
- MCD_SET_VAR(taskChan, 7, (u32) srcAddr); /* var[7] */
- MCD_SET_VAR(taskChan, 25, (u32) (0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
- MCD_SET_VAR(taskChan, 2, (u32) destAddr); /* var[2] */
- MCD_SET_VAR(taskChan, 24, (u32) (0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
- MCD_SET_VAR(taskChan, 3, (u32) dmaSize); /* var[3] */
- MCD_SET_VAR(taskChan, 26, (u32) (0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
- MCD_SET_VAR(taskChan, 5, (u32) flags); /* var[5] */
- MCD_SET_VAR(taskChan, 1, (u32) currBD); /* var[1] */
- MCD_SET_VAR(taskChan, 0, (u32) cSave); /* var[0] */
- MCD_SET_VAR(taskChan, 4, (u32) 0x00000000); /* var[4] */
- MCD_SET_VAR(taskChan, 6, (u32) 0x00000000); /* var[6] */
- MCD_SET_VAR(taskChan, 8, (u32) 0x00000000); /* var[8] */
- MCD_SET_VAR(taskChan, 9, (u32) 0x00000004); /* var[9] */
- MCD_SET_VAR(taskChan, 10, (u32) 0x08000000); /* var[10] */
- MCD_SET_VAR(taskChan, 27, (u32) 0x00000000); /* inc[3] */
- MCD_SET_VAR(taskChan, 28, (u32) 0x80000001); /* inc[4] */
- MCD_SET_VAR(taskChan, 29, (u32) 0x40000000); /* inc[5] */
-
- /* Set the task's Enable bit in its Task Control Register */
- MCD_dmaBar->taskControl[channel] |= (u16) 0x8000;
-}
-
-/* Task 2 */
-
-void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr,
- int xferSize, short xferSizeIncr, int *cSave,
- volatile TaskTableEntry * taskTable, int channel)
-{
- volatile TaskTableEntry *taskChan = taskTable + channel;
-
- MCD_SET_VAR(taskChan, 3, (u32) currBD); /* var[3] */
- MCD_SET_VAR(taskChan, 25, (u32) (0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
- MCD_SET_VAR(taskChan, 24, (u32) (0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
- MCD_SET_VAR(taskChan, 12, (u32) xferSize); /* var[12] */
- MCD_SET_VAR(taskChan, 26, (u32) (0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
- MCD_SET_VAR(taskChan, 0, (u32) cSave); /* var[0] */
- MCD_SET_VAR(taskChan, 1, (u32) 0x00000000); /* var[1] */
- MCD_SET_VAR(taskChan, 2, (u32) 0x00000000); /* var[2] */
- MCD_SET_VAR(taskChan, 4, (u32) 0x00000000); /* var[4] */
- MCD_SET_VAR(taskChan, 5, (u32) 0x00000000); /* var[5] */
- MCD_SET_VAR(taskChan, 6, (u32) 0x00000000); /* var[6] */
- MCD_SET_VAR(taskChan, 7, (u32) 0x00000000); /* var[7] */
- MCD_SET_VAR(taskChan, 8, (u32) 0x00000000); /* var[8] */
- MCD_SET_VAR(taskChan, 9, (u32) 0x00000000); /* var[9] */
- MCD_SET_VAR(taskChan, 10, (u32) 0x00000000); /* var[10] */
- MCD_SET_VAR(taskChan, 11, (u32) 0x00000000); /* var[11] */
- MCD_SET_VAR(taskChan, 13, (u32) 0x00000000); /* var[13] */
- MCD_SET_VAR(taskChan, 14, (u32) 0x80000000); /* var[14] */
- MCD_SET_VAR(taskChan, 15, (u32) 0x00000010); /* var[15] */
- MCD_SET_VAR(taskChan, 16, (u32) 0x00000001); /* var[16] */
- MCD_SET_VAR(taskChan, 17, (u32) 0x00000004); /* var[17] */
- MCD_SET_VAR(taskChan, 18, (u32) 0x08000000); /* var[18] */
- MCD_SET_VAR(taskChan, 27, (u32) 0x00000000); /* inc[3] */
- MCD_SET_VAR(taskChan, 28, (u32) 0x80000000); /* inc[4] */
- MCD_SET_VAR(taskChan, 29, (u32) 0xc0000000); /* inc[5] */
- MCD_SET_VAR(taskChan, 30, (u32) 0x80000001); /* inc[6] */
- MCD_SET_VAR(taskChan, 31, (u32) 0x40000000); /* inc[7] */
-
- /* Set the task's Enable bit in its Task Control Register */
- MCD_dmaBar->taskControl[channel] |= (u16) 0x8000;
-}
-
-/* Task 3 */
-
-void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr,
- short destIncr, int dmaSize, short xferSizeIncr,
- int flags, int *currBD, int *cSave,
- volatile TaskTableEntry * taskTable, int channel)
-{
- volatile TaskTableEntry *taskChan = taskTable + channel;
-
- MCD_SET_VAR(taskChan, 8, (u32) srcAddr); /* var[8] */
- MCD_SET_VAR(taskChan, 25, (u32) (0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
- MCD_SET_VAR(taskChan, 3, (u32) destAddr); /* var[3] */
- MCD_SET_VAR(taskChan, 24, (u32) (0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
- MCD_SET_VAR(taskChan, 4, (u32) dmaSize); /* var[4] */
- MCD_SET_VAR(taskChan, 26, (u32) (0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
- MCD_SET_VAR(taskChan, 6, (u32) flags); /* var[6] */
- MCD_SET_VAR(taskChan, 2, (u32) currBD); /* var[2] */
- MCD_SET_VAR(taskChan, 0, (u32) cSave); /* var[0] */
- MCD_SET_VAR(taskChan, 1, (u32) 0x00000000); /* var[1] */
- MCD_SET_VAR(taskChan, 5, (u32) 0x00000000); /* var[5] */
- MCD_SET_VAR(taskChan, 7, (u32) 0x00000000); /* var[7] */
- MCD_SET_VAR(taskChan, 9, (u32) 0x00000000); /* var[9] */
- MCD_SET_VAR(taskChan, 10, (u32) 0x00000001); /* var[10] */
- MCD_SET_VAR(taskChan, 11, (u32) 0x00000004); /* var[11] */
- MCD_SET_VAR(taskChan, 12, (u32) 0x08000000); /* var[12] */
- MCD_SET_VAR(taskChan, 27, (u32) 0x00000000); /* inc[3] */
- MCD_SET_VAR(taskChan, 28, (u32) 0xc0000000); /* inc[4] */
- MCD_SET_VAR(taskChan, 29, (u32) 0x80000000); /* inc[5] */
- MCD_SET_VAR(taskChan, 30, (u32) 0x80000001); /* inc[6] */
- MCD_SET_VAR(taskChan, 31, (u32) 0x40000000); /* inc[7] */
-
- /* Set the task's Enable bit in its Task Control Register */
- MCD_dmaBar->taskControl[channel] |= (u16) 0x8000;
-}
-
-/* Task 4 */
-
-void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr,
- volatile TaskTableEntry * taskTable, int channel)
-{
- volatile TaskTableEntry *taskChan = taskTable + channel;
-
- MCD_SET_VAR(taskChan, 0, (u32) bDBase); /* var[0] */
- MCD_SET_VAR(taskChan, 3, (u32) currBD); /* var[3] */
- MCD_SET_VAR(taskChan, 6, (u32) rcvFifoPtr); /* var[6] */
- MCD_SET_VAR(taskChan, 1, (u32) 0x00000000); /* var[1] */
- MCD_SET_VAR(taskChan, 2, (u32) 0x00000000); /* var[2] */
- MCD_SET_VAR(taskChan, 4, (u32) 0x00000000); /* var[4] */
- MCD_SET_VAR(taskChan, 5, (u32) 0x00000000); /* var[5] */
- MCD_SET_VAR(taskChan, 7, (u32) 0x00000000); /* var[7] */
- MCD_SET_VAR(taskChan, 8, (u32) 0x00000000); /* var[8] */
- MCD_SET_VAR(taskChan, 9, (u32) 0x0000ffff); /* var[9] */
- MCD_SET_VAR(taskChan, 10, (u32) 0x30000000); /* var[10] */
- MCD_SET_VAR(taskChan, 11, (u32) 0x0fffffff); /* var[11] */
- MCD_SET_VAR(taskChan, 12, (u32) 0x00000008); /* var[12] */
- MCD_SET_VAR(taskChan, 24, (u32) 0x00000000); /* inc[0] */
- MCD_SET_VAR(taskChan, 25, (u32) 0x60000000); /* inc[1] */
- MCD_SET_VAR(taskChan, 26, (u32) 0x20000004); /* inc[2] */
- MCD_SET_VAR(taskChan, 27, (u32) 0x40000000); /* inc[3] */
-
- /* Set the task's Enable bit in its Task Control Register */
- MCD_dmaBar->taskControl[channel] |= (u16) 0x8000;
-}
-
-/* Task 5 */
-
-void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr,
- volatile TaskTableEntry * taskTable, int channel)
-{
- volatile TaskTableEntry *taskChan = taskTable + channel;
-
- MCD_SET_VAR(taskChan, 0, (u32) bDBase); /* var[0] */
- MCD_SET_VAR(taskChan, 3, (u32) currBD); /* var[3] */
- MCD_SET_VAR(taskChan, 11, (u32) xmitFifoPtr); /* var[11] */
- MCD_SET_VAR(taskChan, 1, (u32) 0x00000000); /* var[1] */
- MCD_SET_VAR(taskChan, 2, (u32) 0x00000000); /* var[2] */
- MCD_SET_VAR(taskChan, 4, (u32) 0x00000000); /* var[4] */
- MCD_SET_VAR(taskChan, 5, (u32) 0x00000000); /* var[5] */
- MCD_SET_VAR(taskChan, 6, (u32) 0x00000000); /* var[6] */
- MCD_SET_VAR(taskChan, 7, (u32) 0x00000000); /* var[7] */
- MCD_SET_VAR(taskChan, 8, (u32) 0x00000000); /* var[8] */
- MCD_SET_VAR(taskChan, 9, (u32) 0x00000000); /* var[9] */
- MCD_SET_VAR(taskChan, 10, (u32) 0x00000000); /* var[10] */
- MCD_SET_VAR(taskChan, 12, (u32) 0x00000000); /* var[12] */
- MCD_SET_VAR(taskChan, 13, (u32) 0x0000ffff); /* var[13] */
- MCD_SET_VAR(taskChan, 14, (u32) 0xffffffff); /* var[14] */
- MCD_SET_VAR(taskChan, 15, (u32) 0x00000004); /* var[15] */
- MCD_SET_VAR(taskChan, 16, (u32) 0x00000008); /* var[16] */
- MCD_SET_VAR(taskChan, 24, (u32) 0x00000000); /* inc[0] */
- MCD_SET_VAR(taskChan, 25, (u32) 0x60000000); /* inc[1] */
- MCD_SET_VAR(taskChan, 26, (u32) 0x40000000); /* inc[2] */
- MCD_SET_VAR(taskChan, 27, (u32) 0xc000fffc); /* inc[3] */
- MCD_SET_VAR(taskChan, 28, (u32) 0xe0000004); /* inc[4] */
- MCD_SET_VAR(taskChan, 29, (u32) 0x80000000); /* inc[5] */
- MCD_SET_VAR(taskChan, 30, (u32) 0x4000ffff); /* inc[6] */
- MCD_SET_VAR(taskChan, 31, (u32) 0xe0000001); /* inc[7] */
-
- /* Set the task's Enable bit in its Task Control Register */
- MCD_dmaBar->taskControl[channel] |= (u16) 0x8000;
-}
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index a75572f..48811ea 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -5,7 +5,6 @@
obj-$(CONFIG_DMA) += dma-uclass.o
-obj-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
obj-$(CONFIG_APBH_DMA) += apbh_dma.o
obj-$(CONFIG_BCM6348_IUDMA) += bcm6348-iudma.o
obj-$(CONFIG_FSL_DMA) += fsl_dma.o
diff --git a/drivers/dma/ti/Makefile b/drivers/dma/ti/Makefile
index 6807eb8..f4e0271 100644
--- a/drivers/dma/ti/Makefile
+++ b/drivers/dma/ti/Makefile
@@ -8,3 +8,4 @@
k3-psil-data-$(CONFIG_SOC_K3_J721S2) += k3-psil-j721s2.o
k3-psil-data-$(CONFIG_SOC_K3_AM642) += k3-psil-am64.o
k3-psil-data-$(CONFIG_SOC_K3_AM625) += k3-psil-am62.o
+k3-psil-data-$(CONFIG_SOC_K3_AM62A7) += k3-psil-am62a.o
diff --git a/drivers/dma/ti/k3-psil-am62a.c b/drivers/dma/ti/k3-psil-am62a.c
new file mode 100644
index 0000000..ca9d71f
--- /dev/null
+++ b/drivers/dma/ti/k3-psil-am62a.c
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com
+ */
+
+#include <linux/kernel.h>
+
+#include "k3-psil-priv.h"
+
+#define PSIL_PDMA_XY_TR(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .mapped_channel_id = -1, \
+ .default_flow_id = -1, \
+ }, \
+ }
+
+#define PSIL_PDMA_XY_PKT(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .mapped_channel_id = -1, \
+ .default_flow_id = -1, \
+ .pkt_mode = 1, \
+ }, \
+ }
+
+#define PSIL_ETHERNET(x, ch, flow_base, flow_cnt) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_NATIVE, \
+ .pkt_mode = 1, \
+ .needs_epib = 1, \
+ .psd_size = 16, \
+ .mapped_channel_id = ch, \
+ .flow_start = flow_base, \
+ .flow_num = flow_cnt, \
+ .default_flow_id = flow_base, \
+ }, \
+ }
+
+#define PSIL_SAUL(x, ch, flow_base, flow_cnt, default_flow, tx) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_NATIVE, \
+ .pkt_mode = 1, \
+ .needs_epib = 1, \
+ .psd_size = 64, \
+ .mapped_channel_id = ch, \
+ .flow_start = flow_base, \
+ .flow_num = flow_cnt, \
+ .default_flow_id = default_flow, \
+ .notdpkt = tx, \
+ }, \
+ }
+
+#define PSIL_PDMA_MCASP(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .pdma_acc32 = 1, \
+ .pdma_burst = 1, \
+ }, \
+ }
+
+#define PSIL_CSI2RX(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_NATIVE, \
+ }, \
+ }
+
+/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
+static struct psil_ep am62a_src_ep_map[] = {
+ /* SAUL */
+ PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
+ PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
+ PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
+ PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
+ /* PDMA_MAIN0 - SPI0-3 */
+ PSIL_PDMA_XY_PKT(0x4302),
+ PSIL_PDMA_XY_PKT(0x4303),
+ PSIL_PDMA_XY_PKT(0x4304),
+ PSIL_PDMA_XY_PKT(0x4305),
+ PSIL_PDMA_XY_PKT(0x4306),
+ PSIL_PDMA_XY_PKT(0x4307),
+ PSIL_PDMA_XY_PKT(0x4308),
+ PSIL_PDMA_XY_PKT(0x4309),
+ PSIL_PDMA_XY_PKT(0x430a),
+ PSIL_PDMA_XY_PKT(0x430b),
+ PSIL_PDMA_XY_PKT(0x430c),
+ PSIL_PDMA_XY_PKT(0x430d),
+ /* PDMA_MAIN1 - UART0-6 */
+ PSIL_PDMA_XY_PKT(0x4400),
+ PSIL_PDMA_XY_PKT(0x4401),
+ PSIL_PDMA_XY_PKT(0x4402),
+ PSIL_PDMA_XY_PKT(0x4403),
+ PSIL_PDMA_XY_PKT(0x4404),
+ PSIL_PDMA_XY_PKT(0x4405),
+ PSIL_PDMA_XY_PKT(0x4406),
+ /* PDMA_MAIN2 - MCASP0-2 */
+ PSIL_PDMA_MCASP(0x4500),
+ PSIL_PDMA_MCASP(0x4501),
+ PSIL_PDMA_MCASP(0x4502),
+ /* CPSW3G */
+ PSIL_ETHERNET(0x4600, 19, 19, 16),
+ /* CSI2RX */
+ PSIL_CSI2RX(0x5000),
+ PSIL_CSI2RX(0x5001),
+ PSIL_CSI2RX(0x5002),
+ PSIL_CSI2RX(0x5003),
+ PSIL_CSI2RX(0x5004),
+ PSIL_CSI2RX(0x5005),
+ PSIL_CSI2RX(0x5006),
+ PSIL_CSI2RX(0x5007),
+ PSIL_CSI2RX(0x5008),
+ PSIL_CSI2RX(0x5009),
+ PSIL_CSI2RX(0x500a),
+ PSIL_CSI2RX(0x500b),
+ PSIL_CSI2RX(0x500c),
+ PSIL_CSI2RX(0x500d),
+ PSIL_CSI2RX(0x500e),
+ PSIL_CSI2RX(0x500f),
+ PSIL_CSI2RX(0x5010),
+ PSIL_CSI2RX(0x5011),
+ PSIL_CSI2RX(0x5012),
+ PSIL_CSI2RX(0x5013),
+ PSIL_CSI2RX(0x5014),
+ PSIL_CSI2RX(0x5015),
+ PSIL_CSI2RX(0x5016),
+ PSIL_CSI2RX(0x5017),
+ PSIL_CSI2RX(0x5018),
+ PSIL_CSI2RX(0x5019),
+ PSIL_CSI2RX(0x501a),
+ PSIL_CSI2RX(0x501b),
+ PSIL_CSI2RX(0x501c),
+ PSIL_CSI2RX(0x501d),
+ PSIL_CSI2RX(0x501e),
+ PSIL_CSI2RX(0x501f),
+};
+
+/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
+static struct psil_ep am62a_dst_ep_map[] = {
+ /* SAUL */
+ PSIL_SAUL(0xf500, 27, 83, 8, 83, 1),
+ PSIL_SAUL(0xf501, 28, 91, 8, 91, 1),
+ /* PDMA_MAIN0 - SPI0-3 */
+ PSIL_PDMA_XY_PKT(0xc302),
+ PSIL_PDMA_XY_PKT(0xc303),
+ PSIL_PDMA_XY_PKT(0xc304),
+ PSIL_PDMA_XY_PKT(0xc305),
+ PSIL_PDMA_XY_PKT(0xc306),
+ PSIL_PDMA_XY_PKT(0xc307),
+ PSIL_PDMA_XY_PKT(0xc308),
+ PSIL_PDMA_XY_PKT(0xc309),
+ PSIL_PDMA_XY_PKT(0xc30a),
+ PSIL_PDMA_XY_PKT(0xc30b),
+ PSIL_PDMA_XY_PKT(0xc30c),
+ PSIL_PDMA_XY_PKT(0xc30d),
+ /* PDMA_MAIN1 - UART0-6 */
+ PSIL_PDMA_XY_PKT(0xc400),
+ PSIL_PDMA_XY_PKT(0xc401),
+ PSIL_PDMA_XY_PKT(0xc402),
+ PSIL_PDMA_XY_PKT(0xc403),
+ PSIL_PDMA_XY_PKT(0xc404),
+ PSIL_PDMA_XY_PKT(0xc405),
+ PSIL_PDMA_XY_PKT(0xc406),
+ /* PDMA_MAIN2 - MCASP0-2 */
+ PSIL_PDMA_MCASP(0xc500),
+ PSIL_PDMA_MCASP(0xc501),
+ PSIL_PDMA_MCASP(0xc502),
+ /* CPSW3G */
+ PSIL_ETHERNET(0xc600, 19, 19, 8),
+ PSIL_ETHERNET(0xc601, 20, 27, 8),
+ PSIL_ETHERNET(0xc602, 21, 35, 8),
+ PSIL_ETHERNET(0xc603, 22, 43, 8),
+ PSIL_ETHERNET(0xc604, 23, 51, 8),
+ PSIL_ETHERNET(0xc605, 24, 59, 8),
+ PSIL_ETHERNET(0xc606, 25, 67, 8),
+ PSIL_ETHERNET(0xc607, 26, 75, 8),
+};
+
+struct psil_ep_map am62a_ep_map = {
+ .name = "am62a",
+ .src = am62a_src_ep_map,
+ .src_count = ARRAY_SIZE(am62a_src_ep_map),
+ .dst = am62a_dst_ep_map,
+ .dst_count = ARRAY_SIZE(am62a_dst_ep_map),
+};
diff --git a/drivers/dma/ti/k3-psil-priv.h b/drivers/dma/ti/k3-psil-priv.h
index 563bc57..83f873b 100644
--- a/drivers/dma/ti/k3-psil-priv.h
+++ b/drivers/dma/ti/k3-psil-priv.h
@@ -42,5 +42,6 @@
extern struct psil_ep_map j721s2_ep_map;
extern struct psil_ep_map am64_ep_map;
extern struct psil_ep_map am62_ep_map;
+extern struct psil_ep_map am62a_ep_map;
#endif /* K3_PSIL_PRIV_H_ */
diff --git a/drivers/dma/ti/k3-psil.c b/drivers/dma/ti/k3-psil.c
index 963321a..d4d4fed 100644
--- a/drivers/dma/ti/k3-psil.c
+++ b/drivers/dma/ti/k3-psil.c
@@ -26,6 +26,8 @@
soc_ep_map = &am64_ep_map;
else if (IS_ENABLED(CONFIG_SOC_K3_AM625))
soc_ep_map = &am62_ep_map;
+ else if (IS_ENABLED(CONFIG_SOC_K3_AM62A7))
+ soc_ep_map = &am62a_ep_map;
}
if (thread_id & K3_PSIL_DST_THREAD_ID_OFFSET && soc_ep_map->dst) {
diff --git a/drivers/fastboot/Kconfig b/drivers/fastboot/Kconfig
index 837c6f1..11fc0fe 100644
--- a/drivers/fastboot/Kconfig
+++ b/drivers/fastboot/Kconfig
@@ -1,4 +1,5 @@
menu "Fastboot support"
+ depends on CMDLINE
config FASTBOOT
bool
diff --git a/drivers/fastboot/fb_common.c b/drivers/fastboot/fb_common.c
index 4e9d9b7..3576b06 100644
--- a/drivers/fastboot/fb_common.c
+++ b/drivers/fastboot/fb_common.c
@@ -91,6 +91,7 @@
*/
int __weak fastboot_set_reboot_flag(enum fastboot_reboot_reason reason)
{
+ int ret;
static const char * const boot_cmds[] = {
[FASTBOOT_REBOOT_REASON_BOOTLOADER] = "bootonce-bootloader",
[FASTBOOT_REBOOT_REASON_FASTBOOTD] = "boot-fastboot",
@@ -105,7 +106,18 @@
if (reason >= FASTBOOT_REBOOT_REASONS_COUNT)
return -EINVAL;
- return bcb_write_reboot_reason(mmc_dev, "misc", boot_cmds[reason]);
+ ret = bcb_find_partition_and_load("mmc", mmc_dev, "misc");
+ if (ret)
+ goto out;
+
+ ret = bcb_set(BCB_FIELD_COMMAND, boot_cmds[reason]);
+ if (ret)
+ goto out;
+
+ ret = bcb_store();
+out:
+ bcb_reset();
+ return ret;
}
/**
diff --git a/drivers/firmware/scmi/sandbox-scmi_agent.c b/drivers/firmware/scmi/sandbox-scmi_agent.c
index d131809..cc9011c 100644
--- a/drivers/firmware/scmi/sandbox-scmi_agent.c
+++ b/drivers/firmware/scmi/sandbox-scmi_agent.c
@@ -66,10 +66,10 @@
};
static u8 protocols[] = {
- SCMI_PROTOCOL_ID_POWER_DOMAIN,
- SCMI_PROTOCOL_ID_CLOCK,
- SCMI_PROTOCOL_ID_RESET_DOMAIN,
- SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN,
+ CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN, (SCMI_PROTOCOL_ID_POWER_DOMAIN,))
+ CONFIG_IS_ENABLED(CLK_SCMI, (SCMI_PROTOCOL_ID_CLOCK,))
+ CONFIG_IS_ENABLED(RESET_SCMI, (SCMI_PROTOCOL_ID_RESET_DOMAIN,))
+ CONFIG_IS_ENABLED(DM_REGULATOR_SCMI, (SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN,))
};
#define NUM_PROTOCOLS ARRAY_SIZE(protocols)
@@ -1124,6 +1124,13 @@
return chan->channel_id;
}
+static int sandbox_proto_not_supported(struct scmi_msg *msg)
+{
+ *(u32 *)msg->out_msg = SCMI_NOT_SUPPORTED;
+
+ return 0;
+}
+
static int sandbox_scmi_test_process_msg(struct udevice *dev,
struct scmi_channel *channel,
struct scmi_msg *msg)
@@ -1160,6 +1167,9 @@
}
break;
case SCMI_PROTOCOL_ID_POWER_DOMAIN:
+ if (!CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN))
+ return sandbox_proto_not_supported(msg);
+
switch (msg->message_id) {
case SCMI_PROTOCOL_VERSION:
return sandbox_scmi_pwd_protocol_version(dev, msg);
@@ -1180,6 +1190,9 @@
}
break;
case SCMI_PROTOCOL_ID_CLOCK:
+ if (!CONFIG_IS_ENABLED(CLK_SCMI))
+ return sandbox_proto_not_supported(msg);
+
switch (msg->message_id) {
case SCMI_PROTOCOL_ATTRIBUTES:
return sandbox_scmi_clock_protocol_attribs(dev, msg);
@@ -1196,6 +1209,9 @@
}
break;
case SCMI_PROTOCOL_ID_RESET_DOMAIN:
+ if (!CONFIG_IS_ENABLED(RESET_SCMI))
+ return sandbox_proto_not_supported(msg);
+
switch (msg->message_id) {
case SCMI_RESET_DOMAIN_ATTRIBUTES:
return sandbox_scmi_rd_attribs(dev, msg);
@@ -1206,6 +1222,9 @@
}
break;
case SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN:
+ if (!CONFIG_IS_ENABLED(DM_REGULATOR_SCMI))
+ return sandbox_proto_not_supported(msg);
+
switch (msg->message_id) {
case SCMI_VOLTAGE_DOMAIN_ATTRIBUTES:
return sandbox_scmi_voltd_attribs(dev, msg);
@@ -1224,8 +1243,7 @@
case SCMI_PROTOCOL_ID_SYSTEM:
case SCMI_PROTOCOL_ID_PERF:
case SCMI_PROTOCOL_ID_SENSOR:
- *(u32 *)msg->out_msg = SCMI_NOT_SUPPORTED;
- return 0;
+ return sandbox_proto_not_supported(msg);
default:
break;
}
diff --git a/drivers/firmware/scmi/sandbox-scmi_devices.c b/drivers/firmware/scmi/sandbox-scmi_devices.c
index facb5b0..603e2bb 100644
--- a/drivers/firmware/scmi/sandbox-scmi_devices.c
+++ b/drivers/firmware/scmi/sandbox-scmi_devices.c
@@ -62,12 +62,13 @@
if (!devices)
return 0;
- for (n = 0; n < SCMI_TEST_DEVICES_RD_COUNT; n++) {
- int ret2 = reset_free(devices->reset + n);
+ if (CONFIG_IS_ENABLED(RESET_SCMI))
+ for (n = 0; n < SCMI_TEST_DEVICES_RD_COUNT; n++) {
+ int ret2 = reset_free(devices->reset + n);
- if (ret2 && !ret)
- ret = ret2;
- }
+ if (ret2 && !ret)
+ ret = ret2;
+ }
return ret;
}
@@ -89,39 +90,53 @@
.regul_count = SCMI_TEST_DEVICES_VOLTD_COUNT,
};
- ret = power_domain_get_by_index(dev, priv->devices.pwdom, 0);
- if (ret) {
- dev_err(dev, "%s: Failed on power domain\n", __func__);
- return ret;
- }
-
- for (n = 0; n < SCMI_TEST_DEVICES_CLK_COUNT; n++) {
- ret = clk_get_by_index(dev, n, priv->devices.clk + n);
+ if (CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN)) {
+ ret = power_domain_get_by_index(dev, priv->devices.pwdom, 0);
if (ret) {
- dev_err(dev, "%s: Failed on clk %zu\n", __func__, n);
+ dev_err(dev, "%s: Failed on power domain\n", __func__);
return ret;
}
}
- for (n = 0; n < SCMI_TEST_DEVICES_RD_COUNT; n++) {
- ret = reset_get_by_index(dev, n, priv->devices.reset + n);
- if (ret) {
- dev_err(dev, "%s: Failed on reset %zu\n", __func__, n);
- goto err_reset;
+ if (CONFIG_IS_ENABLED(CLK_SCMI)) {
+ for (n = 0; n < SCMI_TEST_DEVICES_CLK_COUNT; n++) {
+ ret = clk_get_by_index(dev, n, priv->devices.clk + n);
+ if (ret) {
+ dev_err(dev, "%s: Failed on clk %zu\n",
+ __func__, n);
+ return ret;
+ }
}
}
- for (n = 0; n < SCMI_TEST_DEVICES_VOLTD_COUNT; n++) {
- char name[32];
+ if (CONFIG_IS_ENABLED(RESET_SCMI)) {
+ for (n = 0; n < SCMI_TEST_DEVICES_RD_COUNT; n++) {
+ ret = reset_get_by_index(dev, n,
+ priv->devices.reset + n);
+ if (ret) {
+ dev_err(dev, "%s: Failed on reset %zu\n",
+ __func__, n);
+ goto err_reset;
+ }
+ }
+ }
- ret = snprintf(name, sizeof(name), "regul%zu-supply", n);
- assert(ret >= 0 && ret < sizeof(name));
+ if (CONFIG_IS_ENABLED(DM_REGULATOR_SCMI)) {
+ for (n = 0; n < SCMI_TEST_DEVICES_VOLTD_COUNT; n++) {
+ char name[32];
- ret = device_get_supply_regulator(dev, name,
- priv->devices.regul + n);
- if (ret) {
- dev_err(dev, "%s: Failed on voltd %zu\n", __func__, n);
- goto err_regul;
+ ret = snprintf(name, sizeof(name), "regul%zu-supply",
+ n);
+ assert(ret >= 0 && ret < sizeof(name));
+
+ ret = device_get_supply_regulator(dev, name,
+ priv->devices.regul
+ + n);
+ if (ret) {
+ dev_err(dev, "%s: Failed on voltd %zu\n",
+ __func__, n);
+ goto err_regul;
+ }
}
}
@@ -130,8 +145,9 @@
err_regul:
n = SCMI_TEST_DEVICES_RD_COUNT;
err_reset:
- for (; n > 0; n--)
- reset_free(priv->devices.reset + n - 1);
+ if (CONFIG_IS_ENABLED(RESET_SCMI))
+ for (; n > 0; n--)
+ reset_free(priv->devices.reset + n - 1);
return ret;
}
diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c
index b6c7178..eaa1d69 100644
--- a/drivers/i2c/stm32f7_i2c.c
+++ b/drivers/i2c/stm32f7_i2c.c
@@ -20,6 +20,7 @@
#include <linux/err.h>
#include <linux/io.h>
#include <linux/printk.h>
+#include <linux/time.h>
/* STM32 I2C registers */
struct stm32_i2c_regs {
@@ -121,8 +122,6 @@
#define STM32_SCLH_MAX BIT(8)
#define STM32_SCLL_MAX BIT(8)
-#define STM32_NSEC_PER_SEC 1000000000L
-
/**
* struct stm32_i2c_spec - private i2c specification timing
* @rate: I2C bus speed (Hz)
@@ -591,7 +590,7 @@
struct stm32_i2c_timings *s)
{
struct stm32_i2c_timings *v;
- u32 i2cbus = DIV_ROUND_CLOSEST(STM32_NSEC_PER_SEC,
+ u32 i2cbus = DIV_ROUND_CLOSEST(NSEC_PER_SEC,
setup->speed_freq);
u32 clk_error_prev = i2cbus;
u32 clk_min, clk_max;
@@ -607,8 +606,8 @@
dnf_delay = setup->dnf * i2cclk;
tsync = af_delay_min + dnf_delay + (2 * i2cclk);
- clk_max = STM32_NSEC_PER_SEC / specs->rate_min;
- clk_min = STM32_NSEC_PER_SEC / specs->rate_max;
+ clk_max = NSEC_PER_SEC / specs->rate_min;
+ clk_min = NSEC_PER_SEC / specs->rate_max;
/*
* Among Prescaler possibilities discovered above figures out SCL Low
@@ -686,7 +685,7 @@
const struct stm32_i2c_spec *specs;
struct stm32_i2c_timings *v, *_v;
struct list_head solutions;
- u32 i2cclk = DIV_ROUND_CLOSEST(STM32_NSEC_PER_SEC, setup->clock_src);
+ u32 i2cclk = DIV_ROUND_CLOSEST(NSEC_PER_SEC, setup->clock_src);
int ret;
specs = get_specs(setup->speed_freq);
diff --git a/drivers/memory/stm32-fmc2-ebi.c b/drivers/memory/stm32-fmc2-ebi.c
index 212bb4f..a722a38 100644
--- a/drivers/memory/stm32-fmc2-ebi.c
+++ b/drivers/memory/stm32-fmc2-ebi.c
@@ -14,6 +14,7 @@
#include <linux/err.h>
#include <linux/iopoll.h>
#include <linux/ioport.h>
+#include <linux/time.h>
/* FMC2 Controller Registers */
#define FMC2_BCR1 0x0
@@ -90,8 +91,6 @@
#define FMC2_BTR_DATLAT_MAX 0xf
#define FMC2_PCSCNTR_CSCOUNT_MAX 0xff
-#define FMC2_NSEC_PER_SEC 1000000000L
-
enum stm32_fmc2_ebi_bank {
FMC2_EBI1 = 0,
FMC2_EBI2,
@@ -279,7 +278,7 @@
int cs, u32 setup)
{
unsigned long hclk = clk_get_rate(&ebi->clk);
- unsigned long hclkp = FMC2_NSEC_PER_SEC / (hclk / 1000);
+ unsigned long hclkp = NSEC_PER_SEC / (hclk / 1000);
return DIV_ROUND_UP(setup * 1000, hclkp);
}
diff --git a/drivers/memory/ti-aemif.c b/drivers/memory/ti-aemif.c
index c4bc88c..41325eb 100644
--- a/drivers/memory/ti-aemif.c
+++ b/drivers/memory/ti-aemif.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <asm/arch/hardware.h>
#include <asm/ti-common/ti-aemif.h>
#define AEMIF_WAITCYCLE_CONFIG (KS2_AEMIF_CNTRL_BASE + 0x4)
diff --git a/drivers/mmc/octeontx_hsmmc.h b/drivers/mmc/octeontx_hsmmc.h
index 70844b1..9849121 100644
--- a/drivers/mmc/octeontx_hsmmc.h
+++ b/drivers/mmc/octeontx_hsmmc.h
@@ -32,8 +32,6 @@
*/
#define MMC_TIMEOUT_SHORT 20
-#define NSEC_PER_SEC 1000000000L
-
#define MAX_NO_OF_TAPS 64
#define EXT_CSD_POWER_CLASS 187 /* R/W */
diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
index c638980..c2fc80b 100644
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -31,7 +31,7 @@
else
ifneq ($(mtd-y),)
-obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd.o
+obj-$(CONFIG_SPL_MTD) += mtd.o
endif
obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += nand/
obj-$(CONFIG_SPL_ONENAND_SUPPORT) += onenand/
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index a13e6f5..bb9994b 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -447,6 +447,22 @@
This enables the driver for the NAND flash device found on
PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
+config NAND_SANDBOX
+ bool "Support for NAND in sandbox"
+ depends on SANDBOX
+ select SYS_NAND_SELF_INIT
+ select SPL_SYS_NAND_SELF_INIT
+ select SPL_NAND_INIT
+ select SYS_NAND_SOFT_ECC
+ select BCH
+ select NAND_ECC_BCH
+ imply CMD_NAND
+ help
+ Enable a dummy NAND driver for sandbox. It simulates any number of
+ arbitrary NAND chips with a RAM buffer. It will also inject errors to
+ test ECC. At the moment, only 8-bit busses and single-chip devices are
+ supported.
+
config NAND_SUNXI
bool "Support for NAND on Allwinner SoCs"
default ARCH_SUNXI
@@ -659,20 +675,13 @@
And fetching device parameters flashed on device, by parsing
ONFI parameter page.
-config SYS_NAND_PAGE_COUNT
- hex "NAND chip page count"
- depends on SPL_NAND_SUPPORT && (NAND_ATMEL || NAND_MXC || \
- SPL_NAND_AM33XX_BCH || SPL_NAND_LOAD || SPL_NAND_SIMPLE || \
- NAND_OMAP_GPMC)
- help
- Number of pages in the NAND chip.
-
config SYS_NAND_PAGE_SIZE
hex "NAND chip page size"
depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \
SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \
MVEBU_SPL_BOOT_DEVICE_NAND || \
- (NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER
+ (NAND_ATMEL && SPL_NAND_SUPPORT) || \
+ SPL_GENERATE_ATMEL_PMECC_HEADER || NAND_SANDBOX
depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC && !NAND_MT7621
help
Number of data bytes in one page for the NAND chip on the
diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
index add2b4c..ddbba89 100644
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -70,6 +70,7 @@
obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o
obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
+obj-$(CONFIG_NAND_SANDBOX) += sand_nand.o
obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o
obj-$(CONFIG_NAND_MXIC) += mxic_nand.o
obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o
diff --git a/drivers/mtd/nand/raw/am335x_spl_bch.c b/drivers/mtd/nand/raw/am335x_spl_bch.c
index 6ab3f1f..6831af9 100644
--- a/drivers/mtd/nand/raw/am335x_spl_bch.c
+++ b/drivers/mtd/nand/raw/am335x_spl_bch.c
@@ -11,6 +11,7 @@
#include <common.h>
#include <nand.h>
+#include <system-constants.h>
#include <asm/io.h>
#include <linux/delay.h>
#include <linux/mtd/nand_ecc.h>
@@ -32,7 +33,7 @@
u8 cmd)
{
struct nand_chip *this = mtd_to_nand(mtd);
- int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+ int page_addr = page + block * SYS_NAND_BLOCK_PAGES;
void (*hwctrl)(struct mtd_info *mtd, int cmd,
unsigned int ctrl) = this->cmd_ctrl;
@@ -217,6 +218,11 @@
nand_command(0, 0, 0, NAND_CMD_RESET);
}
+unsigned int nand_page_size(void)
+{
+ return nand_to_mtd(&nand_chip)->writesize;
+}
+
/* Unselect after operation */
void nand_deselect(void)
{
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index fa962ba..a2151f9 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -64,6 +64,7 @@
#include <linux/mfd/syscon/atmel-smc.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/mtd.h>
+#include <linux/time.h>
#include <mach/at91_sfr.h>
#include <nand.h>
#include <regmap.h>
@@ -71,8 +72,6 @@
#include "pmecc.h"
-#define NSEC_PER_SEC 1000000000L
-
#define ATMEL_HSMC_NFC_CFG 0x0
#define ATMEL_HSMC_NFC_CFG_SPARESIZE(x) (((x) / 4) << 24)
#define ATMEL_HSMC_NFC_CFG_SPARESIZE_MASK GENMASK(30, 24)
@@ -352,40 +351,6 @@
return ret;
}
-static void iowrite8_rep(void *addr, const uint8_t *buf, int len)
-{
- int i;
-
- for (i = 0; i < len; i++)
- writeb(buf[i], addr);
-}
-
-static void ioread8_rep(void *addr, uint8_t *buf, int len)
-{
- int i;
-
- for (i = 0; i < len; i++)
- buf[i] = readb(addr);
-}
-
-static void ioread16_rep(void *addr, void *buf, int len)
-{
- int i;
- u16 *p = (u16 *)buf;
-
- for (i = 0; i < len; i++)
- p[i] = readw(addr);
-}
-
-static void iowrite16_rep(void *addr, const void *buf, int len)
-{
- int i;
- u16 *p = (u16 *)buf;
-
- for (i = 0; i < len; i++)
- writew(p[i], addr);
-}
-
static u8 atmel_nand_read_byte(struct mtd_info *mtd)
{
struct nand_chip *chip = mtd_to_nand(mtd);
diff --git a/drivers/mtd/nand/raw/atmel_nand.c b/drivers/mtd/nand/raw/atmel_nand.c
index 6b17e74..6d94e7a 100644
--- a/drivers/mtd/nand/raw/atmel_nand.c
+++ b/drivers/mtd/nand/raw/atmel_nand.c
@@ -12,6 +12,7 @@
#include <common.h>
#include <log.h>
+#include <system-constants.h>
#include <asm/gpio.h>
#include <asm/arch/gpio.h>
#include <dm/device_compat.h>
@@ -1258,7 +1259,7 @@
static int nand_command(int block, int page, uint32_t offs, u8 cmd)
{
struct nand_chip *this = mtd_to_nand(mtd);
- int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+ int page_addr = page + block * SYS_NAND_BLOCK_PAGES;
void (*hwctrl)(struct mtd_info *mtd, int cmd,
unsigned int ctrl) = this->cmd_ctrl;
@@ -1359,7 +1360,7 @@
if (nand_chip.select_chip)
nand_chip.select_chip(mtd, 0);
- page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+ page_addr = page + block * SYS_NAND_BLOCK_PAGES;
hwctrl(mtd, NAND_CMD_ERASE1, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
/* Row address */
hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE | NAND_CTRL_CHANGE);
@@ -1451,6 +1452,11 @@
nand_chip.select_chip(mtd, 0);
}
+unsigned int nand_page_size(void)
+{
+ return nand_to_mtd(&nand_chip)->writesize;
+}
+
void nand_deselect(void)
{
if (nand_chip.select_chip)
diff --git a/drivers/mtd/nand/raw/denali_spl.c b/drivers/mtd/nand/raw/denali_spl.c
index 690279c..165a233 100644
--- a/drivers/mtd/nand/raw/denali_spl.c
+++ b/drivers/mtd/nand/raw/denali_spl.c
@@ -234,4 +234,9 @@
return 0;
}
+unsigned int nand_page_size(void)
+{
+ return page_size;
+}
+
void nand_deselect(void) {}
diff --git a/drivers/mtd/nand/raw/fsl_ifc_spl.c b/drivers/mtd/nand/raw/fsl_ifc_spl.c
index c67065e..69d26f1 100644
--- a/drivers/mtd/nand/raw/fsl_ifc_spl.c
+++ b/drivers/mtd/nand/raw/fsl_ifc_spl.c
@@ -106,6 +106,8 @@
return __raw_readw((u16 *)marker) != 0xffff;
}
+static int saved_page_size;
+
int nand_spl_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
{
struct fsl_ifc_fcm *gregs = (void *)CFG_SYS_IFC_ADDR;
@@ -150,6 +152,7 @@
if (port_size == 8)
bad_marker = 5;
}
+ saved_page_size = page_size;
ver = ifc_in32(&gregs->ifc_rev);
if (ver >= FSL_IFC_V2_0_0)
@@ -300,6 +303,11 @@
#ifndef CONFIG_TPL_NAND_INIT
void nand_init(void)
{
+}
+
+unsigned int nand_page_size(void)
+{
+ return saved_page_size;
}
void nand_deselect(void)
diff --git a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
index ac2e669..f8ae216 100644
--- a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
@@ -765,4 +765,9 @@
return 0;
}
+unsigned int nand_page_size(void)
+{
+ return BYTES_PER_PAGE;
+}
+
#endif /* CONFIG_SPL_BUILD */
diff --git a/drivers/mtd/nand/raw/mt7621_nand_spl.c b/drivers/mtd/nand/raw/mt7621_nand_spl.c
index 114fc8b..a2be9ba 100644
--- a/drivers/mtd/nand/raw/mt7621_nand_spl.c
+++ b/drivers/mtd/nand/raw/mt7621_nand_spl.c
@@ -203,6 +203,11 @@
return SZ_2G;
}
+unsigned int nand_page_size(void)
+{
+ return nfc_dev.nand.mtd.writesize;
+}
+
void nand_deselect(void)
{
}
diff --git a/drivers/mtd/nand/raw/mxc_nand_spl.c b/drivers/mtd/nand/raw/mxc_nand_spl.c
index 309e75d..a855c99 100644
--- a/drivers/mtd/nand/raw/mxc_nand_spl.c
+++ b/drivers/mtd/nand/raw/mxc_nand_spl.c
@@ -13,6 +13,7 @@
#include <common.h>
#include <hang.h>
#include <nand.h>
+#include <system-constants.h>
#include <linux/mtd/rawnand.h>
#include <asm/arch/imx-regs.h>
#include <asm/io.h>
@@ -304,13 +305,13 @@
* Check if we have crossed a block boundary, and if so
* check for bad block.
*/
- if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
+ if (!(page % SYS_NAND_BLOCK_PAGES)) {
/*
* Yes, new block. See if this block is good. If not,
* loop until we find a good block.
*/
while (is_badblock(page)) {
- page = page + CONFIG_SYS_NAND_PAGE_COUNT;
+ page = page + SYS_NAND_BLOCK_PAGES;
/* Check i we've reached the end of flash. */
if (page >= maxpages)
return -1;
@@ -350,3 +351,8 @@
void nand_init(void) {}
void nand_deselect(void) {}
+
+unsigned int nand_page_size(void)
+{
+ return CONFIG_SYS_NAND_PAGE_SIZE;
+}
diff --git a/drivers/mtd/nand/raw/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c
index 65eab4c8..fd65772 100644
--- a/drivers/mtd/nand/raw/mxs_nand.c
+++ b/drivers/mtd/nand/raw/mxs_nand.c
@@ -31,6 +31,7 @@
#include <linux/errno.h>
#include <linux/mtd/rawnand.h>
#include <linux/sizes.h>
+#include <linux/time.h>
#include <linux/types.h>
#include <linux/math64.h>
@@ -52,8 +53,6 @@
#endif
#define MXS_NAND_BCH_TIMEOUT 10000
-#define USEC_PER_SEC 1000000
-#define NSEC_PER_SEC 1000000000L
#define TO_CYCLES(duration, period) DIV_ROUND_UP_ULL(duration, period)
diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c
index 3006629..f7d3f02 100644
--- a/drivers/mtd/nand/raw/mxs_nand_spl.c
+++ b/drivers/mtd/nand/raw/mxs_nand_spl.c
@@ -295,6 +295,11 @@
return 0;
}
+unsigned int nand_page_size(void)
+{
+ return nand_to_mtd(&nand_chip)->writesize;
+}
+
void nand_deselect(void)
{
}
diff --git a/drivers/mtd/nand/raw/nand.c b/drivers/mtd/nand/raw/nand.c
index eacd99c..4c18861 100644
--- a/drivers/mtd/nand/raw/nand.c
+++ b/drivers/mtd/nand/raw/nand.c
@@ -60,13 +60,11 @@
sprintf(dev_name[devnum], "nand%d", devnum);
mtd->name = dev_name[devnum];
-#ifdef CONFIG_MTD
/*
* Add MTD device so that we can reference it later
* via the mtdcore infrastructure (e.g. ubi).
*/
add_mtd_device(mtd);
-#endif
total_nand_size += mtd->size / 1024;
@@ -76,6 +74,23 @@
return 0;
}
+void nand_unregister(struct mtd_info *mtd)
+{
+ int devnum = nand_mtd_to_devnum(mtd);
+
+ if (devnum < 0)
+ return;
+
+ if (nand_curr_device == devnum)
+ nand_curr_device = -1;
+
+ total_nand_size -= mtd->size / 1024;
+
+ del_mtd_device(nand_info[devnum]);
+
+ nand_info[devnum] = NULL;
+}
+
#if !CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT)
static void nand_init_chip(int i)
{
@@ -100,6 +115,8 @@
#endif
#ifdef CONFIG_MTD_CONCAT
+struct mtd_info *concat_mtd;
+
static void create_mtd_concat(void)
{
struct mtd_info *nand_info_list[CONFIG_SYS_MAX_NAND_DEVICE];
@@ -114,28 +131,40 @@
}
}
if (nand_devices_found > 1) {
- struct mtd_info *mtd;
char c_mtd_name[16];
/*
* We detected multiple devices. Concatenate them together.
*/
sprintf(c_mtd_name, "nand%d", nand_devices_found);
- mtd = mtd_concat_create(nand_info_list, nand_devices_found,
- c_mtd_name);
+ concat_mtd = mtd_concat_create(nand_info_list,
+ nand_devices_found, c_mtd_name);
- if (mtd == NULL)
+ if (!concat_mtd)
return;
- nand_register(nand_devices_found, mtd);
+ nand_register(nand_devices_found, concat_mtd);
}
return;
}
+
+static void destroy_mtd_concat(void)
+{
+ if (!concat_mtd)
+ return;
+
+ mtd_concat_destroy(concat_mtd);
+ concat_mtd = NULL;
+}
#else
static void create_mtd_concat(void)
{
}
+
+static void destroy_mtd_concat(void)
+{
+}
#endif
unsigned long nand_size(void)
@@ -143,10 +172,10 @@
return total_nand_size;
}
+static int initialized;
+
void nand_init(void)
{
- static int initialized;
-
/*
* Avoid initializing NAND Flash multiple times,
* otherwise it will calculate a wrong total size.
@@ -174,3 +203,22 @@
create_mtd_concat();
}
+
+void nand_reinit(void)
+{
+ int i;
+
+ destroy_mtd_concat();
+ for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
+ assert(!nand_info[i]);
+
+ initialized = 0;
+ nand_init();
+}
+
+unsigned int nand_page_size(void)
+{
+ struct mtd_info *mtd = get_nand_dev_by_index(nand_curr_device);
+
+ return mtd ? mtd->writesize : 1;
+}
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 6b4adcf..c40a0f2 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -245,39 +245,6 @@
chip->write_buf(mtd, (uint8_t *)&word, 2);
}
-static void iowrite8_rep(void *addr, const uint8_t *buf, int len)
-{
- int i;
-
- for (i = 0; i < len; i++)
- writeb(buf[i], addr);
-}
-static void ioread8_rep(void *addr, uint8_t *buf, int len)
-{
- int i;
-
- for (i = 0; i < len; i++)
- buf[i] = readb(addr);
-}
-
-static void ioread16_rep(void *addr, void *buf, int len)
-{
- int i;
- u16 *p = (u16 *) buf;
-
- for (i = 0; i < len; i++)
- p[i] = readw(addr);
-}
-
-static void iowrite16_rep(void *addr, void *buf, int len)
-{
- int i;
- u16 *p = (u16 *) buf;
-
- for (i = 0; i < len; i++)
- writew(p[i], addr);
-}
-
/**
* nand_write_buf - [DEFAULT] write buffer to chip
* @mtd: MTD device structure
@@ -4462,17 +4429,14 @@
else if (chip->jedec_version)
pr_info("%s %s\n", manufacturer_desc->name,
chip->jedec_params.model);
- else
+ else if (manufacturer_desc)
pr_info("%s %s\n", manufacturer_desc->name, type->name);
#else
if (chip->jedec_version)
pr_info("%s %s\n", manufacturer_desc->name,
chip->jedec_params.model);
- else
+ else if (manufacturer_desc)
pr_info("%s %s\n", manufacturer_desc->name, type->name);
-
- pr_info("%s %s\n", manufacturer_desc->name,
- type->name);
#endif
pr_info("%d MiB, %s, erase size: %d KiB, page size: %d, OOB size: %d\n",
diff --git a/drivers/mtd/nand/raw/nand_spl_loaders.c b/drivers/mtd/nand/raw/nand_spl_loaders.c
index 156b44d..db4213e 100644
--- a/drivers/mtd/nand/raw/nand_spl_loaders.c
+++ b/drivers/mtd/nand/raw/nand_spl_loaders.c
@@ -12,8 +12,11 @@
while (block <= lastblock) {
if (!nand_is_bad_block(block)) {
/* Skip bad blocks */
- while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
+ while (size && page < SYS_NAND_BLOCK_PAGES) {
nand_read_page(block, page, dst);
+
+ size -= min(size, CONFIG_SYS_NAND_PAGE_SIZE -
+ page_offset);
/*
* When offs is not aligned to page address the
* extra offset is copied to dst as well. Copy
diff --git a/drivers/mtd/nand/raw/nand_spl_simple.c b/drivers/mtd/nand/raw/nand_spl_simple.c
index 2f3af9e..80d6e0e 100644
--- a/drivers/mtd/nand/raw/nand_spl_simple.c
+++ b/drivers/mtd/nand/raw/nand_spl_simple.c
@@ -6,6 +6,7 @@
#include <common.h>
#include <nand.h>
+#include <system-constants.h>
#include <asm/io.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/rawnand.h>
@@ -27,7 +28,7 @@
u8 cmd)
{
struct nand_chip *this = mtd_to_nand(mtd);
- int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+ int page_addr = page + block * SYS_NAND_BLOCK_PAGES;
while (!this->dev_ready(mtd))
;
@@ -59,7 +60,7 @@
u8 cmd)
{
struct nand_chip *this = mtd_to_nand(mtd);
- int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+ int page_addr = page + block * SYS_NAND_BLOCK_PAGES;
void (*hwctrl)(struct mtd_info *mtd, int cmd,
unsigned int ctrl) = this->cmd_ctrl;
@@ -226,6 +227,11 @@
nand_chip.select_chip(mtd, 0);
}
+unsigned int nand_page_size(void)
+{
+ return nand_to_mtd(&nand_chip)->writesize;
+}
+
/* Unselect after operation */
void nand_deselect(void)
{
diff --git a/drivers/mtd/nand/raw/octeontx_nand.c b/drivers/mtd/nand/raw/octeontx_nand.c
index 65a03d2..3b20685 100644
--- a/drivers/mtd/nand/raw/octeontx_nand.c
+++ b/drivers/mtd/nand/raw/octeontx_nand.c
@@ -24,6 +24,7 @@
#include <linux/mtd/nand_bch.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/rawnand.h>
+#include <linux/time.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/types.h>
@@ -291,7 +292,6 @@
#define OCTEONTX_NAND_DRIVER_NAME "octeontx_nand"
#define NDF_TIMEOUT 1000 /** Timeout in ms */
-#define USEC_PER_SEC 1000000 /** Linux compatibility */
#ifndef NAND_MAX_CHIPS
# define NAND_MAX_CHIPS 8 /** Linux compatibility */
#endif
diff --git a/drivers/mtd/nand/raw/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c
index 1a5ed0d..0e25bd5 100644
--- a/drivers/mtd/nand/raw/omap_gpmc.c
+++ b/drivers/mtd/nand/raw/omap_gpmc.c
@@ -6,6 +6,7 @@
#include <common.h>
#include <log.h>
+#include <system-constants.h>
#include <asm/io.h>
#include <dm/uclass.h>
#include <linux/errno.h>
@@ -1298,7 +1299,7 @@
static int nand_read_page(int block, int page, uchar *dst)
{
- int page_addr = block * CONFIG_SYS_NAND_PAGE_COUNT + page;
+ int page_addr = block * SYS_NAND_BLOCK_PAGES + page;
loff_t ofs = page_addr * CONFIG_SYS_NAND_PAGE_SIZE;
int ret;
size_t len = CONFIG_SYS_NAND_PAGE_SIZE;
diff --git a/drivers/mtd/nand/raw/sand_nand.c b/drivers/mtd/nand/raw/sand_nand.c
new file mode 100644
index 0000000..229d7b5
--- /dev/null
+++ b/drivers/mtd/nand/raw/sand_nand.c
@@ -0,0 +1,707 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) Sean Anderson <seanga2@gmail.com>
+ */
+
+#define LOG_CATEGORY UCLASS_MTD
+#include <errno.h>
+#include <hexdump.h>
+#include <log.h>
+#include <nand.h>
+#include <os.h>
+#include <rand.h>
+#include <spl.h>
+#include <system-constants.h>
+#include <dm/device_compat.h>
+#include <dm/read.h>
+#include <dm/uclass.h>
+#include <asm/bitops.h>
+#include <linux/bitmap.h>
+#include <linux/mtd/rawnand.h>
+#include <linux/sizes.h>
+
+enum sand_nand_state {
+ STATE_READY,
+ STATE_IDLE,
+ STATE_READ,
+ STATE_READ_ID,
+ STATE_READ_ONFI,
+ STATE_PARAM_ONFI,
+ STATE_STATUS,
+ STATE_PROG,
+ STATE_ERASE,
+};
+
+static const char *const state_name[] = {
+ [STATE_READY] = "READY",
+ [STATE_IDLE] = "IDLE",
+ [STATE_READ] = "READ",
+ [STATE_READ_ID] = "READ_ID",
+ [STATE_READ_ONFI] = "READ_ONFI",
+ [STATE_PARAM_ONFI] = "PARAM_ONFI",
+ [STATE_STATUS] = "STATUS",
+ [STATE_PROG] = "PROG",
+ [STATE_ERASE] = "ERASE",
+};
+
+/**
+ * struct sand_nand_chip - Per-device private data
+ * @nand: The nand chip
+ * @node: The next device in this controller
+ * @programmed: Bitmap of whether sectors are programmed
+ * @id: ID to report for NAND_CMD_READID
+ * @id_len: Length of @id
+ * @onfi: Three copies of ONFI parameter page
+ * @status: Status to report for NAND_CMD_STATUS
+ * @chunksize: Size of one "chunk" (page + oob) in bytes
+ * @pageize: Size of one page in bytes
+ * @pages: Total number of pages
+ * @pages_per_erase: Number of pages per eraseblock
+ * @err_count: Number of errors to inject per @err_step_bits of data
+ * @err_step_bits: Number of data bits per error "step"
+ * @err_steps: Number of err steps in a page
+ * @cs: Chip select for this device
+ * @state: Current state of the device
+ * @column: Column of the most-recent command
+ * @page_addr: Page address of the most-recent command
+ * @fd: File descriptor for the backing data
+ * @fd_page_addr: Page address that @fd is seek'd to
+ * @selected: Whether this device is selected
+ * @tmp: "Cache" buffer used to store transferred data before committing it
+ * @tmp_dirty: Whether @tmp is dirty (modified) or clean (all ones)
+ *
+ * Data is stored with the OOB area in-line. For example, with 512-byte pages
+ * and and 16-byte OOB areas, the first page would start at offset 0, the second
+ * at offset 528, the third at offset 1056, and so on
+ */
+struct sand_nand_chip {
+ struct nand_chip nand;
+ struct list_head node;
+ long *programmed;
+ const u8 *id;
+ u32 chunksize, pagesize, pages, pages_per_erase;
+ u32 err_count, err_step_bits, err_steps, ecc_bits;
+ unsigned int cs;
+ enum sand_nand_state state;
+ int column, page_addr, fd, fd_page_addr;
+ bool selected, tmp_dirty;
+ u8 status;
+ u8 id_len;
+ u8 tmp[NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE];
+ u8 onfi[sizeof(struct nand_onfi_params) * 3];
+};
+
+#define SAND_DEBUG(chip, fmt, ...) \
+ dev_dbg((chip)->nand.mtd.dev, "%u (%s): " fmt, (chip)->cs, \
+ state_name[(chip)->state], ##__VA_ARGS__)
+
+static inline void to_state(struct sand_nand_chip *chip,
+ enum sand_nand_state new_state)
+{
+ if (new_state != chip->state)
+ SAND_DEBUG(chip, "to state %s\n", state_name[new_state]);
+ chip->state = new_state;
+}
+
+static inline struct sand_nand_chip *to_sand_nand(struct nand_chip *nand)
+{
+ return container_of(nand, struct sand_nand_chip, nand);
+}
+
+struct sand_nand_priv {
+ struct list_head chips;
+};
+
+static int sand_nand_dev_ready(struct mtd_info *mtd)
+{
+ return 1;
+}
+
+static int sand_nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
+{
+ u8 status;
+
+ return nand_status_op(chip, &status) ?: status;
+}
+
+static int sand_nand_seek(struct sand_nand_chip *chip)
+{
+ if (chip->fd_page_addr == chip->page_addr)
+ return 0;
+
+ if (os_lseek(chip->fd, (off_t)chip->page_addr * chip->chunksize,
+ OS_SEEK_SET) < 0) {
+ SAND_DEBUG(chip, "could not seek: %d\n", errno);
+ return -EIO;
+ }
+
+ chip->fd_page_addr = chip->page_addr;
+ return 0;
+}
+
+static void sand_nand_inject_error(struct sand_nand_chip *chip,
+ unsigned int step, unsigned int pos)
+{
+ int byte, index;
+
+ if (pos < chip->err_step_bits) {
+ __change_bit(step * chip->err_step_bits + pos, chip->tmp);
+ return;
+ }
+
+ /*
+ * Only ECC bytes are covered in the OOB area, so
+ * pretend that those are the only bytes which can have
+ * errors.
+ */
+ byte = (pos - chip->err_step_bits + step * chip->ecc_bits) / 8;
+ index = chip->nand.ecc.layout->eccpos[byte];
+ /* Avoid endianness issues by working with bytes */
+ chip->tmp[chip->pagesize + index] ^= BIT(pos & 0x7);
+}
+
+static int sand_nand_read(struct sand_nand_chip *chip)
+{
+ unsigned int i, stop = 0;
+
+ if (chip->column == chip->pagesize)
+ stop = chip->err_step_bits;
+
+ if (test_bit(chip->page_addr, chip->programmed)) {
+ if (sand_nand_seek(chip))
+ return -EIO;
+
+ if (os_read(chip->fd, chip->tmp, chip->chunksize) !=
+ chip->chunksize) {
+ SAND_DEBUG(chip, "could not read: %d\n", errno);
+ return -EIO;
+ }
+ chip->fd_page_addr++;
+ } else if (chip->tmp_dirty) {
+ memset(chip->tmp + chip->column, 0xff,
+ chip->chunksize - chip->column);
+ }
+
+ /*
+ * Inject some errors; this is Method A from "An Efficient Algorithm for
+ * Sequential Random Sampling" (Vitter 87). This is still slow when
+ * generating a lot (dozens) of ECC errors.
+ *
+ * To avoid generating too many errors in any one ECC step, we separate
+ * our error generation by ECC step.
+ */
+ chip->tmp_dirty = true;
+ for (i = 0; i < chip->err_steps; i++) {
+ u32 bit_errors = chip->err_count;
+ unsigned int j = chip->err_step_bits + chip->ecc_bits;
+
+ while (bit_errors) {
+ unsigned int u = rand();
+ float quot = 1ULL << 32;
+
+ do {
+ quot *= j - bit_errors;
+ quot /= j;
+ j--;
+
+ if (j < stop)
+ goto next;
+ } while (u < quot);
+
+ sand_nand_inject_error(chip, i, j);
+ bit_errors--;
+ }
+next:
+ ;
+ }
+
+ return 0;
+}
+
+static void sand_nand_command(struct mtd_info *mtd, unsigned int command,
+ int column, int page_addr)
+{
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct sand_nand_chip *chip = to_sand_nand(nand);
+ enum sand_nand_state new_state = chip->state;
+
+ SAND_DEBUG(chip, "command=%02x column=%d page_addr=%d\n", command,
+ column, page_addr);
+
+ if (!chip->selected)
+ return;
+
+ switch (chip->state) {
+ case STATE_READY:
+ if (command == NAND_CMD_RESET)
+ goto reset;
+ break;
+ case STATE_PROG:
+ new_state = STATE_IDLE;
+ if (command != NAND_CMD_PAGEPROG ||
+ test_and_set_bit(chip->page_addr, chip->programmed)) {
+ chip->status |= NAND_STATUS_FAIL;
+ break;
+ }
+
+ if (sand_nand_seek(chip)) {
+ chip->status |= NAND_STATUS_FAIL;
+ break;
+ }
+
+ if (os_write(chip->fd, chip->tmp, chip->chunksize) !=
+ chip->chunksize) {
+ SAND_DEBUG(chip, "could not write: %d\n", errno);
+ chip->status |= NAND_STATUS_FAIL;
+ break;
+ }
+
+ chip->fd_page_addr++;
+ break;
+ case STATE_ERASE:
+ new_state = STATE_IDLE;
+ if (command != NAND_CMD_ERASE2) {
+ chip->status |= NAND_STATUS_FAIL;
+ break;
+ }
+
+ if (chip->page_addr < 0 ||
+ chip->page_addr >= chip->pages ||
+ chip->page_addr % chip->pages_per_erase)
+ chip->status |= NAND_STATUS_FAIL;
+ else
+ bitmap_clear(chip->programmed, chip->page_addr,
+ chip->pages_per_erase);
+ break;
+ default:
+ chip->column = column;
+ chip->page_addr = page_addr;
+ switch (command) {
+ case NAND_CMD_READOOB:
+ if (column >= 0)
+ chip->column += chip->pagesize;
+ fallthrough;
+ case NAND_CMD_READ0:
+ new_state = STATE_IDLE;
+ if (page_addr < 0 || page_addr >= chip->pages)
+ break;
+
+ if (chip->column < 0 || chip->column >= chip->chunksize)
+ break;
+
+ if (sand_nand_read(chip))
+ break;
+
+ chip->page_addr = page_addr;
+ new_state = STATE_READ;
+ break;
+ case NAND_CMD_ERASE1:
+ new_state = STATE_ERASE;
+ chip->status = ~NAND_STATUS_FAIL;
+ break;
+ case NAND_CMD_STATUS:
+ new_state = STATE_STATUS;
+ chip->column = 0;
+ break;
+ case NAND_CMD_SEQIN:
+ new_state = STATE_PROG;
+ chip->status = ~NAND_STATUS_FAIL;
+ if (page_addr < 0 || page_addr >= chip->pages ||
+ chip->column < 0 ||
+ chip->column >= chip->chunksize) {
+ chip->status |= NAND_STATUS_FAIL;
+ } else if (chip->tmp_dirty) {
+ memset(chip->tmp, 0xff, chip->chunksize);
+ chip->tmp_dirty = false;
+ }
+ break;
+ case NAND_CMD_READID:
+ if (chip->onfi[0] && column == 0x20)
+ new_state = STATE_READ_ONFI;
+ else
+ new_state = STATE_READ_ID;
+ chip->column = 0;
+ break;
+ case NAND_CMD_PARAM:
+ if (chip->onfi[0] && !column)
+ new_state = STATE_PARAM_ONFI;
+ else
+ new_state = STATE_IDLE;
+ break;
+ case NAND_CMD_RESET:
+reset:
+ new_state = STATE_IDLE;
+ chip->column = -1;
+ chip->page_addr = -1;
+ chip->status = ~NAND_STATUS_FAIL;
+ break;
+ default:
+ new_state = STATE_IDLE;
+ SAND_DEBUG(chip, "Unsupported command %02x\n", command);
+ }
+ }
+
+ to_state(chip, new_state);
+}
+
+static void sand_nand_select_chip(struct mtd_info *mtd, int n)
+{
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct sand_nand_chip *chip = to_sand_nand(nand);
+
+ chip->selected = !n;
+}
+
+static void sand_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len)
+{
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct sand_nand_chip *chip = to_sand_nand(nand);
+ unsigned int to_copy;
+ int src_len = 0;
+ const u8 *src = NULL;
+
+ if (!chip->selected)
+ goto copy;
+
+ switch (chip->state) {
+ case STATE_READ:
+ src = chip->tmp;
+ src_len = chip->chunksize;
+ break;
+ case STATE_READ_ID:
+ src = chip->id;
+ src_len = chip->id_len;
+ break;
+ case STATE_READ_ONFI:
+ src = "ONFI";
+ src_len = 4;
+ break;
+ case STATE_PARAM_ONFI:
+ src = chip->onfi;
+ src_len = sizeof(chip->onfi);
+ break;
+ case STATE_STATUS:
+ src = &chip->status;
+ src_len = 1;
+ break;
+ default:
+ break;
+ }
+
+copy:
+ if (chip->column >= 0)
+ to_copy = max(min(len, src_len - chip->column), 0);
+ else
+ to_copy = 0;
+ memcpy(buf, src + chip->column, to_copy);
+ memset(buf + to_copy, 0xff, len - to_copy);
+ chip->column += to_copy;
+
+ if (len == 1) {
+ SAND_DEBUG(chip, "read [ %02x ]\n", buf[0]);
+ } else if (src_len) {
+ SAND_DEBUG(chip, "read %d bytes\n", len);
+#ifdef VERBOSE_DEBUG
+ print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, len);
+#endif
+ }
+
+ if (src_len && chip->column == src_len)
+ to_state(chip, STATE_IDLE);
+}
+
+static u8 sand_nand_read_byte(struct mtd_info *mtd)
+{
+ u8 ret;
+
+ sand_nand_read_buf(mtd, &ret, 1);
+ return ret;
+}
+
+static u16 sand_nand_read_word(struct mtd_info *mtd)
+{
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct sand_nand_chip *chip = to_sand_nand(nand);
+
+ SAND_DEBUG(chip, "16-bit access unsupported\n");
+ return sand_nand_read_byte(mtd) | 0xff00;
+}
+
+static void sand_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
+{
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct sand_nand_chip *chip = to_sand_nand(nand);
+
+ SAND_DEBUG(chip, "write %d bytes\n", len);
+#ifdef VERBOSE_DEBUG
+ print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, len);
+#endif
+
+ if (chip->state != STATE_PROG || chip->status & NAND_STATUS_FAIL)
+ return;
+
+ chip->tmp_dirty = true;
+ len = min((unsigned int)len, chip->chunksize - chip->column);
+ memcpy(chip->tmp + chip->column, buf, len);
+ chip->column += len;
+}
+
+static struct nand_chip *nand_chip;
+
+int sand_nand_remove(struct udevice *dev)
+{
+ struct sand_nand_priv *priv = dev_get_priv(dev);
+ struct sand_nand_chip *chip;
+
+ list_for_each_entry(chip, &priv->chips, node) {
+ struct nand_chip *nand = &chip->nand;
+
+ if (nand_chip == nand)
+ nand_chip = NULL;
+
+ nand_unregister(nand_to_mtd(nand));
+ free(chip->programmed);
+ os_close(chip->fd);
+ free(chip);
+ }
+
+ return 0;
+}
+
+static int sand_nand_probe(struct udevice *dev)
+{
+ struct sand_nand_priv *priv = dev_get_priv(dev);
+ struct sand_nand_chip *chip;
+ int ret, devnum = 0;
+ ofnode np;
+
+ INIT_LIST_HEAD(&priv->chips);
+
+ dev_for_each_subnode(np, dev) {
+ struct nand_chip *nand;
+ struct mtd_info *mtd;
+ u32 erasesize, oobsize, pagesize, pages;
+ u32 err_count, err_step_size;
+ off_t expected_size;
+ char filename[30];
+ fdt_addr_t cs;
+ const u8 *id, *onfi;
+ int id_len, onfi_len;
+
+ cs = ofnode_get_addr_size_index_notrans(np, 0, NULL);
+ if (cs == FDT_ADDR_T_NONE) {
+ dev_dbg(dev, "Invalid cs for chip %s\n",
+ ofnode_get_name(np));
+ ret = -ENOENT;
+ goto err;
+ }
+
+ id = ofnode_read_prop(np, "sandbox,id", &id_len);
+ if (!id) {
+ dev_dbg(dev, "No sandbox,id property for chip %s\n",
+ ofnode_get_name(np));
+ ret = -EINVAL;
+ goto err;
+ }
+
+ onfi = ofnode_read_prop(np, "sandbox,onfi", &onfi_len);
+ if (onfi && onfi_len != sizeof(struct nand_onfi_params)) {
+ dev_dbg(dev, "Invalid length %d for onfi params\n",
+ onfi_len);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ ret = ofnode_read_u32(np, "sandbox,erasesize", &erasesize);
+ if (ret) {
+ dev_dbg(dev, "No sandbox,erasesize property for chip %s",
+ ofnode_get_name(np));
+ goto err;
+ }
+
+ ret = ofnode_read_u32(np, "sandbox,oobsize", &oobsize);
+ if (ret) {
+ dev_dbg(dev, "No sandbox,oobsize property for chip %s",
+ ofnode_get_name(np));
+ goto err;
+ }
+
+ ret = ofnode_read_u32(np, "sandbox,pagesize", &pagesize);
+ if (ret) {
+ dev_dbg(dev, "No sandbox,pagesize property for chip %s",
+ ofnode_get_name(np));
+ goto err;
+ }
+
+ ret = ofnode_read_u32(np, "sandbox,pages", &pages);
+ if (ret) {
+ dev_dbg(dev, "No sandbox,pages property for chip %s",
+ ofnode_get_name(np));
+ goto err;
+ }
+
+ ret = ofnode_read_u32(np, "sandbox,err-count", &err_count);
+ if (ret) {
+ dev_dbg(dev,
+ "No sandbox,err-count property for chip %s",
+ ofnode_get_name(np));
+ goto err;
+ }
+
+ ret = ofnode_read_u32(np, "sandbox,err-step-size",
+ &err_step_size);
+ if (ret) {
+ dev_dbg(dev,
+ "No sandbox,err-step-size property for chip %s",
+ ofnode_get_name(np));
+ goto err;
+ }
+
+ chip = calloc(sizeof(*chip), 1);
+ if (!chip) {
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ chip->cs = cs;
+ chip->id = id;
+ chip->id_len = id_len;
+ chip->chunksize = pagesize + oobsize;
+ chip->pagesize = pagesize;
+ chip->pages = pages;
+ chip->pages_per_erase = erasesize / pagesize;
+ memset(chip->tmp, 0xff, chip->chunksize);
+
+ chip->err_count = err_count;
+ chip->err_step_bits = err_step_size * 8;
+ chip->err_steps = pagesize / err_step_size;
+
+ expected_size = (off_t)pages * chip->chunksize;
+ snprintf(filename, sizeof(filename),
+ "/tmp/u-boot.nand%d.XXXXXX", devnum);
+ chip->fd = os_mktemp(filename, expected_size);
+ if (chip->fd < 0) {
+ dev_dbg(dev, "Could not create temp file %s\n",
+ filename);
+ ret = chip->fd;
+ goto err_chip;
+ }
+
+ chip->programmed = calloc(sizeof(long),
+ BITS_TO_LONGS(pages));
+ if (!chip->programmed) {
+ ret = -ENOMEM;
+ goto err_fd;
+ }
+
+ if (onfi) {
+ memcpy(chip->onfi, onfi, onfi_len);
+ memcpy(chip->onfi + onfi_len, onfi, onfi_len);
+ memcpy(chip->onfi + 2 * onfi_len, onfi, onfi_len);
+ }
+
+ nand = &chip->nand;
+ nand->options = spl_in_proper() ? 0 : NAND_SKIP_BBTSCAN;
+ nand->flash_node = np;
+ nand->dev_ready = sand_nand_dev_ready;
+ nand->cmdfunc = sand_nand_command;
+ nand->waitfunc = sand_nand_wait;
+ nand->select_chip = sand_nand_select_chip;
+ nand->read_byte = sand_nand_read_byte;
+ nand->read_word = sand_nand_read_word;
+ nand->read_buf = sand_nand_read_buf;
+ nand->write_buf = sand_nand_write_buf;
+ nand->ecc.options = NAND_ECC_GENERIC_ERASED_CHECK;
+
+ mtd = nand_to_mtd(nand);
+ mtd->dev = dev;
+
+ ret = nand_scan(mtd, CONFIG_SYS_NAND_MAX_CHIPS);
+ if (ret) {
+ dev_dbg(dev, "Could not scan chip %s: %d\n",
+ ofnode_get_name(np), ret);
+ goto err_prog;
+ }
+ chip->ecc_bits = nand->ecc.layout->eccbytes * 8 /
+ chip->err_steps;
+
+ ret = nand_register(devnum, mtd);
+ if (ret) {
+ dev_dbg(dev, "Could not register nand %d: %d\n", devnum,
+ ret);
+ goto err_prog;
+ }
+
+ if (!nand_chip)
+ nand_chip = nand;
+
+ list_add_tail(&chip->node, &priv->chips);
+ devnum++;
+ continue;
+
+err_prog:
+ free(chip->programmed);
+err_fd:
+ os_close(chip->fd);
+err_chip:
+ free(chip);
+ goto err;
+ }
+
+ return 0;
+
+err:
+ sand_nand_remove(dev);
+ return ret;
+}
+
+static const struct udevice_id sand_nand_ids[] = {
+ { .compatible = "sandbox,nand" },
+ { }
+};
+
+U_BOOT_DRIVER(sand_nand) = {
+ .name = "sand-nand",
+ .id = UCLASS_MTD,
+ .of_match = sand_nand_ids,
+ .probe = sand_nand_probe,
+ .remove = sand_nand_remove,
+ .priv_auto = sizeof(struct sand_nand_priv),
+};
+
+void board_nand_init(void)
+{
+ struct udevice *dev;
+ int err;
+
+ err = uclass_get_device_by_driver(UCLASS_MTD, DM_DRIVER_REF(sand_nand),
+ &dev);
+ if (err && err != -ENODEV)
+ log_info("Failed to get sandbox NAND: %d\n", err);
+}
+
+#if IS_ENABLED(CONFIG_SPL_BUILD) && IS_ENABLED(CONFIG_SPL_NAND_INIT)
+void nand_deselect(void)
+{
+ nand_chip->select_chip(nand_to_mtd(nand_chip), -1);
+}
+
+static int nand_is_bad_block(int block)
+{
+ struct mtd_info *mtd = nand_to_mtd(nand_chip);
+
+ return mtd_block_isbad(mtd, block << mtd->erasesize_shift);
+}
+
+static int nand_read_page(int block, int page, uchar *dst)
+{
+ struct mtd_info *mtd = nand_to_mtd(nand_chip);
+ loff_t ofs = ((loff_t)block << mtd->erasesize_shift) +
+ ((loff_t)page << mtd->writesize_shift);
+ size_t len = mtd->writesize;
+
+ return nand_read(mtd, ofs, &len, dst);
+}
+
+#include "nand_spl_loaders.c"
+#endif /* CONFIG_SPL_NAND_INIT */
diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
index 64be648..3528824 100644
--- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
+++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
@@ -22,6 +22,7 @@
#include <linux/ioport.h>
#include <linux/mtd/rawnand.h>
#include <linux/printk.h>
+#include <linux/time.h>
/* Bad block marker length */
#define FMC2_BBM_LEN 2
@@ -127,8 +128,6 @@
#define FMC2_BCHDSR4_EBP7 GENMASK(12, 0)
#define FMC2_BCHDSR4_EBP8 GENMASK(28, 16)
-#define FMC2_NSEC_PER_SEC 1000000000L
-
#define FMC2_TIMEOUT_5S 5000000
enum stm32_fmc2_ecc {
@@ -603,7 +602,7 @@
struct stm32_fmc2_nand *nand = to_fmc2_nand(chip);
struct stm32_fmc2_timings *tims = &nand->timings;
unsigned long hclk = clk_get_rate(&nfc->clk);
- unsigned long hclkp = FMC2_NSEC_PER_SEC / (hclk / 1000);
+ unsigned long hclkp = NSEC_PER_SEC / (hclk / 1000);
unsigned long timing, tar, tclr, thiz, twait;
unsigned long tset_mem, tset_att, thold_mem, thold_att;
diff --git a/drivers/mtd/nand/raw/sunxi_nand_spl.c b/drivers/mtd/nand/raw/sunxi_nand_spl.c
index 6de0b0a..c9b8c78 100644
--- a/drivers/mtd/nand/raw/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/raw/sunxi_nand_spl.c
@@ -524,9 +524,10 @@
return 0;
}
+static struct nfc_config conf;
+
int nand_spl_load_image(uint32_t offs, unsigned int size, void *dest)
{
- static struct nfc_config conf = { };
int ret;
ret = nand_detect_config(&conf, offs, dest);
@@ -536,6 +537,11 @@
return nand_read_buffer(&conf, offs, size, dest);
}
+unsigned int nand_page_size(void)
+{
+ return conf.page_size;
+}
+
void nand_deselect(void)
{
struct sunxi_ccm_reg *const ccm =
diff --git a/drivers/mtd/onenand/onenand_uboot.c b/drivers/mtd/onenand/onenand_uboot.c
index 04791df..ecacabe 100644
--- a/drivers/mtd/onenand/onenand_uboot.c
+++ b/drivers/mtd/onenand/onenand_uboot.c
@@ -44,14 +44,12 @@
puts("Flex-");
puts("OneNAND: ");
-#ifdef CONFIG_MTD
/*
* Add MTD device so that we can reference it later
* via the mtdcore infrastructure (e.g. ubi).
*/
onenand_mtd.name = dev_name;
add_mtd_device(&onenand_mtd);
-#endif
}
print_size(onenand_chip.chipsize, "\n");
}
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index ebab4d9..23ad2c2 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -471,14 +471,6 @@
depends on MCFFEC
bool "Invalidate icache during ethernet operations"
-config FSLDMAFEC
- bool "ColdFire DMA Ethernet Support"
- select PHYLIB
- select SYS_DISCOVER_PHY
- help
- This driver supports the network interface units in the
- ColdFire family.
-
config KS8851_MLL
bool "Microchip KS8851-MLL controller driver"
help
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 1ce6fea..f9aed16 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -37,7 +37,6 @@
obj-$(CONFIG_FEC_MXC) += fec_mxc.o
obj-$(CONFIG_FMAN_ENET) += fm/
obj-$(CONFIG_FMAN_ENET) += fsl_mdio.o
-obj-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o mcfmii.o
obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
obj-$(CONFIG_FSL_LS_MDIO) += fsl_ls_mdio.o
obj-$(CONFIG_FSL_MC_ENET) += fsl-mc/
diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c
index 7dfa821..a8caa0f 100644
--- a/drivers/net/fm/fm.c
+++ b/drivers/net/fm/fm.c
@@ -3,7 +3,6 @@
* Copyright 2009-2011 Freescale Semiconductor, Inc.
* Dave Liu <daveliu@freescale.com>
*/
-#include <common.h>
#include <env.h>
#include <fs_loader.h>
#include <image.h>
diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c
deleted file mode 100644
index cc61a10..0000000
--- a/drivers/net/fsl_mcdmafec.c
+++ /dev/null
@@ -1,592 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2007 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- *
- * Conversion to DM
- * (C) 2019 Angelo Dureghello <angelo.dureghello@timesys.com>
- */
-
-#include <common.h>
-#include <env.h>
-#include <hang.h>
-#include <malloc.h>
-#include <command.h>
-#include <config.h>
-#include <net.h>
-#include <miiphy.h>
-#include <asm/global_data.h>
-#include <linux/delay.h>
-#include <linux/mii.h>
-#include <asm/immap.h>
-#include <asm/fsl_mcdmafec.h>
-
-#include "MCD_dma.h"
-
-#undef ET_DEBUG
-#undef MII_DEBUG
-
-/* Ethernet Transmit and Receive Buffers */
-#define DBUF_LENGTH 1520
-#define PKT_MAXBUF_SIZE 1518
-#define FIFO_ERRSTAT (FIFO_STAT_RXW | FIFO_STAT_UF | FIFO_STAT_OF)
-
-/* RxBD bits definitions */
-#define BD_ENET_RX_ERR (BD_ENET_RX_LG | BD_ENET_RX_NO | BD_ENET_RX_CR | \
- BD_ENET_RX_OV | BD_ENET_RX_TR)
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static void init_eth_info(struct fec_info_dma *info)
-{
- /* setup Receive and Transmit buffer descriptor */
-#ifdef CFG_SYS_FEC_BUF_USE_SRAM
- static u32 tmp;
-
- if (info->index == 0)
- tmp = CFG_SYS_INIT_RAM_ADDR + 0x1000;
- else
- info->rxbd = (cbd_t *)DBUF_LENGTH;
-
- info->rxbd = (cbd_t *)((u32)info->rxbd + tmp);
- tmp = (u32)info->rxbd;
- info->txbd =
- (cbd_t *)((u32)info->txbd + tmp +
- (PKTBUFSRX * sizeof(cbd_t)));
- tmp = (u32)info->txbd;
- info->txbuf =
- (char *)((u32)info->txbuf + tmp +
- (CFG_SYS_TX_ETH_BUFFER * sizeof(cbd_t)));
- tmp = (u32)info->txbuf;
-#else
- info->rxbd =
- (cbd_t *)memalign(CONFIG_SYS_CACHELINE_SIZE,
- (PKTBUFSRX * sizeof(cbd_t)));
- info->txbd =
- (cbd_t *)memalign(CONFIG_SYS_CACHELINE_SIZE,
- (CFG_SYS_TX_ETH_BUFFER * sizeof(cbd_t)));
- info->txbuf =
- (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, DBUF_LENGTH);
-#endif
-
-#ifdef ET_DEBUG
- printf("rxbd %x txbd %x\n", (int)info->rxbd, (int)info->txbd);
-#endif
- info->phy_name = (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, 32);
-}
-
-static void fec_halt(struct udevice *dev)
-{
- struct fec_info_dma *info = dev_get_priv(dev);
- volatile fecdma_t *fecp = (fecdma_t *)info->iobase;
- int counter = 0xffff;
-
- /* issue graceful stop command to the FEC transmitter if necessary */
- fecp->tcr |= FEC_TCR_GTS;
-
- /* wait for graceful stop to register */
- while ((counter--) && (!(fecp->eir & FEC_EIR_GRA)))
- ;
-
- /* Disable DMA tasks */
- MCD_killDma(info->tx_task);
- MCD_killDma(info->rx_task);
-
- /* Disable the Ethernet Controller */
- fecp->ecr &= ~FEC_ECR_ETHER_EN;
-
- /* Clear FIFO status registers */
- fecp->rfsr &= FIFO_ERRSTAT;
- fecp->tfsr &= FIFO_ERRSTAT;
-
- fecp->frst = 0x01000000;
-
- /* Issue a reset command to the FEC chip */
- fecp->ecr |= FEC_ECR_RESET;
-
- /* wait at least 20 clock cycles */
- mdelay(10);
-
-#ifdef ET_DEBUG
- printf("Ethernet task stopped\n");
-#endif
-}
-
-#ifdef ET_DEBUG
-static void dbg_fec_regs(struct eth_device *dev)
-{
- struct fec_info_dma *info = dev->priv;
- volatile fecdma_t *fecp = (fecdma_t *)info->iobase;
-
- printf("=====\n");
- printf("ievent %x - %x\n", (int)&fecp->eir, fecp->eir);
- printf("imask %x - %x\n", (int)&fecp->eimr, fecp->eimr);
- printf("ecntrl %x - %x\n", (int)&fecp->ecr, fecp->ecr);
- printf("mii_mframe %x - %x\n", (int)&fecp->mmfr, fecp->mmfr);
- printf("mii_speed %x - %x\n", (int)&fecp->mscr, fecp->mscr);
- printf("mii_ctrlstat %x - %x\n", (int)&fecp->mibc, fecp->mibc);
- printf("r_cntrl %x - %x\n", (int)&fecp->rcr, fecp->rcr);
- printf("r hash %x - %x\n", (int)&fecp->rhr, fecp->rhr);
- printf("x_cntrl %x - %x\n", (int)&fecp->tcr, fecp->tcr);
- printf("padr_l %x - %x\n", (int)&fecp->palr, fecp->palr);
- printf("padr_u %x - %x\n", (int)&fecp->paur, fecp->paur);
- printf("op_pause %x - %x\n", (int)&fecp->opd, fecp->opd);
- printf("iadr_u %x - %x\n", (int)&fecp->iaur, fecp->iaur);
- printf("iadr_l %x - %x\n", (int)&fecp->ialr, fecp->ialr);
- printf("gadr_u %x - %x\n", (int)&fecp->gaur, fecp->gaur);
- printf("gadr_l %x - %x\n", (int)&fecp->galr, fecp->galr);
- printf("x_wmrk %x - %x\n", (int)&fecp->tfwr, fecp->tfwr);
- printf("r_fdata %x - %x\n", (int)&fecp->rfdr, fecp->rfdr);
- printf("r_fstat %x - %x\n", (int)&fecp->rfsr, fecp->rfsr);
- printf("r_fctrl %x - %x\n", (int)&fecp->rfcr, fecp->rfcr);
- printf("r_flrfp %x - %x\n", (int)&fecp->rlrfp, fecp->rlrfp);
- printf("r_flwfp %x - %x\n", (int)&fecp->rlwfp, fecp->rlwfp);
- printf("r_frfar %x - %x\n", (int)&fecp->rfar, fecp->rfar);
- printf("r_frfrp %x - %x\n", (int)&fecp->rfrp, fecp->rfrp);
- printf("r_frfwp %x - %x\n", (int)&fecp->rfwp, fecp->rfwp);
- printf("t_fdata %x - %x\n", (int)&fecp->tfdr, fecp->tfdr);
- printf("t_fstat %x - %x\n", (int)&fecp->tfsr, fecp->tfsr);
- printf("t_fctrl %x - %x\n", (int)&fecp->tfcr, fecp->tfcr);
- printf("t_flrfp %x - %x\n", (int)&fecp->tlrfp, fecp->tlrfp);
- printf("t_flwfp %x - %x\n", (int)&fecp->tlwfp, fecp->tlwfp);
- printf("t_ftfar %x - %x\n", (int)&fecp->tfar, fecp->tfar);
- printf("t_ftfrp %x - %x\n", (int)&fecp->tfrp, fecp->tfrp);
- printf("t_ftfwp %x - %x\n", (int)&fecp->tfwp, fecp->tfwp);
- printf("frst %x - %x\n", (int)&fecp->frst, fecp->frst);
- printf("ctcwr %x - %x\n", (int)&fecp->ctcwr, fecp->ctcwr);
-}
-#endif
-
-static void set_fec_duplex_speed(volatile fecdma_t *fecp, int dup_spd)
-{
- struct bd_info *bd = gd->bd;
-
- if ((dup_spd >> 16) == FULL) {
- /* Set maximum frame length */
- fecp->rcr = FEC_RCR_MAX_FL(PKT_MAXBUF_SIZE) | FEC_RCR_MII_MODE |
- FEC_RCR_PROM | 0x100;
- fecp->tcr = FEC_TCR_FDEN;
- } else {
- /* Half duplex mode */
- fecp->rcr = FEC_RCR_MAX_FL(PKT_MAXBUF_SIZE) |
- FEC_RCR_MII_MODE | FEC_RCR_DRT;
- fecp->tcr &= ~FEC_TCR_FDEN;
- }
-
- if ((dup_spd & 0xFFFF) == _100BASET) {
-#ifdef MII_DEBUG
- printf("100Mbps\n");
-#endif
- bd->bi_ethspeed = 100;
- } else {
-#ifdef MII_DEBUG
- printf("10Mbps\n");
-#endif
- bd->bi_ethspeed = 10;
- }
-}
-
-static void fec_set_hwaddr(volatile fecdma_t *fecp, u8 *mac)
-{
- u8 curr_byte; /* byte for which to compute the CRC */
- int byte; /* loop - counter */
- int bit; /* loop - counter */
- u32 crc = 0xffffffff; /* initial value */
-
- for (byte = 0; byte < 6; byte++) {
- curr_byte = mac[byte];
- for (bit = 0; bit < 8; bit++) {
- if ((curr_byte & 0x01) ^ (crc & 0x01)) {
- crc >>= 1;
- crc = crc ^ 0xedb88320;
- } else {
- crc >>= 1;
- }
- curr_byte >>= 1;
- }
- }
-
- crc = crc >> 26;
-
- /* Set individual hash table register */
- if (crc >= 32) {
- fecp->ialr = (1 << (crc - 32));
- fecp->iaur = 0;
- } else {
- fecp->ialr = 0;
- fecp->iaur = (1 << crc);
- }
-
- /* Set physical address */
- fecp->palr = (mac[0] << 24) + (mac[1] << 16) + (mac[2] << 8) + mac[3];
- fecp->paur = (mac[4] << 24) + (mac[5] << 16) + 0x8808;
-
- /* Clear multicast address hash table */
- fecp->gaur = 0;
- fecp->galr = 0;
-}
-
-static int fec_init(struct udevice *dev)
-{
- struct fec_info_dma *info = dev_get_priv(dev);
- volatile fecdma_t *fecp = (fecdma_t *)info->iobase;
- int rval, i;
- uchar enetaddr[6];
-
-#ifdef ET_DEBUG
- printf("fec_init: iobase 0x%08x ...\n", info->iobase);
-#endif
-
- fecpin_setclear(info, 1);
- fec_halt(dev);
-
- mii_init();
- set_fec_duplex_speed(fecp, info->dup_spd);
-
- /* We use strictly polling mode only */
- fecp->eimr = 0;
-
- /* Clear any pending interrupt */
- fecp->eir = 0xffffffff;
-
- /* Set station address */
- if (info->index == 0)
- rval = eth_env_get_enetaddr("ethaddr", enetaddr);
- else
- rval = eth_env_get_enetaddr("eth1addr", enetaddr);
-
- if (!rval) {
- puts("Please set a valid MAC address\n");
- return -EINVAL;
- }
-
- fec_set_hwaddr(fecp, enetaddr);
-
- /* Set Opcode/Pause Duration Register */
- fecp->opd = 0x00010020;
-
- /* Setup Buffers and Buffer Descriptors */
- info->rx_idx = 0;
- info->tx_idx = 0;
-
- /* Setup Receiver Buffer Descriptors (13.14.24.18)
- * Settings: Empty, Wrap */
- for (i = 0; i < PKTBUFSRX; i++) {
- info->rxbd[i].cbd_sc = BD_ENET_RX_EMPTY;
- info->rxbd[i].cbd_datlen = PKTSIZE_ALIGN;
- info->rxbd[i].cbd_bufaddr = (uint) net_rx_packets[i];
- }
- info->rxbd[PKTBUFSRX - 1].cbd_sc |= BD_ENET_RX_WRAP;
-
- /* Setup Ethernet Transmitter Buffer Descriptors (13.14.24.19)
- * Settings: Last, Tx CRC */
- for (i = 0; i < CFG_SYS_TX_ETH_BUFFER; i++) {
- info->txbd[i].cbd_sc = 0;
- info->txbd[i].cbd_datlen = 0;
- info->txbd[i].cbd_bufaddr = (uint) (&info->txbuf[0]);
- }
- info->txbd[CFG_SYS_TX_ETH_BUFFER - 1].cbd_sc |= BD_ENET_TX_WRAP;
-
- info->used_tbd_idx = 0;
- info->clean_tbd_num = CFG_SYS_TX_ETH_BUFFER;
-
- /* Set Rx FIFO alarm and granularity value */
- fecp->rfcr = 0x0c000000;
- fecp->rfar = 0x0000030c;
-
- /* Set Tx FIFO granularity value */
- fecp->tfcr = FIFO_CTRL_FRAME | FIFO_CTRL_GR(6) | 0x00040000;
- fecp->tfar = 0x00000080;
-
- fecp->tfwr = 0x2;
- fecp->ctcwr = 0x03000000;
-
- /* Enable DMA receive task */
- MCD_startDma(info->rx_task,
- (s8 *)info->rxbd,
- 0,
- (s8 *)&fecp->rfdr,
- 4,
- 0,
- 4,
- info->rx_init,
- info->rx_pri,
- (MCD_FECRX_DMA | MCD_TT_FLAGS_DEF),
- (MCD_NO_CSUM | MCD_NO_BYTE_SWAP)
- );
-
- /* Enable DMA tx task with no ready buffer descriptors */
- MCD_startDma(info->tx_task,
- (s8 *)info->txbd,
- 0,
- (s8 *)&fecp->tfdr,
- 4,
- 0,
- 4,
- info->tx_init,
- info->tx_pri,
- (MCD_FECTX_DMA | MCD_TT_FLAGS_DEF),
- (MCD_NO_CSUM | MCD_NO_BYTE_SWAP)
- );
-
- /* Now enable the transmit and receive processing */
- fecp->ecr |= FEC_ECR_ETHER_EN;
-
- return 0;
-}
-
-static int mcdmafec_init(struct udevice *dev)
-{
- return fec_init(dev);
-}
-
-static int mcdmafec_send(struct udevice *dev, void *packet, int length)
-{
- struct fec_info_dma *info = dev_get_priv(dev);
- cbd_t *p_tbd, *p_used_tbd;
- u16 phy_status;
-
- miiphy_read(dev->name, info->phy_addr, MII_BMSR, &phy_status);
-
- /* process all the consumed TBDs */
- while (info->clean_tbd_num < CFG_SYS_TX_ETH_BUFFER) {
- p_used_tbd = &info->txbd[info->used_tbd_idx];
- if (p_used_tbd->cbd_sc & BD_ENET_TX_READY) {
-#ifdef ET_DEBUG
- printf("Cannot clean TBD %d, in use\n",
- info->clean_tbd_num);
-#endif
- return 0;
- }
-
- /* clean this buffer descriptor */
- if (info->used_tbd_idx == (CFG_SYS_TX_ETH_BUFFER - 1))
- p_used_tbd->cbd_sc = BD_ENET_TX_WRAP;
- else
- p_used_tbd->cbd_sc = 0;
-
- /* update some indeces for a correct handling of TBD ring */
- info->clean_tbd_num++;
- info->used_tbd_idx = (info->used_tbd_idx + 1)
- % CFG_SYS_TX_ETH_BUFFER;
- }
-
- /* Check for valid length of data. */
- if (length > 1500 || length <= 0)
- return -1;
-
- /* Check the number of vacant TxBDs. */
- if (info->clean_tbd_num < 1) {
- printf("No available TxBDs ...\n");
- return -1;
- }
-
- /* Get the first TxBD to send the mac header */
- p_tbd = &info->txbd[info->tx_idx];
- p_tbd->cbd_datlen = length;
- p_tbd->cbd_bufaddr = (u32)packet;
- p_tbd->cbd_sc |= BD_ENET_TX_LAST | BD_ENET_TX_TC | BD_ENET_TX_READY;
- info->tx_idx = (info->tx_idx + 1) % CFG_SYS_TX_ETH_BUFFER;
-
- /* Enable DMA transmit task */
- MCD_continDma(info->tx_task);
-
- info->clean_tbd_num -= 1;
-
- /* wait until frame is sent . */
- while (p_tbd->cbd_sc & BD_ENET_TX_READY)
- udelay(10);
-
- return (int)(info->txbd[info->tx_idx].cbd_sc & BD_ENET_TX_STATS);
-}
-
-static int mcdmafec_recv(struct udevice *dev, int flags, uchar **packetp)
-{
- struct fec_info_dma *info = dev_get_priv(dev);
- volatile fecdma_t *fecp = (fecdma_t *)info->iobase;
-
- cbd_t *prbd = &info->rxbd[info->rx_idx];
- u32 ievent;
- int frame_length, len = 0;
-
- /* Check if any critical events have happened */
- ievent = fecp->eir;
- if (ievent != 0) {
- fecp->eir = ievent;
-
- if (ievent & (FEC_EIR_BABT | FEC_EIR_TXERR | FEC_EIR_RXERR)) {
- printf("fec_recv: error\n");
- fec_halt(dev);
- fec_init(dev);
- return 0;
- }
-
- if (ievent & FEC_EIR_HBERR) {
- /* Heartbeat error */
- fecp->tcr |= FEC_TCR_GTS;
- }
-
- if (ievent & FEC_EIR_GRA) {
- /* Graceful stop complete */
- if (fecp->tcr & FEC_TCR_GTS) {
- printf("fec_recv: tcr_gts\n");
- fec_halt(dev);
- fecp->tcr &= ~FEC_TCR_GTS;
- fec_init(dev);
- }
- }
- }
-
- if (!(prbd->cbd_sc & BD_ENET_RX_EMPTY)) {
- if ((prbd->cbd_sc & BD_ENET_RX_LAST) &&
- !(prbd->cbd_sc & BD_ENET_RX_ERR) &&
- ((prbd->cbd_datlen - 4) > 14)) {
- /* Get buffer address and size */
- frame_length = prbd->cbd_datlen - 4;
-
- /* Fill the buffer and pass it to upper layers */
- net_process_received_packet((uchar *)prbd->cbd_bufaddr,
- frame_length);
- len = frame_length;
- }
-
- /* Reset buffer descriptor as empty */
- if (info->rx_idx == (PKTBUFSRX - 1))
- prbd->cbd_sc = (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY);
- else
- prbd->cbd_sc = BD_ENET_RX_EMPTY;
-
- prbd->cbd_datlen = PKTSIZE_ALIGN;
-
- /* Now, we have an empty RxBD, restart the DMA receive task */
- MCD_continDma(info->rx_task);
-
- /* Increment BD count */
- info->rx_idx = (info->rx_idx + 1) % PKTBUFSRX;
- }
-
- return len;
-}
-
-static void mcdmafec_halt(struct udevice *dev)
-{
- fec_halt(dev);
-}
-
-static const struct eth_ops mcdmafec_ops = {
- .start = mcdmafec_init,
- .send = mcdmafec_send,
- .recv = mcdmafec_recv,
- .stop = mcdmafec_halt,
-};
-
-/*
- * Boot sequence, called just after mcffec_of_to_plat,
- * as DM way, it replaces old mcffec_initialize.
- */
-static int mcdmafec_probe(struct udevice *dev)
-{
- struct fec_info_dma *info = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_plat(dev);
- int node = dev_of_offset(dev);
- int retval;
- const u32 *val;
-
- info->index = dev_seq(dev);
- info->iobase = pdata->iobase;
- info->miibase = pdata->iobase;
- info->phy_addr = -1;
-
- val = fdt_getprop(gd->fdt_blob, node, "rx-task", NULL);
- if (val)
- info->rx_task = fdt32_to_cpu(*val);
-
- val = fdt_getprop(gd->fdt_blob, node, "tx-task", NULL);
- if (val)
- info->tx_task = fdt32_to_cpu(*val);
-
- val = fdt_getprop(gd->fdt_blob, node, "rx-prioprity", NULL);
- if (val)
- info->rx_pri = fdt32_to_cpu(*val);
-
- val = fdt_getprop(gd->fdt_blob, node, "tx-prioprity", NULL);
- if (val)
- info->tx_pri = fdt32_to_cpu(*val);
-
- val = fdt_getprop(gd->fdt_blob, node, "rx-init", NULL);
- if (val)
- info->rx_init = fdt32_to_cpu(*val);
-
- val = fdt_getprop(gd->fdt_blob, node, "tx-init", NULL);
- if (val)
- info->tx_init = fdt32_to_cpu(*val);
-
-#ifdef CFG_SYS_FEC_BUF_USE_SRAM
- u32 tmp = CFG_SYS_INIT_RAM_ADDR + 0x1000;
-#endif
- init_eth_info(info);
-
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- info->bus = mdio_alloc();
- if (!info->bus)
- return -ENOMEM;
- strlcpy(info->bus->name, dev->name, MDIO_NAME_LEN);
- info->bus->read = mcffec_miiphy_read;
- info->bus->write = mcffec_miiphy_write;
-
- retval = mdio_register(info->bus);
- if (retval < 0)
- return retval;
-#endif
-
- return 0;
-}
-
-static int mcdmafec_remove(struct udevice *dev)
-{
- struct fec_info_dma *priv = dev_get_priv(dev);
-
- mdio_unregister(priv->bus);
- mdio_free(priv->bus);
-
- return 0;
-}
-
-/*
- * Boot sequence, called 1st
- */
-static int mcdmafec_of_to_plat(struct udevice *dev)
-{
- struct eth_pdata *pdata = dev_get_plat(dev);
- const u32 *val;
-
- pdata->iobase = dev_read_addr(dev);
- /* Default to 10Mbit/s */
- pdata->max_speed = 10;
-
- val = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "max-speed", NULL);
- if (val)
- pdata->max_speed = fdt32_to_cpu(*val);
-
- return 0;
-}
-
-static const struct udevice_id mcdmafec_ids[] = {
- { .compatible = "fsl,mcf-dma-fec" },
- { }
-};
-
-U_BOOT_DRIVER(mcffec) = {
- .name = "mcdmafec",
- .id = UCLASS_ETH,
- .of_match = mcdmafec_ids,
- .of_to_plat = mcdmafec_of_to_plat,
- .probe = mcdmafec_probe,
- .remove = mcdmafec_remove,
- .ops = &mcdmafec_ops,
- .priv_auto = sizeof(struct fec_info_dma),
- .plat_auto = sizeof(struct eth_pdata),
-};
diff --git a/drivers/net/qe/uccf.c b/drivers/net/qe/uccf.c
index 306f1ea..00848a1 100644
--- a/drivers/net/qe/uccf.c
+++ b/drivers/net/qe/uccf.c
@@ -6,7 +6,6 @@
* based on source code of Shlomi Gridish
*/
-#include <common.h>
#include <malloc.h>
#include <linux/errno.h>
#include <asm/io.h>
diff --git a/drivers/phy/meson-axg-mipi-dphy.c b/drivers/phy/meson-axg-mipi-dphy.c
index cf2a1cd..a69b6c9 100644
--- a/drivers/phy/meson-axg-mipi-dphy.c
+++ b/drivers/phy/meson-axg-mipi-dphy.c
@@ -25,6 +25,7 @@
#include <linux/bitops.h>
#include <linux/compat.h>
#include <linux/bitfield.h>
+#include <linux/time.h>
/* [31] soft reset for the phy.
* 1: reset. 0: dessert the reset.
@@ -170,8 +171,6 @@
#define MIPI_DSI_TEST_CTRL0 0x3c
#define MIPI_DSI_TEST_CTRL1 0x40
-#define NSEC_PER_MSEC 1000000L
-
struct phy_meson_axg_mipi_dphy_priv {
struct regmap *regmap;
#if CONFIG_IS_ENABLED(CLK)
diff --git a/drivers/phy/phy-core-mipi-dphy.c b/drivers/phy/phy-core-mipi-dphy.c
index ba5f648..bb61816 100644
--- a/drivers/phy/phy-core-mipi-dphy.c
+++ b/drivers/phy/phy-core-mipi-dphy.c
@@ -6,11 +6,10 @@
#include <common.h>
#include <div64.h>
+#include <linux/time.h>
#include <phy-mipi-dphy.h>
-#define PSEC_PER_SEC 1000000000000LL
-
/*
* Minimum D-PHY timings based on MIPI D-PHY specification. Derived
* from the valid ranges specified in Section 6.9, Table 14, Page 41
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c b/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c
index 9ed7af0..5be76e0 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c
@@ -15,6 +15,7 @@
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/math64.h>
+#include <linux/time.h>
#include <phy-mipi-dphy.h>
#include <reset.h>
@@ -186,8 +187,6 @@
#define DSI_PHY_STATUS 0xb0
#define PHY_LOCK BIT(0)
-#define PSEC_PER_SEC 1000000000000LL
-
#define msleep(a) udelay(a * 1000)
enum phy_max_rate {
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index 8bb7588..7120b8e 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -505,6 +505,8 @@
{ .compatible = "st,stm32mp157-pinctrl" },
{ .compatible = "st,stm32mp157-z-pinctrl" },
{ .compatible = "st,stm32mp135-pinctrl" },
+ { .compatible = "st,stm32mp257-pinctrl" },
+ { .compatible = "st,stm32mp257-z-pinctrl" },
{ }
};
diff --git a/drivers/pwm/pwm-aspeed.c b/drivers/pwm/pwm-aspeed.c
index ba98641..b03472d 100644
--- a/drivers/pwm/pwm-aspeed.c
+++ b/drivers/pwm/pwm-aspeed.c
@@ -49,6 +49,7 @@
#include <dm/device_compat.h>
#include <linux/math64.h>
#include <linux/bitfield.h>
+#include <linux/time.h>
#include <asm/io.h>
/* The channel number of Aspeed pwm controller */
@@ -77,8 +78,6 @@
/* PWM fixed value */
#define PWM_ASPEED_FIXED_PERIOD 0xff
-#define NSEC_PER_SEC 1000000000L
-
struct aspeed_pwm_priv {
struct clk clk;
struct regmap *regmap;
diff --git a/drivers/pwm/pwm-at91.c b/drivers/pwm/pwm-at91.c
index 95597aee..3ff1fb6 100644
--- a/drivers/pwm/pwm-at91.c
+++ b/drivers/pwm/pwm-at91.c
@@ -14,11 +14,11 @@
#include <dm.h>
#include <linux/bitops.h>
#include <linux/io.h>
+#include <linux/time.h>
#include <pwm.h>
#define PERIOD_BITS 16
#define PWM_MAX_PRES 10
-#define NSEC_PER_SEC 1000000000L
#define PWM_ENA 0x04
#define PWM_CHANNEL_OFFSET 0x20
diff --git a/drivers/pwm/pwm-cadence-ttc.c b/drivers/pwm/pwm-cadence-ttc.c
index dc3b314..d9f6736 100644
--- a/drivers/pwm/pwm-cadence-ttc.c
+++ b/drivers/pwm/pwm-cadence-ttc.c
@@ -17,6 +17,7 @@
#include <linux/bitfield.h>
#include <linux/math64.h>
#include <linux/log2.h>
+#include <linux/time.h>
#include <dm/device_compat.h>
#define CLOCK_CONTROL 0
@@ -37,8 +38,6 @@
#define COUNTER_INTERVAL_ENABLE BIT(1)
#define COUNTER_COUNTING_DISABLE BIT(0)
-#define NSEC_PER_SEC 1000000000L
-
#define TTC_REG(reg, channel) ((reg) + (channel) * sizeof(u32))
#define TTC_CLOCK_CONTROL(reg, channel) \
TTC_REG((reg) + CLOCK_CONTROL, (channel))
diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
index 2311910..6095972 100644
--- a/drivers/pwm/pwm-meson.c
+++ b/drivers/pwm/pwm-meson.c
@@ -26,8 +26,7 @@
#include <linux/math64.h>
#include <linux/bitfield.h>
#include <linux/clk-provider.h>
-
-#define NSEC_PER_SEC 1000000000L
+#include <linux/time.h>
#define REG_PWM_A 0x0
#define REG_PWM_B 0x4
diff --git a/drivers/pwm/pwm-mtk.c b/drivers/pwm/pwm-mtk.c
index 11e7444..ad845ed 100644
--- a/drivers/pwm/pwm-mtk.c
+++ b/drivers/pwm/pwm-mtk.c
@@ -12,6 +12,7 @@
#include <div64.h>
#include <linux/bitops.h>
#include <linux/io.h>
+#include <linux/time.h>
/* PWM registers and bits definitions */
#define PWMCON 0x00
@@ -27,8 +28,6 @@
#define PWM_CLK_DIV_MAX 7
#define MAX_PWM_NUM 8
-#define NSEC_PER_SEC 1000000000L
-
enum mtk_pwm_reg_ver {
PWM_REG_V1,
PWM_REG_V2,
diff --git a/drivers/pwm/pwm-ti-ehrpwm.c b/drivers/pwm/pwm-ti-ehrpwm.c
index f099145..fefa3c6 100644
--- a/drivers/pwm/pwm-ti-ehrpwm.c
+++ b/drivers/pwm/pwm-ti-ehrpwm.c
@@ -14,8 +14,7 @@
#include <dm/device_compat.h>
#include <pwm.h>
#include <asm/io.h>
-
-#define NSEC_PER_SEC 1000000000L
+#include <linux/time.h>
/* Time base module registers */
#define TI_EHRPWM_TBCTL 0x00
diff --git a/drivers/qe/fdt.c b/drivers/qe/fdt.c
index 6195c7c..fa9e406 100644
--- a/drivers/qe/fdt.c
+++ b/drivers/qe/fdt.c
@@ -6,7 +6,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <asm/global_data.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 2825dc6..9631337 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -6,7 +6,6 @@
* based on source code of Shlomi Gridish
*/
-#include <common.h>
#include <malloc.h>
#include <command.h>
#include <asm/global_data.h>
@@ -24,6 +23,9 @@
#include <asm/armv8/mmu.h>
#include <asm/arch/cpu.h>
#endif
+#ifdef CONFIG_PPC
+#include <asm/ppc.h>
+#endif
#define MPC85xx_DEVDISR_QE_DISABLE 0x1
diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
index a801412..7e21c4a 100644
--- a/drivers/scsi/Kconfig
+++ b/drivers/scsi/Kconfig
@@ -1,46 +1,9 @@
config SCSI
- bool "Support SCSI controllers"
+ bool "Support SCSI controllers with driver model"
help
This enables support for SCSI (Small Computer System Interface),
a parallel interface widely used with storage peripherals such as
hard drives and optical drives. The SCSI standards define physical
interfaces as well as protocols for controlling devices and
- tranferring data.
-
-config DM_SCSI
- bool "Support SCSI controllers with driver model"
- help
- This option enables the SCSI (Small Computer System Interface) uclass
- which supports SCSI and SATA HDDs. For every device configuration
- (IDs/LUNs) a block device is created with RAW read/write and
- filesystem support.
-
-if SCSI && !DM_SCSI
-
-config SCSI_AHCI_PLAT
- bool "Platform-specific init of AHCI"
- help
- This enables a way for boards to set up an AHCI device manually, by
- called ahci_init() and providing an ahci_reset() mechanism.
-
- This is deprecated. An AHCI driver should be provided instead.
-
-config SYS_SCSI_MAX_SCSI_ID
- int "Maximum supported SCSI ID"
- default 1
- help
- Sets the maximum number of SCSI IDs to scan when looking for devices.
- IDs from 0 to (this value - 1) are scanned.
-
- This is deprecated and is not needed when BLK is enabled.
-
-config SYS_SCSI_MAX_LUN
- int "Maximum support SCSI LUN"
- default 1
- help
- Sets the maximum number of SCSI Logical Unit Numbers (LUNs) to scan on
- devices. LUNs from 0 to (this value - 1) are scanned.
-
- This is deprecated and is not needed when CONFIG_DM_SCSI is enabled.
-
-endif
+ tranferring data. For every device configuration (IDs/LUNs) a block
+ device is created with RAW read/write and filesystem support.
diff --git a/drivers/scsi/Makefile b/drivers/scsi/Makefile
index d8d6de5..628be4c 100644
--- a/drivers/scsi/Makefile
+++ b/drivers/scsi/Makefile
@@ -4,25 +4,16 @@
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
ifndef CONFIG_SPL_BUILD
-obj-$(CONFIG_DM_SCSI) += scsi-uclass.o
-obj-$(CONFIG_SCSI) += scsi.o
-
+obj-$(CONFIG_SCSI) += scsi.o scsi-uclass.o
ifdef CONFIG_SCSI
-ifdef CONFIG_DM_SCSI
obj-$(CONFIG_$(SPL_TPL_)BOOTSTD) += scsi_bootdev.o
-endif
+obj-$(CONFIG_SANDBOX) += sandbox_scsi.o
+obj-$(CONFIG_SANDBOX) += scsi_emul.o
endif
-
endif
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_SPL_SATA
-obj-$(CONFIG_DM_SCSI) += scsi-uclass.o
-obj-$(CONFIG_SCSI) += scsi.o
+obj-$(CONFIG_SCSI) += scsi.o scsi-uclass.o
endif
endif
-
-ifdef CONFIG_SCSI
-obj-$(CONFIG_SANDBOX) += sandbox_scsi.o
-obj-$(CONFIG_SANDBOX) += scsi_emul.o
-endif
diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c
index 1330482..79ee400 100644
--- a/drivers/scsi/scsi.c
+++ b/drivers/scsi/scsi.c
@@ -21,38 +21,10 @@
#include <dm/device-internal.h>
#include <dm/uclass-internal.h>
-#if !defined(CONFIG_DM_SCSI)
-# ifdef CFG_SCSI_DEV_LIST
-# define SCSI_DEV_LIST CFG_SCSI_DEV_LIST
-# else
-# ifdef CONFIG_SATA_ULI5288
-
-# define SCSI_VEND_ID 0x10b9
-# define SCSI_DEV_ID 0x5288
-
-# elif !defined(CONFIG_SCSI_AHCI_PLAT)
-# error no scsi device defined
-# endif
-# define SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
-# endif
-#endif
-
-#if defined(CONFIG_PCI) && !defined(CONFIG_SCSI_AHCI_PLAT) && \
- !defined(CONFIG_DM_SCSI)
-const struct pci_device_id scsi_device_list[] = { SCSI_DEV_LIST };
-#endif
static struct scsi_cmd tempccb; /* temporary scsi command buffer */
DEFINE_CACHE_ALIGN_BUFFER(u8, tempbuff, 512); /* temporary data buffer */
-#if !defined(CONFIG_DM_SCSI)
-static int scsi_max_devs; /* number of highest available scsi device */
-
-static int scsi_curr_dev; /* current device */
-
-static struct blk_desc scsi_dev_desc[SCSI_MAX_DEVICE];
-#endif
-
/* almost the maximum amount of the scsi_ext command.. */
#define SCSI_MAX_BLK 0xFFFF
#define SCSI_LBA48_READ 0xFFFFFFF
@@ -107,7 +79,6 @@
pccb->msgout[0] = SCSI_IDENTIFY; /* NOT USED */
}
-#ifdef CONFIG_BLK
static void scsi_setup_read_ext(struct scsi_cmd *pccb, lbaint_t start,
unsigned short blocks)
{
@@ -286,59 +257,6 @@
return 1;
}
#endif /* CONFIG_BOUNCE_BUFFER */
-#endif
-
-#if defined(CONFIG_PCI) && !defined(CONFIG_SCSI_AHCI_PLAT) && \
- !defined(CONFIG_DM_SCSI)
-void scsi_init(void)
-{
- int busdevfunc = -1;
- int i;
- /*
- * Find a device from the list, this driver will support a single
- * controller.
- */
- for (i = 0; i < ARRAY_SIZE(scsi_device_list); i++) {
- /* get PCI Device ID */
- struct udevice *dev;
- int ret;
-
- ret = dm_pci_find_device(scsi_device_list[i].vendor,
- scsi_device_list[i].device, 0, &dev);
- if (!ret) {
- busdevfunc = dm_pci_get_bdf(dev);
- break;
- }
- if (busdevfunc != -1)
- break;
- }
-
- if (busdevfunc == -1) {
- printf("Error: SCSI Controller(s) ");
- for (i = 0; i < ARRAY_SIZE(scsi_device_list); i++) {
- printf("%04X:%04X ",
- scsi_device_list[i].vendor,
- scsi_device_list[i].device);
- }
- printf("not found\n");
- return;
- }
-#ifdef DEBUG
- else {
- printf("SCSI Controller (%04X,%04X) found (%d:%d:%d)\n",
- scsi_device_list[i].vendor,
- scsi_device_list[i].device,
- (busdevfunc >> 16) & 0xFF,
- (busdevfunc >> 11) & 0x1F,
- (busdevfunc >> 8) & 0x7);
- }
-#endif
- bootstage_start(BOOTSTAGE_ID_ACCUM_SCSI, "ahci");
- scsi_low_level_init(busdevfunc);
- scsi_scan(true);
- bootstage_accum(BOOTSTAGE_ID_ACCUM_SCSI);
-}
-#endif
/* copy src to dest, skipping leading and trailing blanks
* and null terminate the string
@@ -462,25 +380,6 @@
#endif /* CONFIG_BOUNCE_BUFFER */
}
-#if !defined(CONFIG_DM_SCSI)
-/**
- * scsi_init_dev_desc - initialize all SCSI specific blk_desc properties
- *
- * @dev_desc: Block device description pointer
- * @devnum: Device number
- */
-static void scsi_init_dev_desc(struct blk_desc *dev_desc, int devnum)
-{
- dev_desc->lba = 0;
- dev_desc->blksz = 0;
- dev_desc->uclass_id = UCLASS_SCSI;
- dev_desc->devnum = devnum;
- dev_desc->part_type = PART_TYPE_UNKNOWN;
-
- scsi_init_dev_desc_priv(dev_desc);
-}
-#endif
-
/**
* scsi_detect_dev - Detect scsi device
*
@@ -569,7 +468,6 @@
* (re)-scan the scsi bus and reports scsi device info
* to the user if mode = 1
*/
-#if defined(CONFIG_DM_SCSI)
static int do_scsi_scan_one(struct udevice *dev, int id, int lun, bool verbose)
{
int ret;
@@ -690,48 +588,7 @@
return 0;
}
-#else
-int scsi_scan(bool verbose)
-{
- unsigned char i, lun;
- int ret;
- if (verbose)
- printf("scanning bus for devices...\n");
- for (i = 0; i < SCSI_MAX_DEVICE; i++)
- scsi_init_dev_desc(&scsi_dev_desc[i], i);
-
- scsi_max_devs = 0;
- for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
- for (lun = 0; lun < CONFIG_SYS_SCSI_MAX_LUN; lun++) {
- struct blk_desc *bdesc = &scsi_dev_desc[scsi_max_devs];
-
- ret = scsi_detect_dev(NULL, i, lun, bdesc);
- if (ret)
- continue;
- part_init(bdesc);
-
- if (verbose) {
- printf(" Device %d: ", bdesc->devnum);
- dev_print(bdesc);
- }
- scsi_max_devs++;
- } /* next LUN */
- }
- if (scsi_max_devs > 0)
- scsi_curr_dev = 0;
- else
- scsi_curr_dev = -1;
-
- printf("Found %d device(s).\n", scsi_max_devs);
-#ifndef CONFIG_SPL_BUILD
- env_set_ulong("scsidevs", scsi_max_devs);
-#endif
- return 0;
-}
-#endif
-
-#ifdef CONFIG_BLK
static const struct blk_ops scsi_blk_ops = {
.read = scsi_read,
.write = scsi_write,
@@ -745,11 +602,3 @@
.id = UCLASS_BLK,
.ops = &scsi_blk_ops,
};
-#else
-U_BOOT_LEGACY_BLK(scsi) = {
- .uclass_idname = "scsi",
- .uclass_id = UCLASS_SCSI,
- .max_devs = SCSI_MAX_DEVICE,
- .desc = scsi_dev_desc,
-};
-#endif
diff --git a/drivers/serial/serial_msm_geni.c b/drivers/serial/serial_msm_geni.c
index 78fd938..b8bc614 100644
--- a/drivers/serial/serial_msm_geni.c
+++ b/drivers/serial/serial_msm_geni.c
@@ -13,14 +13,13 @@
#include <dm.h>
#include <errno.h>
#include <linux/delay.h>
+#include <linux/time.h>
#include <misc.h>
#include <serial.h>
#define UART_OVERSAMPLING 32
#define STALE_TIMEOUT 160
-#define USEC_PER_SEC 1000000L
-
/* Registers*/
#define GENI_FORCE_DEFAULT_REG 0x20
#define GENI_SER_M_CLK_CFG 0x48
diff --git a/drivers/serial/serial_npcm.c b/drivers/serial/serial_npcm.c
index 76ac7cb..6bf3a94 100644
--- a/drivers/serial/serial_npcm.c
+++ b/drivers/serial/serial_npcm.c
@@ -83,8 +83,11 @@
struct npcm_uart *uart = plat->reg;
u16 divisor;
+ if (IS_ENABLED(CONFIG_SYS_SKIP_UART_INIT))
+ return 0;
+
/* BaudOut = UART Clock / (16 * [Divisor + 2]) */
- divisor = DIV_ROUND_CLOSEST(plat->uart_clk, 16 * baudrate + 2) - 2;
+ divisor = DIV_ROUND_CLOSEST(plat->uart_clk, 16 * baudrate) - 2;
setbits_8(&uart->lcr, LCR_DLAB);
writeb(divisor & 0xff, &uart->dll);
@@ -97,29 +100,35 @@
static int npcm_serial_probe(struct udevice *dev)
{
struct npcm_serial_plat *plat = dev_get_plat(dev);
- struct npcm_uart *uart = plat->reg;
+ struct npcm_uart *uart;
struct clk clk, parent;
u32 freq;
int ret;
plat->reg = dev_read_addr_ptr(dev);
- freq = dev_read_u32_default(dev, "clock-frequency", 0);
+ uart = plat->reg;
- ret = clk_get_by_index(dev, 0, &clk);
- if (ret < 0)
- return ret;
+ if (!IS_ENABLED(CONFIG_SYS_SKIP_UART_INIT)) {
+ freq = dev_read_u32_default(dev, "clock-frequency", 24000000);
- ret = clk_get_by_index(dev, 1, &parent);
- if (!ret) {
- ret = clk_set_parent(&clk, &parent);
- if (ret)
+ ret = clk_get_by_index(dev, 0, &clk);
+ if (ret < 0)
return ret;
- }
- ret = clk_set_rate(&clk, freq);
- if (ret < 0)
- return ret;
- plat->uart_clk = ret;
+ ret = clk_get_by_index(dev, 1, &parent);
+ if (!ret) {
+ ret = clk_set_parent(&clk, &parent);
+ if (ret)
+ return ret;
+ }
+
+ if (freq) {
+ ret = clk_set_rate(&clk, freq);
+ if (ret < 0)
+ return ret;
+ }
+ plat->uart_clk = clk_get_rate(&clk);
+ }
/* Disable all interrupt */
writeb(0, &uart->ier);
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index 23d476f..fb03954 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -30,7 +30,7 @@
*/
#define ONE_BYTE_B115200_US 87
-static void _stm32_serial_setbrg(fdt_addr_t base,
+static void _stm32_serial_setbrg(void __iomem *base,
struct stm32_uart_info *uart_info,
u32 clock_rate,
int baudrate)
@@ -75,7 +75,7 @@
struct stm32x7_serial_plat *plat = dev_get_plat(dev);
bool stm32f4 = plat->uart_info->stm32f4;
u8 uart_enable_bit = plat->uart_info->uart_enable_bit;
- u32 cr1 = plat->base + CR1_OFFSET(stm32f4);
+ void __iomem *cr1 = plat->base + CR1_OFFSET(stm32f4);
u32 config = 0;
uint parity = SERIAL_GET_PARITY(serial_config);
uint bits = SERIAL_GET_BITS(serial_config);
@@ -122,7 +122,7 @@
{
struct stm32x7_serial_plat *plat = dev_get_plat(dev);
bool stm32f4 = plat->uart_info->stm32f4;
- fdt_addr_t base = plat->base;
+ void __iomem *base = plat->base;
u32 isr = readl(base + ISR_OFFSET(stm32f4));
if ((isr & USART_ISR_RXNE) == 0)
@@ -141,7 +141,7 @@
return readl(base + RDR_OFFSET(stm32f4));
}
-static int _stm32_serial_putc(fdt_addr_t base,
+static int _stm32_serial_putc(void __iomem *base,
struct stm32_uart_info *uart_info,
const char c)
{
@@ -166,7 +166,7 @@
{
struct stm32x7_serial_plat *plat = dev_get_plat(dev);
bool stm32f4 = plat->uart_info->stm32f4;
- fdt_addr_t base = plat->base;
+ void __iomem *base = plat->base;
if (input)
return readl(base + ISR_OFFSET(stm32f4)) &
@@ -176,7 +176,7 @@
USART_ISR_TXE ? 0 : 1;
}
-static void _stm32_serial_init(fdt_addr_t base,
+static void _stm32_serial_init(void __iomem *base,
struct stm32_uart_info *uart_info)
{
bool stm32f4 = uart_info->stm32f4;
@@ -250,11 +250,14 @@
static int stm32_serial_of_to_plat(struct udevice *dev)
{
struct stm32x7_serial_plat *plat = dev_get_plat(dev);
+ fdt_addr_t addr;
- plat->base = dev_read_addr(dev);
- if (plat->base == FDT_ADDR_T_NONE)
+ addr = dev_read_addr(dev);
+ if (addr == FDT_ADDR_T_NONE)
return -EINVAL;
+ plat->base = (void __iomem *)addr;
+
return 0;
}
@@ -297,7 +300,7 @@
static inline void _debug_uart_init(void)
{
- fdt_addr_t base = CONFIG_VAL(DEBUG_UART_BASE);
+ void __iomem *base = (void __iomem *)CONFIG_VAL(DEBUG_UART_BASE);
struct stm32_uart_info *uart_info = _debug_uart_info();
_stm32_serial_init(base, uart_info);
@@ -308,7 +311,7 @@
static inline void _debug_uart_putc(int c)
{
- fdt_addr_t base = CONFIG_VAL(DEBUG_UART_BASE);
+ void __iomem *base = (void __iomem *)CONFIG_VAL(DEBUG_UART_BASE);
struct stm32_uart_info *uart_info = _debug_uart_info();
while (_stm32_serial_putc(base, uart_info, c) == -EAGAIN)
diff --git a/drivers/serial/serial_stm32.h b/drivers/serial/serial_stm32.h
index b7e7a90..d2c92ba 100644
--- a/drivers/serial/serial_stm32.h
+++ b/drivers/serial/serial_stm32.h
@@ -49,7 +49,7 @@
/* Information about a serial port */
struct stm32x7_serial_plat {
- fdt_addr_t base; /* address of registers in physical memory */
+ void __iomem *base; /* address of registers in physical memory */
struct stm32_uart_info *uart_info;
unsigned long int clock_rate;
};
diff --git a/drivers/soc/ti/keystone_serdes.c b/drivers/soc/ti/keystone_serdes.c
index 2ece1a8..0e1bf8f 100644
--- a/drivers/soc/ti/keystone_serdes.c
+++ b/drivers/soc/ti/keystone_serdes.c
@@ -8,6 +8,7 @@
#include <errno.h>
#include <common.h>
+#include <asm/io.h>
#include <asm/ti-common/keystone_serdes.h>
#include <linux/bitops.h>
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index cc3a54f..2efd626 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -7,7 +7,6 @@
#include <common.h>
#include <clk.h>
#include <log.h>
-#include <asm-generic/io.h>
#include <dm.h>
#include <fdtdec.h>
#include <malloc.h>
@@ -17,13 +16,13 @@
#include <dm/device_compat.h>
#include <linux/err.h>
#include <linux/errno.h>
+#include <linux/io.h>
#include <linux/sizes.h>
+#include <linux/time.h>
#include <zynqmp_firmware.h>
#include "cadence_qspi.h"
#include <dt-bindings/power/xlnx-versal-power.h>
-#define NSEC_PER_SEC 1000000000L
-
#define CQSPI_STIG_READ 0
#define CQSPI_STIG_WRITE 1
#define CQSPI_READ 2
diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c
index f8ec268..89907cb 100644
--- a/drivers/spi/fsl_dspi.c
+++ b/drivers/spi/fsl_dspi.c
@@ -27,9 +27,7 @@
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/printk.h>
-
-/* linux/include/time.h */
-#define NSEC_PER_SEC 1000000000L
+#include <linux/time.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/spi/meson_spifc_a1.c b/drivers/spi/meson_spifc_a1.c
index 099c4c0..cca4deb 100644
--- a/drivers/spi/meson_spifc_a1.c
+++ b/drivers/spi/meson_spifc_a1.c
@@ -16,6 +16,7 @@
#include <spi-mem.h>
#include <asm/io.h>
#include <linux/log2.h>
+#include <linux/time.h>
#include <linux/iopoll.h>
#include <linux/bitfield.h>
@@ -117,7 +118,7 @@
return readl_poll_timeout(spifc->base + SPIFC_A1_USER_CTRL0_REG,
val, (val & mask) == mask,
- 200 * 1000);
+ 200 * USEC_PER_MSEC);
}
static void amlogic_spifc_a1_drain_buffer(struct amlogic_spifc_a1 *spifc,
@@ -129,7 +130,7 @@
writel(SPIFC_A1_DBUF_AUTO_UPDATE_ADDR,
spifc->base + SPIFC_A1_DBUF_CTRL_REG);
- readsl(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count);
+ ioread32_rep(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count);
if (pad) {
data = readl(spifc->base + SPIFC_A1_DBUF_DATA_REG);
@@ -146,7 +147,7 @@
writel(SPIFC_A1_DBUF_DIR | SPIFC_A1_DBUF_AUTO_UPDATE_ADDR,
spifc->base + SPIFC_A1_DBUF_CTRL_REG);
- writesl(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count);
+ iowrite32_rep(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count);
if (pad) {
memcpy(&data, buf + len - pad, pad);
diff --git a/drivers/spi/spi-mem-nodm.c b/drivers/spi/spi-mem-nodm.c
index 6ee8413..6d9ab61 100644
--- a/drivers/spi/spi-mem-nodm.c
+++ b/drivers/spi/spi-mem-nodm.c
@@ -3,6 +3,7 @@
* Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
*/
+#include <errno.h>
#include <log.h>
#include <malloc.h>
#include <spi.h>
diff --git a/drivers/sysinfo/Kconfig b/drivers/sysinfo/Kconfig
index e35f7cb..2030e4b 100644
--- a/drivers/sysinfo/Kconfig
+++ b/drivers/sysinfo/Kconfig
@@ -8,6 +8,13 @@
if SYSINFO
+config SYSINFO_EXTRA
+ bool "Show extra information on startup"
+ help
+ Enable this to see extra information on startup. Normally only the
+ model is shown, but with this option the vendor and any prior-stage
+ firmware's version and date are shown as well.
+
config SPL_SYSINFO
depends on SPL_DM
bool "Enable board driver support in SPL"
diff --git a/drivers/sysreset/poweroff_gpio.c b/drivers/sysreset/poweroff_gpio.c
index a5c24fd..ad04e4b 100644
--- a/drivers/sysreset/poweroff_gpio.c
+++ b/drivers/sysreset/poweroff_gpio.c
@@ -33,7 +33,7 @@
int r;
if (type != SYSRESET_POWER_OFF)
- return -ENOSYS;
+ return -EPROTONOSUPPORT;
debug("GPIO poweroff\n");
diff --git a/drivers/sysreset/sysreset_psci.c b/drivers/sysreset/sysreset_psci.c
index a8a4152..aa09d0b 100644
--- a/drivers/sysreset/sysreset_psci.c
+++ b/drivers/sysreset/sysreset_psci.c
@@ -25,7 +25,7 @@
psci_sys_poweroff();
break;
default:
- return -ENOSYS;
+ return -EPROTONOSUPPORT;
}
return -EINPROGRESS;
diff --git a/drivers/sysreset/sysreset_sandbox.c b/drivers/sysreset/sysreset_sandbox.c
index f485a13..c12eda8 100644
--- a/drivers/sysreset/sysreset_sandbox.c
+++ b/drivers/sysreset/sysreset_sandbox.c
@@ -21,7 +21,7 @@
state->last_sysreset = type;
break;
default:
- return -ENOSYS;
+ return -EPROTONOSUPPORT;
}
if (!state->sysreset_allowed[type])
return -EACCES;
@@ -70,7 +70,7 @@
return -EACCES;
sandbox_exit();
default:
- return -ENOSYS;
+ return -EPROTONOSUPPORT;
}
if (!state->sysreset_allowed[type])
return -EACCES;
diff --git a/drivers/sysreset/sysreset_watchdog.c b/drivers/sysreset/sysreset_watchdog.c
index ceada2e..6db5aa7 100644
--- a/drivers/sysreset/sysreset_watchdog.c
+++ b/drivers/sysreset/sysreset_watchdog.c
@@ -29,7 +29,7 @@
return ret;
break;
default:
- return -ENOSYS;
+ return -EPROTONOSUPPORT;
}
return -EINPROGRESS;
diff --git a/drivers/sysreset/sysreset_x86.c b/drivers/sysreset/sysreset_x86.c
index 4936fdb..dc772b5 100644
--- a/drivers/sysreset/sysreset_x86.c
+++ b/drivers/sysreset/sysreset_x86.c
@@ -87,7 +87,7 @@
return ret;
return -EINPROGRESS;
default:
- return -ENOSYS;
+ return -EPROTONOSUPPORT;
}
outb(value, IO_PORT_RESET);
diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c
index 0c2018b..60ff655 100644
--- a/drivers/timer/timer-uclass.c
+++ b/drivers/timer/timer-uclass.c
@@ -66,13 +66,13 @@
err = clk_get_by_index(dev, 0, &timer_clk);
if (!err) {
ret = clk_get_rate(&timer_clk);
- if (IS_ERR_VALUE(ret))
- return ret;
- uc_priv->clock_rate = ret;
- } else {
- uc_priv->clock_rate =
- dev_read_u32_default(dev, "clock-frequency", 0);
+ if (!IS_ERR_VALUE(ret)) {
+ uc_priv->clock_rate = ret;
+ return 0;
+ }
}
+
+ uc_priv->clock_rate = dev_read_u32_default(dev, "clock-frequency", 0);
}
return 0;
diff --git a/drivers/tpm/tpm2_tis_core.c b/drivers/tpm/tpm2_tis_core.c
index 985a816..81b9210 100644
--- a/drivers/tpm/tpm2_tis_core.c
+++ b/drivers/tpm/tpm2_tis_core.c
@@ -224,9 +224,6 @@
u8 status;
int ret;
- if (!chip)
- return -ENODEV;
-
ret = tpm_tis_request_locality(dev, 0);
if (ret < 0)
return -EBUSY;
diff --git a/drivers/ufs/Kconfig b/drivers/ufs/Kconfig
index 0e0cc58..7da46fa 100644
--- a/drivers/ufs/Kconfig
+++ b/drivers/ufs/Kconfig
@@ -2,7 +2,7 @@
config UFS
bool "Support UFS controllers"
- depends on DM_SCSI
+ depends on SCSI
select CHARSET
help
This selects support for Universal Flash Subsystem (UFS).
@@ -15,6 +15,17 @@
This selects the platform driver for the Cadence UFS host
controller present on present TI's J721e devices.
+config UFS_PCI
+ bool "PCI bus based UFS Controller support"
+ depends on PCI && UFS
+ help
+ This selects the PCI UFS Host Controller Interface. Select this if
+ you have UFS Host Controller with PCI Interface.
+
+ If you have a controller with this interface, say Y here.
+
+ If unsure, say N.
+
config TI_J721E_UFS
bool "Glue Layer driver for UFS on TI J721E devices"
help
diff --git a/drivers/ufs/Makefile b/drivers/ufs/Makefile
index 56a4b07..67c4262 100644
--- a/drivers/ufs/Makefile
+++ b/drivers/ufs/Makefile
@@ -6,4 +6,5 @@
obj-$(CONFIG_UFS) += ufs.o ufs-uclass.o
obj-$(CONFIG_CADENCE_UFS) += cdns-platform.o
obj-$(CONFIG_TI_J721E_UFS) += ti-j721e-ufs.o
+obj-$(CONFIG_UFS_PCI) += ufs-pci.o
obj-$(CONFIG_UFS_RENESAS) += ufs-renesas.o
diff --git a/drivers/ufs/cdns-platform.c b/drivers/ufs/cdns-platform.c
index 9202b53..d1f3469 100644
--- a/drivers/ufs/cdns-platform.c
+++ b/drivers/ufs/cdns-platform.c
@@ -13,11 +13,10 @@
#include <dm/device_compat.h>
#include <linux/bitops.h>
#include <linux/err.h>
+#include <linux/time.h>
#include "ufs.h"
-#define USEC_PER_SEC 1000000L
-
#define CDNS_UFS_REG_HCLKDIV 0xFC
#define CDNS_UFS_REG_PHY_XCFGD1 0x113C
diff --git a/drivers/ufs/ufs-pci.c b/drivers/ufs/ufs-pci.c
new file mode 100644
index 0000000..ad41358
--- /dev/null
+++ b/drivers/ufs/ufs-pci.c
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 tinylab.org
+ * Author: Bin Meng <bmeng@tinylab.org>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <pci.h>
+#include <ufs.h>
+#include <dm/device_compat.h>
+#include "ufs.h"
+
+static int ufs_pci_bind(struct udevice *dev)
+{
+ struct udevice *scsi_dev;
+
+ return ufs_scsi_bind(dev, &scsi_dev);
+}
+
+static int ufs_pci_probe(struct udevice *dev)
+{
+ int err;
+
+ err = ufshcd_probe(dev, NULL);
+ if (err)
+ dev_err(dev, "%s failed (ret=%d)\n", __func__, err);
+
+ return err;
+}
+
+U_BOOT_DRIVER(ufs_pci) = {
+ .name = "ufs_pci",
+ .id = UCLASS_UFS,
+ .bind = ufs_pci_bind,
+ .probe = ufs_pci_probe,
+};
+
+static struct pci_device_id ufs_supported[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_REDHAT, PCI_DEVICE_ID_REDHAT_UFS) },
+ {},
+};
+
+U_BOOT_PCI_DEVICE(ufs_pci, ufs_supported);
diff --git a/drivers/ufs/ufs-uclass.c b/drivers/ufs/ufs-uclass.c
index e6478a9..92fcdf4 100644
--- a/drivers/ufs/ufs-uclass.c
+++ b/drivers/ufs/ufs-uclass.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/**
- * ufs-uclass.c - Universal Flash Subsystem (UFS) Uclass driver
+ * ufs-uclass.c - Universal Flash Storage (UFS) Uclass driver
*
* Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com
*/
diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c
index 346f0fd..e4400f3 100644
--- a/drivers/ufs/ufs.c
+++ b/drivers/ufs/ufs.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/**
- * ufs.c - Universal Flash Subsystem (UFS) driver
+ * ufs.c - Universal Flash Storage (UFS) driver
*
* Taken from Linux Kernel v5.2 (drivers/scsi/ufs/ufshcd.c) and ported
* to u-boot.
@@ -320,7 +320,7 @@
UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
0);
if (err) {
- dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
+ dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d\n",
__func__, peer, i, err);
break;
}
@@ -441,7 +441,7 @@
ufshcd_enable_run_stop_reg(hba);
} else {
dev_err(hba->dev,
- "Host controller not ready to process requests");
+ "Host controller not ready to process requests\n");
err = -EIO;
goto out;
}
@@ -930,7 +930,7 @@
memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
} else {
dev_warn(hba->dev,
- "%s: Response size is bigger than buffer",
+ "%s: Response size is bigger than buffer\n",
__func__);
return -EINVAL;
}
@@ -1179,11 +1179,11 @@
&header_len);
if (ret) {
- dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
+ dev_err(hba->dev, "%s: Failed to get descriptor header id %d\n",
__func__, desc_id);
return ret;
} else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
- dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
+ dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch\n",
__func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
desc_id);
ret = -EINVAL;
@@ -1302,7 +1302,7 @@
/* Sanity checks */
if (ret || !buff_len) {
- dev_err(hba->dev, "%s: Failed to get full descriptor length",
+ dev_err(hba->dev, "%s: Failed to get full descriptor length\n",
__func__);
return ret;
}
@@ -1323,14 +1323,14 @@
&buff_len);
if (ret) {
- dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
+ dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d\n",
__func__, desc_id, desc_index, param_offset, ret);
goto out;
}
/* Sanity check */
if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
- dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
+ dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header\n",
__func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
ret = -EINVAL;
goto out;
@@ -1914,6 +1914,7 @@
struct ufs_hba *hba = dev_get_uclass_priv(ufs_dev);
struct scsi_plat *scsi_plat;
struct udevice *scsi_dev;
+ void __iomem *mmio_base;
int err;
device_find_first_child(ufs_dev, &scsi_dev);
@@ -1927,7 +1928,14 @@
hba->dev = ufs_dev;
hba->ops = hba_ops;
- hba->mmio_base = dev_read_addr_ptr(ufs_dev);
+
+ if (device_is_on_pci_bus(ufs_dev)) {
+ mmio_base = dm_pci_map_bar(ufs_dev, PCI_BASE_ADDRESS_0, 0, 0,
+ PCI_REGION_TYPE, PCI_REGION_MEM);
+ } else {
+ mmio_base = dev_read_addr_ptr(ufs_dev);
+ }
+ hba->mmio_base = mmio_base;
/* Set descriptor lengths to specification defaults */
ufshcd_def_desc_sizes(hba);
@@ -1945,7 +1953,8 @@
hba->version != UFSHCI_VERSION_11 &&
hba->version != UFSHCI_VERSION_20 &&
hba->version != UFSHCI_VERSION_21 &&
- hba->version != UFSHCI_VERSION_30)
+ hba->version != UFSHCI_VERSION_30 &&
+ hba->version != UFSHCI_VERSION_31)
dev_err(hba->dev, "invalid UFS version 0x%x\n",
hba->version);
diff --git a/drivers/ufs/ufs.h b/drivers/ufs/ufs.h
index 9daaf03..816a5ce 100644
--- a/drivers/ufs/ufs.h
+++ b/drivers/ufs/ufs.h
@@ -782,6 +782,7 @@
UFSHCI_VERSION_20 = 0x00000200, /* 2.0 */
UFSHCI_VERSION_21 = 0x00000210, /* 2.1 */
UFSHCI_VERSION_30 = 0x00000300, /* 3.0 */
+ UFSHCI_VERSION_31 = 0x00000310, /* 3.1 */
};
/* Interrupt disable masks */
diff --git a/drivers/usb/cdns3/cdns3-ti.c b/drivers/usb/cdns3/cdns3-ti.c
index 92a7941..2e44aad 100644
--- a/drivers/usb/cdns3/cdns3-ti.c
+++ b/drivers/usb/cdns3/cdns3-ti.c
@@ -6,7 +6,6 @@
*/
#include <common.h>
-#include <asm-generic/io.h>
#include <clk.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 3aec8b0..4b4fcd8 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -31,6 +31,7 @@
#include <linux/usb/gadget.h>
#include <linux/bitfield.h>
#include <linux/math64.h>
+#include <linux/time.h>
#include "core.h"
#include "gadget.h"
@@ -38,8 +39,6 @@
#include "linux-compat.h"
-#define NSEC_PER_SEC 1000000000L
-
static LIST_HEAD(dwc3_list);
/* -------------------------------------------------------------------------- */
diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c
index e0356e6..1960352 100644
--- a/drivers/usb/dwc3/dwc3-meson-g12a.c
+++ b/drivers/usb/dwc3/dwc3-meson-g12a.c
@@ -8,13 +8,13 @@
#include <common.h>
#include <log.h>
-#include <asm-generic/io.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dwc3-uboot.h>
#include <generic-phy.h>
#include <linux/delay.h>
+#include <linux/io.h>
#include <linux/printk.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
diff --git a/drivers/usb/dwc3/dwc3-meson-gxl.c b/drivers/usb/dwc3/dwc3-meson-gxl.c
index d56f274..cbe8aaa 100644
--- a/drivers/usb/dwc3/dwc3-meson-gxl.c
+++ b/drivers/usb/dwc3/dwc3-meson-gxl.c
@@ -8,12 +8,12 @@
#define DEBUG
#include <common.h>
-#include <asm-generic/io.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dwc3-uboot.h>
#include <generic-phy.h>
+#include <linux/io.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <malloc.h>
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 4eccc5e..c72a804 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -17,6 +17,7 @@
bool "USB Gadget Support"
depends on DM
select DM_USB
+ imply CMD_BIND
help
USB is a master/slave protocol, organized with one master
host (such as a PC) controlling up to 127 peripheral devices.
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index 1d17331..c725aed 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -327,6 +327,7 @@
unsigned int short_packet_received:1;
unsigned int bad_lun_okay:1;
unsigned int running:1;
+ unsigned int eject:1;
int thread_wakeup_needed;
struct completion thread_notifier;
@@ -669,6 +670,10 @@
}
if (k == 10) {
+ /* Handle START-STOP UNIT */
+ if (common->eject)
+ return -EPIPE;
+
/* Handle CTRL+C */
if (ctrlc())
return -EPIPE;
@@ -1325,6 +1330,8 @@
return -EINVAL;
}
+ common->eject = 1;
+
return 0;
}
diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c
index ee9384f..ca2760c 100644
--- a/drivers/usb/gadget/f_sdp.c
+++ b/drivers/usb/gadget/f_sdp.c
@@ -744,7 +744,7 @@
{
debug("%s: sector %lx, count %lx, buf %lx\n",
__func__, sector, count, (ulong)buf);
- memcpy(buf, (void *)(load->dev + sector), count);
+ memcpy(buf, (void *)(load->priv + sector), count);
return count;
}
@@ -844,8 +844,8 @@
struct spl_load_info load;
debug("Found FIT\n");
- load.dev = header;
- load.bl_len = 1;
+ load.priv = header;
+ spl_set_bl_len(&load, 1);
load.read = sdp_load_read;
spl_load_simple_fit(spl_image, &load, 0,
header);
@@ -857,8 +857,8 @@
valid_container_hdr((void *)header)) {
struct spl_load_info load;
- load.dev = header;
- load.bl_len = 1;
+ load.priv = header;
+ spl_set_bl_len(&load, 1);
load.read = sdp_load_read;
spl_load_imx_container(spl_image, &load, 0);
return SDP_EXIT;
diff --git a/drivers/usb/gadget/udc/udc-core.c b/drivers/usb/gadget/udc/udc-core.c
index eb0b359..ba658d9 100644
--- a/drivers/usb/gadget/udc/udc-core.c
+++ b/drivers/usb/gadget/udc/udc-core.c
@@ -323,6 +323,7 @@
int usb_gadget_probe_driver(struct usb_gadget_driver *driver)
{
struct usb_udc *udc = NULL;
+ unsigned int udc_count = 0;
int ret;
if (!driver || !driver->bind || !driver->setup)
@@ -330,12 +331,22 @@
mutex_lock(&udc_lock);
list_for_each_entry(udc, &udc_list, list) {
+ udc_count++;
+
/* For now we take the first one */
if (!udc->driver)
goto found;
}
- printf("couldn't find an available UDC\n");
+ if (!udc_count)
+ printf("No UDC available in the system\n");
+ else
+ /* When this happens, users should 'unbind <class> <index>'
+ * using the output of 'dm tree' and looking at the line right
+ * after the USB peripheral/device controller.
+ */
+ printf("All UDCs in use (%d available), use the unbind command\n",
+ udc_count);
mutex_unlock(&udc_lock);
return -ENODEV;
found:
diff --git a/drivers/usb/musb-new/musb_io.h b/drivers/usb/musb-new/musb_io.h
index 72a5365..19b12f3 100644
--- a/drivers/usb/musb-new/musb_io.h
+++ b/drivers/usb/musb-new/musb_io.h
@@ -14,31 +14,7 @@
#ifndef __MUSB_LINUX_PLATFORM_ARCH_H__
#define __MUSB_LINUX_PLATFORM_ARCH_H__
-#ifndef __UBOOT__
#include <linux/io.h>
-#else
-#include <asm/io.h>
-#endif
-
-#if !defined(CONFIG_ARM) && !defined(CONFIG_SUPERH) \
- && !defined(CONFIG_PPC32) \
- && !defined(CONFIG_PPC64) && !defined(CONFIG_MIPS) \
- && !defined(CONFIG_M68K)
-static inline void readsl(const void __iomem *addr, void *buf, int len)
- { insl((unsigned long)addr, buf, len); }
-static inline void readsw(const void __iomem *addr, void *buf, int len)
- { insw((unsigned long)addr, buf, len); }
-static inline void readsb(const void __iomem *addr, void *buf, int len)
- { insb((unsigned long)addr, buf, len); }
-
-static inline void writesl(const void __iomem *addr, const void *buf, int len)
- { outsl((unsigned long)addr, buf, len); }
-static inline void writesw(const void __iomem *addr, const void *buf, int len)
- { outsw((unsigned long)addr, buf, len); }
-static inline void writesb(const void __iomem *addr, const void *buf, int len)
- { outsb((unsigned long)addr, buf, len); }
-
-#endif
/* NOTE: these offsets are all in bytes */
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index ab92764..6f319ba 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -180,7 +180,6 @@
config CONSOLE_TRUETYPE
bool "Support a console that uses TrueType fonts"
- select CMD_SELECT_FONT
help
TrueTrype fonts can provide outline-drawing capability rather than
needing to provide a bitmap for each font and size that is needed.
diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c
index 22fef7e..a7e0784 100644
--- a/drivers/video/dw_mipi_dsi.c
+++ b/drivers/video/dw_mipi_dsi.c
@@ -22,6 +22,7 @@
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/iopoll.h>
+#include <linux/time.h>
#include <video_bridge.h>
#define HWVER_131 0x31333100 /* IP version 1.31 */
@@ -214,8 +215,6 @@
#define PHY_STATUS_TIMEOUT_US 10000
#define CMD_PKT_STATUS_TIMEOUT_US 20000
-#define MSEC_PER_SEC 1000
-
struct dw_mipi_dsi {
struct mipi_dsi_host dsi_host;
struct mipi_dsi_device *device;
diff --git a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c
index 1a5ab78..5e75b6e 100644
--- a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c
+++ b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c
@@ -30,12 +30,11 @@
#include <asm/io.h>
#include <dm/device-internal.h>
#include <linux/bitops.h>
+#include <linux/time.h>
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/hardware.h>
-#define USEC_PER_SEC 1000000L
-
/*
* DSI wrapper registers & bit definitions
* Note: registers are named as in the Reference Manual
diff --git a/drivers/video/tegra20/tegra-dsi.c b/drivers/video/tegra20/tegra-dsi.c
index b4cf4fa..a48f9c8 100644
--- a/drivers/video/tegra20/tegra-dsi.c
+++ b/drivers/video/tegra20/tegra-dsi.c
@@ -14,6 +14,7 @@
#include <panel.h>
#include <linux/delay.h>
#include <linux/err.h>
+#include <linux/time.h>
#include <power/regulator.h>
#include <asm/gpio.h>
@@ -24,9 +25,6 @@
#include "mipi-phy.h"
-#define USEC_PER_SEC 1000000L
-#define NSEC_PER_SEC 1000000000L
-
struct tegra_dsi_priv {
struct mipi_dsi_host host;
struct mipi_dsi_device device;
diff --git a/drivers/virtio/Kconfig b/drivers/virtio/Kconfig
index 852f673..1de6886 100644
--- a/drivers/virtio/Kconfig
+++ b/drivers/virtio/Kconfig
@@ -56,7 +56,7 @@
config VIRTIO_NET
bool "virtio net driver"
- depends on VIRTIO
+ depends on VIRTIO && NETDEVICES
help
This is the virtual net driver for virtio. It can be used with
QEMU based targets.
diff --git a/drivers/watchdog/sunxi_wdt.c b/drivers/watchdog/sunxi_wdt.c
index b40a1d2..8eeac93 100644
--- a/drivers/watchdog/sunxi_wdt.c
+++ b/drivers/watchdog/sunxi_wdt.c
@@ -9,8 +9,7 @@
#include <wdt.h>
#include <asm/io.h>
#include <linux/delay.h>
-
-#define MSEC_PER_SEC 1000
+#include <linux/time.h>
#define WDT_MAX_TIMEOUT 16
#define WDT_TIMEOUT_MASK 0xf
diff --git a/drivers/xen/pvblock.c b/drivers/xen/pvblock.c
index 4ad548d..1df04e2 100644
--- a/drivers/xen/pvblock.c
+++ b/drivers/xen/pvblock.c
@@ -632,7 +632,8 @@
memcpy(blk_dev->bounce_buffer, buffer, desc->blksz);
aiocb.aio_nbytes = unaligned ? desc->blksz :
- min((size_t)(BLKIF_MAX_SEGMENTS_PER_REQUEST * PAGE_SIZE),
+ min((size_t)((BLKIF_MAX_SEGMENTS_PER_REQUEST - 1)
+ * PAGE_SIZE),
(size_t)(blocks_todo * desc->blksz));
blkfront_io(&aiocb, write);
diff --git a/env/common.c b/env/common.c
index eb1a913..656748c 100644
--- a/env/common.c
+++ b/env/common.c
@@ -37,11 +37,116 @@
};
/*
- * This env_set() function is defined in cmd/nvedit.c, since it calls
- * _do_env_set(), whis is a static function in that file.
- *
- * int env_set(const char *varname, const char *varvalue);
+ * This variable is incremented each time we set an environment variable so we
+ * can be check via env_get_id() to see if the environment has changed or not.
+ * This makes it possible to reread an environment variable only if the
+ * environment was changed, typically used by networking code.
*/
+static int env_id = 1;
+
+int env_get_id(void)
+{
+ return env_id;
+}
+
+void env_inc_id(void)
+{
+ env_id++;
+}
+
+int env_do_env_set(int flag, int argc, char *const argv[], int env_flag)
+{
+ int i, len;
+ char *name, *value, *s;
+ struct env_entry e, *ep;
+
+ debug("Initial value for argc=%d\n", argc);
+
+#if !IS_ENABLED(CONFIG_SPL_BUILD) && IS_ENABLED(CONFIG_CMD_NVEDIT_EFI)
+ if (argc > 1 && argv[1][0] == '-' && argv[1][1] == 'e')
+ return do_env_set_efi(NULL, flag, --argc, ++argv);
+#endif
+
+ while (argc > 1 && **(argv + 1) == '-') {
+ char *arg = *++argv;
+
+ --argc;
+ while (*++arg) {
+ switch (*arg) {
+ case 'f': /* force */
+ env_flag |= H_FORCE;
+ break;
+ default:
+ return CMD_RET_USAGE;
+ }
+ }
+ }
+ debug("Final value for argc=%d\n", argc);
+ name = argv[1];
+
+ if (strchr(name, '=')) {
+ printf("## Error: illegal character '='"
+ "in variable name \"%s\"\n", name);
+ return 1;
+ }
+
+ env_inc_id();
+
+ /* Delete only ? */
+ if (argc < 3 || argv[2] == NULL) {
+ int rc = hdelete_r(name, &env_htab, env_flag);
+
+ /* If the variable didn't exist, don't report an error */
+ return rc && rc != -ENOENT ? 1 : 0;
+ }
+
+ /*
+ * Insert / replace new value
+ */
+ for (i = 2, len = 0; i < argc; ++i)
+ len += strlen(argv[i]) + 1;
+
+ value = malloc(len);
+ if (value == NULL) {
+ printf("## Can't malloc %d bytes\n", len);
+ return 1;
+ }
+ for (i = 2, s = value; i < argc; ++i) {
+ char *v = argv[i];
+
+ while ((*s++ = *v++) != '\0')
+ ;
+ *(s - 1) = ' ';
+ }
+ if (s != value)
+ *--s = '\0';
+
+ e.key = name;
+ e.data = value;
+ hsearch_r(e, ENV_ENTER, &ep, &env_htab, env_flag);
+ free(value);
+ if (!ep) {
+ printf("## Error inserting \"%s\" variable, errno=%d\n",
+ name, errno);
+ return 1;
+ }
+
+ return 0;
+}
+
+int env_set(const char *varname, const char *varvalue)
+{
+ const char * const argv[4] = { "setenv", varname, varvalue, NULL };
+
+ /* before import into hashtable */
+ if (!(gd->flags & GD_FLG_ENV_READY))
+ return 1;
+
+ if (varvalue == NULL || varvalue[0] == '\0')
+ return env_do_env_set(0, 2, (char * const *)argv, H_PROGRAMMATIC);
+ else
+ return env_do_env_set(0, 3, (char * const *)argv, H_PROGRAMMATIC);
+}
/**
* Set an environment variable to an integer value
diff --git a/env/ext4.c b/env/ext4.c
index 47e05a4..da26705 100644
--- a/env/ext4.c
+++ b/env/ext4.c
@@ -77,7 +77,7 @@
dev = dev_desc->devnum;
ext4fs_set_blk_dev(dev_desc, &info);
- if (!ext4fs_mount(info.size)) {
+ if (!ext4fs_mount()) {
printf("\n** Unable to use %s %s for saveenv **\n",
ifname, dev_and_part);
return 1;
@@ -160,7 +160,7 @@
dev = dev_desc->devnum;
ext4fs_set_blk_dev(dev_desc, &info);
- if (!ext4fs_mount(info.size)) {
+ if (!ext4fs_mount()) {
printf("\n** Unable to use %s %s for loading the env **\n",
ifname, dev_and_part);
goto err_env_relocate;
diff --git a/fs/btrfs/btrfs.c b/fs/btrfs/btrfs.c
index 4cdbbbe..1149a3b 100644
--- a/fs/btrfs/btrfs.c
+++ b/fs/btrfs/btrfs.c
@@ -228,7 +228,7 @@
{
struct btrfs_fs_info *fs_info = current_fs_info;
struct btrfs_root *root;
- loff_t real_size = 0;
+ loff_t real_size;
u64 ino;
u8 type;
int ret;
@@ -246,16 +246,13 @@
return -EINVAL;
}
- if (!len) {
- ret = btrfs_size(file, &real_size);
- if (ret < 0) {
- error("Failed to get inode size: %s", file);
- return ret;
- }
- len = real_size;
+ ret = btrfs_size(file, &real_size);
+ if (ret < 0) {
+ error("Failed to get inode size: %s", file);
+ return ret;
}
- if (len > real_size - offset)
+ if (!len || len > real_size - offset)
len = real_size - offset;
ret = btrfs_file_read(root, ino, offset, len, buf);
diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index f50de7c..ea9b922 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -2368,7 +2368,7 @@
return -1;
}
-int ext4fs_mount(unsigned part_length)
+int ext4fs_mount(void)
{
struct ext2_data *data;
int status;
diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c
index 4c89152..3b12ec5 100644
--- a/fs/ext4/ext4fs.c
+++ b/fs/ext4/ext4fs.c
@@ -233,7 +233,7 @@
{
ext4fs_set_blk_dev(fs_dev_desc, fs_partition);
- if (!ext4fs_mount(fs_partition->size)) {
+ if (!ext4fs_mount()) {
ext4fs_close();
return -1;
}
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 8ff1fd0..14e53cf 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -18,12 +18,17 @@
#include <fs.h>
#include <log.h>
#include <asm/byteorder.h>
+#include <asm/unaligned.h>
#include <part.h>
#include <malloc.h>
#include <memalign.h>
#include <asm/cache.h>
#include <linux/compiler.h>
#include <linux/ctype.h>
+#include <linux/log2.h>
+
+/* maximum number of clusters for FAT12 */
+#define MAX_FAT12 0xFF4
/*
* Convert a string to lowercase. Converts at most 'len' characters,
@@ -484,6 +489,73 @@
}
/*
+ * Determine if the FAT type is FAT12 or FAT16
+ *
+ * Based on fat_fill_super() from the Linux kernel's fs/fat/inode.c
+ */
+static int determine_legacy_fat_bits(const boot_sector *bs)
+{
+ u16 fat_start = bs->reserved;
+ u32 dir_start = fat_start + bs->fats * bs->fat_length;
+ u32 rootdir_sectors = get_unaligned_le16(bs->dir_entries) *
+ sizeof(dir_entry) /
+ get_unaligned_le16(bs->sector_size);
+ u32 data_start = dir_start + rootdir_sectors;
+ u16 sectors = get_unaligned_le16(bs->sectors);
+ u32 total_sectors = sectors ? sectors : bs->total_sect;
+ u32 total_clusters = (total_sectors - data_start) /
+ bs->cluster_size;
+
+ return (total_clusters > MAX_FAT12) ? 16 : 12;
+}
+
+/*
+ * Determines if the boot sector's media field is valid
+ *
+ * Based on fat_valid_media() from Linux kernel's include/linux/msdos_fs.h
+ */
+static int fat_valid_media(u8 media)
+{
+ return media >= 0xf8 || media == 0xf0;
+}
+
+/*
+ * Determines if the given boot sector is valid
+ *
+ * Based on fat_read_bpb() from the Linux kernel's fs/fat/inode.c
+ */
+static int is_bootsector_valid(const boot_sector *bs)
+{
+ u16 sector_size = get_unaligned_le16(bs->sector_size);
+ u16 dir_per_block = sector_size / sizeof(dir_entry);
+
+ if (!bs->reserved)
+ return 0;
+
+ if (!bs->fats)
+ return 0;
+
+ if (!fat_valid_media(bs->media))
+ return 0;
+
+ if (!is_power_of_2(sector_size) ||
+ sector_size < 512 ||
+ sector_size > 4096)
+ return 0;
+
+ if (!is_power_of_2(bs->cluster_size))
+ return 0;
+
+ if (!bs->fat_length && !bs->fat32_length)
+ return 0;
+
+ if (get_unaligned_le16(bs->dir_entries) & (dir_per_block - 1))
+ return 0;
+
+ return 1;
+}
+
+/*
* Read boot sector and volume info from a FAT filesystem
*/
static int
@@ -506,7 +578,8 @@
if (disk_read(0, 1, block) < 0) {
debug("Error: reading block\n");
- goto fail;
+ ret = -1;
+ goto out_free;
}
memcpy(bs, block, sizeof(boot_sector));
@@ -516,8 +589,14 @@
bs->heads = FAT2CPU16(bs->heads);
bs->total_sect = FAT2CPU32(bs->total_sect);
+ if (!is_bootsector_valid(bs)) {
+ debug("Error: bootsector is invalid\n");
+ ret = -1;
+ goto out_free;
+ }
+
/* FAT32 entries */
- if (bs->fat_length == 0) {
+ if (!bs->fat_length && bs->fat32_length) {
/* Assume FAT32 */
bs->fat32_length = FAT2CPU32(bs->fat32_length);
bs->flags = FAT2CPU16(bs->flags);
@@ -528,28 +607,11 @@
*fatsize = 32;
} else {
vistart = (volume_info *)&(bs->fat32_length);
- *fatsize = 0;
+ *fatsize = determine_legacy_fat_bits(bs);
}
memcpy(volinfo, vistart, sizeof(volume_info));
- if (*fatsize == 32) {
- if (strncmp(FAT32_SIGN, vistart->fs_type, SIGNLEN) == 0)
- goto exit;
- } else {
- if (strncmp(FAT12_SIGN, vistart->fs_type, SIGNLEN) == 0) {
- *fatsize = 12;
- goto exit;
- }
- if (strncmp(FAT16_SIGN, vistart->fs_type, SIGNLEN) == 0) {
- *fatsize = 16;
- goto exit;
- }
- }
-
- debug("Error: broken fs_type sign\n");
-fail:
- ret = -1;
-exit:
+out_free:
free(block);
return ret;
}
@@ -571,7 +633,7 @@
mydata->total_sect = bs.total_sect;
} else {
mydata->fatlength = bs.fat_length;
- mydata->total_sect = (bs.sectors[1] << 8) + bs.sectors[0];
+ mydata->total_sect = get_unaligned_le16(bs.sectors);
if (!mydata->total_sect)
mydata->total_sect = bs.total_sect;
}
@@ -583,7 +645,7 @@
mydata->rootdir_sect = mydata->fat_sect + mydata->fatlength * bs.fats;
- mydata->sect_size = (bs.sector_size[1] << 8) + bs.sector_size[0];
+ mydata->sect_size = get_unaligned_le16(bs.sector_size);
mydata->clust_size = bs.cluster_size;
if (mydata->sect_size != cur_part_info.blksz) {
log_err("FAT sector size mismatch (fs=%u, dev=%lu)\n",
@@ -607,8 +669,7 @@
(mydata->clust_size * 2);
mydata->root_cluster = bs.root_cluster;
} else {
- mydata->rootdir_size = ((bs.dir_entries[1] * (int)256 +
- bs.dir_entries[0]) *
+ mydata->rootdir_size = (get_unaligned_le16(bs.dir_entries) *
sizeof(dir_entry)) /
mydata->sect_size;
mydata->data_begin = mydata->rootdir_sect +
@@ -1157,9 +1218,8 @@
memcpy(vol_label, volinfo.volume_label, 11);
vol_label[11] = '\0';
- volinfo.fs_type[5] = '\0';
- printf("Filesystem: %s \"%s\"\n", volinfo.fs_type, vol_label);
+ printf("Filesystem: FAT%d \"%s\"\n", fatsize, vol_label);
return 0;
}
diff --git a/fs/squashfs/sqfs_decompressor.c b/fs/squashfs/sqfs_decompressor.c
index 6b3e01c..cfd1153 100644
--- a/fs/squashfs/sqfs_decompressor.c
+++ b/fs/squashfs/sqfs_decompressor.c
@@ -18,6 +18,10 @@
#include <u-boot/zlib.h>
#endif
+#if IS_ENABLED(CONFIG_LZ4)
+#include <u-boot/lz4.h>
+#endif
+
#if IS_ENABLED(CONFIG_ZSTD)
#include <linux/zstd.h>
#endif
@@ -38,6 +42,10 @@
case SQFS_COMP_ZLIB:
break;
#endif
+#if IS_ENABLED(CONFIG_LZ4)
+ case SQFS_COMP_LZ4:
+ break;
+#endif
#if IS_ENABLED(CONFIG_ZSTD)
case SQFS_COMP_ZSTD:
ctxt->zstd_workspace = malloc(zstd_dctx_workspace_bound());
@@ -66,6 +74,10 @@
case SQFS_COMP_ZLIB:
break;
#endif
+#if IS_ENABLED(CONFIG_LZ4)
+ case SQFS_COMP_LZ4:
+ break;
+#endif
#if IS_ENABLED(CONFIG_ZSTD)
case SQFS_COMP_ZSTD:
free(ctxt->zstd_workspace);
@@ -139,6 +151,17 @@
break;
#endif
+#if IS_ENABLED(CONFIG_LZ4)
+ case SQFS_COMP_LZ4:
+ ret = LZ4_decompress_safe(source, dest, src_len, *dest_len);
+ if (ret < 0) {
+ printf("LZ4 decompression failed.\n");
+ return -EINVAL;
+ }
+
+ ret = 0;
+ break;
+#endif
#if IS_ENABLED(CONFIG_ZSTD)
case SQFS_COMP_ZSTD:
ret = sqfs_zstd_decompress(ctxt, dest, *dest_len, source, src_len);
diff --git a/fs/squashfs/sqfs_decompressor.h b/fs/squashfs/sqfs_decompressor.h
index 892cfb6..c48b74f 100644
--- a/fs/squashfs/sqfs_decompressor.h
+++ b/fs/squashfs/sqfs_decompressor.h
@@ -18,41 +18,6 @@
#define SQFS_COMP_LZ4 5
#define SQFS_COMP_ZSTD 6
-/* LZMA does not support any compression options */
-
-struct squashfs_gzip_opts {
- u32 compression_level;
- u16 window_size;
- u16 strategies;
-};
-
-struct squashfs_xz_opts {
- u32 dictionary_size;
- u32 executable_filters;
-};
-
-struct squashfs_lz4_opts {
- u32 version;
- u32 flags;
-};
-
-struct squashfs_zstd_opts {
- u32 compression_level;
-};
-
-struct squashfs_lzo_opts {
- u32 algorithm;
- u32 level;
-};
-
-union squashfs_compression_opts {
- struct squashfs_gzip_opts *gzip;
- struct squashfs_xz_opts *xz;
- struct squashfs_lz4_opts *lz4;
- struct squashfs_zstd_opts *zstd;
- struct squashfs_lzo_opts *lzo;
-};
-
int sqfs_decompress(struct squashfs_ctxt *ctxt, void *dest,
unsigned long *dest_len, void *source, u32 src_len);
int sqfs_decompressor_init(struct squashfs_ctxt *ctxt);
diff --git a/fs/squashfs/sqfs_filesystem.h b/fs/squashfs/sqfs_filesystem.h
index 5440b6c..be56498 100644
--- a/fs/squashfs/sqfs_filesystem.h
+++ b/fs/squashfs/sqfs_filesystem.h
@@ -13,7 +13,6 @@
#include <part.h>
#include <stdint.h>
-#define SQFS_UNCOMPRESSED_DATA 0x0002
#define SQFS_MAGIC_NUMBER 0x73717368
/* The three first members of squashfs_dir_index make a total of 12 bytes */
#define SQFS_DIR_INDEX_BASE_LENGTH 12
@@ -23,7 +22,6 @@
#define SQFS_MAX_ENTRIES 512
/* Metadata blocks start by a 2-byte length header */
#define SQFS_HEADER_SIZE 2
-#define SQFS_LREG_INODE_MIN_SIZE 56
#define SQFS_DIR_HEADER_SIZE 12
#define SQFS_MISC_ENTRY_TYPE -1
#define SQFS_EMPTY_FILE_SIZE 3
diff --git a/fs/squashfs/sqfs_utils.h b/fs/squashfs/sqfs_utils.h
index 1260abe..41f13e8 100644
--- a/fs/squashfs/sqfs_utils.h
+++ b/fs/squashfs/sqfs_utils.h
@@ -15,11 +15,8 @@
#define SQFS_FRAGMENT_INDEX_OFFSET(A) ((A) % SQFS_MAX_ENTRIES)
#define SQFS_FRAGMENT_INDEX(A) ((A) / SQFS_MAX_ENTRIES)
#define SQFS_BLOCK_SIZE(A) ((A) & GENMASK(23, 0))
-#define SQFS_CHECK_FLAG(flag, bit) (((flag) >> (bit)) & 1)
/* Useful for both fragment and data blocks */
#define SQFS_COMPRESSED_BLOCK(A) (!((A) & BIT(24)))
-/* SQFS_COMPRESSED_DATA strictly used with super block's 'flags' member */
-#define SQFS_COMPRESSED_DATA(A) (!((A) & 0x0002))
#define SQFS_IS_FRAGMENTED(A) ((A) != 0xFFFFFFFF)
/*
* These two macros work as getters for a metada block header, retrieving the
@@ -28,22 +25,4 @@
#define SQFS_COMPRESSED_METADATA(A) (!((A) & BIT(15)))
#define SQFS_METADATA_SIZE(A) ((A) & GENMASK(14, 0))
-struct squashfs_super_block_flags {
- /* check: unused
- * uncompressed_ids: not supported
- */
- bool uncompressed_inodes;
- bool uncompressed_data;
- bool check;
- bool uncompressed_frags;
- bool no_frags;
- bool always_frags;
- bool duplicates;
- bool exportable;
- bool uncompressed_xattrs;
- bool no_xattrs;
- bool compressor_options;
- bool uncompressed_ids;
-};
-
#endif /* SQFS_UTILS_H */
diff --git a/fs/ubifs/ubifs.h b/fs/ubifs/ubifs.h
index 67b13c8..b4e761c 100644
--- a/fs/ubifs/ubifs.h
+++ b/fs/ubifs/ubifs.h
@@ -68,7 +68,6 @@
void iput(struct inode *inode);
/* linux/include/time.h */
-#define NSEC_PER_SEC 1000000000L
#define get_seconds() 0
#define CURRENT_TIME_SEC ((struct timespec) { get_seconds(), 0 })
diff --git a/include/MCD_dma.h b/include/MCD_dma.h
deleted file mode 100644
index 2f16c89..0000000
--- a/include/MCD_dma.h
+++ /dev/null
@@ -1,369 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- */
-
-#ifndef _MCD_API_H
-#define _MCD_API_H
-
-/* Turn Execution Unit tasks ON (#define) or OFF (#undef) */
-#undef MCD_INCLUDE_EU
-
-/* Number of DMA channels */
-#define NCHANNELS 16
-
-/* Total number of variants */
-#ifdef MCD_INCLUDE_EU
-#define NUMOFVARIANTS 6
-#else
-#define NUMOFVARIANTS 4
-#endif
-
-/* Define sizes of the various tables */
-#define TASK_TABLE_SIZE (NCHANNELS*32)
-#define VAR_TAB_SIZE (128)
-#define CONTEXT_SAVE_SIZE (128)
-#define FUNCDESC_TAB_SIZE (256)
-
-#ifdef MCD_INCLUDE_EU
-#define FUNCDESC_TAB_NUM 16
-#else
-#define FUNCDESC_TAB_NUM 1
-#endif
-
-#ifndef DEFINESONLY
-
-/* Portability typedefs */
-#if 1
-#include "common.h"
-#else
-#ifndef s32
-typedef int s32;
-#endif
-#ifndef u32
-typedef unsigned int u32;
-#endif
-#ifndef s16
-typedef short s16;
-#endif
-#ifndef u16
-typedef unsigned short u16;
-#endif
-#ifndef s8
-typedef char s8;
-#endif
-#ifndef u8
-typedef unsigned char u8;
-#endif
-#endif
-
-/*
- * These structures represent the internal registers of the
- * multi-channel DMA
- */
-struct dmaRegs_s {
- u32 taskbar; /* task table base address */
- u32 currPtr;
- u32 endPtr;
- u32 varTablePtr;
- u16 dma_rsvd0;
- u16 ptdControl; /* ptd control */
- u32 intPending; /* interrupt pending */
- u32 intMask; /* interrupt mask */
- u16 taskControl[16]; /* task control */
- u8 priority[32]; /* priority */
- u32 initiatorMux; /* initiator mux control */
- u32 taskSize0; /* task size control 0. */
- u32 taskSize1; /* task size control 1. */
- u32 dma_rsvd1; /* reserved */
- u32 dma_rsvd2; /* reserved */
- u32 debugComp1; /* debug comparator 1 */
- u32 debugComp2; /* debug comparator 2 */
- u32 debugControl; /* debug control */
- u32 debugStatus; /* debug status */
- u32 ptdDebug; /* priority task decode debug */
- u32 dma_rsvd3[31]; /* reserved */
-};
-typedef volatile struct dmaRegs_s dmaRegs;
-
-#endif
-
-/* PTD contrl reg bits */
-#define PTD_CTL_TSK_PRI 0x8000
-#define PTD_CTL_COMM_PREFETCH 0x0001
-
-/* Task Control reg bits and field masks */
-#define TASK_CTL_EN 0x8000
-#define TASK_CTL_VALID 0x4000
-#define TASK_CTL_ALWAYS 0x2000
-#define TASK_CTL_INIT_MASK 0x1f00
-#define TASK_CTL_ASTRT 0x0080
-#define TASK_CTL_HIPRITSKEN 0x0040
-#define TASK_CTL_HLDINITNUM 0x0020
-#define TASK_CTL_ASTSKNUM_MASK 0x000f
-
-/* Priority reg bits and field masks */
-#define PRIORITY_HLD 0x80
-#define PRIORITY_PRI_MASK 0x07
-
-/* Debug Control reg bits and field masks */
-#define DBG_CTL_BLOCK_TASKS_MASK 0xffff0000
-#define DBG_CTL_AUTO_ARM 0x00008000
-#define DBG_CTL_BREAK 0x00004000
-#define DBG_CTL_COMP1_TYP_MASK 0x00003800
-#define DBG_CTL_COMP2_TYP_MASK 0x00000070
-#define DBG_CTL_EXT_BREAK 0x00000004
-#define DBG_CTL_INT_BREAK 0x00000002
-
-/*
- * PTD Debug reg selector addresses
- * This reg must be written with a value to show the contents of
- * one of the desired internal register.
- */
-#define PTD_DBG_REQ 0x00 /* shows the state of 31 initiators */
-#define PTD_DBG_TSK_VLD_INIT 0x01 /* shows which 16 tasks are valid and
- have initiators asserted */
-
-/* General return values */
-#define MCD_OK 0
-#define MCD_ERROR -1
-#define MCD_TABLE_UNALIGNED -2
-#define MCD_CHANNEL_INVALID -3
-
-/* MCD_initDma input flags */
-#define MCD_RELOC_TASKS 0x00000001
-#define MCD_NO_RELOC_TASKS 0x00000000
-#define MCD_COMM_PREFETCH_EN 0x00000002 /* MCF547x/548x ONLY */
-
-/*
- * MCD_dmaStatus Status Values for each channel:
- * MCD_NO_DMA - No DMA has been requested since reset
- * MCD_IDLE - DMA active, but the initiator is currently inactive
- * MCD_RUNNING - DMA active, and the initiator is currently active
- * MCD_PAUSED - DMA active but it is currently paused
- * MCD_HALTED - the most recent DMA has been killed with MCD_killTask()
- * MCD_DONE - the most recent DMA has completed
- */
-#define MCD_NO_DMA 1
-#define MCD_IDLE 2
-#define MCD_RUNNING 3
-#define MCD_PAUSED 4
-#define MCD_HALTED 5
-#define MCD_DONE 6
-
-/* MCD_startDma parameter defines */
-
-/* Constants for the funcDesc parameter */
-/*
- * MCD_NO_BYTE_SWAP - to disable byte swapping
- * MCD_BYTE_REVERSE - to reverse the bytes of each u32 of the DMAed data
- * MCD_U16_REVERSE - to reverse the 16-bit halves of each 32-bit data
- * value being DMAed
- * MCD_U16_BYTE_REVERSE - to reverse the byte halves of each 16-bit half of
- * each 32-bit data value DMAed
- * MCD_NO_BIT_REV - do not reverse the bits of each byte DMAed
- * MCD_BIT_REV - reverse the bits of each byte DMAed
- * MCD_CRC16 - to perform CRC-16 on DMAed data
- * MCD_CRCCCITT - to perform CRC-CCITT on DMAed data
- * MCD_CRC32 - to perform CRC-32 on DMAed data
- * MCD_CSUMINET - to perform internet checksums on DMAed data
- * MCD_NO_CSUM - to perform no checksumming
- */
-#define MCD_NO_BYTE_SWAP 0x00045670
-#define MCD_BYTE_REVERSE 0x00076540
-#define MCD_U16_REVERSE 0x00067450
-#define MCD_U16_BYTE_REVERSE 0x00054760
-#define MCD_NO_BIT_REV 0x00000000
-#define MCD_BIT_REV 0x00088880
-/* CRCing: */
-#define MCD_CRC16 0xc0100000
-#define MCD_CRCCCITT 0xc0200000
-#define MCD_CRC32 0xc0300000
-#define MCD_CSUMINET 0xc0400000
-#define MCD_NO_CSUM 0xa0000000
-
-#define MCD_FUNC_NOEU1 (MCD_NO_BYTE_SWAP | MCD_NO_BIT_REV | \
- MCD_NO_CSUM)
-#define MCD_FUNC_NOEU2 (MCD_NO_BYTE_SWAP | MCD_NO_CSUM)
-
-/* Constants for the flags parameter */
-#define MCD_TT_FLAGS_RL 0x00000001 /* Read line */
-#define MCD_TT_FLAGS_CW 0x00000002 /* Combine Writes */
-#define MCD_TT_FLAGS_SP 0x00000004 /* MCF547x/548x ONLY */
-#define MCD_TT_FLAGS_MASK 0x000000ff
-#define MCD_TT_FLAGS_DEF (MCD_TT_FLAGS_RL | MCD_TT_FLAGS_CW)
-
-#define MCD_SINGLE_DMA 0x00000100 /* Unchained DMA */
-#define MCD_CHAIN_DMA /* TBD */
-#define MCD_EU_DMA /* TBD */
-#define MCD_FECTX_DMA 0x00001000 /* FEC TX ring DMA */
-#define MCD_FECRX_DMA 0x00002000 /* FEC RX ring DMA */
-
-/* these flags are valid for MCD_startDma and the chained buffer descriptors */
-/*
- * MCD_BUF_READY - indicates that this buf is now under the DMA's ctrl
- * MCD_WRAP - to tell the FEC Dmas to wrap to the first BD
- * MCD_INTERRUPT - to generate an interrupt after completion of the DMA
- * MCD_END_FRAME - tell the DMA to end the frame when transferring
- * last byte of data in buffer
- * MCD_CRC_RESTART - to empty out the accumulated checksum prior to
- * performing the DMA
- */
-#define MCD_BUF_READY 0x80000000
-#define MCD_WRAP 0x20000000
-#define MCD_INTERRUPT 0x10000000
-#define MCD_END_FRAME 0x08000000
-#define MCD_CRC_RESTART 0x40000000
-
-/* Defines for the FEC buffer descriptor control/status word*/
-#define MCD_FEC_BUF_READY 0x8000
-#define MCD_FEC_WRAP 0x2000
-#define MCD_FEC_INTERRUPT 0x1000
-#define MCD_FEC_END_FRAME 0x0800
-
-/* Defines for general intuitiveness */
-
-#define MCD_TRUE 1
-#define MCD_FALSE 0
-
-/* Three different cases for destination and source. */
-#define MINUS1 -1
-#define ZERO 0
-#define PLUS1 1
-
-#ifndef DEFINESONLY
-
-/* Task Table Entry struct*/
-typedef struct {
- u32 TDTstart; /* task descriptor table start */
- u32 TDTend; /* task descriptor table end */
- u32 varTab; /* variable table start */
- u32 FDTandFlags; /* function descriptor table start & flags */
- volatile u32 descAddrAndStatus;
- volatile u32 modifiedVarTab;
- u32 contextSaveSpace; /* context save space start */
- u32 literalBases;
-} TaskTableEntry;
-
-/* Chained buffer descriptor:
- * flags - flags describing the DMA
- * csumResult - checksum performed since last checksum reset
- * srcAddr - the address to move data from
- * destAddr - the address to move data to
- * lastDestAddr - the last address written to
- * dmaSize - the no of bytes to xfer independent of the xfer sz
- * next - next buffer descriptor in chain
- * info - private info about this descriptor; DMA does not affect it
- */
-typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;
-struct MCD_bufDesc_struct {
- u32 flags;
- u32 csumResult;
- s8 *srcAddr;
- s8 *destAddr;
- s8 *lastDestAddr;
- u32 dmaSize;
- MCD_bufDesc *next;
- u32 info;
-};
-
-/* Progress Query struct:
- * lastSrcAddr - the most-recent or last, post-increment source address
- * lastDestAddr - the most-recent or last, post-increment destination address
- * dmaSize - the amount of data transferred for the current buffer
- * currBufDesc - pointer to the current buffer descriptor being DMAed
- */
-
-typedef volatile struct MCD_XferProg_struct {
- s8 *lastSrcAddr;
- s8 *lastDestAddr;
- u32 dmaSize;
- MCD_bufDesc *currBufDesc;
-} MCD_XferProg;
-
-/* FEC buffer descriptor */
-typedef volatile struct MCD_bufDescFec_struct {
- u16 statCtrl;
- u16 length;
- u32 dataPointer;
-} MCD_bufDescFec;
-
-/*************************************************************************/
-/* API function Prototypes - see MCD_dmaApi.c for further notes */
-
-/* MCD_startDma starts a particular kind of DMA:
- * srcAddr - the channel on which to run the DMA
- * srcIncr - the address to move data from, or buffer-descriptor address
- * destAddr - the amount to increment the source address per transfer
- * destIncr - the address to move data to
- * dmaSize - the amount to increment the destination address per transfer
- * xferSize - the number bytes in of each data movement (1, 2, or 4)
- * initiator - what device initiates the DMA
- * priority - priority of the DMA
- * flags - flags describing the DMA
- * funcDesc - description of byte swapping, bit swapping, and CRC actions
- */
-int MCD_startDma(int channel, s8 * srcAddr, s16 srcIncr, s8 * destAddr,
- s16 destIncr, u32 dmaSize, u32 xferSize, u32 initiator,
- int priority, u32 flags, u32 funcDesc);
-
-/*
- * MCD_initDma() initializes the DMA API by setting up a pointer to the DMA
- * registers, relocating and creating the appropriate task structures, and
- * setting up some global settings
- */
-int MCD_initDma(dmaRegs * sDmaBarAddr, void *taskTableDest, u32 flags);
-
-/* MCD_dmaStatus() returns the status of the DMA on the requested channel. */
-int MCD_dmaStatus(int channel);
-
-/* MCD_XferProgrQuery() returns progress of DMA on requested channel */
-int MCD_XferProgrQuery(int channel, MCD_XferProg * progRep);
-
-/*
- * MCD_killDma() halts the DMA on the requested channel, without any
- * intention of resuming the DMA.
- */
-int MCD_killDma(int channel);
-
-/*
- * MCD_continDma() continues a DMA which as stopped due to encountering an
- * unready buffer descriptor.
- */
-int MCD_continDma(int channel);
-
-/*
- * MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is
- * running on that channel).
- */
-int MCD_pauseDma(int channel);
-
-/*
- * MCD_resumeDma() resumes the DMA on a given channel (if any DMA is
- * running on that channel).
- */
-int MCD_resumeDma(int channel);
-
-/* MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA */
-int MCD_csumQuery(int channel, u32 * csum);
-
-/*
- * MCD_getCodeSize provides the packed size required by the microcoded task
- * and structures.
- */
-int MCD_getCodeSize(void);
-
-/*
- * MCD_getVersion provides a pointer to a version string and returns a
- * version number.
- */
-int MCD_getVersion(char **longVersion);
-
-/* macro for setting a location in the variable table */
-#define MCD_SET_VAR(taskTab,idx,value) ((u32 *)(taskTab)->varTab)[idx] = value
-/* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function,
- so I'm avoiding surrounding it with "do {} while(0)" */
-
-#endif /* DEFINESONLY */
-
-#endif /* _MCD_API_H */
diff --git a/include/MCD_progCheck.h b/include/MCD_progCheck.h
deleted file mode 100644
index 1ec8fbf..0000000
--- a/include/MCD_progCheck.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- */
-
- /* This file is autogenerated. Do not change */
-#define CURRBD 4
-#define DCOUNT 6
-#define DESTPTR 5
-#define SRCPTR 7
diff --git a/include/MCD_tasksInit.h b/include/MCD_tasksInit.h
deleted file mode 100644
index 9f582be..0000000
--- a/include/MCD_tasksInit.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- */
-
-#ifndef MCD_TSK_INIT_H
-#define MCD_TSK_INIT_H 1
-
-/*
- * Do not edit!
- */
-
-/* Task 0 */
-void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr,
- int xferSize, short xferSizeIncr, int *cSave,
- volatile TaskTableEntry * taskTable, int channel);
-
-/* Task 1 */
-void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr,
- short destIncr, int dmaSize, short xferSizeIncr,
- int flags, int *currBD, int *cSave,
- volatile TaskTableEntry * taskTable, int channel);
-
-/* Task 2 */
-void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr,
- int xferSize, short xferSizeIncr, int *cSave,
- volatile TaskTableEntry * taskTable, int channel);
-
-/* Task 3 */
-void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr,
- short destIncr, int dmaSize, short xferSizeIncr,
- int flags, int *currBD, int *cSave,
- volatile TaskTableEntry * taskTable, int channel);
-
-/* Task 4 */
-void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr,
- volatile TaskTableEntry * taskTable, int channel);
-
-/* Task 5 */
-void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr,
- volatile TaskTableEntry * taskTable, int channel);
-
-#endif /* MCD_TSK_INIT_H */
diff --git a/include/ahci.h b/include/ahci.h
index d7f951c..d4f0f3c 100644
--- a/include/ahci.h
+++ b/include/ahci.h
@@ -223,9 +223,6 @@
*/
int sata_scan(struct udevice *dev);
-int ahci_init(void __iomem *base);
-int ahci_reset(void __iomem *base);
-
/**
* ahci_init_one_dm() - set up a single AHCI port
*
diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
index 7a2f0db..13d99cf 100644
--- a/include/asm-generic/io.h
+++ b/include/asm-generic/io.h
@@ -105,5 +105,353 @@
}
#endif
+/*
+ * __raw_{read,write}{b,w,l,q}() access memory in native endianness.
+ *
+ * On some architectures memory mapped IO needs to be accessed differently.
+ * On the simple architectures, we just read/write the memory location
+ * directly.
+ */
+
+#ifndef __raw_readb
+#define __raw_readb __raw_readb
+static inline u8 __raw_readb(const volatile void __iomem *addr)
+{
+ return *(const volatile u8 __force *)addr;
+}
+#endif
+
+#ifndef __raw_readw
+#define __raw_readw __raw_readw
+static inline u16 __raw_readw(const volatile void __iomem *addr)
+{
+ return *(const volatile u16 __force *)addr;
+}
+#endif
+
+#ifndef __raw_readl
+#define __raw_readl __raw_readl
+static inline u32 __raw_readl(const volatile void __iomem *addr)
+{
+ return *(const volatile u32 __force *)addr;
+}
+#endif
+
+#ifdef CONFIG_64BIT
+#ifndef __raw_readq
+#define __raw_readq __raw_readq
+static inline u64 __raw_readq(const volatile void __iomem *addr)
+{
+ return *(const volatile u64 __force *)addr;
+}
+#endif
+#endif /* CONFIG_64BIT */
+
+#ifndef __raw_writeb
+#define __raw_writeb __raw_writeb
+static inline void __raw_writeb(u8 value, volatile void __iomem *addr)
+{
+ *(volatile u8 __force *)addr = value;
+}
+#endif
+
+#ifndef __raw_writew
+#define __raw_writew __raw_writew
+static inline void __raw_writew(u16 value, volatile void __iomem *addr)
+{
+ *(volatile u16 __force *)addr = value;
+}
+#endif
+
+#ifndef __raw_writel
+#define __raw_writel __raw_writel
+static inline void __raw_writel(u32 value, volatile void __iomem *addr)
+{
+ *(volatile u32 __force *)addr = value;
+}
+#endif
+
+#ifdef CONFIG_64BIT
+#ifndef __raw_writeq
+#define __raw_writeq __raw_writeq
+static inline void __raw_writeq(u64 value, volatile void __iomem *addr)
+{
+ *(volatile u64 __force *)addr = value;
+}
+#endif
+#endif /* CONFIG_64BIT */
+
+/*
+ * {read,write}s{b,w,l,q}() repeatedly access the same memory address in
+ * native endianness in 8-, 16-, 32- or 64-bit chunks (@count times).
+ */
+#ifndef readsb
+#define readsb readsb
+static inline void readsb(const volatile void __iomem *addr, void *buffer,
+ unsigned int count)
+{
+ if (count) {
+ u8 *buf = buffer;
+
+ do {
+ u8 x = __raw_readb(addr);
+ *buf++ = x;
+ } while (--count);
+ }
+}
+#endif
+
+#ifndef readsw
+#define readsw readsw
+static inline void readsw(const volatile void __iomem *addr, void *buffer,
+ unsigned int count)
+{
+ if (count) {
+ u16 *buf = buffer;
+
+ do {
+ u16 x = __raw_readw(addr);
+ *buf++ = x;
+ } while (--count);
+ }
+}
+#endif
+
+#ifndef readsl
+#define readsl readsl
+static inline void readsl(const volatile void __iomem *addr, void *buffer,
+ unsigned int count)
+{
+ if (count) {
+ u32 *buf = buffer;
+
+ do {
+ u32 x = __raw_readl(addr);
+ *buf++ = x;
+ } while (--count);
+ }
+}
+#endif
+
+#ifdef CONFIG_64BIT
+#ifndef readsq
+#define readsq readsq
+static inline void readsq(const volatile void __iomem *addr, void *buffer,
+ unsigned int count)
+{
+ if (count) {
+ u64 *buf = buffer;
+
+ do {
+ u64 x = __raw_readq(addr);
+ *buf++ = x;
+ } while (--count);
+ }
+}
+#endif
+#endif /* CONFIG_64BIT */
+
+#ifndef writesb
+#define writesb writesb
+static inline void writesb(volatile void __iomem *addr, const void *buffer,
+ unsigned int count)
+{
+ if (count) {
+ const u8 *buf = buffer;
+
+ do {
+ __raw_writeb(*buf++, addr);
+ } while (--count);
+ }
+}
+#endif
+
+#ifndef writesw
+#define writesw writesw
+static inline void writesw(volatile void __iomem *addr, const void *buffer,
+ unsigned int count)
+{
+ if (count) {
+ const u16 *buf = buffer;
+
+ do {
+ __raw_writew(*buf++, addr);
+ } while (--count);
+ }
+}
+#endif
+
+#ifndef writesl
+#define writesl writesl
+static inline void writesl(volatile void __iomem *addr, const void *buffer,
+ unsigned int count)
+{
+ if (count) {
+ const u32 *buf = buffer;
+
+ do {
+ __raw_writel(*buf++, addr);
+ } while (--count);
+ }
+}
+#endif
+
+#ifdef CONFIG_64BIT
+#ifndef writesq
+#define writesq writesq
+static inline void writesq(volatile void __iomem *addr, const void *buffer,
+ unsigned int count)
+{
+ if (count) {
+ const u64 *buf = buffer;
+
+ do {
+ __raw_writeq(*buf++, addr);
+ } while (--count);
+ }
+}
+#endif
+#endif /* CONFIG_64BIT */
+
+#ifndef PCI_IOBASE
+#define PCI_IOBASE ((void __iomem *)0)
+#endif
+
+/*
+ * {in,out}s{b,w,l}{,_p}() are variants of the above that repeatedly access a
+ * single I/O port multiple times.
+ */
+
+#ifndef insb
+#define insb insb
+static inline void insb(unsigned long addr, void *buffer, unsigned int count)
+{
+ readsb(PCI_IOBASE + addr, buffer, count);
+}
+#endif
+
+#ifndef insw
+#define insw insw
+static inline void insw(unsigned long addr, void *buffer, unsigned int count)
+{
+ readsw(PCI_IOBASE + addr, buffer, count);
+}
+#endif
+
+#ifndef insl
+#define insl insl
+static inline void insl(unsigned long addr, void *buffer, unsigned int count)
+{
+ readsl(PCI_IOBASE + addr, buffer, count);
+}
+#endif
+
+#ifndef outsb
+#define outsb outsb
+static inline void outsb(unsigned long addr, const void *buffer,
+ unsigned int count)
+{
+ writesb(PCI_IOBASE + addr, buffer, count);
+}
+#endif
+
+#ifndef outsw
+#define outsw outsw
+static inline void outsw(unsigned long addr, const void *buffer,
+ unsigned int count)
+{
+ writesw(PCI_IOBASE + addr, buffer, count);
+}
+#endif
+
+#ifndef outsl
+#define outsl outsl
+static inline void outsl(unsigned long addr, const void *buffer,
+ unsigned int count)
+{
+ writesl(PCI_IOBASE + addr, buffer, count);
+}
+#endif
+
+#ifndef ioread8_rep
+#define ioread8_rep ioread8_rep
+static inline void ioread8_rep(const volatile void __iomem *addr, void *buffer,
+ unsigned int count)
+{
+ readsb(addr, buffer, count);
+}
+#endif
+
+#ifndef ioread16_rep
+#define ioread16_rep ioread16_rep
+static inline void ioread16_rep(const volatile void __iomem *addr,
+ void *buffer, unsigned int count)
+{
+ readsw(addr, buffer, count);
+}
+#endif
+
+#ifndef ioread32_rep
+#define ioread32_rep ioread32_rep
+static inline void ioread32_rep(const volatile void __iomem *addr,
+ void *buffer, unsigned int count)
+{
+ readsl(addr, buffer, count);
+}
+#endif
+
+#ifdef CONFIG_64BIT
+#ifndef ioread64_rep
+#define ioread64_rep ioread64_rep
+static inline void ioread64_rep(const volatile void __iomem *addr,
+ void *buffer, unsigned int count)
+{
+ readsq(addr, buffer, count);
+}
+#endif
+#endif /* CONFIG_64BIT */
+
+#ifndef iowrite8_rep
+#define iowrite8_rep iowrite8_rep
+static inline void iowrite8_rep(volatile void __iomem *addr,
+ const void *buffer,
+ unsigned int count)
+{
+ writesb(addr, buffer, count);
+}
+#endif
+
+#ifndef iowrite16_rep
+#define iowrite16_rep iowrite16_rep
+static inline void iowrite16_rep(volatile void __iomem *addr,
+ const void *buffer,
+ unsigned int count)
+{
+ writesw(addr, buffer, count);
+}
+#endif
+
+#ifndef iowrite32_rep
+#define iowrite32_rep iowrite32_rep
+static inline void iowrite32_rep(volatile void __iomem *addr,
+ const void *buffer,
+ unsigned int count)
+{
+ writesl(addr, buffer, count);
+}
+#endif
+
+#ifdef CONFIG_64BIT
+#ifndef iowrite64_rep
+#define iowrite64_rep iowrite64_rep
+static inline void iowrite64_rep(volatile void __iomem *addr,
+ const void *buffer,
+ unsigned int count)
+{
+ writesq(addr, buffer, count);
+}
+#endif
+#endif /* CONFIG_64BIT */
+
#endif /* !__ASSEMBLY__ */
#endif /* __ASM_GENERIC_IO_H__ */
diff --git a/include/bcb.h b/include/bcb.h
index 5edb17a..1941d8c 100644
--- a/include/bcb.h
+++ b/include/bcb.h
@@ -8,14 +8,69 @@
#ifndef __BCB_H__
#define __BCB_H__
+#include <part.h>
+
+enum bcb_field {
+ BCB_FIELD_COMMAND,
+ BCB_FIELD_STATUS,
+ BCB_FIELD_RECOVERY,
+ BCB_FIELD_STAGE
+};
+
#if IS_ENABLED(CONFIG_CMD_BCB)
-int bcb_write_reboot_reason(int devnum, char *partp, const char *reasonp);
+
+int bcb_find_partition_and_load(const char *iface,
+ int devnum, char *partp);
+int bcb_load(struct blk_desc *block_description,
+ struct disk_partition *disk_partition);
+int bcb_set(enum bcb_field field, const char *value);
+
+/**
+ * bcb_get() - get the field value.
+ * @field: field to get
+ * @value_out: buffer to copy bcb field value to
+ * @value_size: buffer size to avoid overflow in case
+ * value_out is smaller then the field value
+ */
+int bcb_get(enum bcb_field field, char *value_out, size_t value_size);
+
+int bcb_store(void);
+void bcb_reset(void);
+
#else
+
#include <linux/errno.h>
-static inline int bcb_write_reboot_reason(int devnum, char *partp, const char *reasonp)
+
+static inline int bcb_load(struct blk_desc *block_description,
+ struct disk_partition *disk_partition)
{
return -EOPNOTSUPP;
}
+
+static inline int bcb_find_partition_and_load(const char *iface,
+ int devnum, char *partp)
+{
+ return -EOPNOTSUPP;
+}
+
+static inline int bcb_set(enum bcb_field field, const char *value)
+{
+ return -EOPNOTSUPP;
+}
+
+static inline int bcb_get(enum bcb_field field, char *value_out)
+{
+ return -EOPNOTSUPP;
+}
+
+static inline int bcb_store(void)
+{
+ return -EOPNOTSUPP;
+}
+
+static inline void bcb_reset(void)
+{
+}
#endif
#endif /* __BCB_H__ */
diff --git a/include/blkmap.h b/include/blkmap.h
index af54583..30dc84a 100644
--- a/include/blkmap.h
+++ b/include/blkmap.h
@@ -7,6 +7,23 @@
#ifndef _BLKMAP_H
#define _BLKMAP_H
+#include <dm/lists.h>
+
+/**
+ * struct blkmap - Block map
+ *
+ * Data associated with a blkmap.
+ *
+ * @label: Human readable name of this blkmap
+ * @blk: Underlying block device
+ * @slices: List of slices associated with this blkmap
+ */
+struct blkmap {
+ char *label;
+ struct udevice *blk;
+ struct list_head slices;
+};
+
/**
* blkmap_map_linear() - Map region of other block device
*
@@ -74,4 +91,16 @@
*/
int blkmap_destroy(struct udevice *dev);
+/**
+ * blkmap_create_ramdisk() - Create new ramdisk with blkmap
+ *
+ * @label: Label of the new blkmap
+ * @image_addr: Target memory start address of this mapping
+ * @image_size: Target memory size of this mapping
+ * @devp: Updated with the address of the created blkmap device
+ * Returns: 0 on success, negative error code on failure
+ */
+int blkmap_create_ramdisk(const char *label, ulong image_addr, ulong image_size,
+ struct udevice **devp);
+
#endif /* _BLKMAP_H */
diff --git a/include/bootcount.h b/include/bootcount.h
index bfa5d46..bc06e17 100644
--- a/include/bootcount.h
+++ b/include/bootcount.h
@@ -6,7 +6,6 @@
#ifndef _BOOTCOUNT_H__
#define _BOOTCOUNT_H__
-#include <common.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/byteorder.h>
diff --git a/include/configs/etamin.h b/include/configs/draco-etamin.h
similarity index 100%
rename from include/configs/etamin.h
rename to include/configs/draco-etamin.h
diff --git a/include/configs/rastaban.h b/include/configs/draco-rastaban.h
similarity index 100%
rename from include/configs/rastaban.h
rename to include/configs/draco-rastaban.h
diff --git a/include/configs/thuban.h b/include/configs/draco-thuban.h
similarity index 100%
rename from include/configs/thuban.h
rename to include/configs/draco-thuban.h
diff --git a/include/configs/draco.h b/include/configs/draco.h
deleted file mode 100644
index 8f993ce..0000000
--- a/include/configs/draco.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2013 Siemens Schweiz AG
- * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.
- *
- * Based on:
- * U-Boot file:/include/configs/am335x_evm.h
- *
- * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
- */
-
-#ifndef __CONFIG_DRACO_H
-#define __CONFIG_DRACO_H
-
-#include "siemens-am33x-common.h"
-
-#define DDR_PLL_FREQ 303
-
-#define BOARD_DFU_BUTTON_GPIO 27 /* Use as default */
-#define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */
-
-#define CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \
- "button_dfu0=27\0" \
- "led0=103,1,0\0" \
- "led1=64,0,1\0"
-
- /* Physical Memory Map */
-#define CFG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
-
-/* Default env settings */
-#define CFG_EXTRA_ENV_SETTINGS \
- "hostname=draco\0" \
- "ubi_off=2048\0"\
- "nand_img_size=0x400000\0" \
- "optargs=\0" \
- "preboot=draco_led 0\0" \
- CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \
- CFG_ENV_SETTINGS_V2 \
- CFG_ENV_SETTINGS_NAND_V2
-
-#endif /* ! __CONFIG_DRACO_H */
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 83ab94e..971a393 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -57,13 +57,6 @@
* MMC
*/
-/* SATA */
-#ifndef PCI_DEVICE_ID_FREESCALE_AHCI
-#define PCI_DEVICE_ID_FREESCALE_AHCI 0x0440
-#endif
-#define CFG_SCSI_DEV_LIST {PCI_VENDOR_ID_FREESCALE, \
- PCI_DEVICE_ID_FREESCALE_AHCI}
-
/* SPI */
#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h
index ee4f885..0f591e3 100644
--- a/include/configs/ls1028ardb.h
+++ b/include/configs/ls1028ardb.h
@@ -49,11 +49,6 @@
CSOR_NOR_TRHZ_80)
#endif
-/* SATA */
-#define SCSI_VEND_ID 0x1b4b
-#define SCSI_DEV_ID 0x9170
-#define CFG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
-
/* Initial environment variables */
#ifndef SPL_NO_ENV
#undef CFG_EXTRA_ENV_SETTINGS
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 60362b6..ef8fdc1 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -199,13 +199,6 @@
#endif
#endif
-/* SATA */
-#ifndef SPL_NO_SATA
-#define SCSI_VEND_ID 0x1b4b
-#define SCSI_DEV_ID 0x9170
-#define CFG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
-#endif
-
#include <asm/fsl_secure_boot.h>
#endif /* __LS1043ARDB_H__ */
diff --git a/include/configs/poplar.h b/include/configs/poplar.h
index 6e8adf9..629b335 100644
--- a/include/configs/poplar.h
+++ b/include/configs/poplar.h
@@ -37,11 +37,11 @@
"env_mmc_blknum=0xf80\0" \
"env_mmc_nblks=0x80\0" \
"kernel_addr_r=0x30000000\0" \
- "pxefile_addr_r=0x32000000\0" \
- "scriptaddr=0x32000000\0" \
- "fdt_addr_r=0x32200000\0" \
+ "pxefile_addr_r=0x33000000\0" \
+ "scriptaddr=0x33000000\0" \
+ "fdt_addr_r=0x33200000\0" \
"fdtfile=hisilicon/hi3798cv200-poplar.dtb\0" \
- "ramdisk_addr_r=0x32400000\0" \
+ "ramdisk_addr_r=0x33400000\0" \
BOOTENV
#endif /* _POPLAR_H_ */
diff --git a/include/configs/stm32mp25_common.h b/include/configs/stm32mp25_common.h
new file mode 100644
index 0000000..ec980ee
--- /dev/null
+++ b/include/configs/stm32mp25_common.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause */
+/*
+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+ *
+ * Configuration settings for the STM32MP25x CPU
+ */
+
+#ifndef __CONFIG_STM32MP25_COMMMON_H
+#define __CONFIG_STM32MP25_COMMMON_H
+#include <linux/sizes.h>
+#include <asm/arch/stm32.h>
+
+/*
+ * Configuration of the external SRAM memory used by U-Boot
+ */
+#define CFG_SYS_SDRAM_BASE STM32_DDR_BASE
+
+/*
+ * For booting Linux, use the first 256 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_SYS_BOOTMAPSZ SZ_256M
+
+#endif /* __CONFIG_STM32MP25_COMMMON_H */
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index 72c04d8..b36207c 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -9,23 +9,10 @@
#ifndef __CONFIG_KS2_EVM_H
#define __CONFIG_KS2_EVM_H
-/* U-Boot Build Configuration */
-
-/* SoC Configuration */
-
/* Memory Configuration */
#define CFG_SYS_LPAE_SDRAM_BASE 0x800000000
#define CFG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */
-#ifdef CONFIG_SYS_MALLOC_F_LEN
-#define SPL_MALLOC_F_SIZE CONFIG_SYS_MALLOC_F_LEN
-#else
-#define SPL_MALLOC_F_SIZE 0
-#endif
-
-/* SPL SPI Loader Configuration */
-#define KEYSTONE_SPL_STACK_SIZE (8 * 1024)
-
/* SRAM scratch space entries */
#define SRAM_SCRATCH_SPACE_ADDR 0xc0c23fc
@@ -53,8 +40,6 @@
#define CFG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE
#define CFG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES
-/* EEPROM definitions */
-
/* NAND Configuration */
#define CFG_SYS_NAND_MASK_CLE 0x4000
#define CFG_SYS_NAND_MASK_ALE 0x2000
@@ -63,18 +48,10 @@
#define CFG_SYS_NAND_LARGEPAGE
#define CFG_SYS_NAND_BASE_LIST { 0x30000000, }
-
-
-/* U-Boot general configuration */
-
-/* EDMA3 */
-
-
/* Now for the remaining common defines */
#include <configs/ti_armv7_common.h>
/* we may include files below only after all above definitions */
-#include <asm/arch/hardware.h>
#include <asm/arch/clock.h>
#ifndef CONFIG_SOC_K2G
#define CFG_SYS_HZ_CLOCK ks_clk_get_rate(KS2_CLK1_6)
diff --git a/include/dfu.h b/include/dfu.h
index 0792222..2f42781 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -10,7 +10,6 @@
#ifndef __DFU_ENTITY_H_
#define __DFU_ENTITY_H_
-#include <common.h>
#include <linux/list.h>
#include <mmc.h>
#include <spi_flash.h>
@@ -99,7 +98,12 @@
int dev_num;
};
+
+#if defined(CONFIG_DFU_NAME_MAX_SIZE)
+#define DFU_NAME_SIZE CONFIG_DFU_NAME_MAX_SIZE
+#else
#define DFU_NAME_SIZE 32
+#endif
#ifndef DFU_DEFAULT_POLL_TIMEOUT
#define DFU_DEFAULT_POLL_TIMEOUT 0
#endif
diff --git a/include/display_options.h b/include/display_options.h
index 85dacbc..66e5960 100644
--- a/include/display_options.h
+++ b/include/display_options.h
@@ -9,6 +9,8 @@
#ifndef __DISPLAY_OPTIONS_H
#define __DISPLAY_OPTIONS_H
+#include <linux/types.h>
+
/**
* print_size() - Print a size with a suffix
*
@@ -19,7 +21,6 @@
* @size: Size to print
* @suffix String to print after the size
*/
-#include <display_options.h>
void print_size(uint64_t size, const char *suffix);
/**
diff --git a/include/dt-bindings/phy/nuvoton,npcm-usbphy.h b/include/dt-bindings/phy/nuvoton,npcm-usbphy.h
new file mode 100644
index 0000000..46946d3
--- /dev/null
+++ b/include/dt-bindings/phy/nuvoton,npcm-usbphy.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+// Copyright (c) 2023 Nuvoton Technology corporation.
+
+#ifndef _DT_BINDINGS_NPCM_USBPHY_H
+#define _DT_BINDINGS_NPCM_USBPHY_H
+
+#define NPCM_UDC0_7 0
+#define NPCM_UDC8 1
+#define NPCM_UDC9 2
+#define NPCM_USBH1 3
+#define NPCM_USBH2 4
+#define NPCM_MAX_USB_CTRL_ID 4
+
+#endif
diff --git a/include/dt-bindings/pinctrl/stm32-pinfunc.h b/include/dt-bindings/pinctrl/stm32-pinfunc.h
index e6fb8ad..28ad023 100644
--- a/include/dt-bindings/pinctrl/stm32-pinfunc.h
+++ b/include/dt-bindings/pinctrl/stm32-pinfunc.h
@@ -37,6 +37,9 @@
#define STM32MP_PKG_AB 0x2
#define STM32MP_PKG_AC 0x4
#define STM32MP_PKG_AD 0x8
+#define STM32MP_PKG_AI 0x100
+#define STM32MP_PKG_AK 0x400
+#define STM32MP_PKG_AL 0x800
#endif /* _DT_BINDINGS_STM32_PINFUNC_H */
diff --git a/include/efi_api.h b/include/efi_api.h
index 8f5ef5f..0e92cb8 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -192,7 +192,7 @@
struct efi_event *event,
void *context),
void *notify_context,
- efi_guid_t *event_group,
+ const efi_guid_t *event_group,
struct efi_event **event);
};
@@ -404,6 +404,9 @@
#define EFI_EVENT_GROUP_RESET_SYSTEM \
EFI_GUID(0x62da6a56, 0x13fb, 0x485a, 0xa8, 0xda, \
0xa3, 0xdd, 0x79, 0x12, 0xcb, 0x6b)
+#define EFI_EVENT_GROUP_RETURN_TO_EFIBOOTMGR \
+ EFI_GUID(0xb4a40fe6, 0x9149, 0x4f29, 0x94, 0x47, \
+ 0x49, 0x38, 0x7a, 0x7f, 0xab, 0x87)
/* EFI Configuration Table and GUID definitions */
#define NULL_GUID \
diff --git a/include/efi_loader.h b/include/efi_loader.h
index e244105..664dae2 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -8,7 +8,6 @@
#ifndef _EFI_LOADER_H
#define _EFI_LOADER_H 1
-#include <common.h>
#include <blk.h>
#include <event.h>
#include <log.h>
@@ -290,6 +289,8 @@
extern const efi_guid_t efi_guid_event_group_ready_to_boot;
/* event group ResetSystem() invoked (before ExitBootServices) */
extern const efi_guid_t efi_guid_event_group_reset_system;
+/* event group return to efibootmgr */
+extern const efi_guid_t efi_guid_event_group_return_to_efibootmgr;
/* GUID of the device tree table */
extern const efi_guid_t efi_guid_fdt;
extern const efi_guid_t efi_guid_loaded_image;
@@ -685,7 +686,7 @@
void (EFIAPI *notify_function) (
struct efi_event *event,
void *context),
- void *notify_context, efi_guid_t *group,
+ void *notify_context, const efi_guid_t *group,
struct efi_event **event);
/* Call this to set a timer */
efi_status_t efi_set_timer(struct efi_event *event, enum efi_timer_delay type,
diff --git a/include/efi_selftest.h b/include/efi_selftest.h
index 7c69c3f..5bcebb3 100644
--- a/include/efi_selftest.h
+++ b/include/efi_selftest.h
@@ -8,7 +8,6 @@
#ifndef _EFI_SELFTEST_H
#define _EFI_SELFTEST_H
-#include <common.h>
#include <efi.h>
#include <efi_api.h>
#include <efi_loader.h>
diff --git a/include/env.h b/include/env.h
index 430c4fa..9778e3e 100644
--- a/include/env.h
+++ b/include/env.h
@@ -73,6 +73,14 @@
int env_get_id(void);
/**
+ * env_inc_id() - Increase the sequence number for the environment
+ *
+ * Increment the value that is used by env_get_id() to inform callers
+ * if the environment has changed since they last checked.
+ */
+void env_inc_id(void);
+
+/**
* env_init() - Set up the pre-relocation environment
*
* This locates the environment or uses the default if nothing is available.
diff --git a/include/env_internal.h b/include/env_internal.h
index fcb4642..5c289d6 100644
--- a/include/env_internal.h
+++ b/include/env_internal.h
@@ -194,6 +194,18 @@
extern struct hsearch_data env_htab;
/**
+ * env_do_env_set() - Perform the actual setting of an environment variable
+ *
+ * Due to the number of places we may need to set an environmental variable
+ * from we have an exposed internal function that performs the real work and
+ * then call this from both the command line function as well as other
+ * locations.
+ *
+ * Return: 0 on success or 1 on failure
+ */
+int env_do_env_set(int flag, int argc, char *const argv[], int env_flag);
+
+/**
* env_ext4_get_intf() - Provide the interface for env in EXT4
*
* It is a weak function allowing board to overidde the default interface for
diff --git a/include/ext4fs.h b/include/ext4fs.h
index dd66d27..d96edfd 100644
--- a/include/ext4fs.h
+++ b/include/ext4fs.h
@@ -147,7 +147,7 @@
struct ext_filesystem *get_fs(void);
int ext4fs_open(const char *filename, loff_t *len);
int ext4fs_read(char *buf, loff_t offset, loff_t len, loff_t *actread);
-int ext4fs_mount(unsigned part_length);
+int ext4fs_mount(void);
void ext4fs_close(void);
void ext4fs_reinit_global(void);
int ext4fs_ls(const char *dirname);
diff --git a/include/fat.h b/include/fat.h
index a9756fb..3dce99a 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -34,12 +34,6 @@
/* Maximum number of entry for long file name according to spec */
#define MAX_LFN_SLOT 20
-/* Filesystem identifiers */
-#define FAT12_SIGN "FAT12 "
-#define FAT16_SIGN "FAT16 "
-#define FAT32_SIGN "FAT32 "
-#define SIGNLEN 8
-
/* File attributes */
#define ATTR_RO 1
#define ATTR_HIDDEN 2
diff --git a/include/fm_eth.h b/include/fm_eth.h
index 8b133e7..f301108 100644
--- a/include/fm_eth.h
+++ b/include/fm_eth.h
@@ -7,7 +7,6 @@
#ifndef __FM_ETH_H__
#define __FM_ETH_H__
-#include <common.h>
#include <phy.h>
#include <asm/types.h>
diff --git a/include/fs.h b/include/fs.h
index e341a0e..ef540e7 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -5,7 +5,6 @@
#ifndef _FS_H
#define _FS_H
-#include <common.h>
#include <rtc.h>
struct cmd_tbl;
diff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h
index 258738d..71907bc 100644
--- a/include/fsl-mc/fsl_mc.h
+++ b/include/fsl-mc/fsl_mc.h
@@ -7,9 +7,10 @@
#ifndef __FSL_MC_H__
#define __FSL_MC_H__
-#include <common.h>
#include <linux/bitops.h>
+struct bd_info;
+
#define MC_CCSR_BASE_ADDR \
((struct mc_ccsr_registers __iomem *)0x8340000)
diff --git a/include/fsl_errata.h b/include/fsl_errata.h
index 88f4268..4454764 100644
--- a/include/fsl_errata.h
+++ b/include/fsl_errata.h
@@ -6,7 +6,6 @@
#ifndef _FSL_ERRATA_H
#define _FSL_ERRATA_H
-#include <common.h>
#if defined(CONFIG_PPC)
#include <asm/processor.h>
#elif defined(CONFIG_ARCH_LS1021A)
diff --git a/include/fsl_ifc.h b/include/fsl_ifc.h
index de1e70a..f9a0a70 100644
--- a/include/fsl_ifc.h
+++ b/include/fsl_ifc.h
@@ -9,7 +9,6 @@
#ifdef CONFIG_FSL_IFC
#include <config.h>
-#include <common.h>
#include <part.h>
#ifdef CONFIG_ARM
#include <asm/arch/soc.h>
diff --git a/include/fsl_qe.h b/include/fsl_qe.h
index 48accb8..309ca7e 100644
--- a/include/fsl_qe.h
+++ b/include/fsl_qe.h
@@ -9,7 +9,6 @@
#ifndef __QE_H__
#define __QE_H__
-#include "common.h"
#ifdef CONFIG_U_QE
#include <linux/immap_qe.h>
#endif
diff --git a/include/fsl_sec.h b/include/fsl_sec.h
index 9dad1d1..8c5e59c 100644
--- a/include/fsl_sec.h
+++ b/include/fsl_sec.h
@@ -9,7 +9,6 @@
#ifndef __FSL_SEC_H
#define __FSL_SEC_H
-#include <common.h>
#include <asm/io.h>
#ifdef CONFIG_SYS_FSL_SEC_LE
diff --git a/include/fsl_sec_mon.h b/include/fsl_sec_mon.h
index 3092a0e..248d5b6 100644
--- a/include/fsl_sec_mon.h
+++ b/include/fsl_sec_mon.h
@@ -8,7 +8,6 @@
#ifndef __FSL_SEC_MON_H
#define __FSL_SEC_MON_H
-#include <common.h>
#include <asm/io.h>
#ifdef CONFIG_SYS_FSL_SEC_MON_LE
diff --git a/include/fsl_sfp.h b/include/fsl_sfp.h
index e7674c1..0dec69a 100644
--- a/include/fsl_sfp.h
+++ b/include/fsl_sfp.h
@@ -6,7 +6,6 @@
#ifndef _FSL_SFP_SNVS_
#define _FSL_SFP_SNVS_
-#include <common.h>
#include <config.h>
#include <asm/io.h>
diff --git a/include/init.h b/include/init.h
index d57a24f..9a1951d 100644
--- a/include/init.h
+++ b/include/init.h
@@ -292,6 +292,17 @@
/* common/board_info.c */
int checkboard(void);
+
+/**
+ * show_board_info() - Show board information
+ *
+ * Check sysinfo for board information. Failing that if the root node of the DTB
+ * has a "model" property, show it.
+ *
+ * Then call checkboard().
+ *
+ * Return 0 if OK, -ve on error
+ */
int show_board_info(void);
/**
diff --git a/include/iotrace.h b/include/iotrace.h
index 7ff2e83..d561042 100644
--- a/include/iotrace.h
+++ b/include/iotrace.h
@@ -6,7 +6,6 @@
#ifndef __IOTRACE_H
#define __IOTRACE_H
-//#include <common.h>
#include <linux/types.h>
/* Support up to the machine word length for now */
diff --git a/include/k210/pll.h b/include/k210/pll.h
index fd16a89..175c47f 100644
--- a/include/k210/pll.h
+++ b/include/k210/pll.h
@@ -16,9 +16,6 @@
#ifdef CONFIG_UNIT_TEST
TEST_STATIC int k210_pll_calc_config(u32 rate, u32 rate_in,
struct k210_pll_config *best);
-#ifndef nop
-#define nop()
-#endif
#endif
#endif /* K210_PLL_H */
diff --git a/include/key_matrix.h b/include/key_matrix.h
index e7420b9..17f5d12 100644
--- a/include/key_matrix.h
+++ b/include/key_matrix.h
@@ -8,7 +8,6 @@
#ifndef _KEY_MATRIX_H
#define _KEY_MATRIX_H
-#include <common.h>
/* Information about a matrix keyboard */
struct key_matrix {
diff --git a/include/libata.h b/include/libata.h
index b03b299..a55e931 100644
--- a/include/libata.h
+++ b/include/libata.h
@@ -10,7 +10,6 @@
#ifndef __LIBATA_H__
#define __LIBATA_H__
-#include <common.h>
enum {
/* various global constants */
diff --git a/include/linux/mii.h b/include/linux/mii.h
index 49e29ac..70689bc 100644
--- a/include/linux/mii.h
+++ b/include/linux/mii.h
@@ -9,6 +9,8 @@
#ifndef __LINUX_MII_H__
#define __LINUX_MII_H__
+#include <linux/types.h>
+
/* Generic MII registers. */
#define MII_BMCR 0x00 /* Basic mode control register */
#define MII_BMSR 0x01 /* Basic mode status register */
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 09f5269..7a66c7a 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -552,8 +552,20 @@
#ifdef __UBOOT__
/* drivers/mtd/mtdcore.h */
+#if CONFIG_IS_ENABLED(MTD)
int add_mtd_device(struct mtd_info *mtd);
int del_mtd_device(struct mtd_info *mtd);
+#else
+static inline int add_mtd_device(struct mtd_info *mtd)
+{
+ return -ENOSYS;
+}
+
+static inline int del_mtd_device(struct mtd_info *mtd)
+{
+ return -ENOSYS;
+}
+#endif
#ifdef CONFIG_MTD_PARTITIONS
int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int);
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index e8d6feb..6d68514 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -17,7 +17,6 @@
#include <linux/spi/spi.h>
#include <linux/spi/spi-mem.h>
#else
-#include <common.h>
#include <spi.h>
#include <spi-mem.h>
#include <linux/mtd/nand.h>
diff --git a/include/linux/time.h b/include/linux/time.h
index 14ff5b6..14a144d 100644
--- a/include/linux/time.h
+++ b/include/linux/time.h
@@ -11,6 +11,15 @@
#define _REENT_ONLY
+#define MSEC_PER_SEC 1000L
+#define USEC_PER_MSEC 1000L
+#define NSEC_PER_USEC 1000L
+#define NSEC_PER_MSEC 1000000L
+#define USEC_PER_SEC 1000000L
+#define NSEC_PER_SEC 1000000000L
+#define PSEC_PER_SEC 1000000000000LL
+#define FSEC_PER_SEC 1000000000000000LL
+
#define SECSPERMIN 60L
#define MINSPERHOUR 60L
#define HOURSPERDAY 24L
diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h
index 935e5c0..bb1eb93 100644
--- a/include/linux/usb/composite.h
+++ b/include/linux/usb/composite.h
@@ -21,7 +21,6 @@
* the composite model the host can use both functions at the same time.
*/
-#include <common.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/bitmap.h>
diff --git a/include/miiphy.h b/include/miiphy.h
index c66a184..5abffd8 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -14,7 +14,6 @@
#ifndef _miiphy_h_
#define _miiphy_h_
-#include <common.h>
#include <linux/mii.h>
#include <linux/list.h>
#include <net.h>
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 5926c80..aa88034 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -6,8 +6,6 @@
#ifndef __MPC83XX_H__
#define __MPC83XX_H__
-#include <config.h>
-#include <asm/fsl_lbc.h>
#if defined(CONFIG_E300)
#include <asm/e300.h>
#endif
diff --git a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h
index 52cd1c4..f4aecaa 100644
--- a/include/mtd/cfi_flash.h
+++ b/include/mtd/cfi_flash.h
@@ -163,7 +163,7 @@
#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
/* map to cfi_flash_num_flash_banks only when supported */
#if IS_ENABLED(CONFIG_FLASH_CFI_DRIVER) && \
- (!IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_SPL_MTD_SUPPORT))
+ (!IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_SPL_MTD))
#define CFI_FLASH_BANKS (cfi_flash_num_flash_banks)
/* board code can update this variable before CFI detection */
extern int cfi_flash_num_flash_banks;
diff --git a/include/mv88e6352.h b/include/mv88e6352.h
index 2e810c8..152a077 100644
--- a/include/mv88e6352.h
+++ b/include/mv88e6352.h
@@ -7,7 +7,6 @@
#ifndef __MV886352_H
#define __MV886352_H
-#include <common.h>
/* PHY registers */
#define PHY(itf) (itf)
diff --git a/include/nand.h b/include/nand.h
index 70c1286..220ffa2 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -11,7 +11,9 @@
#include <config.h>
extern void nand_init(void);
+void nand_reinit(void);
unsigned long nand_size(void);
+unsigned int nand_page_size(void);
#include <linux/compat.h>
#include <linux/mtd/mtd.h>
@@ -21,6 +23,7 @@
#if CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT)
void board_nand_init(void);
int nand_register(int devnum, struct mtd_info *mtd);
+void nand_unregister(struct mtd_info *mtd);
#else
struct nand_chip;
diff --git a/include/net.h b/include/net.h
index e63a946..ac511ea 100644
--- a/include/net.h
+++ b/include/net.h
@@ -930,4 +930,21 @@
static inline void eth_set_enable_bootdevs(bool enable) {}
#endif
+/**
+ * wget_with_dns() - runs dns host IP address resulution before wget
+ *
+ * @dst_addr: destination address to download the file
+ * @uri: uri string of target file of wget
+ * Return: downloaded file size, negative if failed
+ */
+int wget_with_dns(ulong dst_addr, char *uri);
+
+/**
+ * wget_validate_uri() - varidate the uri
+ *
+ * @uri: uri string of target file of wget
+ * Return: true if uri is valid, false if uri is invalid
+ */
+bool wget_validate_uri(char *uri);
+
#endif /* __NET_H__ */
diff --git a/include/net/ncsi.h b/include/net/ncsi.h
index 2800c84..7aec457 100644
--- a/include/net/ncsi.h
+++ b/include/net/ncsi.h
@@ -5,7 +5,6 @@
* Copyright (C) 2019, IBM Corporation.
*/
-#include <common.h>
#include <phy.h>
bool ncsi_active(void);
diff --git a/include/os.h b/include/os.h
index fc8a1b1..877404a 100644
--- a/include/os.h
+++ b/include/os.h
@@ -109,6 +109,19 @@
int os_persistent_file(char *buf, int maxsize, const char *fname);
/**
+ * os_mktemp() - Create a temporary file
+ * @fname: The template to use for the file name. This must end with 6 Xs. It
+ * will be modified to the opened filename on success.
+ * @size: The size of the file
+ *
+ * Create a temporary file using @fname as a template, unlink it, and truncate
+ * it to @size.
+ *
+ * Return: A file descriptor, or negative errno on error
+ */
+int os_mktemp(char *fname, off_t size);
+
+/**
* os_exit() - access to the OS exit() system call
*
* This exits with the supplied return code, which should be 0 to indicate
diff --git a/include/palmas.h b/include/palmas.h
index e259a4d..c13b67a 100644
--- a/include/palmas.h
+++ b/include/palmas.h
@@ -6,7 +6,6 @@
#ifndef PALMAS_H
#define PALMAS_H
-#include <common.h>
#include <i2c.h>
/* I2C chip addresses, TW6035/37 */
diff --git a/include/pci_ids.h b/include/pci_ids.h
index 88b0a64..b63bf45 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -1363,6 +1363,13 @@
#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP 0x3fc5
#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI 0x3fc6
+/* Per https://www.qemu.org/docs/master/specs/pci-ids.html */
+#define PCI_VENDOR_ID_REDHAT 0x1b36
+#define PCI_DEVICE_ID_REDHAT_SDHCI 0x0007
+#define PCI_DEVICE_ID_REDHAT_XHCI 0x000d
+#define PCI_DEVICE_ID_REDHAT_NVME 0x0010
+#define PCI_DEVICE_ID_REDHAT_UFS 0x0013
+
#define PCI_VENDOR_ID_INIT 0x1101
#define PCI_VENDOR_ID_CREATIVE 0x1102 /* duplicate: ECTIVA */
diff --git a/include/post.h b/include/post.h
index 6e88d55..da851e3 100644
--- a/include/post.h
+++ b/include/post.h
@@ -11,7 +11,6 @@
#define _POST_H
#ifndef __ASSEMBLY__
-#include <common.h>
#include <asm/io.h>
#if defined(CONFIG_POST)
diff --git a/include/sata.h b/include/sata.h
index 6111cf6..8414e77 100644
--- a/include/sata.h
+++ b/include/sata.h
@@ -2,22 +2,6 @@
#define __SATA_H__
#include <part.h>
-#if !defined(CONFIG_DM_SCSI) && !defined(CONFIG_AHCI)
-int init_sata(int dev);
-int reset_sata(int dev);
-int scan_sata(int dev);
-ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer);
-ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer);
-
-int sata_initialize(void);
-int __sata_initialize(void);
-int sata_stop(void);
-int __sata_stop(void);
-int sata_port_status(int dev, int port);
-
-extern struct blk_desc sata_dev_desc[];
-#endif
-
int sata_probe(int devnum);
int sata_remove(int devnum);
diff --git a/include/scsi.h b/include/scsi.h
index ee9d622..cf756aa 100644
--- a/include/scsi.h
+++ b/include/scsi.h
@@ -10,10 +10,6 @@
#include <bouncebuf.h>
#include <linux/dma-direction.h>
-/* Fix this to the maximum */
-#define SCSI_MAX_DEVICE \
- (CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN)
-
struct udevice;
/**
@@ -355,11 +351,6 @@
*/
int scsi_scan_dev(struct udevice *dev, bool verbose);
-#ifndef CONFIG_DM_SCSI
-void scsi_low_level_init(int busdevfunc);
-void scsi_init(void);
-#endif
-
#define SCSI_IDENTIFY 0xC0 /* not used */
/* Hardware errors */
diff --git a/include/spi.h b/include/spi.h
index 1bc18e6..7e38cc2 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -9,7 +9,6 @@
#ifndef _SPI_H_
#define _SPI_H_
-#include <common.h>
#include <linux/bitops.h>
/* SPI mode flags */
diff --git a/include/spl.h b/include/spl.h
index 8ff20ad..0952188 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -285,30 +285,53 @@
/**
* Information required to load data from a device
*
- * @dev: Pointer to the device, e.g. struct mmc *
* @priv: Private data for the device
* @bl_len: Block length for reading in bytes
- * @filename: Name of the fit image file.
* @read: Function to call to read from the device
*/
struct spl_load_info {
- void *dev;
void *priv;
- int bl_len;
- const char *filename;
/**
* read() - Read from device
*
* @load: Information about the load state
- * @sector: Sector number to read from (each @load->bl_len bytes)
- * @count: Number of sectors to read
+ * @offset: Offset to read from in bytes. This must be a multiple of
+ * @load->bl_len.
+ * @count: Number of bytes to read. This must be a multiple of
+ * @load->bl_len.
* @buf: Buffer to read into
- * @return number of sectors read, 0 on error
+ * @return number of bytes read, 0 on error
*/
ulong (*read)(struct spl_load_info *load, ulong sector, ulong count,
void *buf);
+#if IS_ENABLED(CONFIG_SPL_LOAD_BLOCK)
+ int bl_len;
};
+static inline int spl_get_bl_len(struct spl_load_info *info)
+{
+ return info->bl_len;
+}
+
+static inline void spl_set_bl_len(struct spl_load_info *info, int bl_len)
+{
+ info->bl_len = bl_len;
+}
+#else
+};
+
+static inline int spl_get_bl_len(struct spl_load_info *info)
+{
+ return 1;
+}
+
+static inline void spl_set_bl_len(struct spl_load_info *info, int bl_len)
+{
+ if (bl_len != 1)
+ panic("CONFIG_SPL_LOAD_BLOCK not enabled");
+}
+#endif
+
/*
* We need to know the position of U-Boot in memory so we can jump to it. We
* allow any U-Boot binary to be used (u-boot.bin, u-boot-nodtb.bin,
@@ -370,7 +393,8 @@
* spl_load_simple_fit() - Loads a fit image from a device.
* @spl_image: Image description to set up
* @info: Structure containing the information required to load data.
- * @sector: Sector number where FIT image is located in the device
+ * @offset: Offset where FIT image is located in the device. Must be aligned
+ * to the device's bl_len.
* @fdt: Pointer to the copied FIT header.
*
* Reads the FIT image @sector in the device. Loads u-boot image to
@@ -378,12 +402,25 @@
* Returns 0 on success.
*/
int spl_load_simple_fit(struct spl_image_info *spl_image,
- struct spl_load_info *info, ulong sector, void *fdt);
+ struct spl_load_info *info, ulong offset, void *fdt);
#define SPL_COPY_PAYLOAD_ONLY 1
#define SPL_FIT_FOUND 2
/**
+ * spl_load_legacy_lzma() - Load an LZMA-compressed legacy image
+ * @spl_image: Image description (already set up)
+ * @load: Structure containing the information required to load data.
+ * @offset: Pointer to image
+ *
+ * Load/decompress an LZMA-compressed legacy image from the device.
+ *
+ * Return: 0 on success, or a negative error on failure
+ */
+int spl_load_legacy_lzma(struct spl_image_info *spl_image,
+ struct spl_load_info *load, ulong offset);
+
+/**
* spl_load_legacy_img() - Loads a legacy image from a device.
* @spl_image: Image description to set up
* @load: Structure containing the information required to load data.
@@ -404,13 +441,14 @@
* spl_load_imx_container() - Loads a imx container image from a device.
* @spl_image: Image description to set up
* @info: Structure containing the information required to load data.
- * @sector: Sector number where container image is located in the device
+ * @sector: Offset where container image is located in the device. Must be
+ * aligned to the device block size.
*
* Reads the container image @sector in the device. Loads u-boot image to
* specified load address.
*/
int spl_load_imx_container(struct spl_image_info *spl_image,
- struct spl_load_info *info, ulong sector);
+ struct spl_load_info *info, ulong offset);
/* SPL common functions */
void preloader_console_init(void);
diff --git a/include/spl_load.h b/include/spl_load.h
new file mode 100644
index 0000000..1c2b296
--- /dev/null
+++ b/include/spl_load.h
@@ -0,0 +1,144 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) Sean Anderson <seanga2@gmail.com>
+ */
+#ifndef _SPL_LOAD_H_
+#define _SPL_LOAD_H_
+
+#include <image.h>
+#include <imx_container.h>
+#include <mapmem.h>
+#include <spl.h>
+
+static inline int _spl_load(struct spl_image_info *spl_image,
+ const struct spl_boot_device *bootdev,
+ struct spl_load_info *info, size_t size,
+ size_t offset)
+{
+ struct legacy_img_hdr *header =
+ spl_get_load_buffer(-sizeof(*header), sizeof(*header));
+ ulong base_offset, image_offset, overhead;
+ int read, ret;
+
+ read = info->read(info, offset, ALIGN(sizeof(*header),
+ spl_get_bl_len(info)), header);
+ if (read < sizeof(*header))
+ return -EIO;
+
+ if (image_get_magic(header) == FDT_MAGIC) {
+ if (IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL)) {
+ void *buf;
+
+ /*
+ * In order to support verifying images in the FIT, we
+ * need to load the whole FIT into memory. Try and
+ * guess how much we need to load by using the total
+ * size. This will fail for FITs with external data,
+ * but there's not much we can do about that.
+ */
+ if (!size)
+ size = round_up(fdt_totalsize(header), 4);
+ buf = map_sysmem(CONFIG_SYS_LOAD_ADDR, size);
+ read = info->read(info, offset,
+ ALIGN(size, spl_get_bl_len(info)),
+ buf);
+ if (read < size)
+ return -EIO;
+
+ return spl_parse_image_header(spl_image, bootdev, buf);
+ }
+
+ if (IS_ENABLED(CONFIG_SPL_LOAD_FIT))
+ return spl_load_simple_fit(spl_image, info, offset,
+ header);
+ }
+
+ if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER) &&
+ valid_container_hdr((void *)header))
+ return spl_load_imx_container(spl_image, info, offset);
+
+ if (IS_ENABLED(CONFIG_SPL_LZMA) &&
+ image_get_magic(header) == IH_MAGIC &&
+ image_get_comp(header) == IH_COMP_LZMA) {
+ spl_image->flags |= SPL_COPY_PAYLOAD_ONLY;
+ ret = spl_parse_image_header(spl_image, bootdev, header);
+ if (ret)
+ return ret;
+
+ return spl_load_legacy_lzma(spl_image, info, offset);
+ }
+
+ ret = spl_parse_image_header(spl_image, bootdev, header);
+ if (ret)
+ return ret;
+
+ base_offset = spl_image->offset;
+ /* Only NOR sets this flag. */
+ if (IS_ENABLED(CONFIG_SPL_NOR_SUPPORT) &&
+ spl_image->flags & SPL_COPY_PAYLOAD_ONLY)
+ base_offset += sizeof(*header);
+ image_offset = ALIGN_DOWN(base_offset, spl_get_bl_len(info));
+ overhead = base_offset - image_offset;
+ size = ALIGN(spl_image->size + overhead, spl_get_bl_len(info));
+
+ read = info->read(info, offset + image_offset, size,
+ map_sysmem(spl_image->load_addr - overhead, size));
+ return read < spl_image->size ? -EIO : 0;
+}
+
+/*
+ * Although spl_load results in size reduction for callers, this is generally
+ * not enough to counteract the bloat if there is only one caller. The core
+ * problem is that the compiler can't optimize across translation units. The
+ * general solution to this is CONFIG_LTO, but that is not available on all
+ * architectures. Perform a pseudo-LTO just for this function by declaring it
+ * inline if there is one caller, and extern otherwise.
+ */
+#define SPL_LOAD_USERS \
+ IS_ENABLED(CONFIG_SPL_BLK_FS) + \
+ IS_ENABLED(CONFIG_SPL_FS_EXT4) + \
+ IS_ENABLED(CONFIG_SPL_FS_FAT) + \
+ IS_ENABLED(CONFIG_SPL_SYS_MMCSD_RAW_MODE) + \
+ (IS_ENABLED(CONFIG_SPL_NAND_SUPPORT) && !IS_ENABLED(CONFIG_SPL_UBI)) + \
+ IS_ENABLED(CONFIG_SPL_NET) + \
+ IS_ENABLED(CONFIG_SPL_NOR_SUPPORT) + \
+ IS_ENABLED(CONFIG_SPL_SEMIHOSTING) + \
+ IS_ENABLED(CONFIG_SPL_SPI_LOAD) + \
+ 0
+
+#if SPL_LOAD_USERS > 1
+/**
+ * spl_load() - Parse a header and load the image
+ * @spl_image: Image data which will be filled in by this function
+ * @bootdev: The device to load from
+ * @info: Describes how to load additional information from @bootdev. At the
+ * minimum, read() and bl_len must be populated.
+ * @size: The size of the image, in bytes, if it is known in advance. Some boot
+ * devices (such as filesystems) know how big an image is before parsing
+ * the header. If 0, then the size will be determined from the header.
+ * @offset: The offset from the start of @bootdev, in bytes. This should have
+ * the offset @header was loaded from. It will be added to any offsets
+ * passed to @info->read().
+ *
+ * This function determines the image type (FIT, legacy, i.MX, raw, etc), calls
+ * the appropriate parsing function, determines the load address, and the loads
+ * the image from storage. It is designed to replace ad-hoc image loading which
+ * may not support all image types (especially when config options are
+ * involved).
+ *
+ * Return: 0 on success, or a negative error on failure
+ */
+int spl_load(struct spl_image_info *spl_image,
+ const struct spl_boot_device *bootdev, struct spl_load_info *info,
+ size_t size, size_t offset);
+#else
+static inline int spl_load(struct spl_image_info *spl_image,
+ const struct spl_boot_device *bootdev,
+ struct spl_load_info *info, size_t size,
+ size_t offset)
+{
+ return _spl_load(spl_image, bootdev, info, size, offset);
+}
+#endif
+
+#endif /* _SPL_LOAD_H_ */
diff --git a/include/sysinfo.h b/include/sysinfo.h
index b140d74..f2c1aa2 100644
--- a/include/sysinfo.h
+++ b/include/sysinfo.h
@@ -46,6 +46,9 @@
/* For show_board_info() */
SYSINFO_ID_BOARD_MODEL,
+ SYSINFO_ID_BOARD_MANUFACTURER,
+ SYSINFO_ID_PRIOR_STAGE_VERSION,
+ SYSINFO_ID_PRIOR_STAGE_DATE,
/* First value available for downstream/board used */
SYSINFO_ID_USER = 0x1000,
diff --git a/include/system-constants.h b/include/system-constants.h
index 5937156..d688629 100644
--- a/include/system-constants.h
+++ b/include/system-constants.h
@@ -41,4 +41,8 @@
#define SPL_PAYLOAD_ARGS_ADDR 0
#endif
+/* Number of pages per block */
+#define SYS_NAND_BLOCK_PAGES \
+ (CONFIG_SYS_NAND_BLOCK_SIZE / CONFIG_SYS_NAND_PAGE_SIZE)
+
#endif
diff --git a/include/tegra-kbc.h b/include/tegra-kbc.h
index f331c79..1208b75 100644
--- a/include/tegra-kbc.h
+++ b/include/tegra-kbc.h
@@ -7,7 +7,6 @@
#ifndef __include_tegra_kbc_h__
#define __include_tegra_kbc_h__
-#include <common.h>
#define KEY_IS_MODIFIER(key) ((key) >= KEY_FIRST_MODIFIER)
diff --git a/include/test/spl.h b/include/test/spl.h
index c1f6465..a2a5f33 100644
--- a/include/test/spl.h
+++ b/include/test/spl.h
@@ -81,6 +81,10 @@
int check_image_info(struct unit_test_state *uts, struct spl_image_info *info1,
struct spl_image_info *info2);
+/* Some compressed data and it size */
+extern const char lzma_compressed[];
+extern const size_t lzma_compressed_size;
+
/**
* typedef write_image_t - Callback for writing an image
* @uts: Current unit test state
diff --git a/include/twl4030.h b/include/twl4030.h
index 0a6d85a..ee80bb1 100644
--- a/include/twl4030.h
+++ b/include/twl4030.h
@@ -11,7 +11,6 @@
#ifndef TWL4030_H
#define TWL4030_H
-#include <common.h>
#include <i2c.h>
/* I2C chip addresses */
diff --git a/include/twl6030.h b/include/twl6030.h
index 05d476f..e3a1058 100644
--- a/include/twl6030.h
+++ b/include/twl6030.h
@@ -7,7 +7,6 @@
#ifndef TWL6030_H
#define TWL6030_H
-#include <common.h>
#include <i2c.h>
/* I2C chip addresses */
diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h
index 6da348e..d7a8851 100644
--- a/include/ubi_uboot.h
+++ b/include/ubi_uboot.h
@@ -14,7 +14,6 @@
#ifndef __UBOOT_UBI_H
#define __UBOOT_UBI_H
-#include <common.h>
#include <compiler.h>
#include <linux/compat.h>
#include <malloc.h>
diff --git a/include/usbdevice.h b/include/usbdevice.h
index 80c5af0..e59f558 100644
--- a/include/usbdevice.h
+++ b/include/usbdevice.h
@@ -17,7 +17,6 @@
#ifndef __USBDCORE_H__
#define __USBDCORE_H__
-#include <common.h>
#include "usbdescriptors.h"
diff --git a/lib/Kconfig b/lib/Kconfig
index 1964951..9ae846e 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -74,6 +74,13 @@
config LIB_UUID
bool
+config RANDOM_UUID
+ bool "GPT Random UUID generation"
+ select LIB_UUID
+ help
+ Enable the generation of partitions with random UUIDs if none
+ are provided.
+
config SPL_LIB_UUID
depends on SPL
bool
@@ -93,7 +100,7 @@
config SEMIHOSTING_FALLBACK
bool "Recover gracefully when semihosting fails"
- depends on SEMIHOSTING && (ARM64 || RISCV)
+ depends on SEMIHOSTING
default y
help
Normally, if U-Boot makes a semihosting call and no debugger is
@@ -116,7 +123,7 @@
config SPL_SEMIHOSTING_FALLBACK
bool "Recover gracefully when semihosting fails in SPL"
- depends on SPL_SEMIHOSTING && (ARM64 || RISCV)
+ depends on SPL_SEMIHOSTING
select ARMV8_SPL_EXCEPTION_VECTORS if ARM64
default y
help
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index 2e39354..ea80734 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -32,14 +32,14 @@
if EFI_LOADER
-config CMD_BOOTEFI_BOOTMGR
+config BOOTEFI_BOOTMGR
bool "UEFI Boot Manager"
default y
select BOOTMETH_GLOBAL if BOOTSTD
help
Select this option if you want to select the UEFI binary to be booted
- via UEFI variables Boot####, BootOrder, and BootNext. This enables the
- 'bootefi bootmgr' command.
+ via UEFI variables Boot####, BootOrder, and BootNext. You should also
+ normally enable CMD_BOOTEFI_BOOTMGR so that the command is available.
choice
prompt "Store for non-volatile UEFI variables"
@@ -479,4 +479,13 @@
replace the transfer via the device-tree. The latter is not
possible on systems using ACPI.
+config EFI_HTTP_BOOT
+ bool "EFI HTTP Boot support"
+ select CMD_DNS
+ select CMD_WGET
+ select BLKMAP
+ help
+ Enabling this option adds EFI HTTP Boot support. It allows to
+ directly boot from network.
+
endif
diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index 8d31fc6..0a2cb6e 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -42,7 +42,7 @@
endif
obj-$(CONFIG_CMD_BOOTEFI_HELLO) += helloworld_efi.o
-obj-$(CONFIG_CMD_BOOTEFI_BOOTMGR) += efi_bootmgr.o
+obj-$(CONFIG_BOOTEFI_BOOTMGR) += efi_bootmgr.o
obj-y += efi_boottime.o
obj-y += efi_helper.o
obj-$(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) += efi_capsule.o
diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c
index a40762c..48153bd 100644
--- a/lib/efi_loader/efi_bootmgr.c
+++ b/lib/efi_loader/efi_bootmgr.c
@@ -7,10 +7,14 @@
#define LOG_CATEGORY LOGC_EFI
+#include <blk.h>
+#include <blkmap.h>
#include <common.h>
#include <charset.h>
+#include <dm.h>
#include <log.h>
#include <malloc.h>
+#include <net.h>
#include <efi_default_filename.h>
#include <efi_loader.h>
#include <efi_variable.h>
@@ -19,6 +23,23 @@
static const struct efi_boot_services *bs;
static const struct efi_runtime_services *rs;
+/**
+ * struct uridp_context - uri device path resource
+ *
+ * @image_size: image size
+ * @image_addr: image address
+ * @loaded_dp: pointer to loaded device path
+ * @ramdisk_blk_dev: pointer to the ramdisk blk device
+ * @mem_handle: efi_handle to the loaded PE-COFF image
+ */
+struct uridp_context {
+ ulong image_size;
+ ulong image_addr;
+ struct efi_device_path *loaded_dp;
+ struct udevice *ramdisk_blk_dev;
+ efi_handle_t mem_handle;
+};
+
const efi_guid_t efi_guid_bootmenu_auto_generated =
EFICONFIG_AUTO_GENERATED_ENTRY_GUID;
@@ -169,6 +190,364 @@
}
/**
+ * mount_image() - mount the image with blkmap
+ *
+ * @lo_label: u16 label string of load option
+ * @addr: image address
+ * @size: image size
+ * Return: pointer to the UCLASS_BLK udevice, NULL if failed
+ */
+static struct udevice *mount_image(u16 *lo_label, ulong addr, ulong size)
+{
+ int err;
+ struct blkmap *bm;
+ struct udevice *bm_dev;
+ char *label = NULL, *p;
+
+ label = efi_alloc(utf16_utf8_strlen(lo_label) + 1);
+ if (!label)
+ return NULL;
+
+ p = label;
+ utf16_utf8_strcpy(&p, lo_label);
+ err = blkmap_create_ramdisk(label, addr, size, &bm_dev);
+ if (err) {
+ efi_free_pool(label);
+ return NULL;
+ }
+ bm = dev_get_plat(bm_dev);
+
+ efi_free_pool(label);
+
+ return bm->blk;
+}
+
+/**
+ * search_default_file() - search default file
+ *
+ * @dev: pointer to the UCLASS_BLK or UCLASS_PARTITION udevice
+ * @loaded_dp: pointer to default file device path
+ * Return: status code
+ */
+static efi_status_t search_default_file(struct udevice *dev,
+ struct efi_device_path **loaded_dp)
+{
+ efi_status_t ret;
+ efi_handle_t handle;
+ u16 *default_file_name = NULL;
+ struct efi_file_handle *root, *f;
+ struct efi_device_path *dp = NULL, *fp = NULL;
+ struct efi_simple_file_system_protocol *file_system;
+ struct efi_device_path *device_path, *full_path = NULL;
+
+ if (dev_tag_get_ptr(dev, DM_TAG_EFI, (void **)&handle)) {
+ log_warning("DM_TAG_EFI not found\n");
+ return EFI_INVALID_PARAMETER;
+ }
+
+ ret = EFI_CALL(bs->open_protocol(handle, &efi_guid_device_path,
+ (void **)&device_path, efi_root, NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL));
+ if (ret != EFI_SUCCESS)
+ return ret;
+
+ ret = EFI_CALL(bs->open_protocol(handle, &efi_simple_file_system_protocol_guid,
+ (void **)&file_system, efi_root, NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL));
+ if (ret != EFI_SUCCESS)
+ return ret;
+
+ ret = EFI_CALL(file_system->open_volume(file_system, &root));
+ if (ret != EFI_SUCCESS)
+ return ret;
+
+ full_path = expand_media_path(device_path);
+ ret = efi_dp_split_file_path(full_path, &dp, &fp);
+ if (ret != EFI_SUCCESS)
+ goto err;
+
+ default_file_name = efi_dp_str(fp);
+ efi_free_pool(dp);
+ efi_free_pool(fp);
+ if (!default_file_name) {
+ ret = EFI_OUT_OF_RESOURCES;
+ goto err;
+ }
+
+ ret = EFI_CALL(root->open(root, &f, default_file_name,
+ EFI_FILE_MODE_READ, 0));
+ efi_free_pool(default_file_name);
+ if (ret != EFI_SUCCESS)
+ goto err;
+
+ EFI_CALL(f->close(f));
+ EFI_CALL(root->close(root));
+
+ *loaded_dp = full_path;
+
+ return EFI_SUCCESS;
+
+err:
+ EFI_CALL(root->close(root));
+ efi_free_pool(full_path);
+
+ return ret;
+}
+
+/**
+ * check_disk_has_default_file() - load the default file
+ *
+ * @blk: pointer to the UCLASS_BLK udevice
+ * @dp: pointer to default file device path
+ * Return: status code
+ */
+static efi_status_t check_disk_has_default_file(struct udevice *blk,
+ struct efi_device_path **dp)
+{
+ efi_status_t ret;
+ struct udevice *partition;
+
+ /* image that has no partition table but a file system */
+ ret = search_default_file(blk, dp);
+ if (ret == EFI_SUCCESS)
+ return ret;
+
+ /* try the partitions */
+ device_foreach_child(partition, blk) {
+ enum uclass_id id;
+
+ id = device_get_uclass_id(partition);
+ if (id != UCLASS_PARTITION)
+ continue;
+
+ ret = search_default_file(partition, dp);
+ if (ret == EFI_SUCCESS)
+ return ret;
+ }
+
+ return EFI_NOT_FOUND;
+}
+
+/**
+ * prepare_loaded_image() - prepare ramdisk for downloaded image
+ *
+ * @label: label of load option
+ * @addr: image address
+ * @size: image size
+ * @dp: pointer to default file device path
+ * @blk: pointer to created blk udevice
+ * Return: status code
+ */
+static efi_status_t prepare_loaded_image(u16 *label, ulong addr, ulong size,
+ struct efi_device_path **dp,
+ struct udevice **blk)
+{
+ efi_status_t ret;
+ struct udevice *ramdisk_blk;
+
+ ramdisk_blk = mount_image(label, addr, size);
+ if (!ramdisk_blk)
+ return EFI_LOAD_ERROR;
+
+ ret = check_disk_has_default_file(ramdisk_blk, dp);
+ if (ret != EFI_SUCCESS) {
+ log_info("Cannot boot from downloaded image\n");
+ goto err;
+ }
+
+ /*
+ * TODO: expose the ramdisk to OS.
+ * Need to pass the ramdisk information by the architecture-specific
+ * methods such as 'pmem' device-tree node.
+ */
+ ret = efi_add_memory_map(addr, size, EFI_RESERVED_MEMORY_TYPE);
+ if (ret != EFI_SUCCESS) {
+ log_err("Memory reservation failed\n");
+ goto err;
+ }
+
+ *blk = ramdisk_blk;
+
+ return EFI_SUCCESS;
+
+err:
+ if (blkmap_destroy(ramdisk_blk->parent))
+ log_err("Destroying blkmap failed\n");
+
+ return ret;
+}
+
+/**
+ * efi_bootmgr_release_uridp_resource() - cleanup uri device path resource
+ *
+ * @ctx: event context
+ * Return: status code
+ */
+efi_status_t efi_bootmgr_release_uridp_resource(struct uridp_context *ctx)
+{
+ efi_status_t ret = EFI_SUCCESS;
+
+ if (!ctx)
+ return ret;
+
+ /* cleanup for iso or img image */
+ if (ctx->ramdisk_blk_dev) {
+ ret = efi_add_memory_map(ctx->image_addr, ctx->image_size,
+ EFI_CONVENTIONAL_MEMORY);
+ if (ret != EFI_SUCCESS)
+ log_err("Reclaiming memory failed\n");
+
+ if (blkmap_destroy(ctx->ramdisk_blk_dev->parent)) {
+ log_err("Destroying blkmap failed\n");
+ ret = EFI_DEVICE_ERROR;
+ }
+ }
+
+ /* cleanup for PE-COFF image */
+ if (ctx->mem_handle) {
+ ret = efi_uninstall_multiple_protocol_interfaces(
+ ctx->mem_handle, &efi_guid_device_path, ctx->loaded_dp,
+ NULL);
+ if (ret != EFI_SUCCESS)
+ log_err("Uninstall device_path protocol failed\n");
+ }
+
+ efi_free_pool(ctx->loaded_dp);
+ free(ctx);
+
+ return ret;
+}
+
+/**
+ * efi_bootmgr_image_return_notify() - return to efibootmgr callback
+ *
+ * @event: the event for which this notification function is registered
+ * @context: event context
+ */
+static void EFIAPI efi_bootmgr_image_return_notify(struct efi_event *event,
+ void *context)
+{
+ efi_status_t ret;
+
+ EFI_ENTRY("%p, %p", event, context);
+ ret = efi_bootmgr_release_uridp_resource(context);
+ EFI_EXIT(ret);
+}
+
+/**
+ * try_load_from_uri_path() - Handle the URI device path
+ *
+ * @uridp: uri device path
+ * @lo_label: label of load option
+ * @handle: pointer to handle for newly installed image
+ * Return: status code
+ */
+static efi_status_t try_load_from_uri_path(struct efi_device_path_uri *uridp,
+ u16 *lo_label,
+ efi_handle_t *handle)
+{
+ char *s;
+ int err;
+ int uri_len;
+ efi_status_t ret;
+ void *source_buffer;
+ efi_uintn_t source_size;
+ struct uridp_context *ctx;
+ struct udevice *blk = NULL;
+ struct efi_event *event = NULL;
+ efi_handle_t mem_handle = NULL;
+ struct efi_device_path *loaded_dp;
+ static ulong image_size, image_addr;
+
+ ctx = calloc(1, sizeof(struct uridp_context));
+ if (!ctx)
+ return EFI_OUT_OF_RESOURCES;
+
+ s = env_get("loadaddr");
+ if (!s) {
+ log_err("Error: loadaddr is not set\n");
+ ret = EFI_INVALID_PARAMETER;
+ goto err;
+ }
+
+ image_addr = hextoul(s, NULL);
+ err = wget_with_dns(image_addr, uridp->uri);
+ if (err < 0) {
+ ret = EFI_INVALID_PARAMETER;
+ goto err;
+ }
+
+ image_size = env_get_hex("filesize", 0);
+ if (!image_size) {
+ ret = EFI_INVALID_PARAMETER;
+ goto err;
+ }
+
+ /*
+ * If the file extension is ".iso" or ".img", mount it and try to load
+ * the default file.
+ * If the file is PE-COFF image, load the downloaded file.
+ */
+ uri_len = strlen(uridp->uri);
+ if (!strncmp(&uridp->uri[uri_len - 4], ".iso", 4) ||
+ !strncmp(&uridp->uri[uri_len - 4], ".img", 4)) {
+ ret = prepare_loaded_image(lo_label, image_addr, image_size,
+ &loaded_dp, &blk);
+ if (ret != EFI_SUCCESS)
+ goto err;
+
+ source_buffer = NULL;
+ source_size = 0;
+ } else if (efi_check_pe((void *)image_addr, image_size, NULL) == EFI_SUCCESS) {
+ /*
+ * loaded_dp must exist until efi application returns,
+ * will be freed in return_to_efibootmgr event callback.
+ */
+ loaded_dp = efi_dp_from_mem(EFI_RESERVED_MEMORY_TYPE,
+ (uintptr_t)image_addr, image_size);
+ ret = efi_install_multiple_protocol_interfaces(
+ &mem_handle, &efi_guid_device_path, loaded_dp, NULL);
+ if (ret != EFI_SUCCESS)
+ goto err;
+
+ source_buffer = (void *)image_addr;
+ source_size = image_size;
+ } else {
+ log_err("Error: file type is not supported\n");
+ ret = EFI_UNSUPPORTED;
+ goto err;
+ }
+
+ ctx->image_size = image_size;
+ ctx->image_addr = image_addr;
+ ctx->loaded_dp = loaded_dp;
+ ctx->ramdisk_blk_dev = blk;
+ ctx->mem_handle = mem_handle;
+
+ ret = EFI_CALL(efi_load_image(false, efi_root, loaded_dp, source_buffer,
+ source_size, handle));
+ if (ret != EFI_SUCCESS)
+ goto err;
+
+ /* create event for cleanup when the image returns or error occurs */
+ ret = efi_create_event(EVT_NOTIFY_SIGNAL, TPL_CALLBACK,
+ efi_bootmgr_image_return_notify, ctx,
+ &efi_guid_event_group_return_to_efibootmgr,
+ &event);
+ if (ret != EFI_SUCCESS) {
+ log_err("Creating event failed\n");
+ goto err;
+ }
+
+ return ret;
+
+err:
+ efi_bootmgr_release_uridp_resource(ctx);
+
+ return ret;
+}
+
+/**
* try_load_entry() - try to load image for boot option
*
* Attempt to load load-option number 'n', returning device_path and file_path
@@ -211,6 +590,13 @@
if (EFI_DP_TYPE(lo.file_path, MEDIA_DEVICE, FILE_PATH)) {
/* file_path doesn't contain a device path */
ret = try_load_from_short_path(lo.file_path, handle);
+ } else if (EFI_DP_TYPE(lo.file_path, MESSAGING_DEVICE, MSG_URI)) {
+ if (IS_ENABLED(CONFIG_EFI_HTTP_BOOT))
+ ret = try_load_from_uri_path(
+ (struct efi_device_path_uri *)lo.file_path,
+ lo.label, handle);
+ else
+ ret = EFI_LOAD_ERROR;
} else {
file_path = expand_media_path(lo.file_path);
ret = EFI_CALL(efi_load_image(true, efi_root, file_path,
diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index 0b7579c..3767fa2 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -90,6 +90,9 @@
/* event group ResetSystem() invoked (before ExitBootServices) */
const efi_guid_t efi_guid_event_group_reset_system =
EFI_EVENT_GROUP_RESET_SYSTEM;
+/* event group return to efibootmgr */
+const efi_guid_t efi_guid_event_group_return_to_efibootmgr =
+ EFI_EVENT_GROUP_RETURN_TO_EFIBOOTMGR;
/* GUIDs of the Load File and Load File2 protocols */
const efi_guid_t efi_guid_load_file_protocol = EFI_LOAD_FILE_PROTOCOL_GUID;
const efi_guid_t efi_guid_load_file2_protocol = EFI_LOAD_FILE2_PROTOCOL_GUID;
@@ -712,7 +715,7 @@
void (EFIAPI *notify_function) (
struct efi_event *event,
void *context),
- void *notify_context, efi_guid_t *group,
+ void *notify_context, const efi_guid_t *group,
struct efi_event **event)
{
struct efi_event *evt;
@@ -790,7 +793,7 @@
struct efi_event *event,
void *context),
void *notify_context,
- efi_guid_t *event_group,
+ const efi_guid_t *event_group,
struct efi_event **event)
{
efi_status_t ret;
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index f0d7611..b808a7f 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -690,6 +690,13 @@
return -1;
}
+ /* only do the boot option management when UEFI sub-system is initialized */
+ if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR) && efi_obj_list_initialized == EFI_SUCCESS) {
+ ret = efi_bootmgr_update_media_device_boot_option();
+ if (ret != EFI_SUCCESS)
+ return -1;
+ }
+
return 0;
}
@@ -742,6 +749,17 @@
dev_tag_del(dev, DM_TAG_EFI);
return 0;
+
+ /*
+ * TODO A flag to distinguish below 2 different scenarios of this
+ * function call is needed:
+ * a) Unplugging of a removable media under U-Boot
+ * b) U-Boot exiting and booting an OS
+ * In case of scenario a), efi_bootmgr_update_media_device_boot_option()
+ * needs to be invoked here to update the boot options and remove the
+ * unnecessary ones.
+ */
+
}
/**
diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c
index e6de685..37359a7 100644
--- a/lib/efi_loader/efi_setup.c
+++ b/lib/efi_loader/efi_setup.c
@@ -245,6 +245,13 @@
if (ret != EFI_SUCCESS)
goto out;
+ if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR)) {
+ /* update boot option after variable service initialized */
+ ret = efi_bootmgr_update_media_device_boot_option();
+ if (ret != EFI_SUCCESS)
+ goto out;
+ }
+
/* Define supported languages */
ret = efi_init_platform_lang();
if (ret != EFI_SUCCESS)
diff --git a/lib/slre.c b/lib/slre.c
index e82a9e7..e1a5044 100644
--- a/lib/slre.c
+++ b/lib/slre.c
@@ -686,6 +686,7 @@
}
if (!slre_compile(&slre, argv[1])) {
+ (void) fclose(fp);
fprintf(stderr, "Error compiling slre: %s\n", slre.err_str);
return 1;
}
diff --git a/net/Kconfig b/net/Kconfig
index 4215889..8c80b3a 100644
--- a/net/Kconfig
+++ b/net/Kconfig
@@ -5,6 +5,7 @@
menuconfig NET
bool "Networking support"
default y
+ imply NETDEVICES
if NET
diff --git a/net/wget.c b/net/wget.c
index 8bb4d72..6ae2237 100644
--- a/net/wget.c
+++ b/net/wget.c
@@ -4,15 +4,20 @@
* Copyright Duncan Hare <dh@synoia.com> 2017
*/
+#include <asm/global_data.h>
#include <command.h>
#include <common.h>
#include <display_options.h>
#include <env.h>
#include <image.h>
+#include <lmb.h>
#include <mapmem.h>
#include <net.h>
#include <net/tcp.h>
#include <net/wget.h>
+#include <stdlib.h>
+
+DECLARE_GLOBAL_DATA_PTR;
static const char bootfile1[] = "GET ";
static const char bootfile3[] = " HTTP/1.0\r\n\r\n";
@@ -56,6 +61,29 @@
static unsigned int retry_tcp_seq_num; /* TCP retry sequence number */
static int retry_len; /* TCP retry length */
+static ulong wget_load_size;
+
+/**
+ * wget_init_max_size() - initialize maximum load size
+ *
+ * Return: 0 if success, -1 if fails
+ */
+static int wget_init_load_size(void)
+{
+ struct lmb lmb;
+ phys_size_t max_size;
+
+ lmb_init_and_reserve(&lmb, gd->bd, (void *)gd->fdt_blob);
+
+ max_size = lmb_get_free_size(&lmb, image_load_addr);
+ if (!max_size)
+ return -1;
+
+ wget_load_size = max_size;
+
+ return 0;
+}
+
/**
* store_block() - store block in memory
* @src: source of data
@@ -64,10 +92,25 @@
*/
static inline int store_block(uchar *src, unsigned int offset, unsigned int len)
{
+ ulong store_addr = image_load_addr + offset;
ulong newsize = offset + len;
uchar *ptr;
+ if (IS_ENABLED(CONFIG_LMB)) {
+ ulong end_addr = image_load_addr + wget_load_size;
+
- ptr = map_sysmem(image_load_addr + offset, len);
+ if (!end_addr)
+ end_addr = ULONG_MAX;
+
+ if (store_addr < image_load_addr ||
+ store_addr + len > end_addr) {
+ printf("\nwget error: ");
+ printf("trying to overwrite reserved memory...\n");
+ return -1;
+ }
+ }
+
+ ptr = map_sysmem(store_addr, len);
memcpy(ptr, src, len);
unmap_sysmem(ptr);
@@ -248,25 +291,39 @@
net_boot_file_size = 0;
- if (len > hlen)
- store_block(pkt + hlen, 0, len - hlen);
+ if (len > hlen) {
+ if (store_block(pkt + hlen, 0, len - hlen) != 0) {
+ wget_loop_state = NETLOOP_FAIL;
+ wget_fail("wget: store error\n", tcp_seq_num, tcp_ack_num, action);
+ net_set_state(NETLOOP_FAIL);
+ return;
+ }
+ }
debug_cond(DEBUG_WGET,
"wget: Connected Pkt %p hlen %x\n",
pkt, hlen);
for (i = 0; i < pkt_q_idx; i++) {
+ int err;
+
ptr1 = map_sysmem(
(phys_addr_t)(pkt_q[i].pkt),
pkt_q[i].len);
- store_block(ptr1,
- pkt_q[i].tcp_seq_num -
- initial_data_seq_num,
- pkt_q[i].len);
+ err = store_block(ptr1,
+ pkt_q[i].tcp_seq_num -
+ initial_data_seq_num,
+ pkt_q[i].len);
unmap_sysmem(ptr1);
debug_cond(DEBUG_WGET,
"wget: Connctd pkt Q %p len %x\n",
pkt_q[i].pkt, pkt_q[i].len);
+ if (err) {
+ wget_loop_state = NETLOOP_FAIL;
+ wget_fail("wget: store error\n", tcp_seq_num, tcp_ack_num, action);
+ net_set_state(NETLOOP_FAIL);
+ return;
+ }
}
}
}
@@ -338,6 +395,7 @@
len) != 0) {
wget_fail("wget: store error\n",
tcp_seq_num, tcp_ack_num, action);
+ net_set_state(NETLOOP_FAIL);
return;
}
@@ -428,6 +486,15 @@
debug_cond(DEBUG_WGET,
"\nwget:Load address: 0x%lx\nLoading: *\b", image_load_addr);
+ if (IS_ENABLED(CONFIG_LMB)) {
+ if (wget_init_load_size()) {
+ printf("\nwget error: ");
+ printf("trying to overwrite reserved memory...\n");
+ net_set_state(NETLOOP_FAIL);
+ return;
+ }
+ }
+
net_set_timeout_handler(wget_timeout, wget_timeout_handler);
tcp_set_tcp_handler(wget_handler);
@@ -446,3 +513,127 @@
wget_send(TCP_SYN, 0, 0, 0);
}
+
+#if (IS_ENABLED(CONFIG_CMD_DNS))
+int wget_with_dns(ulong dst_addr, char *uri)
+{
+ int ret;
+ char *s, *host_name, *file_name, *str_copy;
+
+ /*
+ * Download file using wget.
+ *
+ * U-Boot wget takes the target uri in this format.
+ * "<http server ip>:<file path>" e.g.) 192.168.1.1:/sample/test.iso
+ * Need to resolve the http server ip address before starting wget.
+ */
+ str_copy = strdup(uri);
+ if (!str_copy)
+ return -ENOMEM;
+
+ s = str_copy + strlen("http://");
+ host_name = strsep(&s, "/");
+ if (!s) {
+ log_err("Error: invalied uri, no file path\n");
+ ret = -EINVAL;
+ goto out;
+ }
+ file_name = s;
+
+ /* TODO: If the given uri has ip address for the http server, skip dns */
+ net_dns_resolve = host_name;
+ net_dns_env_var = "httpserverip";
+ if (net_loop(DNS) < 0) {
+ log_err("Error: dns lookup of %s failed, check setup\n", net_dns_resolve);
+ ret = -EINVAL;
+ goto out;
+ }
+ s = env_get("httpserverip");
+ if (!s) {
+ ret = -EINVAL;
+ goto out;
+ }
+
+ strlcpy(net_boot_file_name, s, sizeof(net_boot_file_name));
+ strlcat(net_boot_file_name, ":/", sizeof(net_boot_file_name)); /* append '/' which is removed by strsep() */
+ strlcat(net_boot_file_name, file_name, sizeof(net_boot_file_name));
+ image_load_addr = dst_addr;
+ ret = net_loop(WGET);
+
+out:
+ free(str_copy);
+
+ return ret;
+}
+#endif
+
+/**
+ * wget_validate_uri() - validate the uri for wget
+ *
+ * @uri: uri string
+ *
+ * This function follows the current U-Boot wget implementation.
+ * scheme: only "http:" is supported
+ * authority:
+ * - user information: not supported
+ * - host: supported
+ * - port: not supported(always use the default port)
+ *
+ * Uri is expected to be correctly percent encoded.
+ * This is the minimum check, control codes(0x1-0x19, 0x7F, except '\0')
+ * and space character(0x20) are not allowed.
+ *
+ * TODO: stricter uri conformance check
+ *
+ * Return: true on success, false on failure
+ */
+bool wget_validate_uri(char *uri)
+{
+ char c;
+ bool ret = true;
+ char *str_copy, *s, *authority;
+
+ for (c = 0x1; c < 0x21; c++) {
+ if (strchr(uri, c)) {
+ log_err("invalid character is used\n");
+ return false;
+ }
+ }
+ if (strchr(uri, 0x7f)) {
+ log_err("invalid character is used\n");
+ return false;
+ }
+
+ if (strncmp(uri, "http://", 7)) {
+ log_err("only http:// is supported\n");
+ return false;
+ }
+ str_copy = strdup(uri);
+ if (!str_copy)
+ return false;
+
+ s = str_copy + strlen("http://");
+ authority = strsep(&s, "/");
+ if (!s) {
+ log_err("invalid uri, no file path\n");
+ ret = false;
+ goto out;
+ }
+ s = strchr(authority, '@');
+ if (s) {
+ log_err("user information is not supported\n");
+ ret = false;
+ goto out;
+ }
+ s = strchr(authority, ':');
+ if (s) {
+ log_err("user defined port is not supported\n");
+ ret = false;
+ goto out;
+ }
+
+out:
+ free(str_copy);
+
+ return ret;
+}
diff --git a/test/Kconfig b/test/Kconfig
index ca648d2..c3db727 100644
--- a/test/Kconfig
+++ b/test/Kconfig
@@ -2,6 +2,7 @@
config UNIT_TEST
bool "Unit tests"
+ depends on CMDLINE
help
Select this to compile in unit tests for various parts of
U-Boot. Test suites will be subcommands of the "ut" command.
diff --git a/test/dm/Makefile b/test/dm/Makefile
index cb82d83..a3ce7b3 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -73,6 +73,7 @@
obj-$(CONFIG_MULTIPLEXER) += mux-emul.o
obj-$(CONFIG_MUX_MMIO) += mux-mmio.o
obj-y += fdtdec.o
+obj-$(CONFIG_MTD_RAW_NAND) += nand.o
obj-$(CONFIG_UT_DM) += nop.o
obj-y += ofnode.o
obj-y += ofread.o
diff --git a/test/dm/eth.c b/test/dm/eth.c
index d05d2a9..bb3dcc6 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -263,12 +263,16 @@
/* Prepare the test scenario */
for (i = 0; i < DM_TEST_ETH_NUM; i++) {
+ char *addr;
+
ut_assertok(uclass_find_device_by_name(UCLASS_ETH,
ethname[i], &dev[i]));
ut_assertok(device_remove(dev[i], DM_REMOVE_NORMAL));
/* Invalidate MAC address */
- strncpy(ethaddr[i], env_get(addrname[i]), 17);
+ addr = env_get(addrname[i]);
+ ut_assertnonnull(addr);
+ strncpy(ethaddr[i], addr, 17);
/* Must disable access protection for ethaddr before clearing */
env_set(".flags", addrname[i]);
env_set(addrname[i], NULL);
@@ -312,12 +316,16 @@
for (i = 0; i < ARRAY_SIZE(addr); i++) {
char addrname[10];
+ char *env_addr;
if (i)
snprintf(addrname, sizeof(addrname), "eth%daddr", i + 1);
else
strcpy(addrname, "ethaddr");
- ut_asserteq_str(addr[i], env_get(addrname));
+
+ env_addr = env_get(addrname);
+ ut_assertnonnull(env_addr);
+ ut_asserteq_str(addr[i], env_addr);
}
return 0;
diff --git a/test/dm/nand.c b/test/dm/nand.c
new file mode 100644
index 0000000..0b992fd
--- /dev/null
+++ b/test/dm/nand.c
@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 Sean Anderson <seanga2@gmail.com>
+ */
+
+#include <nand.h>
+#include <part.h>
+#include <rand.h>
+#include <dm/test.h>
+#include <test/test.h>
+#include <test/ut.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/rawnand.h>
+
+static int dm_test_nand(struct unit_test_state *uts, int dev, bool end)
+{
+ nand_erase_options_t opts = { };
+ struct mtd_info *mtd;
+ size_t length;
+ loff_t size;
+ char *buf;
+ int *gold;
+ u8 oob[NAND_MAX_OOBSIZE];
+ int i;
+ loff_t off = 0;
+ mtd_oob_ops_t ops = { };
+
+ /* Seed RNG for bit errors */
+ srand((off >> 32) ^ off ^ ~dev);
+
+ mtd = get_nand_dev_by_index(dev);
+ ut_assertnonnull(mtd);
+ size = mtd->erasesize * 4;
+ length = size;
+
+ buf = malloc(size);
+ ut_assertnonnull(buf);
+ gold = malloc(size);
+ ut_assertnonnull(gold);
+
+ /* Mark a block as bad */
+ ut_assertok(mtd_block_markbad(mtd, off + mtd->erasesize));
+
+ /* Erase some stuff */
+ if (end)
+ off = mtd->size - size - mtd->erasesize;
+ opts.offset = off;
+ opts.length = size;
+ opts.spread = 1;
+ opts.lim = U32_MAX;
+ ut_assertok(nand_erase_opts(mtd, &opts));
+
+ /* Make sure everything is erased */
+ memset(gold, 0xff, size);
+ ut_assertok(nand_read_skip_bad(mtd, off, &length, NULL, U64_MAX, buf));
+ ut_asserteq(size, length);
+ ut_asserteq_mem(gold, buf, size);
+
+ /* ...but our bad block marker is still there */
+ ops.oobbuf = oob;
+ ops.ooblen = mtd->oobsize;
+ ut_assertok(mtd_read_oob(mtd, mtd->erasesize, &ops));
+ ut_asserteq(0, oob[mtd_to_nand(mtd)->badblockpos]);
+
+ /* Generate some data and write it */
+ for (i = 0; i < size / sizeof(int); i++)
+ gold[i] = rand();
+ ut_assertok(nand_write_skip_bad(mtd, off, &length, NULL, U64_MAX,
+ (void *)gold, 0));
+ ut_asserteq(size, length);
+
+ /* Verify */
+ ut_assertok(nand_read_skip_bad(mtd, off, &length, NULL, U64_MAX, buf));
+ ut_asserteq(size, length);
+ ut_asserteq_mem(gold, buf, size);
+
+ /* Erase some blocks */
+ memset(((char *)gold) + mtd->erasesize, 0xff, mtd->erasesize * 2);
+ opts.offset = off + mtd->erasesize;
+ opts.length = mtd->erasesize * 2;
+ ut_assertok(nand_erase_opts(mtd, &opts));
+
+ /* Verify */
+ ut_assertok(nand_read_skip_bad(mtd, off, &length, NULL, U64_MAX, buf));
+ ut_asserteq(size, length);
+ ut_asserteq_mem(gold, buf, size);
+
+ return 0;
+}
+
+#define DM_NAND_TEST(dev) \
+static int dm_test_nand##dev##_start(struct unit_test_state *uts) \
+{ \
+ return dm_test_nand(uts, dev, false); \
+} \
+DM_TEST(dm_test_nand##dev##_start, UT_TESTF_SCAN_FDT); \
+static int dm_test_nand##dev##_end(struct unit_test_state *uts) \
+{ \
+ return dm_test_nand(uts, dev, true); \
+} \
+DM_TEST(dm_test_nand##dev##_end, UT_TESTF_SCAN_FDT)
+
+DM_NAND_TEST(0);
+DM_NAND_TEST(1);
diff --git a/test/dm/scmi.c b/test/dm/scmi.c
index da45314..e80667e 100644
--- a/test/dm/scmi.c
+++ b/test/dm/scmi.c
@@ -19,6 +19,7 @@
#include <scmi_agent.h>
#include <scmi_agent-uclass.h>
#include <scmi_protocols.h>
+#include <vsprintf.h>
#include <asm/scmi_test.h>
#include <dm/device-internal.h>
#include <dm/test.h>
@@ -206,6 +207,86 @@
DM_TEST(dm_test_scmi_base, UT_TESTF_SCAN_FDT);
+static int dm_test_scmi_cmd(struct unit_test_state *uts)
+{
+ struct udevice *agent_dev;
+ int num_proto = 0;
+ char cmd_out[30];
+
+ if (!CONFIG_IS_ENABLED(CMD_SCMI))
+ return -EAGAIN;
+
+ /* preparation */
+ ut_assertok(uclass_get_device_by_name(UCLASS_SCMI_AGENT, "scmi",
+ &agent_dev));
+ ut_assertnonnull(agent_dev);
+
+ /*
+ * Estimate the number of provided protocols.
+ * This estimation is correct as far as a corresponding
+ * protocol support is added to sandbox fake serer.
+ */
+ if (CONFIG_IS_ENABLED(POWER_DOMAIN))
+ num_proto++;
+ if (CONFIG_IS_ENABLED(CLK_SCMI))
+ num_proto++;
+ if (CONFIG_IS_ENABLED(RESET_SCMI))
+ num_proto++;
+ if (CONFIG_IS_ENABLED(DM_REGULATOR_SCMI))
+ num_proto++;
+
+ /* scmi info */
+ ut_assertok(run_command("scmi info", 0));
+
+ ut_assert_nextline("SCMI device: scmi");
+ snprintf(cmd_out, 30, " protocol version: 0x%x",
+ SCMI_BASE_PROTOCOL_VERSION);
+ ut_assert_nextline(cmd_out);
+ ut_assert_nextline(" # of agents: 2");
+ ut_assert_nextline(" 0: platform");
+ ut_assert_nextline(" > 1: OSPM");
+ snprintf(cmd_out, 30, " # of protocols: %d", num_proto);
+ ut_assert_nextline(cmd_out);
+ if (CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN))
+ ut_assert_nextline(" Power domain management");
+ if (CONFIG_IS_ENABLED(CLK_SCMI))
+ ut_assert_nextline(" Clock management");
+ if (CONFIG_IS_ENABLED(RESET_SCMI))
+ ut_assert_nextline(" Reset domain management");
+ if (CONFIG_IS_ENABLED(DM_REGULATOR_SCMI))
+ ut_assert_nextline(" Voltage domain management");
+ ut_assert_nextline(" vendor: U-Boot");
+ ut_assert_nextline(" sub vendor: Sandbox");
+ ut_assert_nextline(" impl version: 0x1");
+
+ ut_assert_console_end();
+
+ /* scmi perm_dev */
+ ut_assertok(run_command("scmi perm_dev 1 0 1", 0));
+ ut_assert_console_end();
+
+ ut_assert(run_command("scmi perm_dev 1 0 0", 0));
+ ut_assert_nextline("Denying access to device:0 failed (-13)");
+ ut_assert_console_end();
+
+ /* scmi perm_proto */
+ ut_assertok(run_command("scmi perm_proto 1 0 14 1", 0));
+ ut_assert_console_end();
+
+ ut_assert(run_command("scmi perm_proto 1 0 14 0", 0));
+ ut_assert_nextline("Denying access to protocol:0x14 on device:0 failed (-13)");
+ ut_assert_console_end();
+
+ /* scmi reset */
+ ut_assert(run_command("scmi reset 1 1", 0));
+ ut_assert_nextline("Reset failed (-13)");
+ ut_assert_console_end();
+
+ return 0;
+}
+
+DM_TEST(dm_test_scmi_cmd, UT_TESTF_SCAN_FDT);
+
static int dm_test_scmi_power_domains(struct unit_test_state *uts)
{
struct sandbox_scmi_agent *agent;
@@ -217,6 +298,9 @@
u8 *name;
int ret;
+ if (!CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN))
+ return -EAGAIN;
+
/* preparation */
ut_assertok(load_sandbox_scmi_test_devices(uts, &agent, &dev));
ut_assertnonnull(agent);
@@ -317,6 +401,9 @@
int ret_dev;
int ret;
+ if (!CONFIG_IS_ENABLED(CLK_SCMI))
+ return -EAGAIN;
+
ret = load_sandbox_scmi_test_devices(uts, &agent, &dev);
if (ret)
return ret;
@@ -382,6 +469,9 @@
struct udevice *agent_dev, *reset_dev, *dev = NULL;
int ret;
+ if (!CONFIG_IS_ENABLED(RESET_SCMI))
+ return -EAGAIN;
+
ret = load_sandbox_scmi_test_devices(uts, &agent, &dev);
if (ret)
return ret;
@@ -418,6 +508,9 @@
struct udevice *dev;
struct udevice *regul0_dev;
+ if (!CONFIG_IS_ENABLED(DM_REGULATOR_SCMI))
+ return -EAGAIN;
+
ut_assertok(load_sandbox_scmi_test_devices(uts, &agent, &dev));
scmi_devices = sandbox_scmi_devices_ctx(dev);
diff --git a/test/dm/sysreset.c b/test/dm/sysreset.c
index 691683c..5aa69e0 100644
--- a/test/dm/sysreset.c
+++ b/test/dm/sysreset.c
@@ -27,8 +27,8 @@
/* Device 1 is the warm sysreset device */
ut_assertok(uclass_get_device(UCLASS_SYSRESET, 1, &dev));
ut_asserteq(-EACCES, sysreset_request(dev, SYSRESET_WARM));
- ut_asserteq(-ENOSYS, sysreset_request(dev, SYSRESET_COLD));
- ut_asserteq(-ENOSYS, sysreset_request(dev, SYSRESET_POWER));
+ ut_asserteq(-EPROTONOSUPPORT, sysreset_request(dev, SYSRESET_COLD));
+ ut_asserteq(-EPROTONOSUPPORT, sysreset_request(dev, SYSRESET_POWER));
state->sysreset_allowed[SYSRESET_WARM] = true;
ut_asserteq(-EINPROGRESS, sysreset_request(dev, SYSRESET_WARM));
@@ -36,7 +36,7 @@
/* Device 2 is the cold sysreset device */
ut_assertok(uclass_get_device(UCLASS_SYSRESET, 2, &dev));
- ut_asserteq(-ENOSYS, sysreset_request(dev, SYSRESET_WARM));
+ ut_asserteq(-EPROTONOSUPPORT, sysreset_request(dev, SYSRESET_WARM));
state->sysreset_allowed[SYSRESET_COLD] = false;
ut_asserteq(-EACCES, sysreset_request(dev, SYSRESET_COLD));
state->sysreset_allowed[SYSRESET_COLD] = true;
diff --git a/test/image/Kconfig b/test/image/Kconfig
index 8f9e6ae..45b6e8c 100644
--- a/test/image/Kconfig
+++ b/test/image/Kconfig
@@ -23,6 +23,15 @@
help
Test filesystems and the various load methods which use them.
+config SPL_UT_LOAD_NAND
+ bool "Test loading from NAND flash"
+ depends on SANDBOX && SPL_OF_REAL
+ depends on SPL_NAND_SUPPORT
+ depends on SPL_MTD
+ default y
+ help
+ Test the NAND flash load method.
+
config SPL_UT_LOAD_NET
bool "Test loading over TFTP"
depends on SANDBOX && SPL_OF_REAL
@@ -43,6 +52,7 @@
config SPL_UT_LOAD_OS
bool "Test loading from the host OS"
depends on SANDBOX && SPL_LOAD_FIT
+ select SPL_LOAD_BLOCK
default y
help
Smoke test to ensure that loading U-boot works in sandbox.
diff --git a/test/image/Makefile b/test/image/Makefile
index b302101..11ed257 100644
--- a/test/image/Makefile
+++ b/test/image/Makefile
@@ -4,6 +4,7 @@
obj-y += spl_load.o
obj-$(CONFIG_SPL_UT_LOAD_FS) += spl_load_fs.o
+obj-$(CONFIG_SPL_UT_LOAD_NAND) += spl_load_nand.o
obj-$(CONFIG_SPL_UT_LOAD_NET) += spl_load_net.o
obj-$(CONFIG_SPL_NOR_SUPPORT) += spl_load_nor.o
obj-$(CONFIG_SPL_UT_LOAD_OS) += spl_load_os.o
diff --git a/test/image/spl_load.c b/test/image/spl_load.c
index ab4c14d..e1036ef 100644
--- a/test/image/spl_load.c
+++ b/test/image/spl_load.c
@@ -342,12 +342,11 @@
if (check_image_info(uts, &info_write, &info_read))
return CMD_RET_FAILURE;
} else {
- struct spl_load_info load = {
- .bl_len = 1,
- .priv = img,
- .read = spl_test_read,
- };
+ struct spl_load_info load;
+ spl_set_bl_len(&load, 1);
+ load.priv = img;
+ load.read = spl_test_read;
if (type == IMX8)
ut_assertok(spl_load_imx_container(&info_read, &load,
0));
@@ -375,7 +374,7 @@
* LZMA is too complex to generate on the fly, so let's use some data I put in
* the oven^H^H^H^H compressed earlier
*/
-static const char lzma_compressed[] = {
+const char lzma_compressed[] = {
0x5d, 0x00, 0x00, 0x80, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0x00, 0x02, 0x05, 0x55, 0x4e, 0x82, 0xbc, 0xc2, 0x42, 0xf6, 0x88,
0x6c, 0x99, 0xd6, 0x82, 0x48, 0xa6, 0x06, 0x67, 0xf8, 0x46, 0x7c, 0xe9,
@@ -611,6 +610,8 @@
0x1e, 0xff, 0xff, 0x80, 0x8e, 0x00, 0x00
};
+const size_t lzma_compressed_size = sizeof(lzma_compressed);
+
int do_spl_test_load(struct unit_test_state *uts, const char *test_name,
enum spl_test_image type, struct spl_image_loader *loader,
int (*write_image)(struct unit_test_state *, void *, size_t))
diff --git a/test/image/spl_load_fs.c b/test/image/spl_load_fs.c
index 297ab08..a89189e 100644
--- a/test/image/spl_load_fs.c
+++ b/test/image/spl_load_fs.c
@@ -220,7 +220,7 @@
bs->root_cluster = cpu_to_le32(root_sector);
vi->ext_boot_sign = 0x29;
- memcpy(vi->fs_type, FAT32_SIGN, sizeof(vi->fs_type));
+ memcpy(vi->fs_type, "FAT32 ", sizeof(vi->fs_type));
memcpy(dst + 0x1fe, "\x55\xAA", 2);
@@ -320,10 +320,11 @@
const char *filename = CONFIG_SPL_FS_LOAD_PAYLOAD_NAME;
struct blk_desc *dev_desc;
size_t fs_size, fs_data, img_size, img_data,
- data_size = SPL_TEST_DATA_SIZE;
+ plain_size = SPL_TEST_DATA_SIZE;
struct spl_image_info info_write = {
.name = test_name,
- .size = data_size,
+ .size = type == LEGACY_LZMA ? lzma_compressed_size :
+ plain_size,
}, info_read = { };
struct disk_partition part = {
.start = 1,
@@ -335,7 +336,7 @@
.boot_device = loader->boot_device,
};
void *fs;
- char *data;
+ char *data, *plain;
img_size = create_image(NULL, type, &info_write, &img_data);
ut_assert(img_size);
@@ -345,7 +346,15 @@
ut_assertnonnull(fs);
data = fs + fs_data + img_data;
- generate_data(data, data_size, test_name);
+ if (type == LEGACY_LZMA) {
+ plain = malloc(plain_size);
+ ut_assertnonnull(plain);
+ generate_data(plain, plain_size, "lzma");
+ memcpy(data, lzma_compressed, lzma_compressed_size);
+ } else {
+ plain = data;
+ generate_data(plain, plain_size, test_name);
+ }
ut_asserteq(img_size, create_image(fs + fs_data, type, &info_write,
NULL));
ut_asserteq(fs_size, create_fs(fs, img_size, filename, NULL));
@@ -366,8 +375,12 @@
ut_assertok(loader->load_image(&info_read, &bootdev));
if (check_image_info(uts, &info_write, &info_read))
return CMD_RET_FAILURE;
- ut_asserteq_mem(data, phys_to_virt(info_write.load_addr), data_size);
+ if (type == LEGACY_LZMA)
+ ut_asserteq(plain_size, info_read.size);
+ ut_asserteq_mem(plain, phys_to_virt(info_write.load_addr), plain_size);
+ if (type == LEGACY_LZMA)
+ free(plain);
free(fs);
return 0;
}
@@ -382,6 +395,8 @@
return spl_test_mmc_fs(uts, test_name, type, create_ext2, true);
}
SPL_IMG_TEST(spl_test_blk, LEGACY, DM_FLAGS);
+SPL_IMG_TEST(spl_test_blk, LEGACY_LZMA, DM_FLAGS);
+SPL_IMG_TEST(spl_test_blk, IMX8, DM_FLAGS);
SPL_IMG_TEST(spl_test_blk, FIT_EXTERNAL, DM_FLAGS);
SPL_IMG_TEST(spl_test_blk, FIT_INTERNAL, DM_FLAGS);
@@ -409,12 +424,10 @@
spl_mmc_clear_cache();
spl_fat_force_reregister();
- if (type == LEGACY &&
- spl_test_mmc_fs(uts, test_name, type, create_ext2, false))
+ if (spl_test_mmc_fs(uts, test_name, type, create_ext2, false))
return CMD_RET_FAILURE;
- if (type != IMX8 &&
- spl_test_mmc_fs(uts, test_name, type, create_fat, false))
+ if (spl_test_mmc_fs(uts, test_name, type, create_fat, false))
return CMD_RET_FAILURE;
return do_spl_test_load(uts, test_name, type,
@@ -423,6 +436,7 @@
spl_test_mmc_write_image);
}
SPL_IMG_TEST(spl_test_mmc, LEGACY, DM_FLAGS);
+SPL_IMG_TEST(spl_test_mmc, LEGACY_LZMA, DM_FLAGS);
SPL_IMG_TEST(spl_test_mmc, IMX8, DM_FLAGS);
SPL_IMG_TEST(spl_test_mmc, FIT_EXTERNAL, DM_FLAGS);
SPL_IMG_TEST(spl_test_mmc, FIT_INTERNAL, DM_FLAGS);
diff --git a/test/image/spl_load_nand.c b/test/image/spl_load_nand.c
new file mode 100644
index 0000000..ec24220
--- /dev/null
+++ b/test/image/spl_load_nand.c
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 Sean Anderson <seanga2@gmail.com>
+ */
+
+#include <nand.h>
+#include <spl.h>
+#include <test/spl.h>
+#include <test/ut.h>
+
+uint32_t spl_nand_get_uboot_raw_page(void);
+
+static int spl_test_nand_write_image(struct unit_test_state *uts, void *img,
+ size_t img_size)
+{
+ uint32_t off = spl_nand_get_uboot_raw_page();
+ struct mtd_info *mtd;
+ struct erase_info erase = { };
+ size_t length;
+
+ nand_reinit();
+ mtd = get_nand_dev_by_index(0);
+ ut_assertnonnull(mtd);
+
+ /* Mark the first block as bad to test that it gets skipped */
+ ut_assertok(mtd_block_markbad(mtd, off & ~mtd->erasesize_mask));
+ off += mtd->erasesize;
+
+ erase.mtd = mtd;
+ erase.len = img_size + (off & mtd->erasesize_mask);
+ erase.len += mtd->erasesize_mask;
+ erase.len &= ~mtd->erasesize_mask;
+ erase.addr = off & ~mtd->erasesize_mask;
+ erase.scrub = 1;
+ ut_assertok(mtd_erase(mtd, &erase));
+
+ ut_assertok(mtd_write(mtd, off, img_size, &length, img));
+
+ return 0;
+}
+
+static int spl_test_nand(struct unit_test_state *uts, const char *test_name,
+ enum spl_test_image type)
+{
+ return do_spl_test_load(uts, test_name, type,
+ SPL_LOAD_IMAGE_GET(1, BOOT_DEVICE_NAND,
+ spl_nand_load_image),
+ spl_test_nand_write_image);
+}
+SPL_IMG_TEST(spl_test_nand, LEGACY, DM_FLAGS);
+SPL_IMG_TEST(spl_test_nand, LEGACY_LZMA, DM_FLAGS);
+SPL_IMG_TEST(spl_test_nand, IMX8, DM_FLAGS);
+SPL_IMG_TEST(spl_test_nand, FIT_INTERNAL, DM_FLAGS);
+#if !IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL)
+SPL_IMG_TEST(spl_test_nand, FIT_EXTERNAL, DM_FLAGS);
+#endif
diff --git a/test/image/spl_load_net.c b/test/image/spl_load_net.c
index f570cef..9d067a7 100644
--- a/test/image/spl_load_net.c
+++ b/test/image/spl_load_net.c
@@ -248,5 +248,7 @@
return ret;
}
SPL_IMG_TEST(spl_test_net, LEGACY, DM_FLAGS);
+SPL_IMG_TEST(spl_test_net, LEGACY_LZMA, DM_FLAGS);
+SPL_IMG_TEST(spl_test_net, IMX8, DM_FLAGS);
SPL_IMG_TEST(spl_test_net, FIT_INTERNAL, DM_FLAGS);
SPL_IMG_TEST(spl_test_net, FIT_EXTERNAL, DM_FLAGS);
diff --git a/test/image/spl_load_nor.c b/test/image/spl_load_nor.c
index a62bb60..de56863 100644
--- a/test/image/spl_load_nor.c
+++ b/test/image/spl_load_nor.c
@@ -36,4 +36,6 @@
SPL_IMG_TEST(spl_test_nor, LEGACY_LZMA, 0);
SPL_IMG_TEST(spl_test_nor, IMX8, 0);
SPL_IMG_TEST(spl_test_nor, FIT_INTERNAL, 0);
+#if !IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL)
SPL_IMG_TEST(spl_test_nor, FIT_EXTERNAL, 0);
+#endif
diff --git a/test/image/spl_load_os.c b/test/image/spl_load_os.c
index 49edf15..26228a8 100644
--- a/test/image/spl_load_os.c
+++ b/test/image/spl_load_os.c
@@ -16,14 +16,13 @@
int fd;
};
-static ulong read_fit_image(struct spl_load_info *load, ulong sector,
- ulong count, void *buf)
+static ulong read_fit_image(struct spl_load_info *load, ulong offset,
+ ulong size, void *buf)
{
struct text_ctx *text_ctx = load->priv;
- off_t offset, ret;
+ off_t ret;
ssize_t res;
- offset = sector * load->bl_len;
ret = os_lseek(text_ctx->fd, offset, OS_SEEK_SET);
if (ret != offset) {
printf("Failed to seek to %zx, got %zx (errno=%d)\n", offset,
@@ -31,14 +30,14 @@
return 0;
}
- res = os_read(text_ctx->fd, buf, count * load->bl_len);
+ res = os_read(text_ctx->fd, buf, size);
if (res == -1) {
printf("Failed to read %lx bytes, got %ld (errno=%d)\n",
- count * load->bl_len, res, errno);
+ size, res, errno);
return 0;
}
- return count;
+ return size;
}
static int spl_test_load(struct unit_test_state *uts)
@@ -52,13 +51,12 @@
int fd;
memset(&load, '\0', sizeof(load));
- load.bl_len = 512;
+ spl_set_bl_len(&load, 512);
load.read = read_fit_image;
ret = sandbox_find_next_phase(fname, sizeof(fname), true);
if (ret)
ut_assertf(0, "%s not found, error %d\n", fname, ret);
- load.filename = fname;
header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
diff --git a/test/image/spl_load_spi.c b/test/image/spl_load_spi.c
index 8f9b6e0..54a9546 100644
--- a/test/image/spl_load_spi.c
+++ b/test/image/spl_load_spi.c
@@ -34,6 +34,7 @@
spl_test_spi_write_image);
}
SPL_IMG_TEST(spl_test_spi, LEGACY, DM_FLAGS);
+SPL_IMG_TEST(spl_test_spi, LEGACY_LZMA, DM_FLAGS);
SPL_IMG_TEST(spl_test_spi, IMX8, DM_FLAGS);
SPL_IMG_TEST(spl_test_spi, FIT_INTERNAL, DM_FLAGS);
#if !IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL)
diff --git a/test/py/tests/fs_helper.py b/test/py/tests/fs_helper.py
index 9882ddb..380f4c4 100644
--- a/test/py/tests/fs_helper.py
+++ b/test/py/tests/fs_helper.py
@@ -9,7 +9,7 @@
import os
from subprocess import call, check_call, check_output, CalledProcessError
-def mk_fs(config, fs_type, size, prefix):
+def mk_fs(config, fs_type, size, prefix, size_gran = 0x100000):
"""Create a file system volume
Args:
@@ -17,6 +17,7 @@
fs_type (str): File system type, e.g. 'ext4'
size (int): Size of file system in bytes
prefix (str): Prefix string of volume's file name
+ size_gran (int): Size granularity of file system image in bytes
Raises:
CalledProcessError: if any error occurs when creating the filesystem
@@ -24,7 +25,9 @@
fs_img = f'{prefix}.{fs_type}.img'
fs_img = os.path.join(config.persistent_data_dir, fs_img)
- if fs_type == 'fat16':
+ if fs_type == 'fat12':
+ mkfs_opt = '-F 12'
+ elif fs_type == 'fat16':
mkfs_opt = '-F 16'
elif fs_type == 'fat32':
mkfs_opt = '-F 32'
@@ -36,7 +39,7 @@
else:
fs_lnxtype = fs_type
- count = (size + 0x100000 - 1) // 0x100000
+ count = (size + size_gran - 1) // size_gran
# Some distributions do not add /sbin to the default PATH, where mkfs lives
if '/sbin' not in os.environ["PATH"].split(os.pathsep):
@@ -44,7 +47,7 @@
try:
check_call(f'rm -f {fs_img}', shell=True)
- check_call(f'dd if=/dev/zero of={fs_img} bs=1M count={count}',
+ check_call(f'dd if=/dev/zero of={fs_img} bs={size_gran} count={count}',
shell=True)
check_call(f'mkfs.{fs_lnxtype} {mkfs_opt} {fs_img}', shell=True)
if fs_type == 'ext4':
diff --git a/test/py/tests/test_efi_secboot/test_signed.py b/test/py/tests/test_efi_secboot/test_signed.py
index ca52e85..2f862a2 100644
--- a/test/py/tests/test_efi_secboot/test_signed.py
+++ b/test/py/tests/test_efi_secboot/test_signed.py
@@ -29,7 +29,7 @@
output = u_boot_console.run_command_list([
'host bind 0 %s' % disk_img,
'efidebug boot add -b 1 HELLO1 host 0:1 /helloworld.efi.signed -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'bootefi bootmgr'])
assert 'Hello, world!' in ''.join(output)
@@ -37,7 +37,7 @@
# Test Case 1b, run unsigned image if no PK
output = u_boot_console.run_command_list([
'efidebug boot add -b 2 HELLO2 host 0:1 /helloworld.efi -s ""',
- 'efidebug boot next 2',
+ 'efidebug boot order 2',
'bootefi bootmgr'])
assert 'Hello, world!' in ''.join(output)
@@ -59,13 +59,13 @@
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO1 host 0:1 /helloworld.efi.signed -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert('\'HELLO1\' failed' in ''.join(output))
assert('efi_start_image() returned: 26' in ''.join(output))
output = u_boot_console.run_command_list([
'efidebug boot add -b 2 HELLO2 host 0:1 /helloworld.efi -s ""',
- 'efidebug boot next 2',
+ 'efidebug boot order 2',
'efidebug test bootmgr'])
assert '\'HELLO2\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
@@ -77,12 +77,12 @@
'setenv -e -nv -bs -rt -at -i 4000000:$filesize db'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 2',
+ 'efidebug boot order 2',
'efidebug test bootmgr'])
assert '\'HELLO2\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'bootefi bootmgr'])
assert 'Hello, world!' in ''.join(output)
@@ -105,7 +105,7 @@
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
@@ -117,7 +117,7 @@
'setenv -e -nv -bs -rt -at -i 4000000:$filesize db'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
@@ -143,7 +143,7 @@
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
@@ -170,7 +170,7 @@
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed_2sigs -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert 'Hello, world!' in ''.join(output)
@@ -181,7 +181,7 @@
'setenv -e -nv -bs -rt -at -a -i 4000000:$filesize db'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert 'Hello, world!' in ''.join(output)
@@ -193,7 +193,7 @@
'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
@@ -205,7 +205,7 @@
'setenv -e -nv -bs -rt -at -a -i 4000000:$filesize dbx'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
@@ -230,7 +230,7 @@
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed_2sigs -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
@@ -254,7 +254,7 @@
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'bootefi bootmgr'])
assert 'Hello, world!' in ''.join(output)
@@ -265,7 +265,7 @@
'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
@@ -279,7 +279,7 @@
'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
@@ -307,7 +307,7 @@
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed_2sigs -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
@@ -330,7 +330,7 @@
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed_2sigs -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
@@ -349,7 +349,7 @@
output = u_boot_console.run_command_list([
'host bind 0 %s' % disk_img,
'efidebug boot add -b 1 HELLO1 host 0:1 /helloworld_forged.efi.signed -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert('hELLO, world!' in ''.join(output))
@@ -364,7 +364,7 @@
'setenv -e -nv -bs -rt -at -i 4000000:$filesize PK'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert(not 'hELLO, world!' in ''.join(output))
assert('\'HELLO1\' failed' in ''.join(output))
diff --git a/test/py/tests/test_efi_secboot/test_signed_intca.py b/test/py/tests/test_efi_secboot/test_signed_intca.py
index d8d599d..8d9a5f3 100644
--- a/test/py/tests/test_efi_secboot/test_signed_intca.py
+++ b/test/py/tests/test_efi_secboot/test_signed_intca.py
@@ -40,7 +40,7 @@
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO_a host 0:1 /helloworld.efi.signed_a -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO_a\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
@@ -49,7 +49,7 @@
# Test Case 1b, signed and authenticated by root CA
output = u_boot_console.run_command_list([
'efidebug boot add -b 2 HELLO_ab host 0:1 /helloworld.efi.signed_ab -s ""',
- 'efidebug boot next 2',
+ 'efidebug boot order 2',
'bootefi bootmgr'])
assert 'Hello, world!' in ''.join(output)
@@ -71,7 +71,7 @@
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO_abc host 0:1 /helloworld.efi.signed_abc -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO_abc\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
@@ -81,7 +81,7 @@
output = u_boot_console.run_command_list([
'fatload host 0:1 4000000 db_b.auth',
'setenv -e -nv -bs -rt -at -i 4000000:$filesize db',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO_abc\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
@@ -91,7 +91,7 @@
output = u_boot_console.run_command_list([
'fatload host 0:1 4000000 db_c.auth',
'setenv -e -nv -bs -rt -at -i 4000000:$filesize db',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert 'Hello, world!' in ''.join(output)
@@ -117,7 +117,7 @@
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO_abc host 0:1 /helloworld.efi.signed_abc -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert 'Hello, world!' in ''.join(output)
# Or,
@@ -129,7 +129,7 @@
output = u_boot_console.run_command_list([
'fatload host 0:1 4000000 dbx_c.auth',
'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO_abc\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
diff --git a/test/py/tests/test_efi_secboot/test_unsigned.py b/test/py/tests/test_efi_secboot/test_unsigned.py
index df63f0d..7c078f2 100644
--- a/test/py/tests/test_efi_secboot/test_unsigned.py
+++ b/test/py/tests/test_efi_secboot/test_unsigned.py
@@ -36,11 +36,11 @@
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'bootefi bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert 'efi_start_image() returned: 26' in ''.join(output)
assert 'Hello, world!' not in ''.join(output)
@@ -65,7 +65,7 @@
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'bootefi bootmgr'])
assert 'Hello, world!' in ''.join(output)
@@ -89,11 +89,11 @@
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'bootefi bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert 'efi_start_image() returned: 26' in ''.join(output)
assert 'Hello, world!' not in ''.join(output)
@@ -107,11 +107,11 @@
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'bootefi bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert 'efi_start_image() returned: 26' in ''.join(output)
assert 'Hello, world!' not in ''.join(output)
diff --git a/test/py/tests/test_fs/conftest.py b/test/py/tests/test_fs/conftest.py
index 0d87d18..fdd138d 100644
--- a/test/py/tests/test_fs/conftest.py
+++ b/test/py/tests/test_fs/conftest.py
@@ -12,9 +12,10 @@
from tests import fs_helper
supported_fs_basic = ['fat16', 'fat32', 'ext4']
-supported_fs_ext = ['fat16', 'fat32']
-supported_fs_mkdir = ['fat16', 'fat32']
-supported_fs_unlink = ['fat16', 'fat32']
+supported_fs_ext = ['fat12', 'fat16', 'fat32']
+supported_fs_fat = ['fat12', 'fat16']
+supported_fs_mkdir = ['fat12', 'fat16', 'fat32']
+supported_fs_unlink = ['fat12', 'fat16', 'fat32']
supported_fs_symlink = ['ext4']
#
@@ -49,6 +50,7 @@
"""
global supported_fs_basic
global supported_fs_ext
+ global supported_fs_fat
global supported_fs_mkdir
global supported_fs_unlink
global supported_fs_symlink
@@ -61,6 +63,7 @@
print('*** FS TYPE modified: %s' % supported_fs)
supported_fs_basic = intersect(supported_fs, supported_fs_basic)
supported_fs_ext = intersect(supported_fs, supported_fs_ext)
+ supported_fs_fat = intersect(supported_fs, supported_fs_fat)
supported_fs_mkdir = intersect(supported_fs, supported_fs_mkdir)
supported_fs_unlink = intersect(supported_fs, supported_fs_unlink)
supported_fs_symlink = intersect(supported_fs, supported_fs_symlink)
@@ -83,6 +86,9 @@
if 'fs_obj_ext' in metafunc.fixturenames:
metafunc.parametrize('fs_obj_ext', supported_fs_ext,
indirect=True, scope='module')
+ if 'fs_obj_fat' in metafunc.fixturenames:
+ metafunc.parametrize('fs_obj_fat', supported_fs_fat,
+ indirect=True, scope='module')
if 'fs_obj_mkdir' in metafunc.fixturenames:
metafunc.parametrize('fs_obj_mkdir', supported_fs_mkdir,
indirect=True, scope='module')
@@ -624,3 +630,44 @@
finally:
call('rmdir %s' % mount_dir, shell=True)
call('rm -f %s' % fs_img, shell=True)
+
+#
+# Fixture for fat test
+#
+@pytest.fixture()
+def fs_obj_fat(request, u_boot_config):
+ """Set up a file system to be used in fat test.
+
+ Args:
+ request: Pytest request object.
+ u_boot_config: U-Boot configuration.
+
+ Return:
+ A fixture for fat test, i.e. a duplet of file system type and
+ volume file name.
+ """
+
+ # the maximum size of a FAT12 filesystem resulting in 4084 clusters
+ MAX_FAT12_SIZE = 261695 * 1024
+
+ # the minimum size of a FAT16 filesystem that can be created with
+ # mkfs.vfat resulting in 4087 clusters
+ MIN_FAT16_SIZE = 8208 * 1024
+
+ fs_type = request.param
+ fs_img = ''
+
+ fs_ubtype = fstype_to_ubname(fs_type)
+ check_ubconfig(u_boot_config, fs_ubtype)
+
+ fs_size = MAX_FAT12_SIZE if fs_type == 'fat12' else MIN_FAT16_SIZE
+
+ try:
+ # the volume size depends on the filesystem
+ fs_img = fs_helper.mk_fs(u_boot_config, fs_type, fs_size, f'{fs_size}', 1024)
+ except:
+ pytest.skip('Setup failed for filesystem: ' + fs_type)
+ return
+ else:
+ yield [fs_ubtype, fs_img]
+ call('rm -f %s' % fs_img, shell=True)
diff --git a/test/py/tests/test_fs/test_erofs.py b/test/py/tests/test_fs/test_erofs.py
index 458a52b..87ad8f2 100644
--- a/test/py/tests/test_fs/test_erofs.py
+++ b/test/py/tests/test_fs/test_erofs.py
@@ -196,6 +196,15 @@
"""
build_dir = u_boot_console.config.build_dir
+ # If the EFI subsystem is enabled and initialized, EFI subsystem tries to
+ # add EFI boot option when the new disk is detected. If there is no EFI
+ # System Partition exists, EFI subsystem outputs error messages and
+ # it ends up with test failure.
+ # Restart U-Boot to clear the previous state.
+ # TODO: Ideally EFI test cases need to be fixed, but it will
+ # increase the number of system reset.
+ u_boot_console.restart_uboot()
+
try:
# setup test environment
make_erofs_image(build_dir)
diff --git a/test/py/tests/test_fs/test_fs_fat.py b/test/py/tests/test_fs/test_fs_fat.py
new file mode 100644
index 0000000..4009d0b
--- /dev/null
+++ b/test/py/tests/test_fs/test_fs_fat.py
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (c) 2023 Weidmüller Interface GmbH & Co. KG
+# Author: Christian Taedcke <christian.taedcke@weidmueller.com>
+#
+# U-Boot File System: FAT Test
+
+"""
+This test verifies fat specific file system behaviour.
+"""
+
+import pytest
+import re
+
+@pytest.mark.boardspec('sandbox')
+@pytest.mark.slow
+class TestFsFat(object):
+ def test_fs_fat1(self, u_boot_console, fs_obj_fat):
+ """Test that `fstypes` prints a result which includes `sandbox`."""
+ fs_type,fs_img = fs_obj_fat
+ with u_boot_console.log.section('Test Case 1 - fatinfo'):
+ # Test Case 1 - ls
+ output = u_boot_console.run_command_list([
+ 'host bind 0 %s' % fs_img,
+ 'fatinfo host 0:0'])
+ assert(re.search('Filesystem: %s' % fs_type.upper(), ''.join(output)))
diff --git a/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py b/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py
index 527a556..a20a7d1 100644
--- a/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py
+++ b/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py
@@ -118,6 +118,15 @@
"""
build_dir = u_boot_console.config.build_dir
+ # If the EFI subsystem is enabled and initialized, EFI subsystem tries to
+ # add EFI boot option when the new disk is detected. If there is no EFI
+ # System Partition exists, EFI subsystem outputs error messages and
+ # it ends up with test failure.
+ # Restart U-Boot to clear the previous state.
+ # TODO: Ideally EFI test cases need to be fixed, but it will
+ # increase the number of system reset.
+ u_boot_console.restart_uboot()
+
# setup test environment
check_mksquashfs_version()
generate_sqfs_src_dir(build_dir)
diff --git a/test/py/tests/test_net.py b/test/py/tests/test_net.py
index b2241ae..2495608 100644
--- a/test/py/tests/test_net.py
+++ b/test/py/tests/test_net.py
@@ -7,6 +7,7 @@
import pytest
import u_boot_utils
import uuid
+import datetime
"""
Note: This test relies on boardenv_* containing configuration values to define
@@ -51,6 +52,8 @@
'addr': 0x10000000,
'size': 5058624,
'crc32': 'c2244b26',
+ 'timeout': 50000,
+ 'fnu': 'ubtest-upload.bin',
}
# Details regarding a file that may be read from a NFS server. This variable
@@ -326,3 +329,71 @@
assert expected_text_default in output
assert "Config file 'default.boot' found" in output
+
+@pytest.mark.buildconfigspec("cmd_crc32")
+@pytest.mark.buildconfigspec("cmd_net")
+@pytest.mark.buildconfigspec("cmd_tftpput")
+def test_net_tftpput(u_boot_console):
+ """Test the tftpput command.
+
+ A file is downloaded from the TFTP server and then uploaded to the TFTP
+ server, its size and its CRC32 are validated.
+
+ The details of the file to download are provided by the boardenv_* file;
+ see the comment at the beginning of this file.
+ """
+
+ if not net_set_up:
+ pytest.skip("Network not initialized")
+
+ f = u_boot_console.config.env.get("env__net_tftp_readable_file", None)
+ if not f:
+ pytest.skip("No TFTP readable file to read")
+
+ addr = f.get("addr", None)
+ if not addr:
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+
+ sz = f.get("size", None)
+ timeout = f.get("timeout", u_boot_console.p.timeout)
+ fn = f["fn"]
+ fnu = f.get("fnu", "_".join([datetime.datetime.now().strftime("%y%m%d%H%M%S"), fn]))
+ expected_text = "Bytes transferred = "
+ if sz:
+ expected_text += "%d" % sz
+
+ with u_boot_console.temporary_timeout(timeout):
+ output = u_boot_console.run_command("tftpboot %x %s" % (addr, fn))
+
+ assert "TIMEOUT" not in output
+ assert expected_text in output
+
+ expected_tftpb_crc = f.get("crc32", None)
+
+ output = u_boot_console.run_command("crc32 $fileaddr $filesize")
+ assert expected_tftpb_crc in output
+
+ with u_boot_console.temporary_timeout(timeout):
+ output = u_boot_console.run_command(
+ "tftpput $fileaddr $filesize $serverip:%s" % (fnu)
+ )
+
+ expected_text = "Bytes transferred = "
+ if sz:
+ expected_text += "%d" % sz
+ addr = addr + sz
+ assert "TIMEOUT" not in output
+ assert "Access violation" not in output
+ assert expected_text in output
+
+ with u_boot_console.temporary_timeout(timeout):
+ output = u_boot_console.run_command("tftpboot %x %s" % (addr, fnu))
+
+ expected_text = "Bytes transferred = "
+ if sz:
+ expected_text += "%d" % sz
+ assert "TIMEOUT" not in output
+ assert expected_text in output
+
+ output = u_boot_console.run_command("crc32 $fileaddr $filesize")
+ assert expected_tftpb_crc in output
diff --git a/test/py/tests/test_sandbox_opts.py b/test/py/tests/test_sandbox_opts.py
new file mode 100644
index 0000000..422b43c
--- /dev/null
+++ b/test/py/tests/test_sandbox_opts.py
@@ -0,0 +1,30 @@
+# SPDX-License-Identifier: GPL-2.0
+# Copyright 2022 Google LLC
+# Written by Simon Glass <sjg@chromium.org>
+
+import pytest
+
+import u_boot_utils as util
+
+# This is needed for Azure, since the default '..' directory is not writeable
+TMPDIR = '/tmp/test_cmdline'
+
+@pytest.mark.slow
+@pytest.mark.boardspec('sandbox')
+def test_sandbox_cmdline(u_boot_console):
+ """Test building sandbox without CONFIG_CMDLINE"""
+ cons = u_boot_console
+
+ out = util.run_and_log(
+ cons, ['./tools/buildman/buildman', '-m', '--board', 'sandbox',
+ '-a', '~CMDLINE', '-o', TMPDIR])
+
+@pytest.mark.slow
+@pytest.mark.boardspec('sandbox')
+def test_sandbox_lto(u_boot_console):
+ """Test building sandbox without CONFIG_LTO"""
+ cons = u_boot_console
+
+ out = util.run_and_log(
+ cons, ['./tools/buildman/buildman', '-m', '--board', 'sandbox',
+ '-a', '~LTO', '-o', TMPDIR])
diff --git a/tools/buildman/builder.py b/tools/buildman/builder.py
index 3e42c98..f35175b 100644
--- a/tools/buildman/builder.py
+++ b/tools/buildman/builder.py
@@ -480,7 +480,7 @@
Args:
commit: Commit object that is being built
brd: Board object that is being built
- stage: Stage that we are at (mrproper, config, build)
+ stage: Stage that we are at (mrproper, config, oldconfig, build)
cwd: Directory where make should be run
args: Arguments to pass to make
kwargs: Arguments to pass to command.run_pipe()
diff --git a/tools/buildman/builderthread.py b/tools/buildman/builderthread.py
index 6a61f64..a8599c0 100644
--- a/tools/buildman/builderthread.py
+++ b/tools/buildman/builderthread.py
@@ -426,6 +426,12 @@
# Now do the build, if everything looks OK
if result.return_code == 0:
+ if adjust_cfg:
+ oldc_args = list(args) + ['oldconfig']
+ oldc_result = self.make(commit, brd, 'oldconfig', cwd,
+ *oldc_args, env=env)
+ if oldc_result.return_code:
+ return oldc_result
result = self._build(commit, brd, cwd, args, env, cmd_list,
config_only)
if adjust_cfg:
diff --git a/tools/buildman/func_test.py b/tools/buildman/func_test.py
index 55dd494..6b88ed8 100644
--- a/tools/buildman/func_test.py
+++ b/tools/buildman/func_test.py
@@ -439,6 +439,8 @@
tools.write_file(fname, b'CONFIG_SOMETHING=1')
return command.CommandResult(return_code=0,
combined='Test configuration complete')
+ elif stage == 'oldconfig':
+ return command.CommandResult(return_code=0)
elif stage == 'build':
stderr = ''
fname = os.path.join(cwd or '', out_dir, 'u-boot')
@@ -461,7 +463,7 @@
return command.CommandResult(return_code=0)
# Not handled, so abort
- print('make', stage)
+ print('_HandleMake failure: make', stage)
sys.exit(1)
# Example function to print output lines
