ARM: dts: sync amlogic G12A/SM1 DT from Linux 5.9-rc1
This imports the G12A & SM1 SoC and boards DT changes from the Linux
commit 9123e3a74ec7 ("Linux 5.9-rc1").
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
diff --git a/arch/arm/dts/meson-g12-common.dtsi b/arch/arm/dts/meson-g12-common.dtsi
index 593a006..1e83ec5 100644
--- a/arch/arm/dts/meson-g12-common.dtsi
+++ b/arch/arm/dts/meson-g12-common.dtsi
@@ -52,6 +52,39 @@
secure-monitor = <&sm>;
};
+ gpu_opp_table: gpu-opp-table {
+ compatible = "operating-points-v2";
+
+ opp-124999998 {
+ opp-hz = /bits/ 64 <124999998>;
+ opp-microvolt = <800000>;
+ };
+ opp-249999996 {
+ opp-hz = /bits/ 64 <249999996>;
+ opp-microvolt = <800000>;
+ };
+ opp-285714281 {
+ opp-hz = /bits/ 64 <285714281>;
+ opp-microvolt = <800000>;
+ };
+ opp-399999994 {
+ opp-hz = /bits/ 64 <399999994>;
+ opp-microvolt = <800000>;
+ };
+ opp-499999992 {
+ opp-hz = /bits/ 64 <499999992>;
+ opp-microvolt = <800000>;
+ };
+ opp-666666656 {
+ opp-hz = /bits/ 64 <666666656>;
+ opp-microvolt = <800000>;
+ };
+ opp-799999987 {
+ opp-hz = /bits/ 64 <799999987>;
+ opp-microvolt = <800000>;
+ };
+ };
+
psci {
compatible = "arm,psci-1.0";
method = "smc";
@@ -185,8 +218,10 @@
interrupt-names = "macirq";
clocks = <&clkc CLKID_ETH>,
<&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_MPLL2>;
- clock-names = "stmmaceth", "clkin0", "clkin1";
+ <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "stmmaceth", "clkin0", "clkin1",
+ "timing-adjustment";
rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>;
status = "disabled";
@@ -2360,21 +2395,7 @@
interrupt-names = "job", "mmu", "gpu";
clocks = <&clkc CLKID_MALI>;
resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
-
- /*
- * Mali clocking is provided by two identical clock paths
- * MALI_0 and MALI_1 muxed to a single clock by a glitch
- * free mux to safely change frequency while running.
- */
- assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
- <&clkc CLKID_MALI_0>,
- <&clkc CLKID_MALI>; /* Glitch free mux */
- assigned-clock-parents = <&clkc CLKID_FCLK_DIV2P5>,
- <0>, /* Do Nothing */
- <&clkc CLKID_MALI_0>;
- assigned-clock-rates = <0>, /* Do Nothing */
- <800000000>,
- <0>; /* Do Nothing */
+ operating-points-v2 = <&gpu_opp_table>;
#cooling-cells = <2>;
};
};