| commit | fb7c3b93230e335af080fb3d7cb5390c65d8da3a | [log] [tgz] |
|---|---|---|
| author | Stefan Agner <stefan.agner@toradex.com> | Tue Dec 04 11:10:20 2018 +0100 |
| committer | Stefano Babic <sbabic@denx.de> | Wed Jan 09 16:27:23 2019 +0100 |
| tree | ddb0de9dccc8eb634e9a46c9f0445d2ae664fb22 | |
| parent | e63d233d044cfc4746e4d90c291383a62d126f74 [diff] |
ARM: vf610: ddrmc: fix initialization completion detection The CR80 register has multiple interrupt bits, the code is supposed to check bit 8 but instead uses a logical and. In most cases this probably did not affect real operations since at that stage typically none of the other bits are set. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>