spi: rpc: Add support for operation without clock framework
Add ifdeffery to allow operation without the clock framework
enabled. This is required on RZ/A1, as it does not have clock
driver yet.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 2830f76..dc3e23f 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -173,7 +173,7 @@
config RENESAS_RPC_SPI
bool "Renesas RPC SPI driver"
- depends on RCAR_GEN3
+ depends on RCAR_GEN3 || RZA1
imply SPI_FLASH_BAR
help
Enable the Renesas RPC SPI driver, used to access SPI NOR flash
diff --git a/drivers/spi/renesas_rpc_spi.c b/drivers/spi/renesas_rpc_spi.c
index bec9095..bb2e774 100644
--- a/drivers/spi/renesas_rpc_spi.c
+++ b/drivers/spi/renesas_rpc_spi.c
@@ -409,27 +409,30 @@
priv->regs = plat->regs;
priv->extr = plat->extr;
-
+#if CONFIG_IS_ENABLED(CLK)
clk_enable(&priv->clk);
-
+#endif
return 0;
}
static int rpc_spi_ofdata_to_platdata(struct udevice *bus)
{
struct rpc_spi_platdata *plat = dev_get_platdata(bus);
- struct rpc_spi_priv *priv = dev_get_priv(bus);
- int ret;
plat->regs = dev_read_addr_index(bus, 0);
plat->extr = dev_read_addr_index(bus, 1);
+#if CONFIG_IS_ENABLED(CLK)
+ struct rpc_spi_priv *priv = dev_get_priv(bus);
+ int ret;
+
ret = clk_get_by_index(bus, 0, &priv->clk);
if (ret < 0) {
printf("%s: Could not get clock for %s: %d\n",
__func__, bus->name, ret);
return ret;
}
+#endif
plat->freq = dev_read_u32_default(bus, "spi-max-freq", 50000000);
@@ -448,6 +451,7 @@
{ .compatible = "renesas,rpc-r8a77965" },
{ .compatible = "renesas,rpc-r8a77970" },
{ .compatible = "renesas,rpc-r8a77995" },
+ { .compatible = "renesas,rpc-r7s72100" },
{ }
};