arch: arm: dts: fsl-ls1088a.dtsi: sync serial nodes with Linux

Sync the serial nodes of the LS1088A based boards with their
representation in Linux. We also imported the clockgen and sysclk nodes
which are dependencies.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index 0eb0f6c..b094bcf 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -2,9 +2,10 @@
 /*
  * NXP ls1088a SOC common device tree source
  *
- * Copyright 2017, 2020-2021 NXP
+ * Copyright 2017, 2020-2021, 2023 NXP
  */
 
+#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 / {
 	compatible = "fsl,ls1088a";
@@ -35,6 +36,13 @@
 			     <1 10 0x8>; /* Hypervisor PPI, active-low */
 	};
 
+	sysclk: sysclk {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <100000000>;
+		clock-output-names = "sysclk";
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
@@ -42,20 +50,29 @@
 		ranges;
 		dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
 
-		serial0: serial@21c0500 {
-			device_type = "serial";
+		clockgen: clocking@1300000 {
+			compatible = "fsl,ls1088a-clockgen";
+			reg = <0 0x1300000 0 0xa0000>;
+			#clock-cells = <2>;
+			clocks = <&sysclk>;
+		};
+
+		duart0: serial@21c0500 {
 			compatible = "fsl,ns16550", "ns16550a";
 			reg = <0x0 0x21c0500 0x0 0x100>;
-			clock-frequency = <0>; /* Updated by bootloader */
-			interrupts = <0 32 0x1>; /* edge triggered */
+			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+					    QORIQ_CLK_PLL_DIV(4)>;
+			interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
 		};
 
-		serial1: serial@21c0600 {
-			device_type = "serial";
+		duart1: serial@21c0600 {
 			compatible = "fsl,ns16550", "ns16550a";
 			reg = <0x0 0x21c0600 0x0 0x100>;
-			clock-frequency = <0>; /* Updated by bootloader */
-			interrupts = <0 32 0x1>; /* edge triggered */
+			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+					    QORIQ_CLK_PLL_DIV(4)>;
+			interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
 		};
 	};