| commit | f7a031d48d8a7db7c2e6a5662370fac66265f1ba | [log] [tgz] |
|---|---|---|
| author | Josua Mayer <josua@solid-run.com> | Wed Nov 27 13:32:48 2024 +0100 |
| committer | Stefan Roese <sr@denx.de> | Tue Jan 28 09:08:44 2025 +0100 |
| tree | c32d5b50397a870951dbee3b607a07ba161d5512 | |
| parent | 2310b8d4524405c749cef093b63737e86a0ee837 [diff] [blame] |
board: solidrun: clearfog: enable ddr odt0 on write for both chip-select Enabling ODT is required to suppress reflection of the data signal on DDR write operation. SolidRun Armada 388 SoM only connects M_ODT[0] even when both chip-select are used. Enable ODT[0] for both chip-select during write only. Original work by Baruch Siach [1] and Chris Packham [2]. [1] https://github.com/SolidRun/u-boot-armada38x/commit/aba763a611e69fbcc4e229659da9d84f16b39814 [2] https://github.com/SolidRun/u-boot-armada38x/commit/dbaf09590df9add19e738d2de03c0f2d0d8f5433 Signed-off-by: Josua Mayer <josua@solid-run.com> Reviewed-by: Stefan Roese <sr@denx.de>
diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c index 2dbd071..67b60d2 100644 --- a/board/solidrun/clearfog/clearfog.c +++ b/board/solidrun/clearfog/clearfog.c
@@ -161,7 +161,7 @@ {0}, /* timing parameters */ { {0} }, /* electrical configuration */ {0,}, /* electrical parameters */ - 0, /* ODT configuration */ + 0x30000, /* ODT configuration */ 0x3, /* clock enable mask */ };