commit | f774fd91043161392d376cf3514df9be0465cc14 | [log] [tgz] |
---|---|---|
author | Tudor Ambarus <tudor.ambarus@microchip.com> | Wed Nov 03 19:07:40 2021 +0200 |
committer | Eugen Hristev <eugen.hristev@microchip.com> | Tue Dec 07 12:22:34 2021 +0200 |
tree | 5e788356ef3df54074eb185e30b6174893e44e74 | |
parent | 8e4f44bb5c3286e24dbe3d4a5a92b99e5162c685 [diff] |
ARM: dts: at91: sama7g5: Add QSPI0 and OSPI1 nodes sama7g5 embedds an OSPI and a QSPI controller: 1/ OSPI0 Supporting Up to 200 MHz DDR. Octal, TwinQuad, Hyperflash and OctaFlash Protocols Supported. 2/ QSPI1 Supporting Up to 90 MHz DDR/133 MHz SDR. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>