tree 44f4cf48a8aa73e27a4eb61bdbdb09162ac311c6
parent 8b8902eef458c2378c5aa4ad75c7754c2bc1720b
author Michal Simek <michal.simek@xilinx.com> 1531917195 +0200
committer Michal Simek <michal.simek@xilinx.com> 1539694725 +0200

spl: fpga: Implement fpga bistream loading with fpga_load

This patch partially reverts:
"spl: fit: Add support for loading FPGA bitstream"
(sha1: 26a642238bdecc53527142dc043b29e21c5cc94c)

There shouldn't be a need to call private spl_load_fpga_image function
because the whole sequence should be already handled by fpga framework.
If there is missing loading bistream by chunks it should be done via
fpga framework instead of having private hooks.
Also spl_load_fpga_image() weak function is not used anywhere and
opening a way for not reviewed hacks out of mainline U-Boot is not the
right way to go.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>