clk: renesas: Add and enable CPG reset driver
Add trivial reset driver extension to the CPG clock driver. The change
turns current CPG UCLASS_CLK driver instance into an UCLASS_NOP proxy
driver, which in turn binds both generic rcar3_clk UCLASS_CLK clock
driver as well as generic rcar_rst UCLASS_RESET reset driver to the
CPG DT node. This way, any other drivers which use the 'reset' DT
property can now obtain valid reset handle backed by a reset driver.
The clock tables have been updated to represent the CPG driver and only
implement the generic CPG proxy driver bind call, which binds the clock
and reset drivers.
The DM_RESET is now enabled for all R-Car Gen3 platforms.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
diff --git a/drivers/clk/renesas/r8a77980-cpg-mssr.c b/drivers/clk/renesas/r8a77980-cpg-mssr.c
index 1f29e77..f29727d 100644
--- a/drivers/clk/renesas/r8a77980-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77980-cpg-mssr.c
@@ -239,7 +239,7 @@
.get_pll_config = r8a77980_get_pll_config,
};
-static const struct udevice_id r8a77980_clk_ids[] = {
+static const struct udevice_id r8a77980_cpg_ids[] = {
{
.compatible = "renesas,r8a77980-cpg-mssr",
.data = (ulong)&r8a77980_cpg_mssr_info
@@ -247,12 +247,9 @@
{ }
};
-U_BOOT_DRIVER(clk_r8a77980) = {
- .name = "clk_r8a77980",
- .id = UCLASS_CLK,
- .of_match = r8a77980_clk_ids,
- .priv_auto = sizeof(struct gen3_clk_priv),
- .ops = &gen3_clk_ops,
- .probe = gen3_clk_probe,
- .remove = gen3_clk_remove,
+U_BOOT_DRIVER(cpg_r8a77980) = {
+ .name = "cpg_r8a77980",
+ .id = UCLASS_NOP,
+ .of_match = r8a77980_cpg_ids,
+ .bind = gen3_cpg_bind,
};