tree 01f0f7a988e220f3e025a3811144a2c00f468cde
parent 1191f385f38692c3ed182cf012bdecd748ff8dae
author Andre Przywara <andre.przywara@arm.com> 1662462770 +0100
committer Andre Przywara <andre.przywara@arm.com> 1698014457 +0100

pinctrl: sunxi: add new D1 pinctrl support

For the first time since at least the Allwinner A10 SoCs, the D1 (and
related cores) use a new pincontroller MMIO register layout, so we
cannot use our hardcoded, fixed offsets anymore.
Ideally this would all be handled by devicetree and DM drivers, but for
the DT-less SPL we still need the legacy interfaces.

Add a new Kconfig symbol to differenciate between the two generations of
pincontrollers, and just use that to just switch some basic symbols.
The rest is already abstracted enough, so works out of the box.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sam Edwards <CFSworks@gmail.com>
Tested-by: Sam Edwards <CFSworks@gmail.com>
Tested-by: Samuel Holland <samuel@sholland.org>