diff --git a/arch/arm/dts/meson-axg-s400-u-boot.dtsi b/arch/arm/dts/meson-axg-s400-u-boot.dtsi
index 2c4b06f..334650d 100644
--- a/arch/arm/dts/meson-axg-s400-u-boot.dtsi
+++ b/arch/arm/dts/meson-axg-s400-u-boot.dtsi
@@ -3,8 +3,6 @@
  * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
  */
 
-#include "meson-axg-u-boot.dtsi"
-
 /* wifi module */
 &sd_emmc_b {
 	status = "disabled";
@@ -13,12 +11,6 @@
 /* emmc storage */
 &sd_emmc_c {
 	status = "okay";
-};
-
-&usb {
-	status = "okay";
-	dr_mode = "otg";
-	vbus-supply = <&usb_pwr>;
 };
 
 &usb2_phy1 {
diff --git a/arch/arm/dts/meson-axg-u-boot.dtsi b/arch/arm/dts/meson-axg-u-boot.dtsi
deleted file mode 100644
index cb1c71e..0000000
--- a/arch/arm/dts/meson-axg-u-boot.dtsi
+++ /dev/null
@@ -1,62 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/ {
-	soc {
-		usb: usb@ffe09080 {
-			compatible = "amlogic,meson-gxl-usb-ctrl";
-			reg = <0x0 0xffe09080 0x0 0x20>;
-			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
-			#address-cells = <2>;
-			#size-cells = <2>;
-			ranges;
-
-			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
-			clock-names = "usb_ctrl", "ddr";
-			resets = <&reset RESET_USB_OTG>;
-
-			dr_mode = "otg";
-
-			phys = <&usb2_phy1>;
-			phy-names = "usb2-phy1";
-
-			dwc2: usb@ff400000 {
-				compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
-				reg = <0x0 0xff400000 0x0 0x40000>;
-				interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clkc CLKID_USB1>;
-				clock-names = "otg";
-				phys = <&usb2_phy1>;
-				dr_mode = "peripheral";
-				g-rx-fifo-size = <192>;
-				g-np-tx-fifo-size = <128>;
-				g-tx-fifo-size = <128 128 16 16 16>;
-			};
-
-			dwc3: usb@ff500000 {
-				compatible = "snps,dwc3";
-				reg = <0x0 0xff500000 0x0 0x100000>;
-				interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
-				dr_mode = "host";
-				maximum-speed = "high-speed";
-				snps,dis_u2_susphy_quirk;
-			};
-		};
-	};
-};
-
-&apb {
-	usb2_phy1: phy@9020 {
-		compatible = "amlogic,meson-gxl-usb2-phy";
-		#phy-cells = <0>;
-		reg = <0x0 0x9020 0x0 0x20>;
-		clocks = <&clkc CLKID_USB>;
-		clock-names = "phy";
-		resets = <&reset RESET_USB_OTG>;
-		reset-names = "phy";
-		status = "okay";
-	};
-};