| commit | 64cef442c268f2c30c3218b0468e3b304448dee9 | [log] [tgz] |
|---|---|---|
| author | Ye Li <ye.li@nxp.com> | Wed Mar 09 16:13:48 2016 +0800 |
| committer | Stefano Babic <sbabic@denx.de> | Fri Mar 25 13:55:54 2016 +0100 |
| tree | 9afc5474db13a66b5d16e9a612db7a6f666038e9 | |
| parent | 52b66582824b0fd3dafb9ff14ba657baebd5aaaa [diff] |
imx: mx6: Fix incorrect clear mmdc_ch0 handshake mask Since the MX6UL/SL/SX only has one DDR channel, in CCM_CCDR register the bit[17] for mmdc_ch0 is reserved and its proper state should be 1. When clear this bit, the periph_clk_sel cannot be set and that CDHIPR[periph_clk_sel_busy] handshake never clears. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <van.freenix@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>