arm: mediatek: add support for MediaTek MT7988 SoC
This patch adds basic support for MediaTek MT7988 SoC.
This includes files that will initialize the SoC after boot and
its device tree.
diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig
index 04aa2fd..8971e2d 100644
--- a/arch/arm/mach-mediatek/Kconfig
+++ b/arch/arm/mach-mediatek/Kconfig
@@ -58,6 +58,15 @@
including UART, SPI, SPI flash, USB3.0, MMC, NAND, SNFI, PWM, PCIe,
Gigabit Ethernet, I2C, built-in 4x4 Wi-Fi, and PCIe.
+config TARGET_MT7988
+ bool "MediaTek MT7988 SoC"
+ select ARM64
+ select CPU
+ help
+ The MediaTek MT7988 is a ARM64-based SoC with a quad-core Cortex-A73.
+ including UART, SPI, SPI flash, USB3.0, MMC, NAND, SNFI, PWM, PCIe,
+ 10 Gigabit Ethernet , I2C, and PCIe.
+
config TARGET_MT8183
bool "MediaTek MT8183 SoC"
select ARM64
@@ -104,6 +113,7 @@
default "mt7629" if TARGET_MT7629
default "mt7981" if TARGET_MT7981
default "mt7986" if TARGET_MT7986
+ default "mt7988" if TARGET_MT7988
default "mt8183" if TARGET_MT8183
default "mt8512" if TARGET_MT8512
default "mt8516" if TARGET_MT8516
@@ -121,6 +131,7 @@
default "mt7629" if TARGET_MT7629
default "mt7981" if TARGET_MT7981
default "mt7986" if TARGET_MT7986
+ default "mt7988" if TARGET_MT7988
default "mt8183" if TARGET_MT8183
default "mt8512" if TARGET_MT8512
default "mt8516" if TARGET_MT8516
@@ -135,7 +146,7 @@
string
default "media=nor" if TARGET_MT8518 || TARGET_MT8512 || TARGET_MT7629 || TARGET_MT7622
default "media=emmc" if TARGET_MT8516 || TARGET_MT8365 || TARGET_MT8183
- default "media=snand;nandinfo=2k+64" if TARGET_MT7981 || TARGET_MT7986
+ default "media=snand;nandinfo=2k+64" if TARGET_MT7981 || TARGET_MT7986 || TARGET_MT7988
default "lk=1" if TARGET_MT7623
endif
diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile
index fc85293..71aa341 100644
--- a/arch/arm/mach-mediatek/Makefile
+++ b/arch/arm/mach-mediatek/Makefile
@@ -9,6 +9,7 @@
obj-$(CONFIG_TARGET_MT7629) += mt7629/
obj-$(CONFIG_TARGET_MT7981) += mt7981/
obj-$(CONFIG_TARGET_MT7986) += mt7986/
+obj-$(CONFIG_TARGET_MT7988) += mt7988/
obj-$(CONFIG_TARGET_MT8183) += mt8183/
obj-$(CONFIG_TARGET_MT8516) += mt8516/
obj-$(CONFIG_TARGET_MT8518) += mt8518/
diff --git a/arch/arm/mach-mediatek/mt7988/Makefile b/arch/arm/mach-mediatek/mt7988/Makefile
new file mode 100644
index 0000000..007eb4a
--- /dev/null
+++ b/arch/arm/mach-mediatek/mt7988/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-y += init.o
+obj-y += lowlevel_init.o
diff --git a/arch/arm/mach-mediatek/mt7988/init.c b/arch/arm/mach-mediatek/mt7988/init.c
new file mode 100644
index 0000000..082f12b
--- /dev/null
+++ b/arch/arm/mach-mediatek/mt7988/init.c
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
+
+#include <fdtdec.h>
+#include <init.h>
+#include <asm/armv8/mmu.h>
+#include <asm/global_data.h>
+#include <asm/u-boot.h>
+#include <asm/system.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define SZ_8G _AC(0x200000000, ULL)
+
+int dram_init(void)
+{
+ int ret;
+
+ ret = fdtdec_setup_mem_size_base();
+ if (ret)
+ return ret;
+
+ gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_8G);
+
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = gd->ram_base;
+ gd->bd->bi_dram[0].size = gd->ram_size;
+
+ return 0;
+}
+
+void reset_cpu(ulong addr)
+{
+ psci_system_reset();
+}
+
+static struct mm_region mt7988_mem_map[] = {
+ {
+ /* DDR */
+ .virt = 0x40000000UL,
+ .phys = 0x40000000UL,
+ .size = 0x200000000ULL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
+ }, {
+ .virt = 0x00000000UL,
+ .phys = 0x00000000UL,
+ .size = 0x40000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ 0,
+ }
+};
+
+struct mm_region *mem_map = mt7988_mem_map;
diff --git a/arch/arm/mach-mediatek/mt7988/lowlevel_init.S b/arch/arm/mach-mediatek/mt7988/lowlevel_init.S
new file mode 100644
index 0000000..2ae3cc4
--- /dev/null
+++ b/arch/arm/mach-mediatek/mt7988/lowlevel_init.S
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2020 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
+
+/*
+ * Switch from AArch64 EL2 to AArch32 EL2
+ * @param inputs:
+ * x0: argument, zero
+ * x1: machine nr
+ * x2: fdt address
+ * x3: input argument
+ * x4: kernel entry point
+ * @param outputs for secure firmware:
+ * x0: function id
+ * x1: kernel entry point
+ * x2: machine nr
+ * x3: fdt address
+*/
+
+.global armv8_el2_to_aarch32
+armv8_el2_to_aarch32:
+ mov x3, x2
+ mov x2, x1
+ mov x1, x4
+ mov x4, #0
+ ldr x0, =0x82000200
+ SMC #0
+ ret