diff --git a/board/avionic-design/common/pinmux-config-tamonten-ng.h b/board/avionic-design/common/pinmux-config-tamonten-ng.h
index 39df731..69515d2 100644
--- a/board/avionic-design/common/pinmux-config-tamonten-ng.h
+++ b/board/avionic-design/common/pinmux-config-tamonten-ng.h
@@ -8,9 +8,9 @@
 #ifndef _PINMUX_CONFIG_TAMONTEN_NG_H_
 #define _PINMUX_CONFIG_TAMONTEN_NG_H_
 
-#define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io)	\
+#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io)		\
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PINGRP_##_pingrp,		\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -20,9 +20,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define I2C_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \
+#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)	\
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PINGRP_##_pingrp,		\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -32,9 +32,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define LV_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \
+#define LV_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PINGRP_##_pingrp,		\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -44,19 +44,19 @@
 		.ioreset	= PMUX_PIN_IO_RESET_##_ioreset	\
 	}
 
-#define DEFAULT_PADCFG(_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
+#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
 	{							\
-		.padgrp		= PDRIVE_PINGROUP_##_padgrp,	\
+		.drvgrp		= PDRIVE_PINGROUP_##_drvgrp,	\
 		.slwf		= _slwf,			\
 		.slwr		= _slwr,			\
 		.drvup		= _drvup,			\
 		.drvdn		= _drvdn,			\
-		.lpmd		= PGRP_LPMD_##_lpmd,		\
-		.schmt		= PGRP_SCHMT_##_schmt,		\
-		.hsm		= PGRP_HSM_##_hsm,		\
+		.lpmd		= PMUX_LPMD_##_lpmd,		\
+		.schmt		= PMUX_SCHMT_##_schmt,		\
+		.hsm		= PMUX_HSM_##_hsm,		\
 	}
 
-static struct pingroup_config tamonten_ng_pinmux_common[] = {
+static struct pmux_pingrp_config tamonten_ng_pinmux_common[] = {
 	/* SDMMC1 pinmux */
 	DEFAULT_PINMUX(SDMMC1_CLK,  SDMMC1, NORMAL, NORMAL, INPUT),
 	DEFAULT_PINMUX(SDMMC1_CMD,  SDMMC1, UP,     NORMAL, INPUT),
@@ -277,7 +277,7 @@
 	DEFAULT_PINMUX(HDMI_INT, RSVD1, NORMAL, TRISTATE, INPUT),
 };
 
-static struct pingroup_config unused_pins_lowpower[] = {
+static struct pmux_pingrp_config unused_pins_lowpower[] = {
 	/* UART1 - NC */
 	DEFAULT_PINMUX(ULPI_DATA2, UARTA, NORMAL, NORMAL, INPUT),
 	DEFAULT_PINMUX(ULPI_DATA3, UARTA, NORMAL, NORMAL, INPUT),
@@ -377,8 +377,8 @@
 	DEFAULT_PINMUX(GMI_DQS,    NAND, NORMAL, TRISTATE, OUTPUT),
 };
 
-static struct padctrl_config tamonten_ng_padctrl[] = {
-	/* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
+static struct pmux_drvgrp_config tamonten_ng_padctrl[] = {
+	/* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
 	DEFAULT_PADCFG(SDIO1, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR,
 		SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, DISABLE, DISABLE),
 };
diff --git a/board/avionic-design/common/tamonten-ng.c b/board/avionic-design/common/tamonten-ng.c
index 9d395c6..5870b95 100644
--- a/board/avionic-design/common/tamonten-ng.c
+++ b/board/avionic-design/common/tamonten-ng.c
@@ -28,14 +28,14 @@
 
 void pinmux_init(void)
 {
-	pinmux_config_table(tamonten_ng_pinmux_common,
-			    ARRAY_SIZE(tamonten_ng_pinmux_common));
-	pinmux_config_table(unused_pins_lowpower,
-			    ARRAY_SIZE(unused_pins_lowpower));
+	pinmux_config_pingrp_table(tamonten_ng_pinmux_common,
+		ARRAY_SIZE(tamonten_ng_pinmux_common));
+	pinmux_config_pingrp_table(unused_pins_lowpower,
+		ARRAY_SIZE(unused_pins_lowpower));
 
 	/* Initialize any non-default pad configs (APB_MISC_GP regs) */
-	padgrp_config_table(tamonten_ng_padctrl,
-			    ARRAY_SIZE(tamonten_ng_padctrl));
+	pinmux_config_drvgrp_table(tamonten_ng_padctrl,
+		ARRAY_SIZE(tamonten_ng_padctrl));
 }
 
 void gpio_early_init(void)
diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c
index 47e7abe..cc0e5e1 100644
--- a/board/nvidia/cardhu/cardhu.c
+++ b/board/nvidia/cardhu/cardhu.c
@@ -20,14 +20,14 @@
  */
 void pinmux_init(void)
 {
-	pinmux_config_table(tegra3_pinmux_common,
+	pinmux_config_pingrp_table(tegra3_pinmux_common,
 		ARRAY_SIZE(tegra3_pinmux_common));
 
-	pinmux_config_table(unused_pins_lowpower,
+	pinmux_config_pingrp_table(unused_pins_lowpower,
 		ARRAY_SIZE(unused_pins_lowpower));
 
 	/* Initialize any non-default pad configs (APB_MISC_GP regs) */
-	padgrp_config_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl));
+	pinmux_config_drvgrp_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl));
 }
 
 #if defined(CONFIG_TEGRA_MMC)
diff --git a/board/nvidia/cardhu/pinmux-config-cardhu.h b/board/nvidia/cardhu/pinmux-config-cardhu.h
index 51d2b94..c230dac 100644
--- a/board/nvidia/cardhu/pinmux-config-cardhu.h
+++ b/board/nvidia/cardhu/pinmux-config-cardhu.h
@@ -17,9 +17,9 @@
 #ifndef _PINMUX_CONFIG_CARDHU_H_
 #define _PINMUX_CONFIG_CARDHU_H_
 
-#define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io)	\
+#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io)		\
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PINGRP_##_pingrp,		\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -29,9 +29,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define I2C_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \
+#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)	\
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PINGRP_##_pingrp,		\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -41,9 +41,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define LV_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \
+#define LV_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PINGRP_##_pingrp,		\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -53,19 +53,19 @@
 		.ioreset	= PMUX_PIN_IO_RESET_##_ioreset	\
 	}
 
-#define DEFAULT_PADCFG(_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
+#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
 	{							\
-		.padgrp		= PDRIVE_PINGROUP_##_padgrp,	\
+		.drvgrp		= PDRIVE_PINGROUP_##_drvgrp,	\
 		.slwf		= _slwf,			\
 		.slwr		= _slwr,			\
 		.drvup		= _drvup,			\
 		.drvdn		= _drvdn,			\
-		.lpmd		= PGRP_LPMD_##_lpmd,		\
-		.schmt		= PGRP_SCHMT_##_schmt,		\
-		.hsm		= PGRP_HSM_##_hsm,		\
+		.lpmd		= PMUX_LPMD_##_lpmd,		\
+		.schmt		= PMUX_SCHMT_##_schmt,		\
+		.hsm		= PMUX_HSM_##_hsm,		\
 	}
 
-static struct pingroup_config tegra3_pinmux_common[] = {
+static struct pmux_pingrp_config tegra3_pinmux_common[] = {
 	/* SDMMC1 pinmux */
 	DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT),
 	DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, UP, NORMAL, INPUT),
@@ -316,7 +316,7 @@
 	LV_PINMUX(VI_VSYNC, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
 };
 
-static struct pingroup_config unused_pins_lowpower[] = {
+static struct pmux_pingrp_config unused_pins_lowpower[] = {
 	DEFAULT_PINMUX(GMI_WAIT, NAND, UP, TRISTATE, OUTPUT),
 	DEFAULT_PINMUX(GMI_ADV_N, NAND, NORMAL, TRISTATE, OUTPUT),
 	DEFAULT_PINMUX(GMI_CLK, NAND, NORMAL, TRISTATE, OUTPUT),
@@ -338,8 +338,8 @@
 	DEFAULT_PINMUX(GMI_DQS, NAND, NORMAL, TRISTATE, OUTPUT),
 };
 
-static struct padctrl_config cardhu_padctrl[] = {
-	/* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
+static struct pmux_drvgrp_config cardhu_padctrl[] = {
+	/* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
 	DEFAULT_PADCFG(SDIO1, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
 		SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, DISABLE, DISABLE),
 };
diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c
index 2c23a29..f2d05af 100644
--- a/board/nvidia/dalmore/dalmore.c
+++ b/board/nvidia/dalmore/dalmore.c
@@ -29,17 +29,18 @@
  */
 void pinmux_init(void)
 {
-	pinmux_config_table(tegra114_pinmux_set_nontristate,
+	pinmux_config_pingrp_table(tegra114_pinmux_set_nontristate,
 		ARRAY_SIZE(tegra114_pinmux_set_nontristate));
 
-	pinmux_config_table(tegra114_pinmux_common,
+	pinmux_config_pingrp_table(tegra114_pinmux_common,
 		ARRAY_SIZE(tegra114_pinmux_common));
 
-	pinmux_config_table(unused_pins_lowpower,
+	pinmux_config_pingrp_table(unused_pins_lowpower,
 		ARRAY_SIZE(unused_pins_lowpower));
 
 	/* Initialize any non-default pad configs (APB_MISC_GP regs) */
-	padgrp_config_table(dalmore_padctrl, ARRAY_SIZE(dalmore_padctrl));
+	pinmux_config_drvgrp_table(dalmore_padctrl,
+		ARRAY_SIZE(dalmore_padctrl));
 }
 
 #if defined(CONFIG_TEGRA_MMC)
diff --git a/board/nvidia/dalmore/pinmux-config-dalmore.h b/board/nvidia/dalmore/pinmux-config-dalmore.h
index 9dcd5e4..6069fb6 100644
--- a/board/nvidia/dalmore/pinmux-config-dalmore.h
+++ b/board/nvidia/dalmore/pinmux-config-dalmore.h
@@ -17,9 +17,9 @@
 #ifndef _PINMUX_CONFIG_DALMORE_H_
 #define _PINMUX_CONFIG_DALMORE_H_
 
-#define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io)	\
+#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io)		\
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PINGRP_##_pingrp,		\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -29,9 +29,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define I2C_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \
+#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)	\
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PINGRP_##_pingrp,		\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -41,9 +41,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define DDC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
+#define DDC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PINGRP_##_pingrp,		\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -53,9 +53,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define VI_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \
+#define VI_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PINGRP_##_pingrp,		\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -65,9 +65,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_##_ioreset	\
 	}
 
-#define CEC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od)	\
+#define CEC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)		\
 	{								\
-		.pingroup   = PINGRP_##_pingroup,			\
+		.pingrp     = PINGRP_##_pingrp,				\
 		.func       = PMUX_FUNC_##_mux,				\
 		.pull       = PMUX_PULL_##_pull,			\
 		.tristate   = PMUX_TRI_##_tri,				\
@@ -79,19 +79,19 @@
 
 #define USB_PINMUX CEC_PINMUX
 
-#define DEFAULT_PADCFG(_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
+#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
 	{						\
-		.padgrp = PDRIVE_PINGROUP_##_padgrp,	\
+		.drvgrp = PDRIVE_PINGROUP_##_drvgrp,	\
 		.slwf   = _slwf,			\
 		.slwr   = _slwr,			\
 		.drvup  = _drvup,			\
 		.drvdn  = _drvdn,			\
-		.lpmd   = PGRP_LPMD_##_lpmd,		\
-		.schmt  = PGRP_SCHMT_##_schmt,		\
-		.hsm    = PGRP_HSM_##_hsm,		\
+		.lpmd   = PMUX_LPMD_##_lpmd,		\
+		.schmt  = PMUX_SCHMT_##_schmt,		\
+		.hsm    = PMUX_HSM_##_hsm,		\
 	}
 
-static struct pingroup_config tegra114_pinmux_common[] = {
+static struct pmux_pingrp_config tegra114_pinmux_common[] = {
 	/* EXTPERIPH1 pinmux */
 	DEFAULT_PINMUX(CLK1_OUT,      EXTPERIPH1,  NORMAL,    NORMAL,   OUTPUT),
 
@@ -286,13 +286,13 @@
 	DEFAULT_PINMUX(GPIO_X6_AUD,   SPI6,        UP,        TRISTATE, INPUT),
 };
 
-static struct pingroup_config unused_pins_lowpower[] = {
+static struct pmux_pingrp_config unused_pins_lowpower[] = {
 	DEFAULT_PINMUX(CLK1_REQ,      RSVD3,       DOWN, TRISTATE, OUTPUT),
 	DEFAULT_PINMUX(USB_VBUS_EN1,  RSVD3,       DOWN, TRISTATE, OUTPUT),
 };
 
 /* Initially setting all used GPIO's to non-TRISTATE */
-static struct pingroup_config tegra114_pinmux_set_nontristate[] = {
+static struct pmux_pingrp_config tegra114_pinmux_set_nontristate[] = {
 	DEFAULT_PINMUX(GPIO_X4_AUD,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
 	DEFAULT_PINMUX(GPIO_X5_AUD,     RSVD1,  UP,      NORMAL,    INPUT),
 	DEFAULT_PINMUX(GPIO_X6_AUD,     RSVD3,  UP,      NORMAL,    INPUT),
@@ -362,8 +362,8 @@
 	DEFAULT_PINMUX(SDMMC3_CD_N,     SDMMC3, UP,       NORMAL,   INPUT),
 };
 
-static struct padctrl_config dalmore_padctrl[] = {
-	/* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
+static struct pmux_drvgrp_config dalmore_padctrl[] = {
+	/* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
 	DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
 		SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE),
 };
diff --git a/board/nvidia/venice2/pinmux-config-venice2.h b/board/nvidia/venice2/pinmux-config-venice2.h
index b3d68d5..51cd4bf 100644
--- a/board/nvidia/venice2/pinmux-config-venice2.h
+++ b/board/nvidia/venice2/pinmux-config-venice2.h
@@ -8,9 +8,9 @@
 #ifndef _PINMUX_CONFIG_VENICE2_H_
 #define _PINMUX_CONFIG_VENICE2_H_
 
-#define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io)	\
+#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io)		\
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PINGRP_##_pingrp,		\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -20,9 +20,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define I2C_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \
+#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)	\
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PINGRP_##_pingrp,		\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -32,9 +32,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define DDC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
+#define DDC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PINGRP_##_pingrp,		\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -44,9 +44,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define VI_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \
+#define VI_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PINGRP_##_pingrp,		\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -56,9 +56,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_##_ioreset	\
 	}
 
-#define CEC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od)	\
+#define CEC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)		\
 	{								\
-		.pingroup   = PINGRP_##_pingroup,			\
+		.pingrp     = PINGRP_##_pingrp,				\
 		.func       = PMUX_FUNC_##_mux,				\
 		.pull       = PMUX_PULL_##_pull,			\
 		.tristate   = PMUX_TRI_##_tri,				\
@@ -70,19 +70,19 @@
 
 #define USB_PINMUX CEC_PINMUX
 
-#define DEFAULT_PADCFG(_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
+#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
 	{						\
-		.padgrp = PDRIVE_PINGROUP_##_padgrp,	\
+		.drvgrp = PDRIVE_PINGROUP_##_drvgrp,	\
 		.slwf   = _slwf,			\
 		.slwr   = _slwr,			\
 		.drvup  = _drvup,			\
 		.drvdn  = _drvdn,			\
-		.lpmd   = PGRP_LPMD_##_lpmd,		\
-		.schmt  = PGRP_SCHMT_##_schmt,		\
-		.hsm    = PGRP_HSM_##_hsm,		\
+		.lpmd   = PMUX_LPMD_##_lpmd,		\
+		.schmt  = PMUX_SCHMT_##_schmt,		\
+		.hsm    = PMUX_HSM_##_hsm,		\
 	}
 
-static struct pingroup_config tegra124_pinmux_common[] = {
+static struct pmux_pingrp_config tegra124_pinmux_common[] = {
 	/* EXTPERIPH1 pinmux */
 	DEFAULT_PINMUX(CLK1_OUT,      EXTPERIPH1,  NORMAL,    NORMAL,   OUTPUT),
 
@@ -286,12 +286,12 @@
 	DEFAULT_PINMUX(SPDIF_OUT,     RSVD1,       NORMAL,    TRISTATE, INPUT),
 };
 
-static struct pingroup_config unused_pins_lowpower[] = {
+static struct pmux_pingrp_config unused_pins_lowpower[] = {
 	DEFAULT_PINMUX(CLK1_REQ,      RSVD3,    DOWN, TRISTATE, OUTPUT),
 };
 
 /* Initially setting all used GPIO's to non-TRISTATE */
-static struct pingroup_config tegra124_pinmux_set_nontristate[] = {
+static struct pmux_pingrp_config tegra124_pinmux_set_nontristate[] = {
 	DEFAULT_PINMUX(GPIO_X4_AUD,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
 	DEFAULT_PINMUX(GPIO_X7_AUD,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
 	DEFAULT_PINMUX(GPIO_W2_AUD,     RSVD1,  UP,      NORMAL,    INPUT),
@@ -331,8 +331,8 @@
 	DEFAULT_PINMUX(GPIO_PK1,        GMI,    NORMAL,   NORMAL,   OUTPUT),
 };
 
-static struct padctrl_config venice2_padctrl[] = {
-	/* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
+static struct pmux_drvgrp_config venice2_padctrl[] = {
+	/* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
 	DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR,
 		       SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE),
 };
diff --git a/board/nvidia/venice2/venice2.c b/board/nvidia/venice2/venice2.c
index 1ed2fd7..15082c4 100644
--- a/board/nvidia/venice2/venice2.c
+++ b/board/nvidia/venice2/venice2.c
@@ -19,15 +19,16 @@
  */
 void pinmux_init(void)
 {
-	pinmux_config_table(tegra124_pinmux_set_nontristate,
-			    ARRAY_SIZE(tegra124_pinmux_set_nontristate));
+	pinmux_config_pingrp_table(tegra124_pinmux_set_nontristate,
+		ARRAY_SIZE(tegra124_pinmux_set_nontristate));
 
-	pinmux_config_table(tegra124_pinmux_common,
-			    ARRAY_SIZE(tegra124_pinmux_common));
+	pinmux_config_pingrp_table(tegra124_pinmux_common,
+		ARRAY_SIZE(tegra124_pinmux_common));
 
-	pinmux_config_table(unused_pins_lowpower,
-			    ARRAY_SIZE(unused_pins_lowpower));
+	pinmux_config_pingrp_table(unused_pins_lowpower,
+		ARRAY_SIZE(unused_pins_lowpower));
 
 	/* Initialize any non-default pad configs (APB_MISC_GP regs) */
-	padgrp_config_table(venice2_padctrl, ARRAY_SIZE(venice2_padctrl));
+	pinmux_config_drvgrp_table(venice2_padctrl,
+		ARRAY_SIZE(venice2_padctrl));
 }