| /* |
| * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> |
| * (C) Copyright 2013 Xilinx, Inc. |
| * |
| * Common configuration options for all Zynq boards. |
| * |
| * SPDX-License-Identifier: GPL-2.0+ |
| */ |
| |
| #ifndef __CONFIG_ZYNQ_COMMON_H |
| #define __CONFIG_ZYNQ_COMMON_H |
| |
| /* High Level configuration Options */ |
| #define CONFIG_ARMV7 |
| #define CONFIG_ZYNQ |
| |
| /* CPU clock */ |
| #ifndef CONFIG_CPU_FREQ_HZ |
| # define CONFIG_CPU_FREQ_HZ 800000000 |
| #endif |
| |
| /* Cache options */ |
| #define CONFIG_CMD_CACHE |
| #define CONFIG_SYS_CACHELINE_SIZE 32 |
| |
| #define CONFIG_SYS_L2CACHE_OFF |
| #ifndef CONFIG_SYS_L2CACHE_OFF |
| # define CONFIG_SYS_L2_PL310 |
| # define CONFIG_SYS_PL310_BASE 0xf8f02000 |
| #endif |
| |
| /* Serial drivers */ |
| #define CONFIG_BAUDRATE 115200 |
| /* The following table includes the supported baudrates */ |
| #define CONFIG_SYS_BAUDRATE_TABLE \ |
| {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} |
| |
| /* DCC driver */ |
| #if defined(CONFIG_ZYNQ_DCC) |
| # define CONFIG_ARM_DCC |
| # define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ |
| #else |
| # define CONFIG_ZYNQ_SERIAL |
| #endif |
| |
| /* Ethernet driver */ |
| #if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) |
| # define CONFIG_NET_MULTI |
| # define CONFIG_ZYNQ_GEM |
| # define CONFIG_MII |
| # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
| # define CONFIG_PHYLIB |
| # define CONFIG_PHY_MARVELL |
| #endif |
| |
| /* SPI */ |
| #ifdef CONFIG_ZYNQ_SPI |
| # define CONFIG_SPI_FLASH |
| # define CONFIG_SPI_FLASH_SST |
| # define CONFIG_CMD_SF |
| #endif |
| |
| /* NOR */ |
| #ifndef CONFIG_SYS_NO_FLASH |
| # define CONFIG_SYS_FLASH_BASE 0xE2000000 |
| # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) |
| # define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| # define CONFIG_SYS_MAX_FLASH_SECT 512 |
| # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 |
| # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 |
| # define CONFIG_FLASH_SHOW_PROGRESS 10 |
| # define CONFIG_SYS_FLASH_CFI |
| # undef CONFIG_SYS_FLASH_EMPTY_INFO |
| # define CONFIG_FLASH_CFI_DRIVER |
| # undef CONFIG_SYS_FLASH_PROTECTION |
| # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
| #endif |
| |
| /* MMC */ |
| #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) |
| # define CONFIG_MMC |
| # define CONFIG_GENERIC_MMC |
| # define CONFIG_SDHCI |
| # define CONFIG_ZYNQ_SDHCI |
| # define CONFIG_CMD_MMC |
| # define CONFIG_CMD_FAT |
| # define CONFIG_SUPPORT_VFAT |
| # define CONFIG_CMD_EXT2 |
| # define CONFIG_DOS_PARTITION |
| #endif |
| |
| #define CONFIG_SYS_I2C_ZYNQ |
| /* I2C */ |
| #if defined(CONFIG_SYS_I2C_ZYNQ) |
| # define CONFIG_CMD_I2C |
| # define CONFIG_SYS_I2C |
| # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 |
| # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 |
| #endif |
| |
| /* EEPROM */ |
| #ifdef CONFIG_ZYNQ_EEPROM |
| # define CONFIG_CMD_EEPROM |
| # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
| # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 |
| # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 |
| # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 |
| # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ |
| #endif |
| |
| #define CONFIG_BOOTP_SERVERIP |
| #define CONFIG_BOOTP_BOOTPATH |
| #define CONFIG_BOOTP_GATEWAY |
| #define CONFIG_BOOTP_HOSTNAME |
| #define CONFIG_BOOTP_MAY_FAIL |
| |
| /* Total Size of Environment Sector */ |
| #define CONFIG_ENV_SIZE (128 << 10) |
| |
| /* Allow to overwrite serial and ethaddr */ |
| #define CONFIG_ENV_OVERWRITE |
| |
| /* Environment */ |
| #ifndef CONFIG_ENV_IS_NOWHERE |
| # ifndef CONFIG_SYS_NO_FLASH |
| # define CONFIG_ENV_IS_IN_FLASH |
| # elif defined(CONFIG_SYS_NO_FLASH) |
| # define CONFIG_ENV_IS_NOWHERE |
| # endif |
| |
| # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE |
| # define CONFIG_ENV_OFFSET 0xE0000 |
| # define CONFIG_CMD_SAVEENV |
| #endif |
| |
| /* Default environment */ |
| #define CONFIG_EXTRA_ENV_SETTINGS \ |
| "fit_image=fit.itb\0" \ |
| "load_addr=0x2000000\0" \ |
| "fit_size=0x800000\0" \ |
| "flash_off=0x100000\0" \ |
| "nor_flash_off=0xE2100000\0" \ |
| "fdt_high=0x20000000\0" \ |
| "initrd_high=0x20000000\0" \ |
| "norboot=echo Copying FIT from NOR flash to RAM... && " \ |
| "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ |
| "bootm ${load_addr}\0" \ |
| "sdboot=echo Copying FIT from SD to RAM... && " \ |
| "fatload mmc 0 ${load_addr} ${fit_image} && " \ |
| "bootm ${load_addr}\0" \ |
| "jtagboot=echo TFTPing FIT to RAM... && " \ |
| "tftpboot ${load_addr} ${fit_image} && " \ |
| "bootm ${load_addr}\0" |
| #define CONFIG_BOOTCOMMAND "run $modeboot" |
| #define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */ |
| #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ |
| |
| /* Miscellaneous configurable options */ |
| #define CONFIG_SYS_PROMPT "zynq-uboot> " |
| #define CONFIG_SYS_HUSH_PARSER |
| |
| #define CONFIG_CMDLINE_EDITING |
| #define CONFIG_AUTO_COMPLETE |
| #define CONFIG_BOARD_LATE_INIT |
| #define CONFIG_SYS_LONGHELP |
| #define CONFIG_CLOCKS |
| #define CONFIG_CMD_CLK |
| #define CONFIG_SYS_MAXARGS 15 /* max number of command args */ |
| #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| sizeof(CONFIG_SYS_PROMPT) + 16) |
| |
| /* Physical Memory map */ |
| #define CONFIG_SYS_TEXT_BASE 0x4000000 |
| |
| #define CONFIG_NR_DRAM_BANKS 1 |
| #define CONFIG_SYS_SDRAM_BASE 0 |
| |
| #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) |
| |
| #define CONFIG_SYS_MALLOC_LEN 0x400000 |
| #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE |
| #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN |
| #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
| CONFIG_SYS_INIT_RAM_SIZE - \ |
| GENERATED_GBL_DATA_SIZE) |
| |
| /* Enable the PL to be downloaded */ |
| #define CONFIG_FPGA |
| #define CONFIG_FPGA_XILINX |
| #define CONFIG_FPGA_ZYNQPL |
| #define CONFIG_CMD_FPGA |
| #define CONFIG_CMD_FPGA_LOADMK |
| |
| /* Open Firmware flat tree */ |
| #define CONFIG_OF_LIBFDT |
| |
| /* FIT support */ |
| #define CONFIG_FIT |
| #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ |
| |
| /* FDT support */ |
| #define CONFIG_OF_CONTROL |
| #define CONFIG_OF_SEPARATE |
| #define CONFIG_DISPLAY_BOARDINFO_LATE |
| |
| /* RSA support */ |
| #define CONFIG_FIT_SIGNATURE |
| #define CONFIG_RSA |
| |
| /* Extend size of kernel image for uncompression */ |
| #define CONFIG_SYS_BOOTM_LEN (20 * 1024 * 1024) |
| |
| /* Boot FreeBSD/vxWorks from an ELF image */ |
| #if defined(CONFIG_ZYNQ_BOOT_FREEBSD) |
| # define CONFIG_API |
| # define CONFIG_CMD_ELF |
| # define CONFIG_SYS_MMC_MAX_DEVICE 1 |
| #endif |
| |
| #define CONFIG_SYS_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot.lds" |
| |
| /* Commands */ |
| #include <config_cmd_default.h> |
| |
| #define CONFIG_CMD_PING |
| #define CONFIG_CMD_DHCP |
| #define CONFIG_CMD_MII |
| #define CONFIG_CMD_TFTPPUT |
| |
| /* SPL part */ |
| #define CONFIG_SPL |
| #define CONFIG_CMD_SPL |
| #define CONFIG_SPL_FRAMEWORK |
| #define CONFIG_SPL_LIBCOMMON_SUPPORT |
| #define CONFIG_SPL_LIBGENERIC_SUPPORT |
| #define CONFIG_SPL_SERIAL_SUPPORT |
| |
| #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot-spl.lds" |
| |
| /* Disable dcache for SPL just for sure */ |
| #ifdef CONFIG_SPL_BUILD |
| #define CONFIG_SYS_DCACHE_OFF |
| #undef CONFIG_FPGA |
| #undef CONFIG_OF_CONTROL |
| #endif |
| |
| /* MMC support */ |
| #ifdef CONFIG_ZYNQ_SDHCI0 |
| #define CONFIG_SPL_MMC_SUPPORT |
| #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ |
| #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ |
| #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 |
| #define CONFIG_SPL_LIBDISK_SUPPORT |
| #define CONFIG_SPL_FAT_SUPPORT |
| #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" |
| #endif |
| |
| /* Address in RAM where the parameters must be copied by SPL. */ |
| #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 |
| |
| #define CONFIG_SPL_FAT_LOAD_ARGS_NAME "system.dtb" |
| #define CONFIG_SPL_FAT_LOAD_KERNEL_NAME "uImage" |
| |
| /* Not using MMC raw mode - just for compilation purpose */ |
| #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 |
| #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 |
| #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 |
| |
| /* qspi mode is working fine */ |
| #ifdef CONFIG_ZYNQ_QSPI |
| #define CONFIG_SPL_SPI_SUPPORT |
| #define CONFIG_SPL_SPI_LOAD |
| #define CONFIG_SPL_SPI_FLASH_SUPPORT |
| #define CONFIG_SPL_SPI_BUS 0 |
| #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 |
| #define CONFIG_SPL_SPI_CS 0 |
| #endif |
| |
| /* for booting directly linux */ |
| #define CONFIG_SPL_OS_BOOT |
| |
| /* SP location before relocation, must use scratch RAM */ |
| #define CONFIG_SPL_TEXT_BASE 0x0 |
| |
| /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ |
| #define CONFIG_SPL_MAX_SIZE 0x30000 |
| |
| /* The highest 64k OCM address */ |
| #define OCM_HIGH_ADDR 0xffff0000 |
| |
| /* Just define any reasonable size */ |
| #define CONFIG_SPL_STACK_SIZE 0x1000 |
| |
| /* SPL stack position - and stack goes down */ |
| #define CONFIG_SPL_STACK (OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE) |
| |
| /* On the top of OCM space */ |
| #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_STACK + \ |
| GENERATED_GBL_DATA_SIZE) |
| #define CONFIG_SYS_SPL_MALLOC_SIZE 0x1000 |
| |
| /* BSS setup */ |
| #define CONFIG_SPL_BSS_START_ADDR 0x100000 |
| #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 |
| |
| #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE |
| |
| #endif /* __CONFIG_ZYNQ_COMMON_H */ |