arm: v7R: Add initial support
The Cortex-R* processors are a mid-range CPUs for use in deeply-embedded,
real-time systems. It implements the ARMv7-R architecture, and includes
Thumb-2 technology for optimum code density and processing throughput.
Except for MPU(Memory Protection Unit) and few CP15 registers, most of the
features are compatible with v7 architecture. So,reuse the same armv7
folder and introduce a new config CPU_V7R in order to differentiate
from v7 based platforms.
Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index fd6d201..f056e03 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -212,6 +212,11 @@
select THUMB2_KERNEL
select SYS_CACHE_SHIFT_5
+config CPU_V7R
+ bool
+ select HAS_THUMB2
+ select SYS_CACHE_SHIFT_6
+
config CPU_PXA
bool
select SYS_CACHE_SHIFT_5
@@ -230,6 +235,7 @@
default "arm1136" if CPU_ARM1136
default "arm1176" if CPU_ARM1176
default "armv7" if CPU_V7A
+ default "armv7" if CPU_V7R
default "armv7m" if CPU_V7M
default "pxa" if CPU_PXA
default "sa1100" if CPU_SA1100
@@ -245,6 +251,7 @@
default 6 if CPU_ARM1176
default 7 if CPU_V7A
default 7 if CPU_V7M
+ default 7 if CPU_V7R
default 5 if CPU_PXA
default 4 if CPU_SA1100
default 8 if ARM64
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index b498f36..3b1dd85 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -16,6 +16,7 @@
arch-$(CONFIG_CPU_ARM1176) =-march=armv5t
arch-$(CONFIG_CPU_V7A) =$(call cc-option, -march=armv7-a, \
$(call cc-option, -march=armv7, -march=armv5))
+arch-$(CONFIG_CPU_V7R) =-march=armv7-r
arch-$(CONFIG_ARM64) =-march=armv8-a
# On Tegra systems we must build SPL for the armv4 core on the device
@@ -39,6 +40,7 @@
tune-$(CONFIG_CPU_ARM1136) =
tune-$(CONFIG_CPU_ARM1176) =
tune-$(CONFIG_CPU_V7A) =
+tune-$(CONFIG_CPU_V7R) =
tune-$(CONFIG_ARM64) =
# Evaluate tune cc-option calls now
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 8c19a83..c996525 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -81,7 +81,9 @@
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#ifdef CONFIG_CPU_V7A
bl cpu_init_cp15
+#endif
#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
bl cpu_init_crit
#endif