tree 98d825b9c6e88d8b9438f49f0b12d4837a127e66
parent 623b3667571ccb156ee2f13f4bcde41edf0b60b6
author Suman Anna <s-anna@ti.com> 1567593109 +0530
committer Tom Rini <trini@konsulko.com> 1570802879 -0400

armv8: K3: am65x: Update DDR address regions in MMU table

The A53 U-Boot code can load and boot the MCU domain R5F cores (either a
single core in LockStep mode or 2 cores in Split mode) to achieve various
early system functionalities. Change the memory attributes for the DDR
regions used by the remote processors so that the cores can see and
execute the proper code loaded by U-Boot.

These regions are currently limited to 0xa0000000 to 0xa2100000 as per
the DDR carveouts assigned for these R5F cores in the overall DDR memory
map.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>