| commit | 68a070bf9779f6d2fdfdb2aae430575f8f022225 | [log] [tgz] |
|---|---|---|
| author | Bin Meng <bmeng.cn@gmail.com> | Tue Aug 15 22:41:58 2017 -0700 |
| committer | Bin Meng <bmeng.cn@gmail.com> | Sat Sep 16 14:57:44 2017 +0800 |
| tree | b290700167bcb6395540951993d8f08e3dce64c9 | |
| parent | c23720c4d65a9a9f2527dfd0e1770e8bb0b6db59 [diff] |
x86: Add Intel Braswell SoC support This adds initial Intel Braswell SoC support. It uses Intel FSP to initialize the chipset. Similar to its predecessor BayTrail, there are some work to do to enable the legacy UART integrated in the Braswell SoC. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>