| commit | 7d1bf8d0fd2baae0b678630813f7af47b590250c | [log] [tgz] |
|---|---|---|
| author | Jagan Teki <jagan@edgeble.ai> | Mon Jan 30 20:27:37 2023 +0530 |
| committer | Kever Yang <kever.yang@rock-chips.com> | Tue Feb 28 18:07:27 2023 +0800 |
| tree | ecc8391f94b8d122e8bb11e5795c027e95fea1fa | |
| parent | 7d031ee1c166a9e6dde9914af63b950b38dcb154 [diff] |
clk: rockchip: pll: Add pll_rk3588 type for rk3588 Add RK3588 pll set and get rate clock support. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>