tree fe6ee40fd32a3abfe8f52b3cf797f5bc3172248b
parent 3b33dd25f1681ec478a77640f0489a805d56b226
author Shengzhou Liu <Shengzhou.Liu@nxp.com> 1462328422 +0800
committer York Sun <york.sun@nxp.com> 1464988017 -0700

board/freescale: Update ddr clk_adjust

This patch updates clk_adjust to actual value for boards with
T-series and LS-series SoCs to match the setting of clk_adjust
in latest ddr driver.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>