clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support
Add support for the R-Car M3-W+ (R8A77961) SoC.
R-Car M3-W+ is very similar to R-Car M3-W (R8A77960), which allows for
both SoCs to share a driver.
Based on Linux commit 2ba738d56db4 ("clk: renesas: r8a7796: Add R8A77961
CPG/MSSR support")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64
index b84aae0..bf12b21 100644
--- a/arch/arm/mach-rmobile/Kconfig.64
+++ b/arch/arm/mach-rmobile/Kconfig.64
@@ -36,6 +36,7 @@
bool "Renesas SoC R8A7796"
select GICV2
imply CLK_R8A77960
+ imply CLK_R8A77961
imply PINCTRL_PFC_R8A77960
imply PINCTRL_PFC_R8A77961
diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
index 939aa8d..a538e7e 100644
--- a/drivers/clk/renesas/Kconfig
+++ b/drivers/clk/renesas/Kconfig
@@ -85,6 +85,12 @@
help
Enable this to support the clocks on Renesas R8A77960 SoC.
+config CLK_R8A77961
+ bool "Renesas R8A77961 clock driver"
+ depends on CLK_RCAR_GEN3
+ help
+ Enable this to support the clocks on Renesas R8A77961 SoC.
+
config CLK_R8A77965
bool "Renesas R8A77965 clock driver"
depends on CLK_RCAR_GEN3
diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
index 8c0354b..df6bbc2 100644
--- a/drivers/clk/renesas/Makefile
+++ b/drivers/clk/renesas/Makefile
@@ -12,6 +12,7 @@
obj-$(CONFIG_CLK_RCAR_GEN3) += clk-rcar-gen3.o
obj-$(CONFIG_CLK_R8A7795) += r8a7795-cpg-mssr.o
obj-$(CONFIG_CLK_R8A77960) += r8a7796-cpg-mssr.o
+obj-$(CONFIG_CLK_R8A77961) += r8a7796-cpg-mssr.o
obj-$(CONFIG_CLK_R8A77965) += r8a77965-cpg-mssr.o
obj-$(CONFIG_CLK_R8A77970) += r8a77970-cpg-mssr.o
obj-$(CONFIG_CLK_R8A77980) += r8a77980-cpg-mssr.o
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 87b8c08..a3fee15 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -355,11 +355,30 @@
.get_pll_config = r8a7796_get_pll_config,
};
+static const struct cpg_mssr_info r8a77961_cpg_mssr_info = {
+ .core_clk = r8a7796_core_clks,
+ .core_clk_size = ARRAY_SIZE(r8a7796_core_clks),
+ .mod_clk = r8a7796_mod_clks,
+ .mod_clk_size = ARRAY_SIZE(r8a7796_mod_clks),
+ .mstp_table = r8a7796_mstp_table,
+ .mstp_table_size = ARRAY_SIZE(r8a7796_mstp_table),
+ .reset_node = "renesas,r8a77961-rst",
+ .extalr_node = "extalr",
+ .mod_clk_base = MOD_CLK_BASE,
+ .clk_extal_id = CLK_EXTAL,
+ .clk_extalr_id = CLK_EXTALR,
+ .get_pll_config = r8a7796_get_pll_config,
+};
+
static const struct udevice_id r8a7796_clk_ids[] = {
{
.compatible = "renesas,r8a7796-cpg-mssr",
.data = (ulong)&r8a7796_cpg_mssr_info,
},
+ {
+ .compatible = "renesas,r8a77961-cpg-mssr",
+ .data = (ulong)&r8a77961_cpg_mssr_info,
+ },
{ }
};