commit | f0e4f6d0ba4790324f245561f3ee680dc42030c0 | [log] [tgz] |
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author | York Sun <yorksun@freescale.com> | Thu Jun 26 11:14:44 2014 -0700 |
committer | York Sun <yorksun@freescale.com> | Tue Jul 22 16:25:55 2014 -0700 |
tree | 4ad21c2e982302743b1d220ae669eef3a26fbb18 | |
parent | c2bc46076f6dac29ddaa0513dcf67467c10c655e [diff] |
driver/ddr: Fix DDR register timing_cfg_8 The field wrtord_bg should add 2 clocks if on the fly chop is enabled, according to DDR controller manual for DDR4. Signed-off-by: York Sun <yorksun@freescale.com>