mips: spi: mscc: Add fast bitbang SPI driver
This patch add a new SPI driver for MSCC SOCs that does not sport the
designware SPI hardware controller.
Performance gain: 7.664 seconds vs. 17.633 for 1 Mbyte write.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
diff --git a/arch/mips/mach-mscc/include/mach/common.h b/arch/mips/mach-mscc/include/mach/common.h
index d18ae78..7765c06 100644
--- a/arch/mips/mach-mscc/include/mach/common.h
+++ b/arch/mips/mach-mscc/include/mach/common.h
@@ -29,6 +29,44 @@
/* Common utility functions */
+/*
+ * Perform a number of NOP instructions, blocks of 8 instructions.
+ * The (inlined) function will not affect cache or processor state.
+ */
+static inline void mscc_vcoreiii_nop_delay(int delay)
+{
+ while (delay > 0) {
+#define DELAY_8_NOPS() asm volatile("nop; nop; nop; nop; nop; nop; nop; nop;")
+ switch (delay) {
+ case 8:
+ DELAY_8_NOPS();
+ /* fallthrough */
+ case 7:
+ DELAY_8_NOPS();
+ /* fallthrough */
+ case 6:
+ DELAY_8_NOPS();
+ /* fallthrough */
+ case 5:
+ DELAY_8_NOPS();
+ /* fallthrough */
+ case 4:
+ DELAY_8_NOPS();
+ /* fallthrough */
+ case 3:
+ DELAY_8_NOPS();
+ /* fallthrough */
+ case 2:
+ DELAY_8_NOPS();
+ /* fallthrough */
+ case 1:
+ DELAY_8_NOPS();
+ }
+ delay -= 8;
+#undef DELAY_8_NOPS
+ }
+}
+
int mscc_phy_rd_wr(u8 read,
u32 miim_controller,
u8 miim_addr,