Merge patch series "m68k: Implement a default flush_dcache_all"
Tom Rini <trini@konsulko.com> says:
Prior to this series we had some de-facto required cache functions that
were either unimplemented on some architectures or differently named.
This would lead in some cases to having multiple "weak" functions
available as well. Rework things so that an architecture must provide
these functions and it is up to that architecture if a "weak" default
function makes sense, or not.
diff --git a/arch/arm/cpu/arm11/cpu.c b/arch/arm/cpu/arm11/cpu.c
index 01d2e1a..4bf0446 100644
--- a/arch/arm/cpu/arm11/cpu.c
+++ b/arch/arm/cpu/arm11/cpu.c
@@ -116,3 +116,15 @@
#endif
}
#endif
+
+#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
+/* Invalidate entire I-cache */
+void invalidate_icache_all(void)
+{
+ unsigned long i = 0;
+
+ asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (i));
+}
+#else
+void invalidate_icache_all(void) {}
+#endif
diff --git a/arch/m68k/include/asm/cache.h b/arch/m68k/include/asm/cache.h
index 6ef7f7b..aa8d2ed 100644
--- a/arch/m68k/include/asm/cache.h
+++ b/arch/m68k/include/asm/cache.h
@@ -185,7 +185,6 @@
#ifndef __ASSEMBLY__ /* put C only stuff in this section */
-void icache_invalid(void);
void dcache_invalid(void);
#endif
diff --git a/arch/m68k/lib/cache.c b/arch/m68k/lib/cache.c
index de04124..370ad40 100644
--- a/arch/m68k/lib/cache.c
+++ b/arch/m68k/lib/cache.c
@@ -29,7 +29,7 @@
void icache_enable(void)
{
- icache_invalid();
+ invalidate_icache_all();
*cf_icache_status = 1;
@@ -53,7 +53,7 @@
u32 temp = 0;
*cf_icache_status = 0;
- icache_invalid();
+ invalidate_icache_all();
#if defined(CONFIG_CF_V4) || defined(CFG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr2"::"r"(temp));
@@ -68,7 +68,7 @@
#endif
}
-void icache_invalid(void)
+void invalidate_icache_all(void)
{
u32 temp;
@@ -134,6 +134,15 @@
#endif
}
+/*
+ * Default implementation:
+ * do a range flush for the entire range
+ */
+__weak void flush_dcache_all(void)
+{
+ flush_dcache_range(0, ~0);
+}
+
__weak void invalidate_dcache_range(unsigned long start, unsigned long stop)
{
/* An empty stub, real implementation should be in platform code */
diff --git a/arch/powerpc/lib/cache.c b/arch/powerpc/lib/cache.c
index e480b26..a9cd7b8 100644
--- a/arch/powerpc/lib/cache.c
+++ b/arch/powerpc/lib/cache.c
@@ -5,6 +5,7 @@
*/
#include <cpu_func.h>
+#include <stdio.h>
#include <asm/cache.h>
#include <watchdog.h>
@@ -43,3 +44,17 @@
/* flush prefetch queue */
asm volatile("isync" : : : "memory");
}
+
+/*
+ * Default implementation:
+ * do a range flush for the entire range
+ */
+void flush_dcache_all(void)
+{
+ flush_dcache_range(0, ~0);
+}
+
+void invalidate_icache_all(void)
+{
+ puts("No arch specific invalidate_icache_all available!\n");
+}
diff --git a/arch/sh/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c
index 8c18399..d3c480e 100644
--- a/arch/sh/cpu/sh4/cache.c
+++ b/arch/sh/cpu/sh4/cache.c
@@ -6,6 +6,7 @@
#include <command.h>
#include <cpu_func.h>
+#include <stdio.h>
#include <asm/cache.h>
#include <asm/io.h>
#include <asm/processor.h>
@@ -65,6 +66,15 @@
}
}
+/*
+ * Default implementation:
+ * do a range flush for the entire range
+ */
+void flush_dcache_all(void)
+{
+ flush_dcache_range(0, ~0);
+}
+
void invalidate_dcache_range(unsigned long start, unsigned long end)
{
u32 v;
@@ -91,6 +101,11 @@
cache_control(CACHE_DISABLE);
}
+void invalidate_icache_all(void)
+{
+ puts("No arch specific invalidate_icache_all available!\n");
+}
+
int icache_status(void)
{
return 0;
diff --git a/cmd/cache.c b/cmd/cache.c
index 0254ff1..7a20682 100644
--- a/cmd/cache.c
+++ b/cmd/cache.c
@@ -13,16 +13,6 @@
static int parse_argv(const char *);
-void __weak invalidate_icache_all(void)
-{
- /* please define arch specific invalidate_icache_all */
- puts("No arch specific invalidate_icache_all available!\n");
-}
-
-__weak void noncached_set_region(void)
-{
-}
-
static int do_icache(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
@@ -52,12 +42,6 @@
return 0;
}
-void __weak flush_dcache_all(void)
-{
- puts("No arch specific flush_dcache_all available!\n");
- /* please define arch specific flush_dcache_all */
-}
-
static int do_dcache(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
@@ -69,7 +53,9 @@
break;
case 1:
dcache_enable();
+#ifdef CONFIG_SYS_NONCACHED_MEMORY
noncached_set_region();
+#endif
break;
case 2:
flush_dcache_all();
diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c
index 04b711e..7e53492 100644
--- a/drivers/net/mcffec.c
+++ b/drivers/net/mcffec.c
@@ -11,6 +11,7 @@
*/
#include <config.h>
+#include <cpu_func.h>
#include <env.h>
#include <hang.h>
#include <malloc.h>
@@ -399,7 +400,7 @@
#endif
#ifdef CONFIG_SYS_UNIFY_CACHE
- icache_invalid();
+ invalidate_icache_all();
#endif
j = 0;
@@ -433,7 +434,7 @@
for (;;) {
#ifdef CONFIG_SYS_UNIFY_CACHE
- icache_invalid();
+ invalidate_icache_all();
#endif
/* If nothing received - leave for() loop */
if (info->rxbd[info->rx_idx].cbd_sc & BD_ENET_RX_EMPTY)
diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c
index 6042436..45dc5b6 100644
--- a/lib/efi_loader/efi_image_loader.c
+++ b/lib/efi_loader/efi_image_loader.c
@@ -173,11 +173,6 @@
return EFI_SUCCESS;
}
-void __weak invalidate_icache_all(void)
-{
- /* If the system doesn't support icache_all flush, cross our fingers */
-}
-
/**
* efi_set_code_and_data_type() - determine the memory types to be used for code
* and data.
@@ -986,7 +981,13 @@
/* Flush cache */
flush_cache((ulong)efi_reloc,
ALIGN(virt_size, EFI_CACHELINE_SIZE));
- invalidate_icache_all();
+
+ /*
+ * If on x86 a write affects a prefetched instruction,
+ * the prefetch queue is invalidated.
+ */
+ if (!CONFIG_IS_ENABLED(X86))
+ invalidate_icache_all();
/* Populate the loaded image interface bits */
loaded_image_info->image_base = efi_reloc;
diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c
index 011bcd0..05369c4 100644
--- a/lib/efi_loader/efi_runtime.c
+++ b/lib/efi_loader/efi_runtime.c
@@ -783,7 +783,12 @@
lastoff = offset;
#endif
- invalidate_icache_all();
+ /*
+ * If on x86 a write affects a prefetched instruction,
+ * the prefetch queue is invalidated.
+ */
+ if (!CONFIG_IS_ENABLED(X86))
+ invalidate_icache_all();
}
/**