phy: marvell: a3700: Access USB3 register indirectly on lane 2
When USB3 is on comphy lane 2 on the Armada 37xx, the registers
have to be accessed indirectly via SATA indirect access.
This is the case of the Turris Mox board from CZ.NIC.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
diff --git a/drivers/phy/marvell/comphy_a3700.h b/drivers/phy/marvell/comphy_a3700.h
index 0d7b425..07f4792 100644
--- a/drivers/phy/marvell/comphy_a3700.h
+++ b/drivers/phy/marvell/comphy_a3700.h
@@ -59,6 +59,7 @@
#define USB2PHY2_BASE MVEBU_REG(0x05F000)
#define USB32_CTRL_BASE MVEBU_REG(0x05D800)
#define USB3PHY_SHFT 2
+#define USB3PHY_LANE2_REG_BASE_OFFSET 0x200
static inline void __iomem *sgmiiphy_addr(u32 lane, u32 addr)
{