tree deba93cf20a02a60c6a703b260d874eb3cc8f5cf
parent 5df223c3af495e015da50fb065e400bc94a6e6b8
author Kever Yang <kever.yang@rock-chips.com> 1497319391 +0800
committer Philipp Tomsich <philipp.tomsich@theobroma-systems.com> 1498228823 +0200

rockchip: clk: rk3036: correct setting for pll integer mode

According to rk3036 TRM, pll_con1[12] should be set to '1' for the pll
integer mode, while the '0' means the frac mode.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>